cx88-dvb.c 40 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. #include "stv0900.h"
  54. #include "stb6100.h"
  55. #include "stb6100_proc.h"
  56. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  57. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  58. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  59. MODULE_LICENSE("GPL");
  60. static unsigned int debug;
  61. module_param(debug, int, 0644);
  62. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  63. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  64. #define dprintk(level,fmt, arg...) if (debug >= level) \
  65. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  66. /* ------------------------------------------------------------------ */
  67. static int dvb_buf_setup(struct videobuf_queue *q,
  68. unsigned int *count, unsigned int *size)
  69. {
  70. struct cx8802_dev *dev = q->priv_data;
  71. dev->ts_packet_size = 188 * 4;
  72. dev->ts_packet_count = 32;
  73. *size = dev->ts_packet_size * dev->ts_packet_count;
  74. *count = 32;
  75. return 0;
  76. }
  77. static int dvb_buf_prepare(struct videobuf_queue *q,
  78. struct videobuf_buffer *vb, enum v4l2_field field)
  79. {
  80. struct cx8802_dev *dev = q->priv_data;
  81. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  82. }
  83. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  84. {
  85. struct cx8802_dev *dev = q->priv_data;
  86. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  87. }
  88. static void dvb_buf_release(struct videobuf_queue *q,
  89. struct videobuf_buffer *vb)
  90. {
  91. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  92. }
  93. static struct videobuf_queue_ops dvb_qops = {
  94. .buf_setup = dvb_buf_setup,
  95. .buf_prepare = dvb_buf_prepare,
  96. .buf_queue = dvb_buf_queue,
  97. .buf_release = dvb_buf_release,
  98. };
  99. /* ------------------------------------------------------------------ */
  100. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  101. {
  102. struct cx8802_dev *dev= fe->dvb->priv;
  103. struct cx8802_driver *drv = NULL;
  104. int ret = 0;
  105. int fe_id;
  106. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  107. if (!fe_id) {
  108. printk(KERN_ERR "%s() No frontend found\n", __func__);
  109. return -EINVAL;
  110. }
  111. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  112. if (drv) {
  113. if (acquire){
  114. dev->frontends.active_fe_id = fe_id;
  115. ret = drv->request_acquire(drv);
  116. } else {
  117. ret = drv->request_release(drv);
  118. dev->frontends.active_fe_id = 0;
  119. }
  120. }
  121. return ret;
  122. }
  123. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  124. {
  125. struct videobuf_dvb_frontends *f;
  126. struct videobuf_dvb_frontend *fe;
  127. if (!core->dvbdev)
  128. return;
  129. f = &core->dvbdev->frontends;
  130. if (!f)
  131. return;
  132. if (f->gate <= 1) /* undefined or fe0 */
  133. fe = videobuf_dvb_get_frontend(f, 1);
  134. else
  135. fe = videobuf_dvb_get_frontend(f, f->gate);
  136. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  137. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  138. }
  139. /* ------------------------------------------------------------------ */
  140. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  141. {
  142. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  143. static u8 reset [] = { RESET, 0x80 };
  144. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  145. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  146. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  147. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  148. mt352_write(fe, clock_config, sizeof(clock_config));
  149. udelay(200);
  150. mt352_write(fe, reset, sizeof(reset));
  151. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  152. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  153. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  154. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  155. return 0;
  156. }
  157. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  158. {
  159. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  160. static u8 reset [] = { RESET, 0x80 };
  161. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  162. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  163. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  164. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  165. mt352_write(fe, clock_config, sizeof(clock_config));
  166. udelay(200);
  167. mt352_write(fe, reset, sizeof(reset));
  168. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  169. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  170. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  171. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  172. return 0;
  173. }
  174. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  175. {
  176. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  177. static u8 reset [] = { 0x50, 0x80 };
  178. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  179. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  180. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  181. static u8 dntv_extra[] = { 0xB5, 0x7A };
  182. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  183. mt352_write(fe, clock_config, sizeof(clock_config));
  184. udelay(2000);
  185. mt352_write(fe, reset, sizeof(reset));
  186. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  187. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  188. udelay(2000);
  189. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  190. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  191. return 0;
  192. }
  193. static struct mt352_config dvico_fusionhdtv = {
  194. .demod_address = 0x0f,
  195. .demod_init = dvico_fusionhdtv_demod_init,
  196. };
  197. static struct mt352_config dntv_live_dvbt_config = {
  198. .demod_address = 0x0f,
  199. .demod_init = dntv_live_dvbt_demod_init,
  200. };
  201. static struct mt352_config dvico_fusionhdtv_dual = {
  202. .demod_address = 0x0f,
  203. .demod_init = dvico_dual_demod_init,
  204. };
  205. static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  206. .demod_address = (0x1e >> 1),
  207. .no_tuner = 1,
  208. .if2 = 45600,
  209. };
  210. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  211. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  212. {
  213. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  214. static u8 reset [] = { 0x50, 0x80 };
  215. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  216. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  217. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  218. static u8 dntv_extra[] = { 0xB5, 0x7A };
  219. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  220. mt352_write(fe, clock_config, sizeof(clock_config));
  221. udelay(2000);
  222. mt352_write(fe, reset, sizeof(reset));
  223. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  224. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  225. udelay(2000);
  226. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  227. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  228. return 0;
  229. }
  230. static struct mt352_config dntv_live_dvbt_pro_config = {
  231. .demod_address = 0x0f,
  232. .no_tuner = 1,
  233. .demod_init = dntv_live_dvbt_pro_demod_init,
  234. };
  235. #endif
  236. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  237. .demod_address = 0x0f,
  238. .no_tuner = 1,
  239. };
  240. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  241. .demod_address = 0x0f,
  242. .if2 = 45600,
  243. .no_tuner = 1,
  244. };
  245. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  246. .demod_address = 0x0f,
  247. .if2 = 4560,
  248. .no_tuner = 1,
  249. .demod_init = dvico_fusionhdtv_demod_init,
  250. };
  251. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  252. .demod_address = 0x0f,
  253. };
  254. static struct cx22702_config connexant_refboard_config = {
  255. .demod_address = 0x43,
  256. .output_mode = CX22702_SERIAL_OUTPUT,
  257. };
  258. static struct cx22702_config hauppauge_hvr_config = {
  259. .demod_address = 0x63,
  260. .output_mode = CX22702_SERIAL_OUTPUT,
  261. };
  262. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  263. {
  264. struct cx8802_dev *dev= fe->dvb->priv;
  265. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  266. return 0;
  267. }
  268. static struct or51132_config pchdtv_hd3000 = {
  269. .demod_address = 0x15,
  270. .set_ts_params = or51132_set_ts_param,
  271. };
  272. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  273. {
  274. struct cx8802_dev *dev= fe->dvb->priv;
  275. struct cx88_core *core = dev->core;
  276. dprintk(1, "%s: index = %d\n", __func__, index);
  277. if (index == 0)
  278. cx_clear(MO_GP0_IO, 8);
  279. else
  280. cx_set(MO_GP0_IO, 8);
  281. return 0;
  282. }
  283. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  284. {
  285. struct cx8802_dev *dev= fe->dvb->priv;
  286. if (is_punctured)
  287. dev->ts_gen_cntrl |= 0x04;
  288. else
  289. dev->ts_gen_cntrl &= ~0x04;
  290. return 0;
  291. }
  292. static struct lgdt330x_config fusionhdtv_3_gold = {
  293. .demod_address = 0x0e,
  294. .demod_chip = LGDT3302,
  295. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  296. .set_ts_params = lgdt330x_set_ts_param,
  297. };
  298. static struct lgdt330x_config fusionhdtv_5_gold = {
  299. .demod_address = 0x0e,
  300. .demod_chip = LGDT3303,
  301. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  302. .set_ts_params = lgdt330x_set_ts_param,
  303. };
  304. static struct lgdt330x_config pchdtv_hd5500 = {
  305. .demod_address = 0x59,
  306. .demod_chip = LGDT3303,
  307. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  308. .set_ts_params = lgdt330x_set_ts_param,
  309. };
  310. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  311. {
  312. struct cx8802_dev *dev= fe->dvb->priv;
  313. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  314. return 0;
  315. }
  316. static struct nxt200x_config ati_hdtvwonder = {
  317. .demod_address = 0x0a,
  318. .set_ts_params = nxt200x_set_ts_param,
  319. };
  320. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  321. int is_punctured)
  322. {
  323. struct cx8802_dev *dev= fe->dvb->priv;
  324. dev->ts_gen_cntrl = 0x02;
  325. return 0;
  326. }
  327. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  328. fe_sec_voltage_t voltage)
  329. {
  330. struct cx8802_dev *dev= fe->dvb->priv;
  331. struct cx88_core *core = dev->core;
  332. if (voltage == SEC_VOLTAGE_OFF)
  333. cx_write(MO_GP0_IO, 0x000006fb);
  334. else
  335. cx_write(MO_GP0_IO, 0x000006f9);
  336. if (core->prev_set_voltage)
  337. return core->prev_set_voltage(fe, voltage);
  338. return 0;
  339. }
  340. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  341. fe_sec_voltage_t voltage)
  342. {
  343. struct cx8802_dev *dev= fe->dvb->priv;
  344. struct cx88_core *core = dev->core;
  345. if (voltage == SEC_VOLTAGE_OFF) {
  346. dprintk(1,"LNB Voltage OFF\n");
  347. cx_write(MO_GP0_IO, 0x0000efff);
  348. }
  349. if (core->prev_set_voltage)
  350. return core->prev_set_voltage(fe, voltage);
  351. return 0;
  352. }
  353. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  354. fe_sec_voltage_t voltage)
  355. {
  356. struct cx8802_dev *dev= fe->dvb->priv;
  357. struct cx88_core *core = dev->core;
  358. cx_set(MO_GP0_IO, 0x6040);
  359. switch (voltage) {
  360. case SEC_VOLTAGE_13:
  361. cx_clear(MO_GP0_IO, 0x20);
  362. break;
  363. case SEC_VOLTAGE_18:
  364. cx_set(MO_GP0_IO, 0x20);
  365. break;
  366. case SEC_VOLTAGE_OFF:
  367. cx_clear(MO_GP0_IO, 0x20);
  368. break;
  369. }
  370. if (core->prev_set_voltage)
  371. return core->prev_set_voltage(fe, voltage);
  372. return 0;
  373. }
  374. static struct cx24123_config geniatech_dvbs_config = {
  375. .demod_address = 0x55,
  376. .set_ts_params = cx24123_set_ts_param,
  377. };
  378. static struct cx24123_config hauppauge_novas_config = {
  379. .demod_address = 0x55,
  380. .set_ts_params = cx24123_set_ts_param,
  381. };
  382. static struct cx24123_config kworld_dvbs_100_config = {
  383. .demod_address = 0x15,
  384. .set_ts_params = cx24123_set_ts_param,
  385. .lnb_polarity = 1,
  386. };
  387. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  388. .demod_address = 0x32 >> 1,
  389. .output_mode = S5H1409_PARALLEL_OUTPUT,
  390. .gpio = S5H1409_GPIO_ON,
  391. .qam_if = 44000,
  392. .inversion = S5H1409_INVERSION_OFF,
  393. .status_mode = S5H1409_DEMODLOCKING,
  394. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  395. };
  396. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  397. .demod_address = 0x32 >> 1,
  398. .output_mode = S5H1409_SERIAL_OUTPUT,
  399. .gpio = S5H1409_GPIO_OFF,
  400. .inversion = S5H1409_INVERSION_OFF,
  401. .status_mode = S5H1409_DEMODLOCKING,
  402. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  403. };
  404. static struct s5h1409_config kworld_atsc_120_config = {
  405. .demod_address = 0x32 >> 1,
  406. .output_mode = S5H1409_SERIAL_OUTPUT,
  407. .gpio = S5H1409_GPIO_OFF,
  408. .inversion = S5H1409_INVERSION_OFF,
  409. .status_mode = S5H1409_DEMODLOCKING,
  410. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  411. };
  412. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  413. .i2c_address = 0x64,
  414. .if_khz = 5380,
  415. };
  416. static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  417. .demod_address = (0x1e >> 1),
  418. .no_tuner = 1,
  419. .if2 = 45600,
  420. };
  421. static struct zl10353_config cx88_geniatech_x8000_mt = {
  422. .demod_address = (0x1e >> 1),
  423. .no_tuner = 1,
  424. .disable_i2c_gate_ctrl = 1,
  425. };
  426. static struct s5h1411_config dvico_fusionhdtv7_config = {
  427. .output_mode = S5H1411_SERIAL_OUTPUT,
  428. .gpio = S5H1411_GPIO_ON,
  429. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  430. .qam_if = S5H1411_IF_44000,
  431. .vsb_if = S5H1411_IF_44000,
  432. .inversion = S5H1411_INVERSION_OFF,
  433. .status_mode = S5H1411_DEMODLOCKING
  434. };
  435. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  436. .i2c_address = 0xc2 >> 1,
  437. .if_khz = 5380,
  438. };
  439. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  440. {
  441. struct dvb_frontend *fe;
  442. struct videobuf_dvb_frontend *fe0 = NULL;
  443. struct xc2028_ctrl ctl;
  444. struct xc2028_config cfg = {
  445. .i2c_adap = &dev->core->i2c_adap,
  446. .i2c_addr = addr,
  447. .ctrl = &ctl,
  448. };
  449. /* Get the first frontend */
  450. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  451. if (!fe0)
  452. return -EINVAL;
  453. if (!fe0->dvb.frontend) {
  454. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  455. "Can't attach xc3028\n",
  456. dev->core->name);
  457. return -EINVAL;
  458. }
  459. /*
  460. * Some xc3028 devices may be hidden by an I2C gate. This is known
  461. * to happen with some s5h1409-based devices.
  462. * Now that I2C gate is open, sets up xc3028 configuration
  463. */
  464. cx88_setup_xc3028(dev->core, &ctl);
  465. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  466. if (!fe) {
  467. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  468. dev->core->name);
  469. dvb_frontend_detach(fe0->dvb.frontend);
  470. dvb_unregister_frontend(fe0->dvb.frontend);
  471. fe0->dvb.frontend = NULL;
  472. return -EINVAL;
  473. }
  474. printk(KERN_INFO "%s/2: xc3028 attached\n",
  475. dev->core->name);
  476. return 0;
  477. }
  478. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  479. int is_punctured)
  480. {
  481. struct cx8802_dev *dev = fe->dvb->priv;
  482. dev->ts_gen_cntrl = 0x2;
  483. return 0;
  484. }
  485. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  486. int is_punctured)
  487. {
  488. struct cx8802_dev *dev = fe->dvb->priv;
  489. dev->ts_gen_cntrl = 0;
  490. return 0;
  491. }
  492. static int cx24116_reset_device(struct dvb_frontend *fe)
  493. {
  494. struct cx8802_dev *dev = fe->dvb->priv;
  495. struct cx88_core *core = dev->core;
  496. /* Reset the part */
  497. /* Put the cx24116 into reset */
  498. cx_write(MO_SRST_IO, 0);
  499. msleep(10);
  500. /* Take the cx24116 out of reset */
  501. cx_write(MO_SRST_IO, 1);
  502. msleep(10);
  503. return 0;
  504. }
  505. static struct cx24116_config hauppauge_hvr4000_config = {
  506. .demod_address = 0x05,
  507. .set_ts_params = cx24116_set_ts_param,
  508. .reset_device = cx24116_reset_device,
  509. };
  510. static struct cx24116_config tevii_s460_config = {
  511. .demod_address = 0x55,
  512. .set_ts_params = cx24116_set_ts_param,
  513. .reset_device = cx24116_reset_device,
  514. };
  515. static struct stv0900_config prof_7301_stv0900_config = {
  516. .demod_address = 0x6a,
  517. /* demod_mode = 0,*/
  518. .xtal = 27000000,
  519. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  520. .diseqc_mode = 2,/* 2/3 PWM */
  521. .tun1_maddress = 0,/* 0x60 */
  522. .tun1_adc = 0,/* 2 Vpp */
  523. .path1_mode = 3,
  524. .set_ts_params = stv0900_set_ts_param,
  525. };
  526. static struct stb6100_config prof_7301_stb6100_config = {
  527. .tuner_address = 0x60,
  528. .refclock = 27000000,
  529. };
  530. static struct stv0299_config tevii_tuner_sharp_config = {
  531. .demod_address = 0x68,
  532. .inittab = sharp_z0194a_inittab,
  533. .mclk = 88000000UL,
  534. .invert = 1,
  535. .skip_reinit = 0,
  536. .lock_output = 1,
  537. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  538. .min_delay_ms = 100,
  539. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  540. .set_ts_params = cx24116_set_ts_param,
  541. };
  542. static struct stv0288_config tevii_tuner_earda_config = {
  543. .demod_address = 0x68,
  544. .min_delay_ms = 100,
  545. .set_ts_params = cx24116_set_ts_param,
  546. };
  547. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  548. {
  549. struct cx88_core *core = dev->core;
  550. struct videobuf_dvb_frontend *fe = NULL;
  551. int i;
  552. mutex_init(&dev->frontends.lock);
  553. INIT_LIST_HEAD(&dev->frontends.felist);
  554. if (!core->board.num_frontends)
  555. return -ENODEV;
  556. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  557. core->board.num_frontends);
  558. for (i = 1; i <= core->board.num_frontends; i++) {
  559. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  560. if (!fe) {
  561. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  562. videobuf_dvb_dealloc_frontends(&dev->frontends);
  563. return -ENOMEM;
  564. }
  565. }
  566. return 0;
  567. }
  568. static int dvb_register(struct cx8802_dev *dev)
  569. {
  570. struct cx88_core *core = dev->core;
  571. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  572. int mfe_shared = 0; /* bus not shared by default */
  573. if (0 != core->i2c_rc) {
  574. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  575. goto frontend_detach;
  576. }
  577. /* Get the first frontend */
  578. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  579. if (!fe0)
  580. goto frontend_detach;
  581. /* multi-frontend gate control is undefined or defaults to fe0 */
  582. dev->frontends.gate = 0;
  583. /* Sets the gate control callback to be used by i2c command calls */
  584. core->gate_ctrl = cx88_dvb_gate_ctrl;
  585. /* init frontend(s) */
  586. switch (core->boardnr) {
  587. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  588. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  589. &connexant_refboard_config,
  590. &core->i2c_adap);
  591. if (fe0->dvb.frontend != NULL) {
  592. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  593. 0x61, &core->i2c_adap,
  594. DVB_PLL_THOMSON_DTT759X))
  595. goto frontend_detach;
  596. }
  597. break;
  598. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  599. case CX88_BOARD_CONEXANT_DVB_T1:
  600. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  601. case CX88_BOARD_WINFAST_DTV1000:
  602. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  603. &connexant_refboard_config,
  604. &core->i2c_adap);
  605. if (fe0->dvb.frontend != NULL) {
  606. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  607. 0x60, &core->i2c_adap,
  608. DVB_PLL_THOMSON_DTT7579))
  609. goto frontend_detach;
  610. }
  611. break;
  612. case CX88_BOARD_WINFAST_DTV2000H:
  613. case CX88_BOARD_WINFAST_DTV2000H_J:
  614. case CX88_BOARD_HAUPPAUGE_HVR1100:
  615. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  616. case CX88_BOARD_HAUPPAUGE_HVR1300:
  617. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  618. &hauppauge_hvr_config,
  619. &core->i2c_adap);
  620. if (fe0->dvb.frontend != NULL) {
  621. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  622. &core->i2c_adap, 0x61,
  623. TUNER_PHILIPS_FMD1216ME_MK3))
  624. goto frontend_detach;
  625. }
  626. break;
  627. case CX88_BOARD_HAUPPAUGE_HVR3000:
  628. /* MFE frontend 1 */
  629. mfe_shared = 1;
  630. dev->frontends.gate = 2;
  631. /* DVB-S init */
  632. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  633. &hauppauge_novas_config,
  634. &dev->core->i2c_adap);
  635. if (fe0->dvb.frontend) {
  636. if (!dvb_attach(isl6421_attach,
  637. fe0->dvb.frontend,
  638. &dev->core->i2c_adap,
  639. 0x08, ISL6421_DCL, 0x00))
  640. goto frontend_detach;
  641. }
  642. /* MFE frontend 2 */
  643. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  644. if (!fe1)
  645. goto frontend_detach;
  646. /* DVB-T init */
  647. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  648. &hauppauge_hvr_config,
  649. &dev->core->i2c_adap);
  650. if (fe1->dvb.frontend) {
  651. fe1->dvb.frontend->id = 1;
  652. if (!dvb_attach(simple_tuner_attach,
  653. fe1->dvb.frontend,
  654. &dev->core->i2c_adap,
  655. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  656. goto frontend_detach;
  657. }
  658. break;
  659. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  660. fe0->dvb.frontend = dvb_attach(mt352_attach,
  661. &dvico_fusionhdtv,
  662. &core->i2c_adap);
  663. if (fe0->dvb.frontend != NULL) {
  664. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  665. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  666. goto frontend_detach;
  667. break;
  668. }
  669. /* ZL10353 replaces MT352 on later cards */
  670. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  671. &dvico_fusionhdtv_plus_v1_1,
  672. &core->i2c_adap);
  673. if (fe0->dvb.frontend != NULL) {
  674. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  675. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  676. goto frontend_detach;
  677. }
  678. break;
  679. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  680. /* The tin box says DEE1601, but it seems to be DTT7579
  681. * compatible, with a slightly different MT352 AGC gain. */
  682. fe0->dvb.frontend = dvb_attach(mt352_attach,
  683. &dvico_fusionhdtv_dual,
  684. &core->i2c_adap);
  685. if (fe0->dvb.frontend != NULL) {
  686. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  687. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  688. goto frontend_detach;
  689. break;
  690. }
  691. /* ZL10353 replaces MT352 on later cards */
  692. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  693. &dvico_fusionhdtv_plus_v1_1,
  694. &core->i2c_adap);
  695. if (fe0->dvb.frontend != NULL) {
  696. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  697. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  698. goto frontend_detach;
  699. }
  700. break;
  701. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  702. fe0->dvb.frontend = dvb_attach(mt352_attach,
  703. &dvico_fusionhdtv,
  704. &core->i2c_adap);
  705. if (fe0->dvb.frontend != NULL) {
  706. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  707. 0x61, NULL, DVB_PLL_LG_Z201))
  708. goto frontend_detach;
  709. }
  710. break;
  711. case CX88_BOARD_KWORLD_DVB_T:
  712. case CX88_BOARD_DNTV_LIVE_DVB_T:
  713. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  714. fe0->dvb.frontend = dvb_attach(mt352_attach,
  715. &dntv_live_dvbt_config,
  716. &core->i2c_adap);
  717. if (fe0->dvb.frontend != NULL) {
  718. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  719. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  720. goto frontend_detach;
  721. }
  722. break;
  723. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  724. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  725. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  726. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  727. &dev->vp3054->adap);
  728. if (fe0->dvb.frontend != NULL) {
  729. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  730. &core->i2c_adap, 0x61,
  731. TUNER_PHILIPS_FMD1216ME_MK3))
  732. goto frontend_detach;
  733. }
  734. #else
  735. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  736. core->name);
  737. #endif
  738. break;
  739. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  740. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  741. &dvico_fusionhdtv_hybrid,
  742. &core->i2c_adap);
  743. if (fe0->dvb.frontend != NULL) {
  744. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  745. &core->i2c_adap, 0x61,
  746. TUNER_THOMSON_FE6600))
  747. goto frontend_detach;
  748. }
  749. break;
  750. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  751. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  752. &dvico_fusionhdtv_xc3028,
  753. &core->i2c_adap);
  754. if (fe0->dvb.frontend == NULL)
  755. fe0->dvb.frontend = dvb_attach(mt352_attach,
  756. &dvico_fusionhdtv_mt352_xc3028,
  757. &core->i2c_adap);
  758. /*
  759. * On this board, the demod provides the I2C bus pullup.
  760. * We must not permit gate_ctrl to be performed, or
  761. * the xc3028 cannot communicate on the bus.
  762. */
  763. if (fe0->dvb.frontend)
  764. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  765. if (attach_xc3028(0x61, dev) < 0)
  766. goto frontend_detach;
  767. break;
  768. case CX88_BOARD_PCHDTV_HD3000:
  769. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  770. &core->i2c_adap);
  771. if (fe0->dvb.frontend != NULL) {
  772. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  773. &core->i2c_adap, 0x61,
  774. TUNER_THOMSON_DTT761X))
  775. goto frontend_detach;
  776. }
  777. break;
  778. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  779. dev->ts_gen_cntrl = 0x08;
  780. /* Do a hardware reset of chip before using it. */
  781. cx_clear(MO_GP0_IO, 1);
  782. mdelay(100);
  783. cx_set(MO_GP0_IO, 1);
  784. mdelay(200);
  785. /* Select RF connector callback */
  786. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  787. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  788. &fusionhdtv_3_gold,
  789. &core->i2c_adap);
  790. if (fe0->dvb.frontend != NULL) {
  791. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  792. &core->i2c_adap, 0x61,
  793. TUNER_MICROTUNE_4042FI5))
  794. goto frontend_detach;
  795. }
  796. break;
  797. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  798. dev->ts_gen_cntrl = 0x08;
  799. /* Do a hardware reset of chip before using it. */
  800. cx_clear(MO_GP0_IO, 1);
  801. mdelay(100);
  802. cx_set(MO_GP0_IO, 9);
  803. mdelay(200);
  804. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  805. &fusionhdtv_3_gold,
  806. &core->i2c_adap);
  807. if (fe0->dvb.frontend != NULL) {
  808. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  809. &core->i2c_adap, 0x61,
  810. TUNER_THOMSON_DTT761X))
  811. goto frontend_detach;
  812. }
  813. break;
  814. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  815. dev->ts_gen_cntrl = 0x08;
  816. /* Do a hardware reset of chip before using it. */
  817. cx_clear(MO_GP0_IO, 1);
  818. mdelay(100);
  819. cx_set(MO_GP0_IO, 1);
  820. mdelay(200);
  821. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  822. &fusionhdtv_5_gold,
  823. &core->i2c_adap);
  824. if (fe0->dvb.frontend != NULL) {
  825. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  826. &core->i2c_adap, 0x61,
  827. TUNER_LG_TDVS_H06XF))
  828. goto frontend_detach;
  829. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  830. &core->i2c_adap, 0x43))
  831. goto frontend_detach;
  832. }
  833. break;
  834. case CX88_BOARD_PCHDTV_HD5500:
  835. dev->ts_gen_cntrl = 0x08;
  836. /* Do a hardware reset of chip before using it. */
  837. cx_clear(MO_GP0_IO, 1);
  838. mdelay(100);
  839. cx_set(MO_GP0_IO, 1);
  840. mdelay(200);
  841. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  842. &pchdtv_hd5500,
  843. &core->i2c_adap);
  844. if (fe0->dvb.frontend != NULL) {
  845. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  846. &core->i2c_adap, 0x61,
  847. TUNER_LG_TDVS_H06XF))
  848. goto frontend_detach;
  849. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  850. &core->i2c_adap, 0x43))
  851. goto frontend_detach;
  852. }
  853. break;
  854. case CX88_BOARD_ATI_HDTVWONDER:
  855. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  856. &ati_hdtvwonder,
  857. &core->i2c_adap);
  858. if (fe0->dvb.frontend != NULL) {
  859. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  860. &core->i2c_adap, 0x61,
  861. TUNER_PHILIPS_TUV1236D))
  862. goto frontend_detach;
  863. }
  864. break;
  865. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  866. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  867. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  868. &hauppauge_novas_config,
  869. &core->i2c_adap);
  870. if (fe0->dvb.frontend) {
  871. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  872. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  873. goto frontend_detach;
  874. }
  875. break;
  876. case CX88_BOARD_KWORLD_DVBS_100:
  877. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  878. &kworld_dvbs_100_config,
  879. &core->i2c_adap);
  880. if (fe0->dvb.frontend) {
  881. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  882. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  883. }
  884. break;
  885. case CX88_BOARD_GENIATECH_DVBS:
  886. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  887. &geniatech_dvbs_config,
  888. &core->i2c_adap);
  889. if (fe0->dvb.frontend) {
  890. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  891. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  892. }
  893. break;
  894. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  895. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  896. &pinnacle_pctv_hd_800i_config,
  897. &core->i2c_adap);
  898. if (fe0->dvb.frontend != NULL) {
  899. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  900. &core->i2c_adap,
  901. &pinnacle_pctv_hd_800i_tuner_config))
  902. goto frontend_detach;
  903. }
  904. break;
  905. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  906. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  907. &dvico_hdtv5_pci_nano_config,
  908. &core->i2c_adap);
  909. if (fe0->dvb.frontend != NULL) {
  910. struct dvb_frontend *fe;
  911. struct xc2028_config cfg = {
  912. .i2c_adap = &core->i2c_adap,
  913. .i2c_addr = 0x61,
  914. };
  915. static struct xc2028_ctrl ctl = {
  916. .fname = XC2028_DEFAULT_FIRMWARE,
  917. .max_len = 64,
  918. .scode_table = XC3028_FE_OREN538,
  919. };
  920. fe = dvb_attach(xc2028_attach,
  921. fe0->dvb.frontend, &cfg);
  922. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  923. fe->ops.tuner_ops.set_config(fe, &ctl);
  924. }
  925. break;
  926. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  927. case CX88_BOARD_WINFAST_DTV1800H:
  928. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  929. &cx88_pinnacle_hybrid_pctv,
  930. &core->i2c_adap);
  931. if (fe0->dvb.frontend) {
  932. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  933. if (attach_xc3028(0x61, dev) < 0)
  934. goto frontend_detach;
  935. }
  936. break;
  937. case CX88_BOARD_GENIATECH_X8000_MT:
  938. dev->ts_gen_cntrl = 0x00;
  939. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  940. &cx88_geniatech_x8000_mt,
  941. &core->i2c_adap);
  942. if (attach_xc3028(0x61, dev) < 0)
  943. goto frontend_detach;
  944. break;
  945. case CX88_BOARD_KWORLD_ATSC_120:
  946. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  947. &kworld_atsc_120_config,
  948. &core->i2c_adap);
  949. if (attach_xc3028(0x61, dev) < 0)
  950. goto frontend_detach;
  951. break;
  952. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  953. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  954. &dvico_fusionhdtv7_config,
  955. &core->i2c_adap);
  956. if (fe0->dvb.frontend != NULL) {
  957. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  958. &core->i2c_adap,
  959. &dvico_fusionhdtv7_tuner_config))
  960. goto frontend_detach;
  961. }
  962. break;
  963. case CX88_BOARD_HAUPPAUGE_HVR4000:
  964. /* MFE frontend 1 */
  965. mfe_shared = 1;
  966. dev->frontends.gate = 2;
  967. /* DVB-S/S2 Init */
  968. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  969. &hauppauge_hvr4000_config,
  970. &dev->core->i2c_adap);
  971. if (fe0->dvb.frontend) {
  972. if (!dvb_attach(isl6421_attach,
  973. fe0->dvb.frontend,
  974. &dev->core->i2c_adap,
  975. 0x08, ISL6421_DCL, 0x00))
  976. goto frontend_detach;
  977. }
  978. /* MFE frontend 2 */
  979. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  980. if (!fe1)
  981. goto frontend_detach;
  982. /* DVB-T Init */
  983. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  984. &hauppauge_hvr_config,
  985. &dev->core->i2c_adap);
  986. if (fe1->dvb.frontend) {
  987. fe1->dvb.frontend->id = 1;
  988. if (!dvb_attach(simple_tuner_attach,
  989. fe1->dvb.frontend,
  990. &dev->core->i2c_adap,
  991. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  992. goto frontend_detach;
  993. }
  994. break;
  995. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  996. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  997. &hauppauge_hvr4000_config,
  998. &dev->core->i2c_adap);
  999. if (fe0->dvb.frontend) {
  1000. if (!dvb_attach(isl6421_attach,
  1001. fe0->dvb.frontend,
  1002. &dev->core->i2c_adap,
  1003. 0x08, ISL6421_DCL, 0x00))
  1004. goto frontend_detach;
  1005. }
  1006. break;
  1007. case CX88_BOARD_PROF_6200:
  1008. case CX88_BOARD_TBS_8910:
  1009. case CX88_BOARD_TEVII_S420:
  1010. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1011. &tevii_tuner_sharp_config,
  1012. &core->i2c_adap);
  1013. if (fe0->dvb.frontend != NULL) {
  1014. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1015. &core->i2c_adap, DVB_PLL_OPERA1))
  1016. goto frontend_detach;
  1017. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1018. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1019. } else {
  1020. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1021. &tevii_tuner_earda_config,
  1022. &core->i2c_adap);
  1023. if (fe0->dvb.frontend != NULL) {
  1024. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1025. &core->i2c_adap))
  1026. goto frontend_detach;
  1027. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1028. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1029. }
  1030. }
  1031. break;
  1032. case CX88_BOARD_TEVII_S460:
  1033. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1034. &tevii_s460_config,
  1035. &core->i2c_adap);
  1036. if (fe0->dvb.frontend != NULL)
  1037. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1038. break;
  1039. case CX88_BOARD_OMICOM_SS4_PCI:
  1040. case CX88_BOARD_TBS_8920:
  1041. case CX88_BOARD_PROF_7300:
  1042. case CX88_BOARD_SATTRADE_ST4200:
  1043. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1044. &hauppauge_hvr4000_config,
  1045. &core->i2c_adap);
  1046. if (fe0->dvb.frontend != NULL)
  1047. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1048. break;
  1049. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1050. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1051. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1052. &core->i2c_adap);
  1053. if (fe0->dvb.frontend) {
  1054. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1055. if (attach_xc3028(0x61, dev) < 0)
  1056. goto frontend_detach;
  1057. }
  1058. break;
  1059. case CX88_BOARD_PROF_7301:{
  1060. struct dvb_tuner_ops *tuner_ops = NULL;
  1061. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1062. &prof_7301_stv0900_config,
  1063. &core->i2c_adap, 0);
  1064. if (fe0->dvb.frontend != NULL) {
  1065. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1066. &prof_7301_stb6100_config,
  1067. &core->i2c_adap))
  1068. goto frontend_detach;
  1069. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1070. tuner_ops->set_frequency = stb6100_set_freq;
  1071. tuner_ops->get_frequency = stb6100_get_freq;
  1072. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1073. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1074. core->prev_set_voltage =
  1075. fe0->dvb.frontend->ops.set_voltage;
  1076. fe0->dvb.frontend->ops.set_voltage =
  1077. tevii_dvbs_set_voltage;
  1078. }
  1079. break;
  1080. }
  1081. default:
  1082. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1083. core->name);
  1084. break;
  1085. }
  1086. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1087. printk(KERN_ERR
  1088. "%s/2: frontend initialization failed\n",
  1089. core->name);
  1090. goto frontend_detach;
  1091. }
  1092. /* define general-purpose callback pointer */
  1093. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1094. /* Ensure all frontends negotiate bus access */
  1095. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1096. if (fe1)
  1097. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1098. /* Put the analog decoder in standby to keep it quiet */
  1099. call_all(core, core, s_power, 0);
  1100. /* register everything */
  1101. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1102. &dev->pci->dev, adapter_nr, mfe_shared, NULL);
  1103. frontend_detach:
  1104. core->gate_ctrl = NULL;
  1105. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1106. return -EINVAL;
  1107. }
  1108. /* ----------------------------------------------------------- */
  1109. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1110. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1111. {
  1112. struct cx88_core *core = drv->core;
  1113. int err = 0;
  1114. dprintk( 1, "%s\n", __func__);
  1115. switch (core->boardnr) {
  1116. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1117. /* We arrive here with either the cx23416 or the cx22702
  1118. * on the bus. Take the bus from the cx23416 and enable the
  1119. * cx22702 demod
  1120. */
  1121. /* Toggle reset on cx22702 leaving i2c active */
  1122. cx_set(MO_GP0_IO, 0x00000080);
  1123. udelay(1000);
  1124. cx_clear(MO_GP0_IO, 0x00000080);
  1125. udelay(50);
  1126. cx_set(MO_GP0_IO, 0x00000080);
  1127. udelay(1000);
  1128. /* enable the cx22702 pins */
  1129. cx_clear(MO_GP0_IO, 0x00000004);
  1130. udelay(1000);
  1131. break;
  1132. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1133. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1134. /* Toggle reset on cx22702 leaving i2c active */
  1135. cx_set(MO_GP0_IO, 0x00000080);
  1136. udelay(1000);
  1137. cx_clear(MO_GP0_IO, 0x00000080);
  1138. udelay(50);
  1139. cx_set(MO_GP0_IO, 0x00000080);
  1140. udelay(1000);
  1141. switch (core->dvbdev->frontends.active_fe_id) {
  1142. case 1: /* DVB-S/S2 Enabled */
  1143. /* tri-state the cx22702 pins */
  1144. cx_set(MO_GP0_IO, 0x00000004);
  1145. /* Take the cx24116/cx24123 out of reset */
  1146. cx_write(MO_SRST_IO, 1);
  1147. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1148. break;
  1149. case 2: /* DVB-T Enabled */
  1150. /* Put the cx24116/cx24123 into reset */
  1151. cx_write(MO_SRST_IO, 0);
  1152. /* enable the cx22702 pins */
  1153. cx_clear(MO_GP0_IO, 0x00000004);
  1154. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1155. break;
  1156. }
  1157. udelay(1000);
  1158. break;
  1159. default:
  1160. err = -ENODEV;
  1161. }
  1162. return err;
  1163. }
  1164. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1165. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1166. {
  1167. struct cx88_core *core = drv->core;
  1168. int err = 0;
  1169. dprintk( 1, "%s\n", __func__);
  1170. switch (core->boardnr) {
  1171. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1172. /* Do Nothing, leave the cx22702 on the bus. */
  1173. break;
  1174. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1175. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1176. break;
  1177. default:
  1178. err = -ENODEV;
  1179. }
  1180. return err;
  1181. }
  1182. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1183. {
  1184. struct cx88_core *core = drv->core;
  1185. struct cx8802_dev *dev = drv->core->dvbdev;
  1186. int err;
  1187. struct videobuf_dvb_frontend *fe;
  1188. int i;
  1189. dprintk( 1, "%s\n", __func__);
  1190. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1191. core->boardnr,
  1192. core->name,
  1193. core->pci_bus,
  1194. core->pci_slot);
  1195. err = -ENODEV;
  1196. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1197. goto fail_core;
  1198. /* If vp3054 isn't enabled, a stub will just return 0 */
  1199. err = vp3054_i2c_probe(dev);
  1200. if (0 != err)
  1201. goto fail_core;
  1202. /* dvb stuff */
  1203. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1204. dev->ts_gen_cntrl = 0x0c;
  1205. err = cx8802_alloc_frontends(dev);
  1206. if (err)
  1207. goto fail_core;
  1208. err = -ENODEV;
  1209. for (i = 1; i <= core->board.num_frontends; i++) {
  1210. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1211. if (fe == NULL) {
  1212. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1213. __func__, i);
  1214. goto fail_probe;
  1215. }
  1216. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1217. &dev->pci->dev, &dev->slock,
  1218. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1219. V4L2_FIELD_TOP,
  1220. sizeof(struct cx88_buffer),
  1221. dev);
  1222. /* init struct videobuf_dvb */
  1223. fe->dvb.name = dev->core->name;
  1224. }
  1225. err = dvb_register(dev);
  1226. if (err)
  1227. /* frontends/adapter de-allocated in dvb_register */
  1228. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1229. core->name, err);
  1230. return err;
  1231. fail_probe:
  1232. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1233. fail_core:
  1234. return err;
  1235. }
  1236. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1237. {
  1238. struct cx88_core *core = drv->core;
  1239. struct cx8802_dev *dev = drv->core->dvbdev;
  1240. dprintk( 1, "%s\n", __func__);
  1241. videobuf_dvb_unregister_bus(&dev->frontends);
  1242. vp3054_i2c_remove(dev);
  1243. core->gate_ctrl = NULL;
  1244. return 0;
  1245. }
  1246. static struct cx8802_driver cx8802_dvb_driver = {
  1247. .type_id = CX88_MPEG_DVB,
  1248. .hw_access = CX8802_DRVCTL_SHARED,
  1249. .probe = cx8802_dvb_probe,
  1250. .remove = cx8802_dvb_remove,
  1251. .advise_acquire = cx8802_dvb_advise_acquire,
  1252. .advise_release = cx8802_dvb_advise_release,
  1253. };
  1254. static int __init dvb_init(void)
  1255. {
  1256. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1257. (CX88_VERSION_CODE >> 16) & 0xff,
  1258. (CX88_VERSION_CODE >> 8) & 0xff,
  1259. CX88_VERSION_CODE & 0xff);
  1260. #ifdef SNAPSHOT
  1261. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1262. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1263. #endif
  1264. return cx8802_register_driver(&cx8802_dvb_driver);
  1265. }
  1266. static void __exit dvb_fini(void)
  1267. {
  1268. cx8802_unregister_driver(&cx8802_dvb_driver);
  1269. }
  1270. module_init(dvb_init);
  1271. module_exit(dvb_fini);
  1272. /*
  1273. * Local variables:
  1274. * c-basic-offset: 8
  1275. * compile-command: "make DVB=1"
  1276. * End:
  1277. */