lis3lv02d.h 5.3 KB

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  1. /*
  2. * lis3lv02d.h - ST LIS3LV02DL accelerometer driver
  3. *
  4. * Copyright (C) 2007-2008 Yan Burman
  5. * Copyright (C) 2008 Eric Piel
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/platform_device.h>
  22. #include <linux/input-polldev.h>
  23. /*
  24. * The actual chip is STMicroelectronics LIS3LV02DL or LIS3LV02DQ that seems to
  25. * be connected via SPI. There exists also several similar chips (such as LIS302DL or
  26. * LIS3L02DQ) and they have slightly different registers, but we can provide a
  27. * common interface for all of them.
  28. * They can also be connected via I²C.
  29. */
  30. #include <linux/lis3lv02d.h>
  31. /* 2-byte registers */
  32. #define LIS_DOUBLE_ID 0x3A /* LIS3LV02D[LQ] */
  33. /* 1-byte registers */
  34. #define LIS_SINGLE_ID 0x3B /* LIS[32]02DL and others */
  35. enum lis3_reg {
  36. WHO_AM_I = 0x0F,
  37. OFFSET_X = 0x16,
  38. OFFSET_Y = 0x17,
  39. OFFSET_Z = 0x18,
  40. GAIN_X = 0x19,
  41. GAIN_Y = 0x1A,
  42. GAIN_Z = 0x1B,
  43. CTRL_REG1 = 0x20,
  44. CTRL_REG2 = 0x21,
  45. CTRL_REG3 = 0x22,
  46. HP_FILTER_RESET = 0x23,
  47. STATUS_REG = 0x27,
  48. OUTX_L = 0x28,
  49. OUTX_H = 0x29,
  50. OUTX = 0x29,
  51. OUTY_L = 0x2A,
  52. OUTY_H = 0x2B,
  53. OUTY = 0x2B,
  54. OUTZ_L = 0x2C,
  55. OUTZ_H = 0x2D,
  56. OUTZ = 0x2D,
  57. };
  58. enum lis302d_reg {
  59. FF_WU_CFG_1 = 0x30,
  60. FF_WU_SRC_1 = 0x31,
  61. FF_WU_THS_1 = 0x32,
  62. FF_WU_DURATION_1 = 0x33,
  63. FF_WU_CFG_2 = 0x34,
  64. FF_WU_SRC_2 = 0x35,
  65. FF_WU_THS_2 = 0x36,
  66. FF_WU_DURATION_2 = 0x37,
  67. CLICK_CFG = 0x38,
  68. CLICK_SRC = 0x39,
  69. CLICK_THSY_X = 0x3B,
  70. CLICK_THSZ = 0x3C,
  71. CLICK_TIMELIMIT = 0x3D,
  72. CLICK_LATENCY = 0x3E,
  73. CLICK_WINDOW = 0x3F,
  74. };
  75. enum lis3lv02d_reg {
  76. FF_WU_CFG = 0x30,
  77. FF_WU_SRC = 0x31,
  78. FF_WU_ACK = 0x32,
  79. FF_WU_THS_L = 0x34,
  80. FF_WU_THS_H = 0x35,
  81. FF_WU_DURATION = 0x36,
  82. DD_CFG = 0x38,
  83. DD_SRC = 0x39,
  84. DD_ACK = 0x3A,
  85. DD_THSI_L = 0x3C,
  86. DD_THSI_H = 0x3D,
  87. DD_THSE_L = 0x3E,
  88. DD_THSE_H = 0x3F,
  89. };
  90. enum lis3lv02d_ctrl1 {
  91. CTRL1_Xen = 0x01,
  92. CTRL1_Yen = 0x02,
  93. CTRL1_Zen = 0x04,
  94. CTRL1_ST = 0x08,
  95. CTRL1_DF0 = 0x10,
  96. CTRL1_DF1 = 0x20,
  97. CTRL1_PD0 = 0x40,
  98. CTRL1_PD1 = 0x80,
  99. };
  100. enum lis3lv02d_ctrl2 {
  101. CTRL2_DAS = 0x01,
  102. CTRL2_SIM = 0x02,
  103. CTRL2_DRDY = 0x04,
  104. CTRL2_IEN = 0x08,
  105. CTRL2_BOOT = 0x10,
  106. CTRL2_BLE = 0x20,
  107. CTRL2_BDU = 0x40, /* Block Data Update */
  108. CTRL2_FS = 0x80, /* Full Scale selection */
  109. };
  110. enum lis302d_ctrl2 {
  111. HP_FF_WU2 = 0x08,
  112. HP_FF_WU1 = 0x04,
  113. };
  114. enum lis3lv02d_ctrl3 {
  115. CTRL3_CFS0 = 0x01,
  116. CTRL3_CFS1 = 0x02,
  117. CTRL3_FDS = 0x10,
  118. CTRL3_HPFF = 0x20,
  119. CTRL3_HPDD = 0x40,
  120. CTRL3_ECK = 0x80,
  121. };
  122. enum lis3lv02d_status_reg {
  123. STATUS_XDA = 0x01,
  124. STATUS_YDA = 0x02,
  125. STATUS_ZDA = 0x04,
  126. STATUS_XYZDA = 0x08,
  127. STATUS_XOR = 0x10,
  128. STATUS_YOR = 0x20,
  129. STATUS_ZOR = 0x40,
  130. STATUS_XYZOR = 0x80,
  131. };
  132. enum lis3lv02d_ff_wu_cfg {
  133. FF_WU_CFG_XLIE = 0x01,
  134. FF_WU_CFG_XHIE = 0x02,
  135. FF_WU_CFG_YLIE = 0x04,
  136. FF_WU_CFG_YHIE = 0x08,
  137. FF_WU_CFG_ZLIE = 0x10,
  138. FF_WU_CFG_ZHIE = 0x20,
  139. FF_WU_CFG_LIR = 0x40,
  140. FF_WU_CFG_AOI = 0x80,
  141. };
  142. enum lis3lv02d_ff_wu_src {
  143. FF_WU_SRC_XL = 0x01,
  144. FF_WU_SRC_XH = 0x02,
  145. FF_WU_SRC_YL = 0x04,
  146. FF_WU_SRC_YH = 0x08,
  147. FF_WU_SRC_ZL = 0x10,
  148. FF_WU_SRC_ZH = 0x20,
  149. FF_WU_SRC_IA = 0x40,
  150. };
  151. enum lis3lv02d_dd_cfg {
  152. DD_CFG_XLIE = 0x01,
  153. DD_CFG_XHIE = 0x02,
  154. DD_CFG_YLIE = 0x04,
  155. DD_CFG_YHIE = 0x08,
  156. DD_CFG_ZLIE = 0x10,
  157. DD_CFG_ZHIE = 0x20,
  158. DD_CFG_LIR = 0x40,
  159. DD_CFG_IEND = 0x80,
  160. };
  161. enum lis3lv02d_dd_src {
  162. DD_SRC_XL = 0x01,
  163. DD_SRC_XH = 0x02,
  164. DD_SRC_YL = 0x04,
  165. DD_SRC_YH = 0x08,
  166. DD_SRC_ZL = 0x10,
  167. DD_SRC_ZH = 0x20,
  168. DD_SRC_IA = 0x40,
  169. };
  170. struct axis_conversion {
  171. s8 x;
  172. s8 y;
  173. s8 z;
  174. };
  175. struct lis3lv02d {
  176. void *bus_priv; /* used by the bus layer only */
  177. int (*init) (struct lis3lv02d *lis3);
  178. int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
  179. int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
  180. u8 whoami; /* 3Ah: 2-byte registries, 3Bh: 1-byte registries */
  181. s16 (*read_data) (struct lis3lv02d *lis3, int reg);
  182. int mdps_max_val;
  183. struct input_polled_dev *idev; /* input device */
  184. struct platform_device *pdev; /* platform device */
  185. atomic_t count; /* interrupt count after last read */
  186. int xcalib; /* calibrated null value for x */
  187. int ycalib; /* calibrated null value for y */
  188. int zcalib; /* calibrated null value for z */
  189. struct axis_conversion ac; /* hw -> logical axis */
  190. u32 irq; /* IRQ number */
  191. struct fasync_struct *async_queue; /* queue for the misc device */
  192. wait_queue_head_t misc_wait; /* Wait queue for the misc device */
  193. unsigned long misc_opened; /* bit0: whether the device is open */
  194. struct lis3lv02d_platform_data *pdata; /* for passing board config */
  195. };
  196. int lis3lv02d_init_device(struct lis3lv02d *lis3);
  197. int lis3lv02d_joystick_enable(void);
  198. void lis3lv02d_joystick_disable(void);
  199. void lis3lv02d_poweroff(struct lis3lv02d *lis3);
  200. void lis3lv02d_poweron(struct lis3lv02d *lis3);
  201. int lis3lv02d_remove_fs(struct lis3lv02d *lis3);
  202. extern struct lis3lv02d lis3_dev;