radeon_mode.h 18 KB

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  1. /*
  2. * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3. * VA Linux Systems Inc., Fremont, California.
  4. * Copyright 2008 Red Hat Inc.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Original Authors:
  25. * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26. *
  27. * Kernel port Author: Dave Airlie
  28. */
  29. #ifndef RADEON_MODE_H
  30. #define RADEON_MODE_H
  31. #include <drm_crtc.h>
  32. #include <drm_mode.h>
  33. #include <drm_edid.h>
  34. #include <drm_dp_helper.h>
  35. #include <linux/i2c.h>
  36. #include <linux/i2c-id.h>
  37. #include <linux/i2c-algo-bit.h>
  38. #include "radeon_fixed.h"
  39. struct radeon_device;
  40. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  41. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  42. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  43. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  44. enum radeon_connector_type {
  45. CONNECTOR_NONE,
  46. CONNECTOR_VGA,
  47. CONNECTOR_DVI_I,
  48. CONNECTOR_DVI_D,
  49. CONNECTOR_DVI_A,
  50. CONNECTOR_STV,
  51. CONNECTOR_CTV,
  52. CONNECTOR_LVDS,
  53. CONNECTOR_DIGITAL,
  54. CONNECTOR_SCART,
  55. CONNECTOR_HDMI_TYPE_A,
  56. CONNECTOR_HDMI_TYPE_B,
  57. CONNECTOR_0XC,
  58. CONNECTOR_0XD,
  59. CONNECTOR_DIN,
  60. CONNECTOR_DISPLAY_PORT,
  61. CONNECTOR_UNSUPPORTED
  62. };
  63. enum radeon_dvi_type {
  64. DVI_AUTO,
  65. DVI_DIGITAL,
  66. DVI_ANALOG
  67. };
  68. enum radeon_rmx_type {
  69. RMX_OFF,
  70. RMX_FULL,
  71. RMX_CENTER,
  72. RMX_ASPECT
  73. };
  74. enum radeon_tv_std {
  75. TV_STD_NTSC,
  76. TV_STD_PAL,
  77. TV_STD_PAL_M,
  78. TV_STD_PAL_60,
  79. TV_STD_NTSC_J,
  80. TV_STD_SCART_PAL,
  81. TV_STD_SECAM,
  82. TV_STD_PAL_CN,
  83. };
  84. /* radeon gpio-based i2c
  85. * 1. "mask" reg and bits
  86. * grabs the gpio pins for software use
  87. * 0=not held 1=held
  88. * 2. "a" reg and bits
  89. * output pin value
  90. * 0=low 1=high
  91. * 3. "en" reg and bits
  92. * sets the pin direction
  93. * 0=input 1=output
  94. * 4. "y" reg and bits
  95. * input pin value
  96. * 0=low 1=high
  97. */
  98. struct radeon_i2c_bus_rec {
  99. bool valid;
  100. /* id used by atom */
  101. uint8_t i2c_id;
  102. /* can be used with hw i2c engine */
  103. bool hw_capable;
  104. /* uses multi-media i2c engine */
  105. bool mm_i2c;
  106. /* regs and bits */
  107. uint32_t mask_clk_reg;
  108. uint32_t mask_data_reg;
  109. uint32_t a_clk_reg;
  110. uint32_t a_data_reg;
  111. uint32_t en_clk_reg;
  112. uint32_t en_data_reg;
  113. uint32_t y_clk_reg;
  114. uint32_t y_data_reg;
  115. uint32_t mask_clk_mask;
  116. uint32_t mask_data_mask;
  117. uint32_t a_clk_mask;
  118. uint32_t a_data_mask;
  119. uint32_t en_clk_mask;
  120. uint32_t en_data_mask;
  121. uint32_t y_clk_mask;
  122. uint32_t y_data_mask;
  123. };
  124. struct radeon_tmds_pll {
  125. uint32_t freq;
  126. uint32_t value;
  127. };
  128. #define RADEON_MAX_BIOS_CONNECTOR 16
  129. #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
  130. #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
  131. #define RADEON_PLL_USE_REF_DIV (1 << 2)
  132. #define RADEON_PLL_LEGACY (1 << 3)
  133. #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
  134. #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
  135. #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
  136. #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
  137. #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
  138. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  139. #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
  140. #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
  141. struct radeon_pll {
  142. uint16_t reference_freq;
  143. uint16_t reference_div;
  144. uint32_t pll_in_min;
  145. uint32_t pll_in_max;
  146. uint32_t pll_out_min;
  147. uint32_t pll_out_max;
  148. uint16_t xclk;
  149. uint32_t min_ref_div;
  150. uint32_t max_ref_div;
  151. uint32_t min_post_div;
  152. uint32_t max_post_div;
  153. uint32_t min_feedback_div;
  154. uint32_t max_feedback_div;
  155. uint32_t min_frac_feedback_div;
  156. uint32_t max_frac_feedback_div;
  157. uint32_t best_vco;
  158. };
  159. struct radeon_i2c_chan {
  160. struct i2c_adapter adapter;
  161. struct drm_device *dev;
  162. union {
  163. struct i2c_algo_dp_aux_data dp;
  164. struct i2c_algo_bit_data bit;
  165. } algo;
  166. struct radeon_i2c_bus_rec rec;
  167. };
  168. /* mostly for macs, but really any system without connector tables */
  169. enum radeon_connector_table {
  170. CT_NONE,
  171. CT_GENERIC,
  172. CT_IBOOK,
  173. CT_POWERBOOK_EXTERNAL,
  174. CT_POWERBOOK_INTERNAL,
  175. CT_POWERBOOK_VGA,
  176. CT_MINI_EXTERNAL,
  177. CT_MINI_INTERNAL,
  178. CT_IMAC_G5_ISIGHT,
  179. CT_EMAC,
  180. };
  181. enum radeon_dvo_chip {
  182. DVO_SIL164,
  183. DVO_SIL1178,
  184. };
  185. struct radeon_mode_info {
  186. struct atom_context *atom_context;
  187. struct card_info *atom_card_info;
  188. enum radeon_connector_table connector_table;
  189. bool mode_config_initialized;
  190. struct radeon_crtc *crtcs[2];
  191. /* DVI-I properties */
  192. struct drm_property *coherent_mode_property;
  193. /* DAC enable load detect */
  194. struct drm_property *load_detect_property;
  195. /* TV standard load detect */
  196. struct drm_property *tv_std_property;
  197. /* legacy TMDS PLL detect */
  198. struct drm_property *tmds_pll_property;
  199. };
  200. #define MAX_H_CODE_TIMING_LEN 32
  201. #define MAX_V_CODE_TIMING_LEN 32
  202. /* need to store these as reading
  203. back code tables is excessive */
  204. struct radeon_tv_regs {
  205. uint32_t tv_uv_adr;
  206. uint32_t timing_cntl;
  207. uint32_t hrestart;
  208. uint32_t vrestart;
  209. uint32_t frestart;
  210. uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
  211. uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
  212. };
  213. struct radeon_crtc {
  214. struct drm_crtc base;
  215. int crtc_id;
  216. u16 lut_r[256], lut_g[256], lut_b[256];
  217. bool enabled;
  218. bool can_tile;
  219. uint32_t crtc_offset;
  220. struct drm_gem_object *cursor_bo;
  221. uint64_t cursor_addr;
  222. int cursor_width;
  223. int cursor_height;
  224. uint32_t legacy_display_base_addr;
  225. uint32_t legacy_cursor_offset;
  226. enum radeon_rmx_type rmx_type;
  227. fixed20_12 vsc;
  228. fixed20_12 hsc;
  229. struct drm_display_mode native_mode;
  230. };
  231. struct radeon_encoder_primary_dac {
  232. /* legacy primary dac */
  233. uint32_t ps2_pdac_adj;
  234. };
  235. struct radeon_encoder_lvds {
  236. /* legacy lvds */
  237. uint16_t panel_vcc_delay;
  238. uint8_t panel_pwr_delay;
  239. uint8_t panel_digon_delay;
  240. uint8_t panel_blon_delay;
  241. uint16_t panel_ref_divider;
  242. uint8_t panel_post_divider;
  243. uint16_t panel_fb_divider;
  244. bool use_bios_dividers;
  245. uint32_t lvds_gen_cntl;
  246. /* panel mode */
  247. struct drm_display_mode native_mode;
  248. };
  249. struct radeon_encoder_tv_dac {
  250. /* legacy tv dac */
  251. uint32_t ps2_tvdac_adj;
  252. uint32_t ntsc_tvdac_adj;
  253. uint32_t pal_tvdac_adj;
  254. int h_pos;
  255. int v_pos;
  256. int h_size;
  257. int supported_tv_stds;
  258. bool tv_on;
  259. enum radeon_tv_std tv_std;
  260. struct radeon_tv_regs tv;
  261. };
  262. struct radeon_encoder_int_tmds {
  263. /* legacy int tmds */
  264. struct radeon_tmds_pll tmds_pll[4];
  265. };
  266. struct radeon_encoder_ext_tmds {
  267. /* tmds over dvo */
  268. struct radeon_i2c_chan *i2c_bus;
  269. uint8_t slave_addr;
  270. enum radeon_dvo_chip dvo_chip;
  271. };
  272. /* spread spectrum */
  273. struct radeon_atom_ss {
  274. uint16_t percentage;
  275. uint8_t type;
  276. uint8_t step;
  277. uint8_t delay;
  278. uint8_t range;
  279. uint8_t refdiv;
  280. };
  281. struct radeon_encoder_atom_dig {
  282. /* atom dig */
  283. bool coherent_mode;
  284. int dig_block;
  285. /* atom lvds */
  286. uint32_t lvds_misc;
  287. uint16_t panel_pwr_delay;
  288. struct radeon_atom_ss *ss;
  289. /* panel mode */
  290. struct drm_display_mode native_mode;
  291. };
  292. struct radeon_encoder_atom_dac {
  293. enum radeon_tv_std tv_std;
  294. };
  295. struct radeon_encoder {
  296. struct drm_encoder base;
  297. uint32_t encoder_id;
  298. uint32_t devices;
  299. uint32_t active_device;
  300. uint32_t flags;
  301. uint32_t pixel_clock;
  302. enum radeon_rmx_type rmx_type;
  303. struct drm_display_mode native_mode;
  304. void *enc_priv;
  305. };
  306. struct radeon_connector_atom_dig {
  307. uint32_t igp_lane_info;
  308. bool linkb;
  309. /* displayport */
  310. struct radeon_i2c_chan *dp_i2c_bus;
  311. u8 dpcd[8];
  312. u8 dp_sink_type;
  313. int dp_clock;
  314. int dp_lane_count;
  315. };
  316. struct radeon_gpio_rec {
  317. bool valid;
  318. u8 id;
  319. u32 reg;
  320. u32 mask;
  321. };
  322. enum radeon_hpd_id {
  323. RADEON_HPD_NONE = 0,
  324. RADEON_HPD_1,
  325. RADEON_HPD_2,
  326. RADEON_HPD_3,
  327. RADEON_HPD_4,
  328. RADEON_HPD_5,
  329. RADEON_HPD_6,
  330. };
  331. struct radeon_hpd {
  332. enum radeon_hpd_id hpd;
  333. u8 plugged_state;
  334. struct radeon_gpio_rec gpio;
  335. };
  336. struct radeon_connector {
  337. struct drm_connector base;
  338. uint32_t connector_id;
  339. uint32_t devices;
  340. struct radeon_i2c_chan *ddc_bus;
  341. /* some systems have a an hdmi and vga port with a shared ddc line */
  342. bool shared_ddc;
  343. bool use_digital;
  344. /* we need to mind the EDID between detect
  345. and get modes due to analog/digital/tvencoder */
  346. struct edid *edid;
  347. void *con_priv;
  348. bool dac_load_detect;
  349. uint16_t connector_object_id;
  350. struct radeon_hpd hpd;
  351. };
  352. struct radeon_framebuffer {
  353. struct drm_framebuffer base;
  354. struct drm_gem_object *obj;
  355. };
  356. extern void radeon_connector_hotplug(struct drm_connector *connector);
  357. extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
  358. extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,
  359. struct drm_display_mode *mode);
  360. extern void radeon_dp_set_link_config(struct drm_connector *connector,
  361. struct drm_display_mode *mode);
  362. extern void dp_link_train(struct drm_encoder *encoder,
  363. struct drm_connector *connector);
  364. extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
  365. extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
  366. extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
  367. int action, uint8_t lane_num,
  368. uint8_t lane_set);
  369. extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
  370. uint8_t write_byte, uint8_t *read_byte);
  371. extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
  372. struct radeon_i2c_bus_rec *rec,
  373. const char *name);
  374. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  375. struct radeon_i2c_bus_rec *rec,
  376. const char *name);
  377. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  378. extern void radeon_i2c_sw_get_byte(struct radeon_i2c_chan *i2c_bus,
  379. u8 slave_addr,
  380. u8 addr,
  381. u8 *val);
  382. extern void radeon_i2c_sw_put_byte(struct radeon_i2c_chan *i2c,
  383. u8 slave_addr,
  384. u8 addr,
  385. u8 val);
  386. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
  387. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  388. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  389. extern void radeon_compute_pll(struct radeon_pll *pll,
  390. uint64_t freq,
  391. uint32_t *dot_clock_p,
  392. uint32_t *fb_div_p,
  393. uint32_t *frac_fb_div_p,
  394. uint32_t *ref_div_p,
  395. uint32_t *post_div_p,
  396. int flags);
  397. extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
  398. uint64_t freq,
  399. uint32_t *dot_clock_p,
  400. uint32_t *fb_div_p,
  401. uint32_t *frac_fb_div_p,
  402. uint32_t *ref_div_p,
  403. uint32_t *post_div_p,
  404. int flags);
  405. extern void radeon_setup_encoder_clones(struct drm_device *dev);
  406. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  407. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  408. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  409. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  410. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  411. extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
  412. extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
  413. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  414. extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
  415. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  416. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  417. struct drm_framebuffer *old_fb);
  418. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  419. struct drm_display_mode *mode,
  420. struct drm_display_mode *adjusted_mode,
  421. int x, int y,
  422. struct drm_framebuffer *old_fb);
  423. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  424. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  425. struct drm_framebuffer *old_fb);
  426. extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
  427. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  428. struct drm_file *file_priv,
  429. uint32_t handle,
  430. uint32_t width,
  431. uint32_t height);
  432. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  433. int x, int y);
  434. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  435. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  436. extern struct radeon_encoder_atom_dig *
  437. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  438. extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
  439. struct radeon_encoder_int_tmds *tmds);
  440. extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
  441. struct radeon_encoder_int_tmds *tmds);
  442. extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
  443. struct radeon_encoder_int_tmds *tmds);
  444. extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
  445. struct radeon_encoder_ext_tmds *tmds);
  446. extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
  447. struct radeon_encoder_ext_tmds *tmds);
  448. extern struct radeon_encoder_primary_dac *
  449. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  450. extern struct radeon_encoder_tv_dac *
  451. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  452. extern struct radeon_encoder_lvds *
  453. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  454. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  455. extern struct radeon_encoder_tv_dac *
  456. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  457. extern struct radeon_encoder_primary_dac *
  458. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  459. extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
  460. extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
  461. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  462. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  463. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  464. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  465. extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
  466. extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
  467. extern void
  468. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  469. extern void
  470. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  471. extern void
  472. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  473. extern void
  474. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  475. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  476. u16 blue, int regno);
  477. extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  478. u16 *blue, int regno);
  479. struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
  480. struct drm_mode_fb_cmd *mode_cmd,
  481. struct drm_gem_object *obj);
  482. int radeonfb_probe(struct drm_device *dev);
  483. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  484. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  485. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  486. void radeon_atombios_init_crtc(struct drm_device *dev,
  487. struct radeon_crtc *radeon_crtc);
  488. void radeon_legacy_init_crtc(struct drm_device *dev,
  489. struct radeon_crtc *radeon_crtc);
  490. extern void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state);
  491. void radeon_get_clock_info(struct drm_device *dev);
  492. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  493. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  494. void radeon_enc_destroy(struct drm_encoder *encoder);
  495. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  496. void radeon_combios_asic_init(struct drm_device *dev);
  497. extern int radeon_static_clocks_init(struct drm_device *dev);
  498. bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
  499. struct drm_display_mode *mode,
  500. struct drm_display_mode *adjusted_mode);
  501. void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
  502. /* legacy tv */
  503. void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
  504. uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
  505. uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
  506. void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
  507. uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
  508. uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
  509. void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
  510. uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
  511. uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
  512. void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
  513. struct drm_display_mode *mode,
  514. struct drm_display_mode *adjusted_mode);
  515. #endif