nv17_tv.c 19 KB

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  1. /*
  2. * Copyright (C) 2009 Francisco Jerez.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include "drmP.h"
  27. #include "drm_crtc_helper.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_encoder.h"
  30. #include "nouveau_connector.h"
  31. #include "nouveau_crtc.h"
  32. #include "nouveau_hw.h"
  33. #include "nv17_tv.h"
  34. enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
  35. struct drm_connector *connector,
  36. uint32_t pin_mask)
  37. {
  38. struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
  39. tv_enc->pin_mask = pin_mask >> 28 & 0xe;
  40. switch (tv_enc->pin_mask) {
  41. case 0x2:
  42. case 0x4:
  43. tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Composite;
  44. break;
  45. case 0xc:
  46. tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO;
  47. break;
  48. case 0xe:
  49. if (nouveau_encoder(encoder)->dcb->tvconf.has_component_output)
  50. tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Component;
  51. else
  52. tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SCART;
  53. break;
  54. default:
  55. tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
  56. break;
  57. }
  58. drm_connector_property_set_value(connector,
  59. encoder->dev->mode_config.tv_subconnector_property,
  60. tv_enc->subconnector);
  61. return tv_enc->subconnector ? connector_status_connected :
  62. connector_status_disconnected;
  63. }
  64. static const struct {
  65. int hdisplay;
  66. int vdisplay;
  67. } modes[] = {
  68. { 640, 400 },
  69. { 640, 480 },
  70. { 720, 480 },
  71. { 720, 576 },
  72. { 800, 600 },
  73. { 1024, 768 },
  74. { 1280, 720 },
  75. { 1280, 1024 },
  76. { 1920, 1080 }
  77. };
  78. static int nv17_tv_get_modes(struct drm_encoder *encoder,
  79. struct drm_connector *connector)
  80. {
  81. struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
  82. struct drm_display_mode *mode;
  83. struct drm_display_mode *output_mode;
  84. int n = 0;
  85. int i;
  86. if (tv_norm->kind != CTV_ENC_MODE) {
  87. struct drm_display_mode *tv_mode;
  88. for (tv_mode = nv17_tv_modes; tv_mode->hdisplay; tv_mode++) {
  89. mode = drm_mode_duplicate(encoder->dev, tv_mode);
  90. mode->clock = tv_norm->tv_enc_mode.vrefresh *
  91. mode->htotal / 1000 *
  92. mode->vtotal / 1000;
  93. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  94. mode->clock *= 2;
  95. if (mode->hdisplay == tv_norm->tv_enc_mode.hdisplay &&
  96. mode->vdisplay == tv_norm->tv_enc_mode.vdisplay)
  97. mode->type |= DRM_MODE_TYPE_PREFERRED;
  98. drm_mode_probed_add(connector, mode);
  99. n++;
  100. }
  101. return n;
  102. }
  103. /* tv_norm->kind == CTV_ENC_MODE */
  104. output_mode = &tv_norm->ctv_enc_mode.mode;
  105. for (i = 0; i < ARRAY_SIZE(modes); i++) {
  106. if (modes[i].hdisplay > output_mode->hdisplay ||
  107. modes[i].vdisplay > output_mode->vdisplay)
  108. continue;
  109. if (modes[i].hdisplay == output_mode->hdisplay &&
  110. modes[i].vdisplay == output_mode->vdisplay) {
  111. mode = drm_mode_duplicate(encoder->dev, output_mode);
  112. mode->type |= DRM_MODE_TYPE_PREFERRED;
  113. } else {
  114. mode = drm_cvt_mode(encoder->dev, modes[i].hdisplay,
  115. modes[i].vdisplay, 60, false,
  116. output_mode->flags & DRM_MODE_FLAG_INTERLACE,
  117. false);
  118. }
  119. /* CVT modes are sometimes unsuitable... */
  120. if (output_mode->hdisplay <= 720
  121. || output_mode->hdisplay >= 1920) {
  122. mode->htotal = output_mode->htotal;
  123. mode->hsync_start = (mode->hdisplay + (mode->htotal
  124. - mode->hdisplay) * 9 / 10) & ~7;
  125. mode->hsync_end = mode->hsync_start + 8;
  126. }
  127. if (output_mode->vdisplay >= 1024) {
  128. mode->vtotal = output_mode->vtotal;
  129. mode->vsync_start = output_mode->vsync_start;
  130. mode->vsync_end = output_mode->vsync_end;
  131. }
  132. mode->type |= DRM_MODE_TYPE_DRIVER;
  133. drm_mode_probed_add(connector, mode);
  134. n++;
  135. }
  136. return n;
  137. }
  138. static int nv17_tv_mode_valid(struct drm_encoder *encoder,
  139. struct drm_display_mode *mode)
  140. {
  141. struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
  142. if (tv_norm->kind == CTV_ENC_MODE) {
  143. struct drm_display_mode *output_mode =
  144. &tv_norm->ctv_enc_mode.mode;
  145. if (mode->clock > 400000)
  146. return MODE_CLOCK_HIGH;
  147. if (mode->hdisplay > output_mode->hdisplay ||
  148. mode->vdisplay > output_mode->vdisplay)
  149. return MODE_BAD;
  150. if ((mode->flags & DRM_MODE_FLAG_INTERLACE) !=
  151. (output_mode->flags & DRM_MODE_FLAG_INTERLACE))
  152. return MODE_NO_INTERLACE;
  153. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  154. return MODE_NO_DBLESCAN;
  155. } else {
  156. const int vsync_tolerance = 600;
  157. if (mode->clock > 70000)
  158. return MODE_CLOCK_HIGH;
  159. if (abs(drm_mode_vrefresh(mode) * 1000 -
  160. tv_norm->tv_enc_mode.vrefresh) > vsync_tolerance)
  161. return MODE_VSYNC;
  162. /* The encoder takes care of the actual interlacing */
  163. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  164. return MODE_NO_INTERLACE;
  165. }
  166. return MODE_OK;
  167. }
  168. static bool nv17_tv_mode_fixup(struct drm_encoder *encoder,
  169. struct drm_display_mode *mode,
  170. struct drm_display_mode *adjusted_mode)
  171. {
  172. struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
  173. if (tv_norm->kind == CTV_ENC_MODE)
  174. adjusted_mode->clock = tv_norm->ctv_enc_mode.mode.clock;
  175. else
  176. adjusted_mode->clock = 90000;
  177. return true;
  178. }
  179. static void nv17_tv_dpms(struct drm_encoder *encoder, int mode)
  180. {
  181. struct drm_device *dev = encoder->dev;
  182. struct nv17_tv_state *regs = &to_tv_enc(encoder)->state;
  183. struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
  184. if (nouveau_encoder(encoder)->last_dpms == mode)
  185. return;
  186. nouveau_encoder(encoder)->last_dpms = mode;
  187. NV_TRACE(dev, "Setting dpms mode %d on TV encoder (output %d)\n",
  188. mode, nouveau_encoder(encoder)->dcb->index);
  189. regs->ptv_200 &= ~1;
  190. if (tv_norm->kind == CTV_ENC_MODE) {
  191. nv04_dfp_update_fp_control(encoder, mode);
  192. } else {
  193. nv04_dfp_update_fp_control(encoder, DRM_MODE_DPMS_OFF);
  194. if (mode == DRM_MODE_DPMS_ON)
  195. regs->ptv_200 |= 1;
  196. }
  197. nv_load_ptv(dev, regs, 200);
  198. nv17_gpio_set(dev, DCB_GPIO_TVDAC1, mode == DRM_MODE_DPMS_ON);
  199. nv17_gpio_set(dev, DCB_GPIO_TVDAC0, mode == DRM_MODE_DPMS_ON);
  200. nv04_dac_update_dacclk(encoder, mode == DRM_MODE_DPMS_ON);
  201. }
  202. static void nv17_tv_prepare(struct drm_encoder *encoder)
  203. {
  204. struct drm_device *dev = encoder->dev;
  205. struct drm_nouveau_private *dev_priv = dev->dev_private;
  206. struct drm_encoder_helper_funcs *helper = encoder->helper_private;
  207. struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
  208. int head = nouveau_crtc(encoder->crtc)->index;
  209. uint8_t *cr_lcd = &dev_priv->mode_reg.crtc_reg[head].CRTC[
  210. NV_CIO_CRE_LCD__INDEX];
  211. uint32_t dacclk_off = NV_PRAMDAC_DACCLK +
  212. nv04_dac_output_offset(encoder);
  213. uint32_t dacclk;
  214. helper->dpms(encoder, DRM_MODE_DPMS_OFF);
  215. nv04_dfp_disable(dev, head);
  216. /* Unbind any FP encoders from this head if we need the FP
  217. * stuff enabled. */
  218. if (tv_norm->kind == CTV_ENC_MODE) {
  219. struct drm_encoder *enc;
  220. list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
  221. struct dcb_entry *dcb = nouveau_encoder(enc)->dcb;
  222. if ((dcb->type == OUTPUT_TMDS ||
  223. dcb->type == OUTPUT_LVDS) &&
  224. !enc->crtc &&
  225. nv04_dfp_get_bound_head(dev, dcb) == head) {
  226. nv04_dfp_bind_head(dev, dcb, head ^ 1,
  227. dev_priv->VBIOS.fp.dual_link);
  228. }
  229. }
  230. }
  231. /* Some NV4x have unknown values (0x3f, 0x50, 0x54, 0x6b, 0x79, 0x7f)
  232. * at LCD__INDEX which we don't alter
  233. */
  234. if (!(*cr_lcd & 0x44)) {
  235. if (tv_norm->kind == CTV_ENC_MODE)
  236. *cr_lcd = 0x1 | (head ? 0x0 : 0x8);
  237. else
  238. *cr_lcd = 0;
  239. }
  240. /* Set the DACCLK register */
  241. dacclk = (NVReadRAMDAC(dev, 0, dacclk_off) & ~0x30) | 0x1;
  242. if (dev_priv->card_type == NV_40)
  243. dacclk |= 0x1a << 16;
  244. if (tv_norm->kind == CTV_ENC_MODE) {
  245. dacclk |= 0x20;
  246. if (head)
  247. dacclk |= 0x100;
  248. else
  249. dacclk &= ~0x100;
  250. } else {
  251. dacclk |= 0x10;
  252. }
  253. NVWriteRAMDAC(dev, 0, dacclk_off, dacclk);
  254. }
  255. static void nv17_tv_mode_set(struct drm_encoder *encoder,
  256. struct drm_display_mode *drm_mode,
  257. struct drm_display_mode *adjusted_mode)
  258. {
  259. struct drm_device *dev = encoder->dev;
  260. struct drm_nouveau_private *dev_priv = dev->dev_private;
  261. int head = nouveau_crtc(encoder->crtc)->index;
  262. struct nv04_crtc_reg *regs = &dev_priv->mode_reg.crtc_reg[head];
  263. struct nv17_tv_state *tv_regs = &to_tv_enc(encoder)->state;
  264. struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
  265. int i;
  266. regs->CRTC[NV_CIO_CRE_53] = 0x40; /* FP_HTIMING */
  267. regs->CRTC[NV_CIO_CRE_54] = 0; /* FP_VTIMING */
  268. regs->ramdac_630 = 0x2; /* turn off green mode (tv test pattern?) */
  269. regs->tv_setup = 1;
  270. regs->ramdac_8c0 = 0x0;
  271. if (tv_norm->kind == TV_ENC_MODE) {
  272. tv_regs->ptv_200 = 0x13111100;
  273. if (head)
  274. tv_regs->ptv_200 |= 0x10;
  275. tv_regs->ptv_20c = 0x808010;
  276. tv_regs->ptv_304 = 0x2d00000;
  277. tv_regs->ptv_600 = 0x0;
  278. tv_regs->ptv_60c = 0x0;
  279. tv_regs->ptv_610 = 0x1e00000;
  280. if (tv_norm->tv_enc_mode.vdisplay == 576) {
  281. tv_regs->ptv_508 = 0x1200000;
  282. tv_regs->ptv_614 = 0x33;
  283. } else if (tv_norm->tv_enc_mode.vdisplay == 480) {
  284. tv_regs->ptv_508 = 0xf00000;
  285. tv_regs->ptv_614 = 0x13;
  286. }
  287. if (dev_priv->card_type >= NV_30) {
  288. tv_regs->ptv_500 = 0xe8e0;
  289. tv_regs->ptv_504 = 0x1710;
  290. tv_regs->ptv_604 = 0x0;
  291. tv_regs->ptv_608 = 0x0;
  292. } else {
  293. if (tv_norm->tv_enc_mode.vdisplay == 576) {
  294. tv_regs->ptv_604 = 0x20;
  295. tv_regs->ptv_608 = 0x10;
  296. tv_regs->ptv_500 = 0x19710;
  297. tv_regs->ptv_504 = 0x68f0;
  298. } else if (tv_norm->tv_enc_mode.vdisplay == 480) {
  299. tv_regs->ptv_604 = 0x10;
  300. tv_regs->ptv_608 = 0x20;
  301. tv_regs->ptv_500 = 0x4b90;
  302. tv_regs->ptv_504 = 0x1b480;
  303. }
  304. }
  305. for (i = 0; i < 0x40; i++)
  306. tv_regs->tv_enc[i] = tv_norm->tv_enc_mode.tv_enc[i];
  307. } else {
  308. struct drm_display_mode *output_mode =
  309. &tv_norm->ctv_enc_mode.mode;
  310. /* The registers in PRAMDAC+0xc00 control some timings and CSC
  311. * parameters for the CTV encoder (It's only used for "HD" TV
  312. * modes, I don't think I have enough working to guess what
  313. * they exactly mean...), it's probably connected at the
  314. * output of the FP encoder, but it also needs the analog
  315. * encoder in its OR enabled and routed to the head it's
  316. * using. It's enabled with the DACCLK register, bits [5:4].
  317. */
  318. for (i = 0; i < 38; i++)
  319. regs->ctv_regs[i] = tv_norm->ctv_enc_mode.ctv_regs[i];
  320. regs->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1;
  321. regs->fp_horiz_regs[FP_TOTAL] = output_mode->htotal - 1;
  322. regs->fp_horiz_regs[FP_SYNC_START] =
  323. output_mode->hsync_start - 1;
  324. regs->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1;
  325. regs->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay +
  326. max((output_mode->hdisplay-600)/40 - 1, 1);
  327. regs->fp_vert_regs[FP_DISPLAY_END] = output_mode->vdisplay - 1;
  328. regs->fp_vert_regs[FP_TOTAL] = output_mode->vtotal - 1;
  329. regs->fp_vert_regs[FP_SYNC_START] =
  330. output_mode->vsync_start - 1;
  331. regs->fp_vert_regs[FP_SYNC_END] = output_mode->vsync_end - 1;
  332. regs->fp_vert_regs[FP_CRTC] = output_mode->vdisplay - 1;
  333. regs->fp_control = NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS |
  334. NV_PRAMDAC_FP_TG_CONTROL_READ_PROG |
  335. NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12;
  336. if (output_mode->flags & DRM_MODE_FLAG_PVSYNC)
  337. regs->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS;
  338. if (output_mode->flags & DRM_MODE_FLAG_PHSYNC)
  339. regs->fp_control |= NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS;
  340. regs->fp_debug_0 = NV_PRAMDAC_FP_DEBUG_0_YWEIGHT_ROUND |
  341. NV_PRAMDAC_FP_DEBUG_0_XWEIGHT_ROUND |
  342. NV_PRAMDAC_FP_DEBUG_0_YINTERP_BILINEAR |
  343. NV_PRAMDAC_FP_DEBUG_0_XINTERP_BILINEAR |
  344. NV_RAMDAC_FP_DEBUG_0_TMDS_ENABLED |
  345. NV_PRAMDAC_FP_DEBUG_0_YSCALE_ENABLE |
  346. NV_PRAMDAC_FP_DEBUG_0_XSCALE_ENABLE;
  347. regs->fp_debug_2 = 0;
  348. regs->fp_margin_color = 0x801080;
  349. }
  350. }
  351. static void nv17_tv_commit(struct drm_encoder *encoder)
  352. {
  353. struct drm_device *dev = encoder->dev;
  354. struct drm_nouveau_private *dev_priv = dev->dev_private;
  355. struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
  356. struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  357. struct drm_encoder_helper_funcs *helper = encoder->helper_private;
  358. if (get_tv_norm(encoder)->kind == TV_ENC_MODE) {
  359. nv17_tv_update_rescaler(encoder);
  360. nv17_tv_update_properties(encoder);
  361. } else {
  362. nv17_ctv_update_rescaler(encoder);
  363. }
  364. nv17_tv_state_load(dev, &to_tv_enc(encoder)->state);
  365. /* This could use refinement for flatpanels, but it should work */
  366. if (dev_priv->chipset < 0x44)
  367. NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL +
  368. nv04_dac_output_offset(encoder),
  369. 0xf0000000);
  370. else
  371. NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL +
  372. nv04_dac_output_offset(encoder),
  373. 0x00100000);
  374. helper->dpms(encoder, DRM_MODE_DPMS_ON);
  375. NV_INFO(dev, "Output %s is running on CRTC %d using output %c\n",
  376. drm_get_connector_name(
  377. &nouveau_encoder_connector_get(nv_encoder)->base),
  378. nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
  379. }
  380. static void nv17_tv_save(struct drm_encoder *encoder)
  381. {
  382. struct drm_device *dev = encoder->dev;
  383. struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
  384. nouveau_encoder(encoder)->restore.output =
  385. NVReadRAMDAC(dev, 0,
  386. NV_PRAMDAC_DACCLK +
  387. nv04_dac_output_offset(encoder));
  388. nv17_tv_state_save(dev, &tv_enc->saved_state);
  389. tv_enc->state.ptv_200 = tv_enc->saved_state.ptv_200;
  390. }
  391. static void nv17_tv_restore(struct drm_encoder *encoder)
  392. {
  393. struct drm_device *dev = encoder->dev;
  394. NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK +
  395. nv04_dac_output_offset(encoder),
  396. nouveau_encoder(encoder)->restore.output);
  397. nv17_tv_state_load(dev, &to_tv_enc(encoder)->saved_state);
  398. }
  399. static int nv17_tv_create_resources(struct drm_encoder *encoder,
  400. struct drm_connector *connector)
  401. {
  402. struct drm_device *dev = encoder->dev;
  403. struct drm_mode_config *conf = &dev->mode_config;
  404. struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
  405. struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
  406. int num_tv_norms = dcb->tvconf.has_component_output ? NUM_TV_NORMS :
  407. NUM_LD_TV_NORMS;
  408. int i;
  409. if (nouveau_tv_norm) {
  410. for (i = 0; i < num_tv_norms; i++) {
  411. if (!strcmp(nv17_tv_norm_names[i], nouveau_tv_norm)) {
  412. tv_enc->tv_norm = i;
  413. break;
  414. }
  415. }
  416. if (i == num_tv_norms)
  417. NV_WARN(dev, "Invalid TV norm setting \"%s\"\n",
  418. nouveau_tv_norm);
  419. }
  420. drm_mode_create_tv_properties(dev, num_tv_norms, nv17_tv_norm_names);
  421. drm_connector_attach_property(connector,
  422. conf->tv_select_subconnector_property,
  423. tv_enc->select_subconnector);
  424. drm_connector_attach_property(connector,
  425. conf->tv_subconnector_property,
  426. tv_enc->subconnector);
  427. drm_connector_attach_property(connector,
  428. conf->tv_mode_property,
  429. tv_enc->tv_norm);
  430. drm_connector_attach_property(connector,
  431. conf->tv_flicker_reduction_property,
  432. tv_enc->flicker);
  433. drm_connector_attach_property(connector,
  434. conf->tv_saturation_property,
  435. tv_enc->saturation);
  436. drm_connector_attach_property(connector,
  437. conf->tv_hue_property,
  438. tv_enc->hue);
  439. drm_connector_attach_property(connector,
  440. conf->tv_overscan_property,
  441. tv_enc->overscan);
  442. return 0;
  443. }
  444. static int nv17_tv_set_property(struct drm_encoder *encoder,
  445. struct drm_connector *connector,
  446. struct drm_property *property,
  447. uint64_t val)
  448. {
  449. struct drm_mode_config *conf = &encoder->dev->mode_config;
  450. struct drm_crtc *crtc = encoder->crtc;
  451. struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
  452. struct nv17_tv_norm_params *tv_norm = get_tv_norm(encoder);
  453. bool modes_changed = false;
  454. if (property == conf->tv_overscan_property) {
  455. tv_enc->overscan = val;
  456. if (encoder->crtc) {
  457. if (tv_norm->kind == CTV_ENC_MODE)
  458. nv17_ctv_update_rescaler(encoder);
  459. else
  460. nv17_tv_update_rescaler(encoder);
  461. }
  462. } else if (property == conf->tv_saturation_property) {
  463. if (tv_norm->kind != TV_ENC_MODE)
  464. return -EINVAL;
  465. tv_enc->saturation = val;
  466. nv17_tv_update_properties(encoder);
  467. } else if (property == conf->tv_hue_property) {
  468. if (tv_norm->kind != TV_ENC_MODE)
  469. return -EINVAL;
  470. tv_enc->hue = val;
  471. nv17_tv_update_properties(encoder);
  472. } else if (property == conf->tv_flicker_reduction_property) {
  473. if (tv_norm->kind != TV_ENC_MODE)
  474. return -EINVAL;
  475. tv_enc->flicker = val;
  476. if (encoder->crtc)
  477. nv17_tv_update_rescaler(encoder);
  478. } else if (property == conf->tv_mode_property) {
  479. if (connector->dpms != DRM_MODE_DPMS_OFF)
  480. return -EINVAL;
  481. tv_enc->tv_norm = val;
  482. modes_changed = true;
  483. } else if (property == conf->tv_select_subconnector_property) {
  484. if (tv_norm->kind != TV_ENC_MODE)
  485. return -EINVAL;
  486. tv_enc->select_subconnector = val;
  487. nv17_tv_update_properties(encoder);
  488. } else {
  489. return -EINVAL;
  490. }
  491. if (modes_changed) {
  492. drm_helper_probe_single_connector_modes(connector, 0, 0);
  493. /* Disable the crtc to ensure a full modeset is
  494. * performed whenever it's turned on again. */
  495. if (crtc) {
  496. struct drm_mode_set modeset = {
  497. .crtc = crtc,
  498. };
  499. crtc->funcs->set_config(&modeset);
  500. }
  501. }
  502. return 0;
  503. }
  504. static void nv17_tv_destroy(struct drm_encoder *encoder)
  505. {
  506. struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
  507. NV_DEBUG(encoder->dev, "\n");
  508. drm_encoder_cleanup(encoder);
  509. kfree(tv_enc);
  510. }
  511. static struct drm_encoder_helper_funcs nv17_tv_helper_funcs = {
  512. .dpms = nv17_tv_dpms,
  513. .save = nv17_tv_save,
  514. .restore = nv17_tv_restore,
  515. .mode_fixup = nv17_tv_mode_fixup,
  516. .prepare = nv17_tv_prepare,
  517. .commit = nv17_tv_commit,
  518. .mode_set = nv17_tv_mode_set,
  519. .detect = nv17_dac_detect,
  520. };
  521. static struct drm_encoder_slave_funcs nv17_tv_slave_funcs = {
  522. .get_modes = nv17_tv_get_modes,
  523. .mode_valid = nv17_tv_mode_valid,
  524. .create_resources = nv17_tv_create_resources,
  525. .set_property = nv17_tv_set_property,
  526. };
  527. static struct drm_encoder_funcs nv17_tv_funcs = {
  528. .destroy = nv17_tv_destroy,
  529. };
  530. int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry)
  531. {
  532. struct drm_encoder *encoder;
  533. struct nv17_tv_encoder *tv_enc = NULL;
  534. tv_enc = kzalloc(sizeof(*tv_enc), GFP_KERNEL);
  535. if (!tv_enc)
  536. return -ENOMEM;
  537. tv_enc->overscan = 50;
  538. tv_enc->flicker = 50;
  539. tv_enc->saturation = 50;
  540. tv_enc->hue = 0;
  541. tv_enc->tv_norm = TV_NORM_PAL;
  542. tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Unknown;
  543. tv_enc->select_subconnector = DRM_MODE_SUBCONNECTOR_Automatic;
  544. tv_enc->pin_mask = 0;
  545. encoder = to_drm_encoder(&tv_enc->base);
  546. tv_enc->base.dcb = entry;
  547. tv_enc->base.or = ffs(entry->or) - 1;
  548. drm_encoder_init(dev, encoder, &nv17_tv_funcs, DRM_MODE_ENCODER_TVDAC);
  549. drm_encoder_helper_add(encoder, &nv17_tv_helper_funcs);
  550. to_encoder_slave(encoder)->slave_funcs = &nv17_tv_slave_funcs;
  551. encoder->possible_crtcs = entry->heads;
  552. encoder->possible_clones = 0;
  553. return 0;
  554. }