drm_edid.c 44 KB

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  1. /*
  2. * Copyright (c) 2006 Luc Verhaegen (quirks list)
  3. * Copyright (c) 2007-2008 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
  7. * FB layer.
  8. * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
  9. *
  10. * Permission is hereby granted, free of charge, to any person obtaining a
  11. * copy of this software and associated documentation files (the "Software"),
  12. * to deal in the Software without restriction, including without limitation
  13. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  14. * and/or sell copies of the Software, and to permit persons to whom the
  15. * Software is furnished to do so, subject to the following conditions:
  16. *
  17. * The above copyright notice and this permission notice (including the
  18. * next paragraph) shall be included in all copies or substantial portions
  19. * of the Software.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  24. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  25. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  26. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  27. * DEALINGS IN THE SOFTWARE.
  28. */
  29. #include <linux/kernel.h>
  30. #include <linux/i2c.h>
  31. #include <linux/i2c-algo-bit.h>
  32. #include "drmP.h"
  33. #include "drm_edid.h"
  34. /*
  35. * TODO:
  36. * - support EDID 1.4 (incl. CE blocks)
  37. */
  38. /*
  39. * EDID blocks out in the wild have a variety of bugs, try to collect
  40. * them here (note that userspace may work around broken monitors first,
  41. * but fixes should make their way here so that the kernel "just works"
  42. * on as many displays as possible).
  43. */
  44. /* First detailed mode wrong, use largest 60Hz mode */
  45. #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
  46. /* Reported 135MHz pixel clock is too high, needs adjustment */
  47. #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
  48. /* Prefer the largest mode at 75 Hz */
  49. #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
  50. /* Detail timing is in cm not mm */
  51. #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
  52. /* Detailed timing descriptors have bogus size values, so just take the
  53. * maximum size and use that.
  54. */
  55. #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
  56. /* Monitor forgot to set the first detailed is preferred bit. */
  57. #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
  58. /* use +hsync +vsync for detailed mode */
  59. #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
  60. /* define the number of Extension EDID block */
  61. #define MAX_EDID_EXT_NUM 4
  62. #define LEVEL_DMT 0
  63. #define LEVEL_GTF 1
  64. #define LEVEL_CVT 2
  65. static struct edid_quirk {
  66. char *vendor;
  67. int product_id;
  68. u32 quirks;
  69. } edid_quirk_list[] = {
  70. /* Acer AL1706 */
  71. { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
  72. /* Acer F51 */
  73. { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
  74. /* Unknown Acer */
  75. { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  76. /* Belinea 10 15 55 */
  77. { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
  78. { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
  79. /* Envision Peripherals, Inc. EN-7100e */
  80. { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
  81. /* Funai Electronics PM36B */
  82. { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
  83. EDID_QUIRK_DETAILED_IN_CM },
  84. /* LG Philips LCD LP154W01-A5 */
  85. { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  86. { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
  87. /* Philips 107p5 CRT */
  88. { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  89. /* Proview AY765C */
  90. { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  91. /* Samsung SyncMaster 205BW. Note: irony */
  92. { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
  93. /* Samsung SyncMaster 22[5-6]BW */
  94. { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
  95. { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
  96. };
  97. /* Valid EDID header has these bytes */
  98. static const u8 edid_header[] = {
  99. 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
  100. };
  101. /**
  102. * edid_is_valid - sanity check EDID data
  103. * @edid: EDID data
  104. *
  105. * Sanity check the EDID block by looking at the header, the version number
  106. * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's
  107. * valid.
  108. */
  109. static bool edid_is_valid(struct edid *edid)
  110. {
  111. int i, score = 0;
  112. u8 csum = 0;
  113. u8 *raw_edid = (u8 *)edid;
  114. for (i = 0; i < sizeof(edid_header); i++)
  115. if (raw_edid[i] == edid_header[i])
  116. score++;
  117. if (score == 8) ;
  118. else if (score >= 6) {
  119. DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
  120. memcpy(raw_edid, edid_header, sizeof(edid_header));
  121. } else
  122. goto bad;
  123. for (i = 0; i < EDID_LENGTH; i++)
  124. csum += raw_edid[i];
  125. if (csum) {
  126. DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
  127. goto bad;
  128. }
  129. if (edid->version != 1) {
  130. DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
  131. goto bad;
  132. }
  133. if (edid->revision > 4)
  134. DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
  135. return 1;
  136. bad:
  137. if (raw_edid) {
  138. DRM_ERROR("Raw EDID:\n");
  139. print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH);
  140. printk("\n");
  141. }
  142. return 0;
  143. }
  144. /**
  145. * edid_vendor - match a string against EDID's obfuscated vendor field
  146. * @edid: EDID to match
  147. * @vendor: vendor string
  148. *
  149. * Returns true if @vendor is in @edid, false otherwise
  150. */
  151. static bool edid_vendor(struct edid *edid, char *vendor)
  152. {
  153. char edid_vendor[3];
  154. edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
  155. edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
  156. ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
  157. edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
  158. return !strncmp(edid_vendor, vendor, 3);
  159. }
  160. /**
  161. * edid_get_quirks - return quirk flags for a given EDID
  162. * @edid: EDID to process
  163. *
  164. * This tells subsequent routines what fixes they need to apply.
  165. */
  166. static u32 edid_get_quirks(struct edid *edid)
  167. {
  168. struct edid_quirk *quirk;
  169. int i;
  170. for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
  171. quirk = &edid_quirk_list[i];
  172. if (edid_vendor(edid, quirk->vendor) &&
  173. (EDID_PRODUCT_ID(edid) == quirk->product_id))
  174. return quirk->quirks;
  175. }
  176. return 0;
  177. }
  178. #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
  179. #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
  180. /**
  181. * edid_fixup_preferred - set preferred modes based on quirk list
  182. * @connector: has mode list to fix up
  183. * @quirks: quirks list
  184. *
  185. * Walk the mode list for @connector, clearing the preferred status
  186. * on existing modes and setting it anew for the right mode ala @quirks.
  187. */
  188. static void edid_fixup_preferred(struct drm_connector *connector,
  189. u32 quirks)
  190. {
  191. struct drm_display_mode *t, *cur_mode, *preferred_mode;
  192. int target_refresh = 0;
  193. if (list_empty(&connector->probed_modes))
  194. return;
  195. if (quirks & EDID_QUIRK_PREFER_LARGE_60)
  196. target_refresh = 60;
  197. if (quirks & EDID_QUIRK_PREFER_LARGE_75)
  198. target_refresh = 75;
  199. preferred_mode = list_first_entry(&connector->probed_modes,
  200. struct drm_display_mode, head);
  201. list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
  202. cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
  203. if (cur_mode == preferred_mode)
  204. continue;
  205. /* Largest mode is preferred */
  206. if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
  207. preferred_mode = cur_mode;
  208. /* At a given size, try to get closest to target refresh */
  209. if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
  210. MODE_REFRESH_DIFF(cur_mode, target_refresh) <
  211. MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
  212. preferred_mode = cur_mode;
  213. }
  214. }
  215. preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
  216. }
  217. /*
  218. * Add the Autogenerated from the DMT spec.
  219. * This table is copied from xfree86/modes/xf86EdidModes.c.
  220. * But the mode with Reduced blank feature is deleted.
  221. */
  222. static struct drm_display_mode drm_dmt_modes[] = {
  223. /* 640x350@85Hz */
  224. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  225. 736, 832, 0, 350, 382, 385, 445, 0,
  226. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  227. /* 640x400@85Hz */
  228. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
  229. 736, 832, 0, 400, 401, 404, 445, 0,
  230. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  231. /* 720x400@85Hz */
  232. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
  233. 828, 936, 0, 400, 401, 404, 446, 0,
  234. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  235. /* 640x480@60Hz */
  236. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
  237. 752, 800, 0, 480, 489, 492, 525, 0,
  238. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  239. /* 640x480@72Hz */
  240. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  241. 704, 832, 0, 480, 489, 492, 520, 0,
  242. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  243. /* 640x480@75Hz */
  244. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  245. 720, 840, 0, 480, 481, 484, 500, 0,
  246. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  247. /* 640x480@85Hz */
  248. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
  249. 752, 832, 0, 480, 481, 484, 509, 0,
  250. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  251. /* 800x600@56Hz */
  252. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  253. 896, 1024, 0, 600, 601, 603, 625, 0,
  254. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  255. /* 800x600@60Hz */
  256. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  257. 968, 1056, 0, 600, 601, 605, 628, 0,
  258. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  259. /* 800x600@72Hz */
  260. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  261. 976, 1040, 0, 600, 637, 643, 666, 0,
  262. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  263. /* 800x600@75Hz */
  264. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  265. 896, 1056, 0, 600, 601, 604, 625, 0,
  266. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  267. /* 800x600@85Hz */
  268. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
  269. 896, 1048, 0, 600, 601, 604, 631, 0,
  270. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  271. /* 848x480@60Hz */
  272. { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
  273. 976, 1088, 0, 480, 486, 494, 517, 0,
  274. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  275. /* 1024x768@43Hz, interlace */
  276. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
  277. 1208, 1264, 0, 768, 768, 772, 817, 0,
  278. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
  279. DRM_MODE_FLAG_INTERLACE) },
  280. /* 1024x768@60Hz */
  281. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  282. 1184, 1344, 0, 768, 771, 777, 806, 0,
  283. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  284. /* 1024x768@70Hz */
  285. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  286. 1184, 1328, 0, 768, 771, 777, 806, 0,
  287. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
  288. /* 1024x768@75Hz */
  289. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
  290. 1136, 1312, 0, 768, 769, 772, 800, 0,
  291. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  292. /* 1024x768@85Hz */
  293. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
  294. 1072, 1376, 0, 768, 769, 772, 808, 0,
  295. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  296. /* 1152x864@75Hz */
  297. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  298. 1344, 1600, 0, 864, 865, 868, 900, 0,
  299. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  300. /* 1280x768@60Hz */
  301. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
  302. 1472, 1664, 0, 768, 771, 778, 798, 0,
  303. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  304. /* 1280x768@75Hz */
  305. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
  306. 1488, 1696, 0, 768, 771, 778, 805, 0,
  307. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  308. /* 1280x768@85Hz */
  309. { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
  310. 1496, 1712, 0, 768, 771, 778, 809, 0,
  311. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  312. /* 1280x800@60Hz */
  313. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
  314. 1480, 1680, 0, 800, 803, 809, 831, 0,
  315. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
  316. /* 1280x800@75Hz */
  317. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
  318. 1488, 1696, 0, 800, 803, 809, 838, 0,
  319. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  320. /* 1280x800@85Hz */
  321. { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
  322. 1496, 1712, 0, 800, 803, 809, 843, 0,
  323. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  324. /* 1280x960@60Hz */
  325. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
  326. 1488, 1800, 0, 960, 961, 964, 1000, 0,
  327. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  328. /* 1280x960@85Hz */
  329. { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
  330. 1504, 1728, 0, 960, 961, 964, 1011, 0,
  331. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  332. /* 1280x1024@60Hz */
  333. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
  334. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  335. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  336. /* 1280x1024@75Hz */
  337. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  338. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  339. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  340. /* 1280x1024@85Hz */
  341. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
  342. 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
  343. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  344. /* 1360x768@60Hz */
  345. { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
  346. 1536, 1792, 0, 768, 771, 777, 795, 0,
  347. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  348. /* 1440x1050@60Hz */
  349. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
  350. 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
  351. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  352. /* 1440x1050@75Hz */
  353. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
  354. 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
  355. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  356. /* 1440x1050@85Hz */
  357. { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
  358. 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
  359. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  360. /* 1440x900@60Hz */
  361. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
  362. 1672, 1904, 0, 900, 903, 909, 934, 0,
  363. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  364. /* 1440x900@75Hz */
  365. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
  366. 1688, 1936, 0, 900, 903, 909, 942, 0,
  367. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  368. /* 1440x900@85Hz */
  369. { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
  370. 1696, 1952, 0, 900, 903, 909, 948, 0,
  371. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  372. /* 1600x1200@60Hz */
  373. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
  374. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  375. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  376. /* 1600x1200@65Hz */
  377. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
  378. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  379. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  380. /* 1600x1200@70Hz */
  381. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
  382. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  383. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  384. /* 1600x1200@75Hz */
  385. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 2025000, 1600, 1664,
  386. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  387. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  388. /* 1600x1200@85Hz */
  389. { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
  390. 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
  391. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  392. /* 1680x1050@60Hz */
  393. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
  394. 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
  395. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  396. /* 1680x1050@75Hz */
  397. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
  398. 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
  399. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  400. /* 1680x1050@85Hz */
  401. { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
  402. 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
  403. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  404. /* 1792x1344@60Hz */
  405. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
  406. 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
  407. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  408. /* 1729x1344@75Hz */
  409. { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
  410. 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
  411. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  412. /* 1853x1392@60Hz */
  413. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
  414. 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
  415. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  416. /* 1856x1392@75Hz */
  417. { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
  418. 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
  419. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  420. /* 1920x1200@60Hz */
  421. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
  422. 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
  423. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  424. /* 1920x1200@75Hz */
  425. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
  426. 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
  427. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  428. /* 1920x1200@85Hz */
  429. { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
  430. 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
  431. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  432. /* 1920x1440@60Hz */
  433. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
  434. 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
  435. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  436. /* 1920x1440@75Hz */
  437. { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
  438. 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
  439. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  440. /* 2560x1600@60Hz */
  441. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
  442. 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
  443. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  444. /* 2560x1600@75HZ */
  445. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
  446. 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
  447. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  448. /* 2560x1600@85HZ */
  449. { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
  450. 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
  451. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
  452. };
  453. static const int drm_num_dmt_modes =
  454. sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  455. static struct drm_display_mode *drm_find_dmt(struct drm_device *dev,
  456. int hsize, int vsize, int fresh)
  457. {
  458. int i;
  459. struct drm_display_mode *ptr, *mode;
  460. mode = NULL;
  461. for (i = 0; i < drm_num_dmt_modes; i++) {
  462. ptr = &drm_dmt_modes[i];
  463. if (hsize == ptr->hdisplay &&
  464. vsize == ptr->vdisplay &&
  465. fresh == drm_mode_vrefresh(ptr)) {
  466. /* get the expected default mode */
  467. mode = drm_mode_duplicate(dev, ptr);
  468. break;
  469. }
  470. }
  471. return mode;
  472. }
  473. /*
  474. * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
  475. * monitors fill with ascii space (0x20) instead.
  476. */
  477. static int
  478. bad_std_timing(u8 a, u8 b)
  479. {
  480. return (a == 0x00 && b == 0x00) ||
  481. (a == 0x01 && b == 0x01) ||
  482. (a == 0x20 && b == 0x20);
  483. }
  484. /**
  485. * drm_mode_std - convert standard mode info (width, height, refresh) into mode
  486. * @t: standard timing params
  487. * @timing_level: standard timing level
  488. *
  489. * Take the standard timing params (in this case width, aspect, and refresh)
  490. * and convert them into a real mode using CVT/GTF/DMT.
  491. *
  492. * Punts for now, but should eventually use the FB layer's CVT based mode
  493. * generation code.
  494. */
  495. struct drm_display_mode *drm_mode_std(struct drm_device *dev,
  496. struct std_timing *t,
  497. int revision,
  498. int timing_level)
  499. {
  500. struct drm_display_mode *mode;
  501. int hsize, vsize;
  502. int vrefresh_rate;
  503. unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
  504. >> EDID_TIMING_ASPECT_SHIFT;
  505. unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
  506. >> EDID_TIMING_VFREQ_SHIFT;
  507. if (bad_std_timing(t->hsize, t->vfreq_aspect))
  508. return NULL;
  509. /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
  510. hsize = t->hsize * 8 + 248;
  511. /* vrefresh_rate = vfreq + 60 */
  512. vrefresh_rate = vfreq + 60;
  513. /* the vdisplay is calculated based on the aspect ratio */
  514. if (aspect_ratio == 0) {
  515. if (revision < 3)
  516. vsize = hsize;
  517. else
  518. vsize = (hsize * 10) / 16;
  519. } else if (aspect_ratio == 1)
  520. vsize = (hsize * 3) / 4;
  521. else if (aspect_ratio == 2)
  522. vsize = (hsize * 4) / 5;
  523. else
  524. vsize = (hsize * 9) / 16;
  525. /* HDTV hack */
  526. if (hsize == 1360 && vsize == 765 && vrefresh_rate == 60) {
  527. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  528. false);
  529. mode->hdisplay = 1366;
  530. mode->vsync_start = mode->vsync_start - 1;
  531. mode->vsync_end = mode->vsync_end - 1;
  532. return mode;
  533. }
  534. mode = NULL;
  535. /* check whether it can be found in default mode table */
  536. mode = drm_find_dmt(dev, hsize, vsize, vrefresh_rate);
  537. if (mode)
  538. return mode;
  539. switch (timing_level) {
  540. case LEVEL_DMT:
  541. break;
  542. case LEVEL_GTF:
  543. mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
  544. break;
  545. case LEVEL_CVT:
  546. mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
  547. false);
  548. break;
  549. }
  550. return mode;
  551. }
  552. /**
  553. * drm_mode_detailed - create a new mode from an EDID detailed timing section
  554. * @dev: DRM device (needed to create new mode)
  555. * @edid: EDID block
  556. * @timing: EDID detailed timing info
  557. * @quirks: quirks to apply
  558. *
  559. * An EDID detailed timing block contains enough info for us to create and
  560. * return a new struct drm_display_mode.
  561. */
  562. static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
  563. struct edid *edid,
  564. struct detailed_timing *timing,
  565. u32 quirks)
  566. {
  567. struct drm_display_mode *mode;
  568. struct detailed_pixel_timing *pt = &timing->data.pixel_data;
  569. unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
  570. unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
  571. unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
  572. unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
  573. unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
  574. unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
  575. unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
  576. unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
  577. /* ignore tiny modes */
  578. if (hactive < 64 || vactive < 64)
  579. return NULL;
  580. if (pt->misc & DRM_EDID_PT_STEREO) {
  581. printk(KERN_WARNING "stereo mode not supported\n");
  582. return NULL;
  583. }
  584. if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
  585. printk(KERN_WARNING "integrated sync not supported\n");
  586. return NULL;
  587. }
  588. /* it is incorrect if hsync/vsync width is zero */
  589. if (!hsync_pulse_width || !vsync_pulse_width) {
  590. DRM_DEBUG_KMS("Incorrect Detailed timing. "
  591. "Wrong Hsync/Vsync pulse width\n");
  592. return NULL;
  593. }
  594. mode = drm_mode_create(dev);
  595. if (!mode)
  596. return NULL;
  597. mode->type = DRM_MODE_TYPE_DRIVER;
  598. if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
  599. timing->pixel_clock = cpu_to_le16(1088);
  600. mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
  601. mode->hdisplay = hactive;
  602. mode->hsync_start = mode->hdisplay + hsync_offset;
  603. mode->hsync_end = mode->hsync_start + hsync_pulse_width;
  604. mode->htotal = mode->hdisplay + hblank;
  605. mode->vdisplay = vactive;
  606. mode->vsync_start = mode->vdisplay + vsync_offset;
  607. mode->vsync_end = mode->vsync_start + vsync_pulse_width;
  608. mode->vtotal = mode->vdisplay + vblank;
  609. /* perform the basic check for the detailed timing */
  610. if (mode->hsync_end > mode->htotal ||
  611. mode->vsync_end > mode->vtotal) {
  612. drm_mode_destroy(dev, mode);
  613. DRM_DEBUG_KMS("Incorrect detailed timing. "
  614. "Sync is beyond the blank.\n");
  615. return NULL;
  616. }
  617. /* Some EDIDs have bogus h/vtotal values */
  618. if (mode->hsync_end > mode->htotal)
  619. mode->htotal = mode->hsync_end + 1;
  620. if (mode->vsync_end > mode->vtotal)
  621. mode->vtotal = mode->vsync_end + 1;
  622. drm_mode_set_name(mode);
  623. if (pt->misc & DRM_EDID_PT_INTERLACED)
  624. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  625. if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
  626. pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
  627. }
  628. mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
  629. DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
  630. mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
  631. DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
  632. mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
  633. mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
  634. if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
  635. mode->width_mm *= 10;
  636. mode->height_mm *= 10;
  637. }
  638. if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
  639. mode->width_mm = edid->width_cm * 10;
  640. mode->height_mm = edid->height_cm * 10;
  641. }
  642. return mode;
  643. }
  644. /*
  645. * Detailed mode info for the EDID "established modes" data to use.
  646. */
  647. static struct drm_display_mode edid_est_modes[] = {
  648. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
  649. 968, 1056, 0, 600, 601, 605, 628, 0,
  650. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
  651. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
  652. 896, 1024, 0, 600, 601, 603, 625, 0,
  653. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
  654. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
  655. 720, 840, 0, 480, 481, 484, 500, 0,
  656. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
  657. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
  658. 704, 832, 0, 480, 489, 491, 520, 0,
  659. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
  660. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
  661. 768, 864, 0, 480, 483, 486, 525, 0,
  662. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
  663. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
  664. 752, 800, 0, 480, 490, 492, 525, 0,
  665. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
  666. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
  667. 846, 900, 0, 400, 421, 423, 449, 0,
  668. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
  669. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
  670. 846, 900, 0, 400, 412, 414, 449, 0,
  671. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
  672. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
  673. 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
  674. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
  675. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
  676. 1136, 1312, 0, 768, 769, 772, 800, 0,
  677. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
  678. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
  679. 1184, 1328, 0, 768, 771, 777, 806, 0,
  680. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
  681. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
  682. 1184, 1344, 0, 768, 771, 777, 806, 0,
  683. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
  684. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
  685. 1208, 1264, 0, 768, 768, 776, 817, 0,
  686. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
  687. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
  688. 928, 1152, 0, 624, 625, 628, 667, 0,
  689. DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
  690. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
  691. 896, 1056, 0, 600, 601, 604, 625, 0,
  692. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
  693. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
  694. 976, 1040, 0, 600, 637, 643, 666, 0,
  695. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
  696. { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
  697. 1344, 1600, 0, 864, 865, 868, 900, 0,
  698. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
  699. };
  700. #define EDID_EST_TIMINGS 16
  701. #define EDID_STD_TIMINGS 8
  702. #define EDID_DETAILED_TIMINGS 4
  703. /**
  704. * add_established_modes - get est. modes from EDID and add them
  705. * @edid: EDID block to scan
  706. *
  707. * Each EDID block contains a bitmap of the supported "established modes" list
  708. * (defined above). Tease them out and add them to the global modes list.
  709. */
  710. static int add_established_modes(struct drm_connector *connector, struct edid *edid)
  711. {
  712. struct drm_device *dev = connector->dev;
  713. unsigned long est_bits = edid->established_timings.t1 |
  714. (edid->established_timings.t2 << 8) |
  715. ((edid->established_timings.mfg_rsvd & 0x80) << 9);
  716. int i, modes = 0;
  717. for (i = 0; i <= EDID_EST_TIMINGS; i++)
  718. if (est_bits & (1<<i)) {
  719. struct drm_display_mode *newmode;
  720. newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
  721. if (newmode) {
  722. drm_mode_probed_add(connector, newmode);
  723. modes++;
  724. }
  725. }
  726. return modes;
  727. }
  728. /**
  729. * stanard_timing_level - get std. timing level(CVT/GTF/DMT)
  730. * @edid: EDID block to scan
  731. */
  732. static int standard_timing_level(struct edid *edid)
  733. {
  734. if (edid->revision >= 2) {
  735. if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
  736. return LEVEL_CVT;
  737. return LEVEL_GTF;
  738. }
  739. return LEVEL_DMT;
  740. }
  741. /**
  742. * add_standard_modes - get std. modes from EDID and add them
  743. * @edid: EDID block to scan
  744. *
  745. * Standard modes can be calculated using the CVT standard. Grab them from
  746. * @edid, calculate them, and add them to the list.
  747. */
  748. static int add_standard_modes(struct drm_connector *connector, struct edid *edid)
  749. {
  750. struct drm_device *dev = connector->dev;
  751. int i, modes = 0;
  752. int timing_level;
  753. timing_level = standard_timing_level(edid);
  754. for (i = 0; i < EDID_STD_TIMINGS; i++) {
  755. struct std_timing *t = &edid->standard_timings[i];
  756. struct drm_display_mode *newmode;
  757. /* If std timings bytes are 1, 1 it's empty */
  758. if (t->hsize == 1 && t->vfreq_aspect == 1)
  759. continue;
  760. newmode = drm_mode_std(dev, &edid->standard_timings[i],
  761. edid->revision, timing_level);
  762. if (newmode) {
  763. drm_mode_probed_add(connector, newmode);
  764. modes++;
  765. }
  766. }
  767. return modes;
  768. }
  769. /*
  770. * XXX fix this for:
  771. * - GTF secondary curve formula
  772. * - EDID 1.4 range offsets
  773. * - CVT extended bits
  774. */
  775. static bool
  776. mode_in_range(struct drm_display_mode *mode, struct detailed_timing *timing)
  777. {
  778. struct detailed_data_monitor_range *range;
  779. int hsync, vrefresh;
  780. range = &timing->data.other_data.data.range;
  781. hsync = drm_mode_hsync(mode);
  782. vrefresh = drm_mode_vrefresh(mode);
  783. if (hsync < range->min_hfreq_khz || hsync > range->max_hfreq_khz)
  784. return false;
  785. if (vrefresh < range->min_vfreq || vrefresh > range->max_vfreq)
  786. return false;
  787. if (range->pixel_clock_mhz && range->pixel_clock_mhz != 0xff) {
  788. /* be forgiving since it's in units of 10MHz */
  789. int max_clock = range->pixel_clock_mhz * 10 + 9;
  790. max_clock *= 1000;
  791. if (mode->clock > max_clock)
  792. return false;
  793. }
  794. return true;
  795. }
  796. /*
  797. * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
  798. * need to account for them.
  799. */
  800. static int drm_gtf_modes_for_range(struct drm_connector *connector,
  801. struct detailed_timing *timing)
  802. {
  803. int i, modes = 0;
  804. struct drm_display_mode *newmode;
  805. struct drm_device *dev = connector->dev;
  806. for (i = 0; i < drm_num_dmt_modes; i++) {
  807. if (mode_in_range(drm_dmt_modes + i, timing)) {
  808. newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
  809. if (newmode) {
  810. drm_mode_probed_add(connector, newmode);
  811. modes++;
  812. }
  813. }
  814. }
  815. return modes;
  816. }
  817. static int drm_cvt_modes(struct drm_connector *connector,
  818. struct detailed_timing *timing)
  819. {
  820. int i, j, modes = 0;
  821. struct drm_display_mode *newmode;
  822. struct drm_device *dev = connector->dev;
  823. struct cvt_timing *cvt;
  824. const int rates[] = { 60, 85, 75, 60, 50 };
  825. for (i = 0; i < 4; i++) {
  826. int width, height;
  827. cvt = &(timing->data.other_data.data.cvt[i]);
  828. height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 8) + 1) * 2;
  829. switch (cvt->code[1] & 0xc0) {
  830. case 0x00:
  831. width = height * 4 / 3;
  832. break;
  833. case 0x40:
  834. width = height * 16 / 9;
  835. break;
  836. case 0x80:
  837. width = height * 16 / 10;
  838. break;
  839. case 0xc0:
  840. width = height * 15 / 9;
  841. break;
  842. }
  843. for (j = 1; j < 5; j++) {
  844. if (cvt->code[2] & (1 << j)) {
  845. newmode = drm_cvt_mode(dev, width, height,
  846. rates[j], j == 0,
  847. false, false);
  848. if (newmode) {
  849. drm_mode_probed_add(connector, newmode);
  850. modes++;
  851. }
  852. }
  853. }
  854. }
  855. return modes;
  856. }
  857. static int add_detailed_modes(struct drm_connector *connector,
  858. struct detailed_timing *timing,
  859. struct edid *edid, u32 quirks, int preferred)
  860. {
  861. int i, modes = 0;
  862. struct detailed_non_pixel *data = &timing->data.other_data;
  863. int timing_level = standard_timing_level(edid);
  864. int gtf = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
  865. struct drm_display_mode *newmode;
  866. struct drm_device *dev = connector->dev;
  867. if (timing->pixel_clock) {
  868. newmode = drm_mode_detailed(dev, edid, timing, quirks);
  869. if (!newmode)
  870. return 0;
  871. if (preferred)
  872. newmode->type |= DRM_MODE_TYPE_PREFERRED;
  873. drm_mode_probed_add(connector, newmode);
  874. return 1;
  875. }
  876. /* other timing types */
  877. switch (data->type) {
  878. case EDID_DETAIL_MONITOR_RANGE:
  879. if (gtf)
  880. modes += drm_gtf_modes_for_range(connector, timing);
  881. break;
  882. case EDID_DETAIL_STD_MODES:
  883. /* Six modes per detailed section */
  884. for (i = 0; i < 6; i++) {
  885. struct std_timing *std;
  886. struct drm_display_mode *newmode;
  887. std = &data->data.timings[i];
  888. newmode = drm_mode_std(dev, std, edid->revision,
  889. timing_level);
  890. if (newmode) {
  891. drm_mode_probed_add(connector, newmode);
  892. modes++;
  893. }
  894. }
  895. break;
  896. case EDID_DETAIL_CVT_3BYTE:
  897. modes += drm_cvt_modes(connector, timing);
  898. break;
  899. default:
  900. break;
  901. }
  902. return modes;
  903. }
  904. /**
  905. * add_detailed_info - get detailed mode info from EDID data
  906. * @connector: attached connector
  907. * @edid: EDID block to scan
  908. * @quirks: quirks to apply
  909. *
  910. * Some of the detailed timing sections may contain mode information. Grab
  911. * it and add it to the list.
  912. */
  913. static int add_detailed_info(struct drm_connector *connector,
  914. struct edid *edid, u32 quirks)
  915. {
  916. int i, modes = 0;
  917. for (i = 0; i < EDID_DETAILED_TIMINGS; i++) {
  918. struct detailed_timing *timing = &edid->detailed_timings[i];
  919. int preferred = (i == 0) && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
  920. /* In 1.0, only timings are allowed */
  921. if (!timing->pixel_clock && edid->version == 1 &&
  922. edid->revision == 0)
  923. continue;
  924. modes += add_detailed_modes(connector, timing, edid, quirks,
  925. preferred);
  926. }
  927. return modes;
  928. }
  929. /**
  930. * add_detailed_mode_eedid - get detailed mode info from addtional timing
  931. * EDID block
  932. * @connector: attached connector
  933. * @edid: EDID block to scan(It is only to get addtional timing EDID block)
  934. * @quirks: quirks to apply
  935. *
  936. * Some of the detailed timing sections may contain mode information. Grab
  937. * it and add it to the list.
  938. */
  939. static int add_detailed_info_eedid(struct drm_connector *connector,
  940. struct edid *edid, u32 quirks)
  941. {
  942. int i, modes = 0;
  943. char *edid_ext = NULL;
  944. struct detailed_timing *timing;
  945. int edid_ext_num;
  946. int start_offset, end_offset;
  947. int timing_level;
  948. if (edid->version == 1 && edid->revision < 3) {
  949. /* If the EDID version is less than 1.3, there is no
  950. * extension EDID.
  951. */
  952. return 0;
  953. }
  954. if (!edid->extensions) {
  955. /* if there is no extension EDID, it is unnecessary to
  956. * parse the E-EDID to get detailed info
  957. */
  958. return 0;
  959. }
  960. /* Chose real EDID extension number */
  961. edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
  962. MAX_EDID_EXT_NUM : edid->extensions;
  963. /* Find CEA extension */
  964. for (i = 0; i < edid_ext_num; i++) {
  965. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  966. /* This block is CEA extension */
  967. if (edid_ext[0] == 0x02)
  968. break;
  969. }
  970. if (i == edid_ext_num) {
  971. /* if there is no additional timing EDID block, return */
  972. return 0;
  973. }
  974. /* Get the start offset of detailed timing block */
  975. start_offset = edid_ext[2];
  976. if (start_offset == 0) {
  977. /* If the start_offset is zero, it means that neither detailed
  978. * info nor data block exist. In such case it is also
  979. * unnecessary to parse the detailed timing info.
  980. */
  981. return 0;
  982. }
  983. timing_level = standard_timing_level(edid);
  984. end_offset = EDID_LENGTH;
  985. end_offset -= sizeof(struct detailed_timing);
  986. for (i = start_offset; i < end_offset;
  987. i += sizeof(struct detailed_timing)) {
  988. timing = (struct detailed_timing *)(edid_ext + i);
  989. modes += add_detailed_modes(connector, timing, edid, quirks, 0);
  990. }
  991. return modes;
  992. }
  993. #define DDC_ADDR 0x50
  994. /**
  995. * Get EDID information via I2C.
  996. *
  997. * \param adapter : i2c device adaptor
  998. * \param buf : EDID data buffer to be filled
  999. * \param len : EDID data buffer length
  1000. * \return 0 on success or -1 on failure.
  1001. *
  1002. * Try to fetch EDID information by calling i2c driver function.
  1003. */
  1004. int drm_do_probe_ddc_edid(struct i2c_adapter *adapter,
  1005. unsigned char *buf, int len)
  1006. {
  1007. unsigned char start = 0x0;
  1008. struct i2c_msg msgs[] = {
  1009. {
  1010. .addr = DDC_ADDR,
  1011. .flags = 0,
  1012. .len = 1,
  1013. .buf = &start,
  1014. }, {
  1015. .addr = DDC_ADDR,
  1016. .flags = I2C_M_RD,
  1017. .len = len,
  1018. .buf = buf,
  1019. }
  1020. };
  1021. if (i2c_transfer(adapter, msgs, 2) == 2)
  1022. return 0;
  1023. return -1;
  1024. }
  1025. EXPORT_SYMBOL(drm_do_probe_ddc_edid);
  1026. static int drm_ddc_read_edid(struct drm_connector *connector,
  1027. struct i2c_adapter *adapter,
  1028. char *buf, int len)
  1029. {
  1030. int i;
  1031. for (i = 0; i < 4; i++) {
  1032. if (drm_do_probe_ddc_edid(adapter, buf, len))
  1033. return -1;
  1034. if (edid_is_valid((struct edid *)buf))
  1035. return 0;
  1036. }
  1037. /* repeated checksum failures; warn, but carry on */
  1038. dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1039. drm_get_connector_name(connector));
  1040. return -1;
  1041. }
  1042. /**
  1043. * drm_get_edid - get EDID data, if available
  1044. * @connector: connector we're probing
  1045. * @adapter: i2c adapter to use for DDC
  1046. *
  1047. * Poke the given connector's i2c channel to grab EDID data if possible.
  1048. *
  1049. * Return edid data or NULL if we couldn't find any.
  1050. */
  1051. struct edid *drm_get_edid(struct drm_connector *connector,
  1052. struct i2c_adapter *adapter)
  1053. {
  1054. int ret;
  1055. struct edid *edid;
  1056. edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1),
  1057. GFP_KERNEL);
  1058. if (edid == NULL) {
  1059. dev_warn(&connector->dev->pdev->dev,
  1060. "Failed to allocate EDID\n");
  1061. goto end;
  1062. }
  1063. /* Read first EDID block */
  1064. ret = drm_ddc_read_edid(connector, adapter,
  1065. (unsigned char *)edid, EDID_LENGTH);
  1066. if (ret != 0)
  1067. goto clean_up;
  1068. /* There are EDID extensions to be read */
  1069. if (edid->extensions != 0) {
  1070. int edid_ext_num = edid->extensions;
  1071. if (edid_ext_num > MAX_EDID_EXT_NUM) {
  1072. dev_warn(&connector->dev->pdev->dev,
  1073. "The number of extension(%d) is "
  1074. "over max (%d), actually read number (%d)\n",
  1075. edid_ext_num, MAX_EDID_EXT_NUM,
  1076. MAX_EDID_EXT_NUM);
  1077. /* Reset EDID extension number to be read */
  1078. edid_ext_num = MAX_EDID_EXT_NUM;
  1079. }
  1080. /* Read EDID including extensions too */
  1081. ret = drm_ddc_read_edid(connector, adapter, (char *)edid,
  1082. EDID_LENGTH * (edid_ext_num + 1));
  1083. if (ret != 0)
  1084. goto clean_up;
  1085. }
  1086. connector->display_info.raw_edid = (char *)edid;
  1087. goto end;
  1088. clean_up:
  1089. kfree(edid);
  1090. edid = NULL;
  1091. end:
  1092. return edid;
  1093. }
  1094. EXPORT_SYMBOL(drm_get_edid);
  1095. #define HDMI_IDENTIFIER 0x000C03
  1096. #define VENDOR_BLOCK 0x03
  1097. /**
  1098. * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
  1099. * @edid: monitor EDID information
  1100. *
  1101. * Parse the CEA extension according to CEA-861-B.
  1102. * Return true if HDMI, false if not or unknown.
  1103. */
  1104. bool drm_detect_hdmi_monitor(struct edid *edid)
  1105. {
  1106. char *edid_ext = NULL;
  1107. int i, hdmi_id, edid_ext_num;
  1108. int start_offset, end_offset;
  1109. bool is_hdmi = false;
  1110. /* No EDID or EDID extensions */
  1111. if (edid == NULL || edid->extensions == 0)
  1112. goto end;
  1113. /* Chose real EDID extension number */
  1114. edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ?
  1115. MAX_EDID_EXT_NUM : edid->extensions;
  1116. /* Find CEA extension */
  1117. for (i = 0; i < edid_ext_num; i++) {
  1118. edid_ext = (char *)edid + EDID_LENGTH * (i + 1);
  1119. /* This block is CEA extension */
  1120. if (edid_ext[0] == 0x02)
  1121. break;
  1122. }
  1123. if (i == edid_ext_num)
  1124. goto end;
  1125. /* Data block offset in CEA extension block */
  1126. start_offset = 4;
  1127. end_offset = edid_ext[2];
  1128. /*
  1129. * Because HDMI identifier is in Vendor Specific Block,
  1130. * search it from all data blocks of CEA extension.
  1131. */
  1132. for (i = start_offset; i < end_offset;
  1133. /* Increased by data block len */
  1134. i += ((edid_ext[i] & 0x1f) + 1)) {
  1135. /* Find vendor specific block */
  1136. if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
  1137. hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
  1138. edid_ext[i + 3] << 16;
  1139. /* Find HDMI identifier */
  1140. if (hdmi_id == HDMI_IDENTIFIER)
  1141. is_hdmi = true;
  1142. break;
  1143. }
  1144. }
  1145. end:
  1146. return is_hdmi;
  1147. }
  1148. EXPORT_SYMBOL(drm_detect_hdmi_monitor);
  1149. /**
  1150. * drm_add_edid_modes - add modes from EDID data, if available
  1151. * @connector: connector we're probing
  1152. * @edid: edid data
  1153. *
  1154. * Add the specified modes to the connector's mode list.
  1155. *
  1156. * Return number of modes added or 0 if we couldn't find any.
  1157. */
  1158. int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
  1159. {
  1160. int num_modes = 0;
  1161. u32 quirks;
  1162. if (edid == NULL) {
  1163. return 0;
  1164. }
  1165. if (!edid_is_valid(edid)) {
  1166. dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n",
  1167. drm_get_connector_name(connector));
  1168. return 0;
  1169. }
  1170. quirks = edid_get_quirks(edid);
  1171. num_modes += add_established_modes(connector, edid);
  1172. num_modes += add_standard_modes(connector, edid);
  1173. num_modes += add_detailed_info(connector, edid, quirks);
  1174. num_modes += add_detailed_info_eedid(connector, edid, quirks);
  1175. if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
  1176. edid_fixup_preferred(connector, quirks);
  1177. connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0;
  1178. connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0;
  1179. connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0;
  1180. connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0;
  1181. connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0;
  1182. connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5;
  1183. connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0;
  1184. connector->display_info.width_mm = edid->width_cm * 10;
  1185. connector->display_info.height_mm = edid->height_cm * 10;
  1186. connector->display_info.gamma = edid->gamma;
  1187. connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0;
  1188. connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0;
  1189. connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3;
  1190. connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0;
  1191. connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0;
  1192. connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0;
  1193. connector->display_info.gamma = edid->gamma;
  1194. return num_modes;
  1195. }
  1196. EXPORT_SYMBOL(drm_add_edid_modes);
  1197. /**
  1198. * drm_add_modes_noedid - add modes for the connectors without EDID
  1199. * @connector: connector we're probing
  1200. * @hdisplay: the horizontal display limit
  1201. * @vdisplay: the vertical display limit
  1202. *
  1203. * Add the specified modes to the connector's mode list. Only when the
  1204. * hdisplay/vdisplay is not beyond the given limit, it will be added.
  1205. *
  1206. * Return number of modes added or 0 if we couldn't find any.
  1207. */
  1208. int drm_add_modes_noedid(struct drm_connector *connector,
  1209. int hdisplay, int vdisplay)
  1210. {
  1211. int i, count, num_modes = 0;
  1212. struct drm_display_mode *mode, *ptr;
  1213. struct drm_device *dev = connector->dev;
  1214. count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
  1215. if (hdisplay < 0)
  1216. hdisplay = 0;
  1217. if (vdisplay < 0)
  1218. vdisplay = 0;
  1219. for (i = 0; i < count; i++) {
  1220. ptr = &drm_dmt_modes[i];
  1221. if (hdisplay && vdisplay) {
  1222. /*
  1223. * Only when two are valid, they will be used to check
  1224. * whether the mode should be added to the mode list of
  1225. * the connector.
  1226. */
  1227. if (ptr->hdisplay > hdisplay ||
  1228. ptr->vdisplay > vdisplay)
  1229. continue;
  1230. }
  1231. if (drm_mode_vrefresh(ptr) > 61)
  1232. continue;
  1233. mode = drm_mode_duplicate(dev, ptr);
  1234. if (mode) {
  1235. drm_mode_probed_add(connector, mode);
  1236. num_modes++;
  1237. }
  1238. }
  1239. return num_modes;
  1240. }
  1241. EXPORT_SYMBOL(drm_add_modes_noedid);