dmatest.c 16 KB

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  1. /*
  2. * DMA Engine test module
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/dmaengine.h>
  12. #include <linux/init.h>
  13. #include <linux/kthread.h>
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/random.h>
  17. #include <linux/wait.h>
  18. static unsigned int test_buf_size = 16384;
  19. module_param(test_buf_size, uint, S_IRUGO);
  20. MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  21. static char test_channel[20];
  22. module_param_string(channel, test_channel, sizeof(test_channel), S_IRUGO);
  23. MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  24. static char test_device[20];
  25. module_param_string(device, test_device, sizeof(test_device), S_IRUGO);
  26. MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  27. static unsigned int threads_per_chan = 1;
  28. module_param(threads_per_chan, uint, S_IRUGO);
  29. MODULE_PARM_DESC(threads_per_chan,
  30. "Number of threads to start per channel (default: 1)");
  31. static unsigned int max_channels;
  32. module_param(max_channels, uint, S_IRUGO);
  33. MODULE_PARM_DESC(max_channels,
  34. "Maximum number of channels to use (default: all)");
  35. static unsigned int iterations;
  36. module_param(iterations, uint, S_IRUGO);
  37. MODULE_PARM_DESC(iterations,
  38. "Iterations before stopping test (default: infinite)");
  39. static unsigned int xor_sources = 3;
  40. module_param(xor_sources, uint, S_IRUGO);
  41. MODULE_PARM_DESC(xor_sources,
  42. "Number of xor source buffers (default: 3)");
  43. static unsigned int pq_sources = 3;
  44. module_param(pq_sources, uint, S_IRUGO);
  45. MODULE_PARM_DESC(pq_sources,
  46. "Number of p+q source buffers (default: 3)");
  47. /*
  48. * Initialization patterns. All bytes in the source buffer has bit 7
  49. * set, all bytes in the destination buffer has bit 7 cleared.
  50. *
  51. * Bit 6 is set for all bytes which are to be copied by the DMA
  52. * engine. Bit 5 is set for all bytes which are to be overwritten by
  53. * the DMA engine.
  54. *
  55. * The remaining bits are the inverse of a counter which increments by
  56. * one for each byte address.
  57. */
  58. #define PATTERN_SRC 0x80
  59. #define PATTERN_DST 0x00
  60. #define PATTERN_COPY 0x40
  61. #define PATTERN_OVERWRITE 0x20
  62. #define PATTERN_COUNT_MASK 0x1f
  63. struct dmatest_thread {
  64. struct list_head node;
  65. struct task_struct *task;
  66. struct dma_chan *chan;
  67. u8 **srcs;
  68. u8 **dsts;
  69. enum dma_transaction_type type;
  70. };
  71. struct dmatest_chan {
  72. struct list_head node;
  73. struct dma_chan *chan;
  74. struct list_head threads;
  75. };
  76. /*
  77. * These are protected by dma_list_mutex since they're only used by
  78. * the DMA filter function callback
  79. */
  80. static LIST_HEAD(dmatest_channels);
  81. static unsigned int nr_channels;
  82. static bool dmatest_match_channel(struct dma_chan *chan)
  83. {
  84. if (test_channel[0] == '\0')
  85. return true;
  86. return strcmp(dma_chan_name(chan), test_channel) == 0;
  87. }
  88. static bool dmatest_match_device(struct dma_device *device)
  89. {
  90. if (test_device[0] == '\0')
  91. return true;
  92. return strcmp(dev_name(device->dev), test_device) == 0;
  93. }
  94. static unsigned long dmatest_random(void)
  95. {
  96. unsigned long buf;
  97. get_random_bytes(&buf, sizeof(buf));
  98. return buf;
  99. }
  100. static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
  101. {
  102. unsigned int i;
  103. u8 *buf;
  104. for (; (buf = *bufs); bufs++) {
  105. for (i = 0; i < start; i++)
  106. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  107. for ( ; i < start + len; i++)
  108. buf[i] = PATTERN_SRC | PATTERN_COPY
  109. | (~i & PATTERN_COUNT_MASK);
  110. for ( ; i < test_buf_size; i++)
  111. buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
  112. buf++;
  113. }
  114. }
  115. static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len)
  116. {
  117. unsigned int i;
  118. u8 *buf;
  119. for (; (buf = *bufs); bufs++) {
  120. for (i = 0; i < start; i++)
  121. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  122. for ( ; i < start + len; i++)
  123. buf[i] = PATTERN_DST | PATTERN_OVERWRITE
  124. | (~i & PATTERN_COUNT_MASK);
  125. for ( ; i < test_buf_size; i++)
  126. buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
  127. }
  128. }
  129. static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
  130. unsigned int counter, bool is_srcbuf)
  131. {
  132. u8 diff = actual ^ pattern;
  133. u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
  134. const char *thread_name = current->comm;
  135. if (is_srcbuf)
  136. pr_warning("%s: srcbuf[0x%x] overwritten!"
  137. " Expected %02x, got %02x\n",
  138. thread_name, index, expected, actual);
  139. else if ((pattern & PATTERN_COPY)
  140. && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
  141. pr_warning("%s: dstbuf[0x%x] not copied!"
  142. " Expected %02x, got %02x\n",
  143. thread_name, index, expected, actual);
  144. else if (diff & PATTERN_SRC)
  145. pr_warning("%s: dstbuf[0x%x] was copied!"
  146. " Expected %02x, got %02x\n",
  147. thread_name, index, expected, actual);
  148. else
  149. pr_warning("%s: dstbuf[0x%x] mismatch!"
  150. " Expected %02x, got %02x\n",
  151. thread_name, index, expected, actual);
  152. }
  153. static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
  154. unsigned int end, unsigned int counter, u8 pattern,
  155. bool is_srcbuf)
  156. {
  157. unsigned int i;
  158. unsigned int error_count = 0;
  159. u8 actual;
  160. u8 expected;
  161. u8 *buf;
  162. unsigned int counter_orig = counter;
  163. for (; (buf = *bufs); bufs++) {
  164. counter = counter_orig;
  165. for (i = start; i < end; i++) {
  166. actual = buf[i];
  167. expected = pattern | (~counter & PATTERN_COUNT_MASK);
  168. if (actual != expected) {
  169. if (error_count < 32)
  170. dmatest_mismatch(actual, pattern, i,
  171. counter, is_srcbuf);
  172. error_count++;
  173. }
  174. counter++;
  175. }
  176. }
  177. if (error_count > 32)
  178. pr_warning("%s: %u errors suppressed\n",
  179. current->comm, error_count - 32);
  180. return error_count;
  181. }
  182. static void dmatest_callback(void *completion)
  183. {
  184. complete(completion);
  185. }
  186. /*
  187. * This function repeatedly tests DMA transfers of various lengths and
  188. * offsets for a given operation type until it is told to exit by
  189. * kthread_stop(). There may be multiple threads running this function
  190. * in parallel for a single channel, and there may be multiple channels
  191. * being tested in parallel.
  192. *
  193. * Before each test, the source and destination buffer is initialized
  194. * with a known pattern. This pattern is different depending on
  195. * whether it's in an area which is supposed to be copied or
  196. * overwritten, and different in the source and destination buffers.
  197. * So if the DMA engine doesn't copy exactly what we tell it to copy,
  198. * we'll notice.
  199. */
  200. static int dmatest_func(void *data)
  201. {
  202. struct dmatest_thread *thread = data;
  203. struct dma_chan *chan;
  204. const char *thread_name;
  205. unsigned int src_off, dst_off, len;
  206. unsigned int error_count;
  207. unsigned int failed_tests = 0;
  208. unsigned int total_tests = 0;
  209. dma_cookie_t cookie;
  210. enum dma_status status;
  211. enum dma_ctrl_flags flags;
  212. u8 pq_coefs[pq_sources];
  213. int ret;
  214. int src_cnt;
  215. int dst_cnt;
  216. int i;
  217. thread_name = current->comm;
  218. ret = -ENOMEM;
  219. smp_rmb();
  220. chan = thread->chan;
  221. if (thread->type == DMA_MEMCPY)
  222. src_cnt = dst_cnt = 1;
  223. else if (thread->type == DMA_XOR) {
  224. src_cnt = xor_sources | 1; /* force odd to ensure dst = src */
  225. dst_cnt = 1;
  226. } else if (thread->type == DMA_PQ) {
  227. src_cnt = pq_sources | 1; /* force odd to ensure dst = src */
  228. dst_cnt = 2;
  229. for (i = 0; i < pq_sources; i++)
  230. pq_coefs[i] = 1;
  231. } else
  232. goto err_srcs;
  233. thread->srcs = kcalloc(src_cnt+1, sizeof(u8 *), GFP_KERNEL);
  234. if (!thread->srcs)
  235. goto err_srcs;
  236. for (i = 0; i < src_cnt; i++) {
  237. thread->srcs[i] = kmalloc(test_buf_size, GFP_KERNEL);
  238. if (!thread->srcs[i])
  239. goto err_srcbuf;
  240. }
  241. thread->srcs[i] = NULL;
  242. thread->dsts = kcalloc(dst_cnt+1, sizeof(u8 *), GFP_KERNEL);
  243. if (!thread->dsts)
  244. goto err_dsts;
  245. for (i = 0; i < dst_cnt; i++) {
  246. thread->dsts[i] = kmalloc(test_buf_size, GFP_KERNEL);
  247. if (!thread->dsts[i])
  248. goto err_dstbuf;
  249. }
  250. thread->dsts[i] = NULL;
  251. set_user_nice(current, 10);
  252. flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
  253. while (!kthread_should_stop()
  254. && !(iterations && total_tests >= iterations)) {
  255. struct dma_device *dev = chan->device;
  256. struct dma_async_tx_descriptor *tx = NULL;
  257. dma_addr_t dma_srcs[src_cnt];
  258. dma_addr_t dma_dsts[dst_cnt];
  259. struct completion cmp;
  260. unsigned long tmo = msecs_to_jiffies(3000);
  261. u8 align = 0;
  262. total_tests++;
  263. len = dmatest_random() % test_buf_size + 1;
  264. src_off = dmatest_random() % (test_buf_size - len + 1);
  265. dst_off = dmatest_random() % (test_buf_size - len + 1);
  266. /* honor alignment restrictions */
  267. if (thread->type == DMA_MEMCPY)
  268. align = dev->copy_align;
  269. else if (thread->type == DMA_XOR)
  270. align = dev->xor_align;
  271. else if (thread->type == DMA_PQ)
  272. align = dev->pq_align;
  273. len = (len >> align) << align;
  274. src_off = (src_off >> align) << align;
  275. dst_off = (dst_off >> align) << align;
  276. dmatest_init_srcs(thread->srcs, src_off, len);
  277. dmatest_init_dsts(thread->dsts, dst_off, len);
  278. for (i = 0; i < src_cnt; i++) {
  279. u8 *buf = thread->srcs[i] + src_off;
  280. dma_srcs[i] = dma_map_single(dev->dev, buf, len,
  281. DMA_TO_DEVICE);
  282. }
  283. /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
  284. for (i = 0; i < dst_cnt; i++) {
  285. dma_dsts[i] = dma_map_single(dev->dev, thread->dsts[i],
  286. test_buf_size,
  287. DMA_BIDIRECTIONAL);
  288. }
  289. if (thread->type == DMA_MEMCPY)
  290. tx = dev->device_prep_dma_memcpy(chan,
  291. dma_dsts[0] + dst_off,
  292. dma_srcs[0], len,
  293. flags);
  294. else if (thread->type == DMA_XOR)
  295. tx = dev->device_prep_dma_xor(chan,
  296. dma_dsts[0] + dst_off,
  297. dma_srcs, xor_sources,
  298. len, flags);
  299. else if (thread->type == DMA_PQ) {
  300. dma_addr_t dma_pq[dst_cnt];
  301. for (i = 0; i < dst_cnt; i++)
  302. dma_pq[i] = dma_dsts[i] + dst_off;
  303. tx = dev->device_prep_dma_pq(chan, dma_pq, dma_srcs,
  304. pq_sources, pq_coefs,
  305. len, flags);
  306. }
  307. if (!tx) {
  308. for (i = 0; i < src_cnt; i++)
  309. dma_unmap_single(dev->dev, dma_srcs[i], len,
  310. DMA_TO_DEVICE);
  311. for (i = 0; i < dst_cnt; i++)
  312. dma_unmap_single(dev->dev, dma_dsts[i],
  313. test_buf_size,
  314. DMA_BIDIRECTIONAL);
  315. pr_warning("%s: #%u: prep error with src_off=0x%x "
  316. "dst_off=0x%x len=0x%x\n",
  317. thread_name, total_tests - 1,
  318. src_off, dst_off, len);
  319. msleep(100);
  320. failed_tests++;
  321. continue;
  322. }
  323. init_completion(&cmp);
  324. tx->callback = dmatest_callback;
  325. tx->callback_param = &cmp;
  326. cookie = tx->tx_submit(tx);
  327. if (dma_submit_error(cookie)) {
  328. pr_warning("%s: #%u: submit error %d with src_off=0x%x "
  329. "dst_off=0x%x len=0x%x\n",
  330. thread_name, total_tests - 1, cookie,
  331. src_off, dst_off, len);
  332. msleep(100);
  333. failed_tests++;
  334. continue;
  335. }
  336. dma_async_issue_pending(chan);
  337. tmo = wait_for_completion_timeout(&cmp, tmo);
  338. status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
  339. if (tmo == 0) {
  340. pr_warning("%s: #%u: test timed out\n",
  341. thread_name, total_tests - 1);
  342. failed_tests++;
  343. continue;
  344. } else if (status != DMA_SUCCESS) {
  345. pr_warning("%s: #%u: got completion callback,"
  346. " but status is \'%s\'\n",
  347. thread_name, total_tests - 1,
  348. status == DMA_ERROR ? "error" : "in progress");
  349. failed_tests++;
  350. continue;
  351. }
  352. /* Unmap by myself (see DMA_COMPL_SKIP_DEST_UNMAP above) */
  353. for (i = 0; i < dst_cnt; i++)
  354. dma_unmap_single(dev->dev, dma_dsts[i], test_buf_size,
  355. DMA_BIDIRECTIONAL);
  356. error_count = 0;
  357. pr_debug("%s: verifying source buffer...\n", thread_name);
  358. error_count += dmatest_verify(thread->srcs, 0, src_off,
  359. 0, PATTERN_SRC, true);
  360. error_count += dmatest_verify(thread->srcs, src_off,
  361. src_off + len, src_off,
  362. PATTERN_SRC | PATTERN_COPY, true);
  363. error_count += dmatest_verify(thread->srcs, src_off + len,
  364. test_buf_size, src_off + len,
  365. PATTERN_SRC, true);
  366. pr_debug("%s: verifying dest buffer...\n",
  367. thread->task->comm);
  368. error_count += dmatest_verify(thread->dsts, 0, dst_off,
  369. 0, PATTERN_DST, false);
  370. error_count += dmatest_verify(thread->dsts, dst_off,
  371. dst_off + len, src_off,
  372. PATTERN_SRC | PATTERN_COPY, false);
  373. error_count += dmatest_verify(thread->dsts, dst_off + len,
  374. test_buf_size, dst_off + len,
  375. PATTERN_DST, false);
  376. if (error_count) {
  377. pr_warning("%s: #%u: %u errors with "
  378. "src_off=0x%x dst_off=0x%x len=0x%x\n",
  379. thread_name, total_tests - 1, error_count,
  380. src_off, dst_off, len);
  381. failed_tests++;
  382. } else {
  383. pr_debug("%s: #%u: No errors with "
  384. "src_off=0x%x dst_off=0x%x len=0x%x\n",
  385. thread_name, total_tests - 1,
  386. src_off, dst_off, len);
  387. }
  388. }
  389. ret = 0;
  390. for (i = 0; thread->dsts[i]; i++)
  391. kfree(thread->dsts[i]);
  392. err_dstbuf:
  393. kfree(thread->dsts);
  394. err_dsts:
  395. for (i = 0; thread->srcs[i]; i++)
  396. kfree(thread->srcs[i]);
  397. err_srcbuf:
  398. kfree(thread->srcs);
  399. err_srcs:
  400. pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
  401. thread_name, total_tests, failed_tests, ret);
  402. if (iterations > 0)
  403. while (!kthread_should_stop()) {
  404. DECLARE_WAIT_QUEUE_HEAD(wait_dmatest_exit);
  405. interruptible_sleep_on(&wait_dmatest_exit);
  406. }
  407. return ret;
  408. }
  409. static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
  410. {
  411. struct dmatest_thread *thread;
  412. struct dmatest_thread *_thread;
  413. int ret;
  414. list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
  415. ret = kthread_stop(thread->task);
  416. pr_debug("dmatest: thread %s exited with status %d\n",
  417. thread->task->comm, ret);
  418. list_del(&thread->node);
  419. kfree(thread);
  420. }
  421. kfree(dtc);
  422. }
  423. static int dmatest_add_threads(struct dmatest_chan *dtc, enum dma_transaction_type type)
  424. {
  425. struct dmatest_thread *thread;
  426. struct dma_chan *chan = dtc->chan;
  427. char *op;
  428. unsigned int i;
  429. if (type == DMA_MEMCPY)
  430. op = "copy";
  431. else if (type == DMA_XOR)
  432. op = "xor";
  433. else if (type == DMA_PQ)
  434. op = "pq";
  435. else
  436. return -EINVAL;
  437. for (i = 0; i < threads_per_chan; i++) {
  438. thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
  439. if (!thread) {
  440. pr_warning("dmatest: No memory for %s-%s%u\n",
  441. dma_chan_name(chan), op, i);
  442. break;
  443. }
  444. thread->chan = dtc->chan;
  445. thread->type = type;
  446. smp_wmb();
  447. thread->task = kthread_run(dmatest_func, thread, "%s-%s%u",
  448. dma_chan_name(chan), op, i);
  449. if (IS_ERR(thread->task)) {
  450. pr_warning("dmatest: Failed to run thread %s-%s%u\n",
  451. dma_chan_name(chan), op, i);
  452. kfree(thread);
  453. break;
  454. }
  455. /* srcbuf and dstbuf are allocated by the thread itself */
  456. list_add_tail(&thread->node, &dtc->threads);
  457. }
  458. return i;
  459. }
  460. static int dmatest_add_channel(struct dma_chan *chan)
  461. {
  462. struct dmatest_chan *dtc;
  463. struct dma_device *dma_dev = chan->device;
  464. unsigned int thread_count = 0;
  465. unsigned int cnt;
  466. dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
  467. if (!dtc) {
  468. pr_warning("dmatest: No memory for %s\n", dma_chan_name(chan));
  469. return -ENOMEM;
  470. }
  471. dtc->chan = chan;
  472. INIT_LIST_HEAD(&dtc->threads);
  473. if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
  474. cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
  475. thread_count += cnt > 0 ? cnt : 0;
  476. }
  477. if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
  478. cnt = dmatest_add_threads(dtc, DMA_XOR);
  479. thread_count += cnt > 0 ? cnt : 0;
  480. }
  481. if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
  482. cnt = dmatest_add_threads(dtc, DMA_PQ);
  483. thread_count += cnt > 0 ?: 0;
  484. }
  485. pr_info("dmatest: Started %u threads using %s\n",
  486. thread_count, dma_chan_name(chan));
  487. list_add_tail(&dtc->node, &dmatest_channels);
  488. nr_channels++;
  489. return 0;
  490. }
  491. static bool filter(struct dma_chan *chan, void *param)
  492. {
  493. if (!dmatest_match_channel(chan) || !dmatest_match_device(chan->device))
  494. return false;
  495. else
  496. return true;
  497. }
  498. static int __init dmatest_init(void)
  499. {
  500. dma_cap_mask_t mask;
  501. struct dma_chan *chan;
  502. int err = 0;
  503. dma_cap_zero(mask);
  504. dma_cap_set(DMA_MEMCPY, mask);
  505. for (;;) {
  506. chan = dma_request_channel(mask, filter, NULL);
  507. if (chan) {
  508. err = dmatest_add_channel(chan);
  509. if (err) {
  510. dma_release_channel(chan);
  511. break; /* add_channel failed, punt */
  512. }
  513. } else
  514. break; /* no more channels available */
  515. if (max_channels && nr_channels >= max_channels)
  516. break; /* we have all we need */
  517. }
  518. return err;
  519. }
  520. /* when compiled-in wait for drivers to load first */
  521. late_initcall(dmatest_init);
  522. static void __exit dmatest_exit(void)
  523. {
  524. struct dmatest_chan *dtc, *_dtc;
  525. struct dma_chan *chan;
  526. list_for_each_entry_safe(dtc, _dtc, &dmatest_channels, node) {
  527. list_del(&dtc->node);
  528. chan = dtc->chan;
  529. dmatest_cleanup_channel(dtc);
  530. pr_debug("dmatest: dropped channel %s\n",
  531. dma_chan_name(chan));
  532. dma_release_channel(chan);
  533. }
  534. }
  535. module_exit(dmatest_exit);
  536. MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
  537. MODULE_LICENSE("GPL v2");