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arch
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cris
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include
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arch-v32
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mach-fs
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mach
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startup.inc

startup.inc 2.2 KB
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  1. #include <hwregs/asm/reg_map_asm.h>
    2. 

  2. #include <hwregs/asm/bif_core_defs_asm.h>
    3. 

  3. #include <hwregs/asm/gio_defs_asm.h>
    4. 

  4. #include <hwregs/asm/config_defs_asm.h>
    5. 

  5. 

  6. 	.macro GIO_INIT
    7. 

  7. 	move.d	CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
    8. 

  8. 	move.d	REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
    9. 

  9. 	move.d	$r0, [$r1]
    10. 

  10. 

  11. 	move.d	CONFIG_ETRAX_DEF_GIO_PA_OE, $r0
    12. 

  12. 	move.d	REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
    13. 

  13. 	move.d	$r0, [$r1]
    14. 

  14. 

  15. 	move.d	CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0
    16. 

  16. 	move.d	REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
    17. 

  17. 	move.d	$r0, [$r1]
    18. 

  18. 

  19. 	move.d	CONFIG_ETRAX_DEF_GIO_PB_OE, $r0
    20. 

  20. 	move.d	REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
    21. 

  21. 	move.d	$r0, [$r1]
    22. 

  22. 

  23. 	move.d	CONFIG_ETRAX_DEF_GIO_PC_OUT, $r0
    24. 

  24. 	move.d	REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
    25. 

  25. 	move.d	$r0, [$r1]
    26. 

  26. 

  27. 	move.d	CONFIG_ETRAX_DEF_GIO_PC_OE, $r0
    28. 

  28. 	move.d	REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
    29. 

  29. 	move.d	$r0, [$r1]
    30. 

  30. 

  31. 	move.d	CONFIG_ETRAX_DEF_GIO_PD_OUT, $r0
    32. 

  32. 	move.d	REG_ADDR(gio, regi_gio, rw_pd_dout), $r1
    33. 

  33. 	move.d	$r0, [$r1]
    34. 

  34. 

  35. 	move.d	CONFIG_ETRAX_DEF_GIO_PD_OE, $r0
    36. 

  36. 	move.d	REG_ADDR(gio, regi_gio, rw_pd_oe), $r1
    37. 

  37. 	move.d	$r0, [$r1]
    38. 

  38. 

  39. 	move.d	CONFIG_ETRAX_DEF_GIO_PE_OUT, $r0
    40. 

  40. 	move.d	REG_ADDR(gio, regi_gio, rw_pe_dout), $r1
    41. 

  41. 	move.d	$r0, [$r1]
    42. 

  42. 

  43. 	move.d	CONFIG_ETRAX_DEF_GIO_PE_OE, $r0
    44. 

  44. 	move.d	REG_ADDR(gio, regi_gio, rw_pe_oe), $r1
    45. 

  45. 	move.d	$r0, [$r1]
    46. 

  46. 	.endm
    47. 

  47. 

  48. 	.macro START_CLOCKS
    49. 

  49. 	move.d REG_ADDR(config, regi_config, rw_clk_ctrl), $r1
    50. 

  50. 	move.d [$r1], $r0
    51. 

  51. 	or.d   REG_STATE(config, rw_clk_ctrl, cpu, yes) | \
    52. 

  52. 	       REG_STATE(config, rw_clk_ctrl, bif, yes) | \
    53. 

  53. 	       REG_STATE(config, rw_clk_ctrl, fix_io, yes), $r0
    54. 

  54. 	move.d $r0, [$r1]
    55. 

  55. 	.endm
    56. 

  56. 

  57. 	.macro SETUP_WAIT_STATES
    58. 

  58. 	;; Set up waitstates etc
    59. 

  59. 	move.d   REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r0
    60. 

  60. 	move.d   CONFIG_ETRAX_MEM_GRP1_CONFIG, $r1
    61. 

  61. 	move.d   $r1, [$r0]
    62. 

  62. 	move.d   REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg), $r0
    63. 

  63. 	move.d   CONFIG_ETRAX_MEM_GRP2_CONFIG, $r1
    64. 

  64. 	move.d   $r1, [$r0]
    65. 

  65. 	move.d   REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg), $r0
    66. 

  66. 	move.d   CONFIG_ETRAX_MEM_GRP3_CONFIG, $r1
    67. 

  67. 	move.d   $r1, [$r0]
    68. 

  68. 	move.d   REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0
    69. 

  69. 	move.d   CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1
    70. 

  70. 	move.d   $r1, [$r0]
    71. 

  71. #ifdef CONFIG_ETRAX_VCS_SIM
    72. 

  72. 	;; Set up minimal flash waitstates
    73. 

  73. 	move.d 0, $r10
    74. 

  74. 	move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11
    75. 

  75. 	move.d $r10, [$r11]
    76. 

  76. #endif
    77. 

  77. 	.endm
    78.