H8606.c 11 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2007-2008 HV Sistemas S.L.
  4. * Javier Herrero <jherrero@hvsistemas.es>
  5. * 2005 National ICT Australia (NICTA)
  6. * Aidan Williams <aidan@nicta.com.au>
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #include <linux/device.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/partitions.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  17. #include <linux/usb/isp1362.h>
  18. #endif
  19. #include <linux/irq.h>
  20. #include <asm/dma.h>
  21. #include <asm/bfin5xx_spi.h>
  22. #include <asm/reboot.h>
  23. #include <asm/portmux.h>
  24. /*
  25. * Name the Board for the /proc/cpuinfo
  26. */
  27. const char bfin_board_name[] = "HV Sistemas H8606";
  28. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  29. static struct platform_device rtc_device = {
  30. .name = "rtc-bfin",
  31. .id = -1,
  32. };
  33. #endif
  34. /*
  35. * Driver needs to know address, irq and flag pin.
  36. */
  37. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  38. static struct resource dm9000_resources[] = {
  39. [0] = {
  40. .start = 0x20300000,
  41. .end = 0x20300002,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = 0x20300004,
  46. .end = 0x20300006,
  47. .flags = IORESOURCE_MEM,
  48. },
  49. [2] = {
  50. .start = IRQ_PF10,
  51. .end = IRQ_PF10,
  52. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
  53. },
  54. };
  55. static struct platform_device dm9000_device = {
  56. .id = 0,
  57. .name = "dm9000",
  58. .resource = dm9000_resources,
  59. .num_resources = ARRAY_SIZE(dm9000_resources),
  60. };
  61. #endif
  62. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  63. #include <linux/smc91x.h>
  64. static struct smc91x_platdata smc91x_info = {
  65. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  66. .leda = RPC_LED_100_10,
  67. .ledb = RPC_LED_TX_RX,
  68. };
  69. static struct resource smc91x_resources[] = {
  70. {
  71. .name = "smc91x-regs",
  72. .start = 0x20300300,
  73. .end = 0x20300300 + 16,
  74. .flags = IORESOURCE_MEM,
  75. }, {
  76. .start = IRQ_PROG_INTB,
  77. .end = IRQ_PROG_INTB,
  78. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  79. }, {
  80. .start = IRQ_PF7,
  81. .end = IRQ_PF7,
  82. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  83. },
  84. };
  85. static struct platform_device smc91x_device = {
  86. .name = "smc91x",
  87. .id = 0,
  88. .num_resources = ARRAY_SIZE(smc91x_resources),
  89. .resource = smc91x_resources,
  90. .dev = {
  91. .platform_data = &smc91x_info,
  92. },
  93. };
  94. #endif
  95. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  96. static struct resource net2272_bfin_resources[] = {
  97. {
  98. .start = 0x20300000,
  99. .end = 0x20300000 + 0x100,
  100. .flags = IORESOURCE_MEM,
  101. }, {
  102. .start = IRQ_PF10,
  103. .end = IRQ_PF10,
  104. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  105. },
  106. };
  107. static struct platform_device net2272_bfin_device = {
  108. .name = "net2272",
  109. .id = -1,
  110. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  111. .resource = net2272_bfin_resources,
  112. };
  113. #endif
  114. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  115. /* all SPI peripherals info goes here */
  116. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  117. static struct mtd_partition bfin_spi_flash_partitions[] = {
  118. {
  119. .name = "bootloader (spi)",
  120. .size = 0x40000,
  121. .offset = 0,
  122. .mask_flags = MTD_CAP_ROM
  123. }, {
  124. .name = "fpga (spi)",
  125. .size = 0x30000,
  126. .offset = 0x40000
  127. }, {
  128. .name = "linux kernel (spi)",
  129. .size = 0x150000,
  130. .offset = 0x70000
  131. }, {
  132. .name = "jffs2 root file system (spi)",
  133. .size = 0x640000,
  134. .offset = 0x1c0000,
  135. }
  136. };
  137. static struct flash_platform_data bfin_spi_flash_data = {
  138. .name = "m25p80",
  139. .parts = bfin_spi_flash_partitions,
  140. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  141. .type = "m25p64",
  142. };
  143. /* SPI flash chip (m25p64) */
  144. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  145. .enable_dma = 0, /* use dma transfer with this chip*/
  146. .bits_per_word = 8,
  147. };
  148. #endif
  149. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  150. /* SPI ADC chip */
  151. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  152. .ctl_reg = 0x1000,
  153. .enable_dma = 1, /* use dma transfer with this chip*/
  154. .bits_per_word = 16,
  155. };
  156. #endif
  157. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  158. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  159. .ctl_reg = 0x1000,
  160. .enable_dma = 0,
  161. .bits_per_word = 16,
  162. };
  163. #endif
  164. /* Notice: for blackfin, the speed_hz is the value of register
  165. * SPI_BAUD, not the real baudrate */
  166. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  167. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  168. {
  169. /* the modalias must be the same as spi device driver name */
  170. .modalias = "m25p80", /* Name of spi_driver for this device */
  171. /* this value is the baudrate divisor */
  172. .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
  173. .bus_num = 0, /* Framework bus number */
  174. .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
  175. .platform_data = &bfin_spi_flash_data,
  176. .controller_data = &spi_flash_chip_info,
  177. .mode = SPI_MODE_3,
  178. },
  179. #endif
  180. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  181. {
  182. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  183. .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
  184. .bus_num = 1, /* Framework bus number */
  185. .chip_select = 1, /* Framework chip select. */
  186. .platform_data = NULL, /* No spi_driver specific config */
  187. .controller_data = &spi_adc_chip_info,
  188. },
  189. #endif
  190. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  191. {
  192. .modalias = "ad1836",
  193. .max_speed_hz = 16,
  194. .bus_num = 1,
  195. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  196. .controller_data = &ad1836_spi_chip_info,
  197. },
  198. #endif
  199. };
  200. /* SPI (0) */
  201. static struct resource bfin_spi0_resource[] = {
  202. [0] = {
  203. .start = SPI0_REGBASE,
  204. .end = SPI0_REGBASE + 0xFF,
  205. .flags = IORESOURCE_MEM,
  206. },
  207. [1] = {
  208. .start = CH_SPI,
  209. .end = CH_SPI,
  210. .flags = IORESOURCE_DMA,
  211. },
  212. [2] = {
  213. .start = IRQ_SPI,
  214. .end = IRQ_SPI,
  215. .flags = IORESOURCE_IRQ,
  216. }
  217. };
  218. /* SPI controller data */
  219. static struct bfin5xx_spi_master bfin_spi0_info = {
  220. .num_chipselect = 8,
  221. .enable_dma = 1, /* master has the ability to do dma transfer */
  222. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  223. };
  224. static struct platform_device bfin_spi0_device = {
  225. .name = "bfin-spi",
  226. .id = 0, /* Bus number */
  227. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  228. .resource = bfin_spi0_resource,
  229. .dev = {
  230. .platform_data = &bfin_spi0_info, /* Passed to driver */
  231. },
  232. };
  233. #endif /* spi master and devices */
  234. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  235. static struct platform_device bfin_fb_device = {
  236. .name = "bf537-fb",
  237. };
  238. #endif
  239. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  240. static struct resource bfin_uart_resources[] = {
  241. {
  242. .start = 0xFFC00400,
  243. .end = 0xFFC004FF,
  244. .flags = IORESOURCE_MEM,
  245. },
  246. };
  247. static struct platform_device bfin_uart_device = {
  248. .name = "bfin-uart",
  249. .id = 1,
  250. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  251. .resource = bfin_uart_resources,
  252. };
  253. #endif
  254. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  255. #ifdef CONFIG_BFIN_SIR0
  256. static struct resource bfin_sir0_resources[] = {
  257. {
  258. .start = 0xFFC00400,
  259. .end = 0xFFC004FF,
  260. .flags = IORESOURCE_MEM,
  261. },
  262. {
  263. .start = IRQ_UART0_RX,
  264. .end = IRQ_UART0_RX+1,
  265. .flags = IORESOURCE_IRQ,
  266. },
  267. {
  268. .start = CH_UART0_RX,
  269. .end = CH_UART0_RX+1,
  270. .flags = IORESOURCE_DMA,
  271. },
  272. };
  273. static struct platform_device bfin_sir0_device = {
  274. .name = "bfin_sir",
  275. .id = 0,
  276. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  277. .resource = bfin_sir0_resources,
  278. };
  279. #endif
  280. #endif
  281. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  282. #include <linux/serial_8250.h>
  283. #include <linux/serial.h>
  284. /*
  285. * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
  286. * running at half system clock, both with interrupt output or-ed to PF8. Change to
  287. * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
  288. */
  289. static struct plat_serial8250_port serial8250_platform_data [] = {
  290. {
  291. .membase = (void *)0x20200000,
  292. .mapbase = 0x20200000,
  293. .irq = IRQ_PF8,
  294. .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
  295. .iotype = UPIO_MEM,
  296. .regshift = 1,
  297. .uartclk = 66666667,
  298. }, {
  299. .membase = (void *)0x20200010,
  300. .mapbase = 0x20200010,
  301. .irq = IRQ_PF8,
  302. .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
  303. .iotype = UPIO_MEM,
  304. .regshift = 1,
  305. .uartclk = 66666667,
  306. }, {
  307. }
  308. };
  309. static struct platform_device serial8250_device = {
  310. .id = PLAT8250_DEV_PLATFORM,
  311. .name = "serial8250",
  312. .dev = {
  313. .platform_data = serial8250_platform_data,
  314. },
  315. };
  316. #endif
  317. #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
  318. /*
  319. * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
  320. * interrupt output wired to PF9. Change to suit different FPGA configuration
  321. */
  322. static struct resource opencores_kbd_resources[] = {
  323. [0] = {
  324. .start = 0x20200030,
  325. .end = 0x20300030 + 2,
  326. .flags = IORESOURCE_MEM,
  327. },
  328. [1] = {
  329. .start = IRQ_PF9,
  330. .end = IRQ_PF9,
  331. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  332. },
  333. };
  334. static struct platform_device opencores_kbd_device = {
  335. .id = -1,
  336. .name = "opencores-kbd",
  337. .resource = opencores_kbd_resources,
  338. .num_resources = ARRAY_SIZE(opencores_kbd_resources),
  339. };
  340. #endif
  341. static struct platform_device *h8606_devices[] __initdata = {
  342. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  343. &rtc_device,
  344. #endif
  345. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  346. &dm9000_device,
  347. #endif
  348. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  349. &smc91x_device,
  350. #endif
  351. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  352. &net2272_bfin_device,
  353. #endif
  354. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  355. &bfin_spi0_device,
  356. #endif
  357. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  358. &bfin_uart_device,
  359. #endif
  360. #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
  361. &serial8250_device,
  362. #endif
  363. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  364. #ifdef CONFIG_BFIN_SIR0
  365. &bfin_sir0_device,
  366. #endif
  367. #endif
  368. #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
  369. &opencores_kbd_device,
  370. #endif
  371. };
  372. static int __init H8606_init(void)
  373. {
  374. printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
  375. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  376. platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
  377. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  378. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  379. #endif
  380. return 0;
  381. }
  382. arch_initcall(H8606_init);