board-da850-evm.c 16 KB

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  1. /*
  2. * TI DA850/OMAP-L138 EVM board
  3. *
  4. * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * Derived from: arch/arm/mach-davinci/board-da830-evm.c
  7. * Original Copyrights follow:
  8. *
  9. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  10. * the terms of the GNU General Public License version 2. This program
  11. * is licensed "as is" without any warranty of any kind, whether express
  12. * or implied.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/i2c.h>
  18. #include <linux/i2c/at24.h>
  19. #include <linux/i2c/pca953x.h>
  20. #include <linux/gpio.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/mtd/mtd.h>
  23. #include <linux/mtd/nand.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/regulator/machine.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <mach/cp_intc.h>
  30. #include <mach/da8xx.h>
  31. #include <mach/nand.h>
  32. #include <mach/mux.h>
  33. #define DA850_EVM_PHY_MASK 0x1
  34. #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
  35. #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
  36. #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
  37. #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0)
  38. #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1)
  39. #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6)
  40. static struct mtd_partition da850_evm_norflash_partition[] = {
  41. {
  42. .name = "NOR filesystem",
  43. .offset = 0,
  44. .size = MTDPART_SIZ_FULL,
  45. .mask_flags = 0,
  46. },
  47. };
  48. static struct physmap_flash_data da850_evm_norflash_data = {
  49. .width = 2,
  50. .parts = da850_evm_norflash_partition,
  51. .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
  52. };
  53. static struct resource da850_evm_norflash_resource[] = {
  54. {
  55. .start = DA8XX_AEMIF_CS2_BASE,
  56. .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
  57. .flags = IORESOURCE_MEM,
  58. },
  59. };
  60. static struct platform_device da850_evm_norflash_device = {
  61. .name = "physmap-flash",
  62. .id = 0,
  63. .dev = {
  64. .platform_data = &da850_evm_norflash_data,
  65. },
  66. .num_resources = 1,
  67. .resource = da850_evm_norflash_resource,
  68. };
  69. /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
  70. * (128K blocks). It may be used instead of the (default) SPI flash
  71. * to boot, using TI's tools to install the secondary boot loader
  72. * (UBL) and U-Boot.
  73. */
  74. struct mtd_partition da850_evm_nandflash_partition[] = {
  75. {
  76. .name = "u-boot env",
  77. .offset = 0,
  78. .size = SZ_128K,
  79. .mask_flags = MTD_WRITEABLE,
  80. },
  81. {
  82. .name = "UBL",
  83. .offset = MTDPART_OFS_APPEND,
  84. .size = SZ_128K,
  85. .mask_flags = MTD_WRITEABLE,
  86. },
  87. {
  88. .name = "u-boot",
  89. .offset = MTDPART_OFS_APPEND,
  90. .size = 4 * SZ_128K,
  91. .mask_flags = MTD_WRITEABLE,
  92. },
  93. {
  94. .name = "kernel",
  95. .offset = 0x200000,
  96. .size = SZ_2M,
  97. .mask_flags = 0,
  98. },
  99. {
  100. .name = "filesystem",
  101. .offset = MTDPART_OFS_APPEND,
  102. .size = MTDPART_SIZ_FULL,
  103. .mask_flags = 0,
  104. },
  105. };
  106. static struct davinci_nand_pdata da850_evm_nandflash_data = {
  107. .parts = da850_evm_nandflash_partition,
  108. .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
  109. .ecc_mode = NAND_ECC_HW,
  110. .options = NAND_USE_FLASH_BBT,
  111. };
  112. static struct resource da850_evm_nandflash_resource[] = {
  113. {
  114. .start = DA8XX_AEMIF_CS3_BASE,
  115. .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
  116. .flags = IORESOURCE_MEM,
  117. },
  118. {
  119. .start = DA8XX_AEMIF_CTL_BASE,
  120. .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
  121. .flags = IORESOURCE_MEM,
  122. },
  123. };
  124. static struct platform_device da850_evm_nandflash_device = {
  125. .name = "davinci_nand",
  126. .id = 1,
  127. .dev = {
  128. .platform_data = &da850_evm_nandflash_data,
  129. },
  130. .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource),
  131. .resource = da850_evm_nandflash_resource,
  132. };
  133. static struct platform_device *da850_evm_devices[] __initdata = {
  134. &da850_evm_nandflash_device,
  135. &da850_evm_norflash_device,
  136. };
  137. #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10
  138. #define DA8XX_AEMIF_ASIZE_16BIT 0x1
  139. static void __init da850_evm_init_nor(void)
  140. {
  141. void __iomem *aemif_addr;
  142. aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K);
  143. /* Configure data bus width of CS2 to 16 bit */
  144. writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) |
  145. DA8XX_AEMIF_ASIZE_16BIT,
  146. aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET);
  147. iounmap(aemif_addr);
  148. }
  149. static u32 ui_card_detected;
  150. #if defined(CONFIG_MMC_DAVINCI) || \
  151. defined(CONFIG_MMC_DAVINCI_MODULE)
  152. #define HAS_MMC 1
  153. #else
  154. #define HAS_MMC 0
  155. #endif
  156. static __init void da850_evm_setup_nor_nand(void)
  157. {
  158. int ret = 0;
  159. if (ui_card_detected & !HAS_MMC) {
  160. ret = da8xx_pinmux_setup(da850_nand_pins);
  161. if (ret)
  162. pr_warning("da850_evm_init: nand mux setup failed: "
  163. "%d\n", ret);
  164. ret = da8xx_pinmux_setup(da850_nor_pins);
  165. if (ret)
  166. pr_warning("da850_evm_init: nor mux setup failed: %d\n",
  167. ret);
  168. da850_evm_init_nor();
  169. platform_add_devices(da850_evm_devices,
  170. ARRAY_SIZE(da850_evm_devices));
  171. }
  172. }
  173. #ifdef CONFIG_DA850_UI_RMII
  174. static inline void da850_evm_setup_emac_rmii(int rmii_sel)
  175. {
  176. struct davinci_soc_info *soc_info = &davinci_soc_info;
  177. soc_info->emac_pdata->rmii_en = 1;
  178. gpio_set_value(rmii_sel, 0);
  179. }
  180. #else
  181. static inline void da850_evm_setup_emac_rmii(int rmii_sel) { }
  182. #endif
  183. static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio,
  184. unsigned ngpio, void *c)
  185. {
  186. int sel_a, sel_b, sel_c, ret;
  187. sel_a = gpio + 7;
  188. sel_b = gpio + 6;
  189. sel_c = gpio + 5;
  190. ret = gpio_request(sel_a, "sel_a");
  191. if (ret) {
  192. pr_warning("Cannot open UI expander pin %d\n", sel_a);
  193. goto exp_setup_sela_fail;
  194. }
  195. ret = gpio_request(sel_b, "sel_b");
  196. if (ret) {
  197. pr_warning("Cannot open UI expander pin %d\n", sel_b);
  198. goto exp_setup_selb_fail;
  199. }
  200. ret = gpio_request(sel_c, "sel_c");
  201. if (ret) {
  202. pr_warning("Cannot open UI expander pin %d\n", sel_c);
  203. goto exp_setup_selc_fail;
  204. }
  205. /* deselect all functionalities */
  206. gpio_direction_output(sel_a, 1);
  207. gpio_direction_output(sel_b, 1);
  208. gpio_direction_output(sel_c, 1);
  209. ui_card_detected = 1;
  210. pr_info("DA850/OMAP-L138 EVM UI card detected\n");
  211. da850_evm_setup_nor_nand();
  212. da850_evm_setup_emac_rmii(sel_a);
  213. return 0;
  214. exp_setup_selc_fail:
  215. gpio_free(sel_b);
  216. exp_setup_selb_fail:
  217. gpio_free(sel_a);
  218. exp_setup_sela_fail:
  219. return ret;
  220. }
  221. static int da850_evm_ui_expander_teardown(struct i2c_client *client,
  222. unsigned gpio, unsigned ngpio, void *c)
  223. {
  224. /* deselect all functionalities */
  225. gpio_set_value(gpio + 5, 1);
  226. gpio_set_value(gpio + 6, 1);
  227. gpio_set_value(gpio + 7, 1);
  228. gpio_free(gpio + 5);
  229. gpio_free(gpio + 6);
  230. gpio_free(gpio + 7);
  231. return 0;
  232. }
  233. static struct pca953x_platform_data da850_evm_ui_expander_info = {
  234. .gpio_base = DAVINCI_N_GPIO,
  235. .setup = da850_evm_ui_expander_setup,
  236. .teardown = da850_evm_ui_expander_teardown,
  237. };
  238. static struct i2c_board_info __initdata da850_evm_i2c_devices[] = {
  239. {
  240. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  241. },
  242. {
  243. I2C_BOARD_INFO("tca6416", 0x20),
  244. .platform_data = &da850_evm_ui_expander_info,
  245. },
  246. };
  247. static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = {
  248. .bus_freq = 100, /* kHz */
  249. .bus_delay = 0, /* usec */
  250. };
  251. static struct davinci_uart_config da850_evm_uart_config __initdata = {
  252. .enabled_uarts = 0x7,
  253. };
  254. /* davinci da850 evm audio machine driver */
  255. static u8 da850_iis_serializer_direction[] = {
  256. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  257. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  258. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE,
  259. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  260. };
  261. static struct snd_platform_data da850_evm_snd_data = {
  262. .tx_dma_offset = 0x2000,
  263. .rx_dma_offset = 0x2000,
  264. .op_mode = DAVINCI_MCASP_IIS_MODE,
  265. .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
  266. .tdm_slots = 2,
  267. .serial_dir = da850_iis_serializer_direction,
  268. .eventq_no = EVENTQ_1,
  269. .version = MCASP_VERSION_2,
  270. .txnumevt = 1,
  271. .rxnumevt = 1,
  272. };
  273. static int da850_evm_mmc_get_ro(int index)
  274. {
  275. return gpio_get_value(DA850_MMCSD_WP_PIN);
  276. }
  277. static int da850_evm_mmc_get_cd(int index)
  278. {
  279. return !gpio_get_value(DA850_MMCSD_CD_PIN);
  280. }
  281. static struct davinci_mmc_config da850_mmc_config = {
  282. .get_ro = da850_evm_mmc_get_ro,
  283. .get_cd = da850_evm_mmc_get_cd,
  284. .wires = 4,
  285. .max_freq = 50000000,
  286. .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
  287. .version = MMC_CTLR_VERSION_2,
  288. };
  289. static int da850_lcd_hw_init(void)
  290. {
  291. int status;
  292. status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n");
  293. if (status < 0)
  294. return status;
  295. status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n");
  296. if (status < 0) {
  297. gpio_free(DA850_LCD_BL_PIN);
  298. return status;
  299. }
  300. gpio_direction_output(DA850_LCD_BL_PIN, 0);
  301. gpio_direction_output(DA850_LCD_PWR_PIN, 0);
  302. /* disable lcd backlight */
  303. gpio_set_value(DA850_LCD_BL_PIN, 0);
  304. /* disable lcd power */
  305. gpio_set_value(DA850_LCD_PWR_PIN, 0);
  306. /* enable lcd power */
  307. gpio_set_value(DA850_LCD_PWR_PIN, 1);
  308. /* enable lcd backlight */
  309. gpio_set_value(DA850_LCD_BL_PIN, 1);
  310. return 0;
  311. }
  312. /* TPS65070 voltage regulator support */
  313. /* 3.3V */
  314. struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
  315. {
  316. .supply = "usb0_vdda33",
  317. },
  318. {
  319. .supply = "usb1_vdda33",
  320. },
  321. };
  322. /* 3.3V or 1.8V */
  323. struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
  324. {
  325. .supply = "dvdd3318_a",
  326. },
  327. {
  328. .supply = "dvdd3318_b",
  329. },
  330. {
  331. .supply = "dvdd3318_c",
  332. },
  333. };
  334. /* 1.2V */
  335. struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
  336. {
  337. .supply = "cvdd",
  338. },
  339. };
  340. /* 1.8V LDO */
  341. struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
  342. {
  343. .supply = "sata_vddr",
  344. },
  345. {
  346. .supply = "usb0_vdda18",
  347. },
  348. {
  349. .supply = "usb1_vdda18",
  350. },
  351. {
  352. .supply = "ddr_dvdd18",
  353. },
  354. };
  355. /* 1.2V LDO */
  356. struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
  357. {
  358. .supply = "sata_vdd",
  359. },
  360. {
  361. .supply = "pll0_vdda",
  362. },
  363. {
  364. .supply = "pll1_vdda",
  365. },
  366. {
  367. .supply = "usbs_cvdd",
  368. },
  369. {
  370. .supply = "vddarnwa1",
  371. },
  372. };
  373. struct regulator_init_data tps65070_regulator_data[] = {
  374. /* dcdc1 */
  375. {
  376. .constraints = {
  377. .min_uV = 3150000,
  378. .max_uV = 3450000,
  379. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  380. REGULATOR_CHANGE_STATUS),
  381. .boot_on = 1,
  382. },
  383. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers),
  384. .consumer_supplies = tps65070_dcdc1_consumers,
  385. },
  386. /* dcdc2 */
  387. {
  388. .constraints = {
  389. .min_uV = 1710000,
  390. .max_uV = 3450000,
  391. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  392. REGULATOR_CHANGE_STATUS),
  393. .boot_on = 1,
  394. },
  395. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers),
  396. .consumer_supplies = tps65070_dcdc2_consumers,
  397. },
  398. /* dcdc3 */
  399. {
  400. .constraints = {
  401. .min_uV = 950000,
  402. .max_uV = 1320000,
  403. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  404. REGULATOR_CHANGE_STATUS),
  405. .boot_on = 1,
  406. },
  407. .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers),
  408. .consumer_supplies = tps65070_dcdc3_consumers,
  409. },
  410. /* ldo1 */
  411. {
  412. .constraints = {
  413. .min_uV = 1710000,
  414. .max_uV = 1890000,
  415. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  416. REGULATOR_CHANGE_STATUS),
  417. .boot_on = 1,
  418. },
  419. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers),
  420. .consumer_supplies = tps65070_ldo1_consumers,
  421. },
  422. /* ldo2 */
  423. {
  424. .constraints = {
  425. .min_uV = 1140000,
  426. .max_uV = 1320000,
  427. .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  428. REGULATOR_CHANGE_STATUS),
  429. .boot_on = 1,
  430. },
  431. .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers),
  432. .consumer_supplies = tps65070_ldo2_consumers,
  433. },
  434. };
  435. static struct i2c_board_info __initdata da850evm_tps65070_info[] = {
  436. {
  437. I2C_BOARD_INFO("tps6507x", 0x48),
  438. .platform_data = &tps65070_regulator_data[0],
  439. },
  440. };
  441. static int __init pmic_tps65070_init(void)
  442. {
  443. return i2c_register_board_info(1, da850evm_tps65070_info,
  444. ARRAY_SIZE(da850evm_tps65070_info));
  445. }
  446. static const short da850_evm_lcdc_pins[] = {
  447. DA850_GPIO2_8, DA850_GPIO2_15,
  448. -1
  449. };
  450. static int __init da850_evm_config_emac(void)
  451. {
  452. void __iomem *cfg_chip3_base;
  453. int ret;
  454. u32 val;
  455. struct davinci_soc_info *soc_info = &davinci_soc_info;
  456. u8 rmii_en = soc_info->emac_pdata->rmii_en;
  457. if (!machine_is_davinci_da850_evm())
  458. return 0;
  459. cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
  460. val = __raw_readl(cfg_chip3_base);
  461. if (rmii_en) {
  462. val |= BIT(8);
  463. ret = da8xx_pinmux_setup(da850_rmii_pins);
  464. pr_info("EMAC: RMII PHY configured, MII PHY will not be"
  465. " functional\n");
  466. } else {
  467. val &= ~BIT(8);
  468. ret = da8xx_pinmux_setup(da850_cpgmac_pins);
  469. pr_info("EMAC: MII PHY configured, RMII PHY will not be"
  470. " functional\n");
  471. }
  472. if (ret)
  473. pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n",
  474. ret);
  475. /* configure the CFGCHIP3 register for RMII or MII */
  476. __raw_writel(val, cfg_chip3_base);
  477. ret = davinci_cfg_reg(DA850_GPIO2_6);
  478. if (ret)
  479. pr_warning("da850_evm_init:GPIO(2,6) mux setup "
  480. "failed\n");
  481. ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
  482. if (ret) {
  483. pr_warning("Cannot open GPIO %d\n",
  484. DA850_MII_MDIO_CLKEN_PIN);
  485. return ret;
  486. }
  487. /* Enable/Disable MII MDIO clock */
  488. gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
  489. soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
  490. soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
  491. ret = da8xx_register_emac();
  492. if (ret)
  493. pr_warning("da850_evm_init: emac registration failed: %d\n",
  494. ret);
  495. return 0;
  496. }
  497. device_initcall(da850_evm_config_emac);
  498. static __init void da850_evm_init(void)
  499. {
  500. int ret;
  501. ret = pmic_tps65070_init();
  502. if (ret)
  503. pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
  504. ret);
  505. ret = da8xx_register_edma();
  506. if (ret)
  507. pr_warning("da850_evm_init: edma registration failed: %d\n",
  508. ret);
  509. ret = da8xx_pinmux_setup(da850_i2c0_pins);
  510. if (ret)
  511. pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n",
  512. ret);
  513. ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata);
  514. if (ret)
  515. pr_warning("da850_evm_init: i2c0 registration failed: %d\n",
  516. ret);
  517. ret = da8xx_register_watchdog();
  518. if (ret)
  519. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  520. ret);
  521. if (HAS_MMC) {
  522. ret = da8xx_pinmux_setup(da850_mmcsd0_pins);
  523. if (ret)
  524. pr_warning("da850_evm_init: mmcsd0 mux setup failed:"
  525. " %d\n", ret);
  526. ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n");
  527. if (ret)
  528. pr_warning("da850_evm_init: can not open GPIO %d\n",
  529. DA850_MMCSD_CD_PIN);
  530. gpio_direction_input(DA850_MMCSD_CD_PIN);
  531. ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n");
  532. if (ret)
  533. pr_warning("da850_evm_init: can not open GPIO %d\n",
  534. DA850_MMCSD_WP_PIN);
  535. gpio_direction_input(DA850_MMCSD_WP_PIN);
  536. ret = da8xx_register_mmcsd0(&da850_mmc_config);
  537. if (ret)
  538. pr_warning("da850_evm_init: mmcsd0 registration failed:"
  539. " %d\n", ret);
  540. }
  541. davinci_serial_init(&da850_evm_uart_config);
  542. i2c_register_board_info(1, da850_evm_i2c_devices,
  543. ARRAY_SIZE(da850_evm_i2c_devices));
  544. /*
  545. * shut down uart 0 and 1; they are not used on the board and
  546. * accessing them causes endless "too much work in irq53" messages
  547. * with arago fs
  548. */
  549. __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30);
  550. __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30);
  551. ret = da8xx_pinmux_setup(da850_mcasp_pins);
  552. if (ret)
  553. pr_warning("da850_evm_init: mcasp mux setup failed: %d\n",
  554. ret);
  555. da8xx_register_mcasp(0, &da850_evm_snd_data);
  556. ret = da8xx_pinmux_setup(da850_lcdcntl_pins);
  557. if (ret)
  558. pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n",
  559. ret);
  560. /* Handle board specific muxing for LCD here */
  561. ret = da8xx_pinmux_setup(da850_evm_lcdc_pins);
  562. if (ret)
  563. pr_warning("da850_evm_init: evm specific lcd mux setup "
  564. "failed: %d\n", ret);
  565. ret = da850_lcd_hw_init();
  566. if (ret)
  567. pr_warning("da850_evm_init: lcd initialization failed: %d\n",
  568. ret);
  569. ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
  570. if (ret)
  571. pr_warning("da850_evm_init: lcdc registration failed: %d\n",
  572. ret);
  573. ret = da8xx_register_rtc();
  574. if (ret)
  575. pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
  576. ret = da850_register_cpufreq();
  577. if (ret)
  578. pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
  579. ret);
  580. ret = da8xx_register_cpuidle();
  581. if (ret)
  582. pr_warning("da850_evm_init: cpuidle registration failed: %d\n",
  583. ret);
  584. }
  585. #ifdef CONFIG_SERIAL_8250_CONSOLE
  586. static int __init da850_evm_console_init(void)
  587. {
  588. return add_preferred_console("ttyS", 2, "115200");
  589. }
  590. console_initcall(da850_evm_console_init);
  591. #endif
  592. static __init void da850_evm_irq_init(void)
  593. {
  594. struct davinci_soc_info *soc_info = &davinci_soc_info;
  595. cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA850_N_CP_INTC_IRQ,
  596. soc_info->intc_irq_prios);
  597. }
  598. static void __init da850_evm_map_io(void)
  599. {
  600. da850_init();
  601. }
  602. MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
  603. .phys_io = IO_PHYS,
  604. .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
  605. .boot_params = (DA8XX_DDR_BASE + 0x100),
  606. .map_io = da850_evm_map_io,
  607. .init_irq = da850_evm_irq_init,
  608. .timer = &davinci_timer,
  609. .init_machine = da850_evm_init,
  610. MACHINE_END