omap_hwmod.c 118 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk-provider.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include <linux/cpu.h>
  141. #include <linux/of.h>
  142. #include <linux/of_address.h>
  143. #include <asm/system_misc.h>
  144. #include "clock.h"
  145. #include "omap_hwmod.h"
  146. #include "soc.h"
  147. #include "common.h"
  148. #include "clockdomain.h"
  149. #include "powerdomain.h"
  150. #include "cm2xxx.h"
  151. #include "cm3xxx.h"
  152. #include "cminst44xx.h"
  153. #include "cm33xx.h"
  154. #include "prm.h"
  155. #include "prm3xxx.h"
  156. #include "prm44xx.h"
  157. #include "prm33xx.h"
  158. #include "prminst44xx.h"
  159. #include "mux.h"
  160. #include "pm.h"
  161. /* Name of the OMAP hwmod for the MPU */
  162. #define MPU_INITIATOR_NAME "mpu"
  163. /*
  164. * Number of struct omap_hwmod_link records per struct
  165. * omap_hwmod_ocp_if record (master->slave and slave->master)
  166. */
  167. #define LINKS_PER_OCP_IF 2
  168. /**
  169. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  170. * @enable_module: function to enable a module (via MODULEMODE)
  171. * @disable_module: function to disable a module (via MODULEMODE)
  172. *
  173. * XXX Eventually this functionality will be hidden inside the PRM/CM
  174. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  175. * conditionals in this code.
  176. */
  177. struct omap_hwmod_soc_ops {
  178. void (*enable_module)(struct omap_hwmod *oh);
  179. int (*disable_module)(struct omap_hwmod *oh);
  180. int (*wait_target_ready)(struct omap_hwmod *oh);
  181. int (*assert_hardreset)(struct omap_hwmod *oh,
  182. struct omap_hwmod_rst_info *ohri);
  183. int (*deassert_hardreset)(struct omap_hwmod *oh,
  184. struct omap_hwmod_rst_info *ohri);
  185. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  186. struct omap_hwmod_rst_info *ohri);
  187. int (*init_clkdm)(struct omap_hwmod *oh);
  188. void (*update_context_lost)(struct omap_hwmod *oh);
  189. int (*get_context_lost)(struct omap_hwmod *oh);
  190. };
  191. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  192. static struct omap_hwmod_soc_ops soc_ops;
  193. /* omap_hwmod_list contains all registered struct omap_hwmods */
  194. static LIST_HEAD(omap_hwmod_list);
  195. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  196. static struct omap_hwmod *mpu_oh;
  197. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  198. static DEFINE_SPINLOCK(io_chain_lock);
  199. /*
  200. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  201. * allocated from - used to reduce the number of small memory
  202. * allocations, which has a significant impact on performance
  203. */
  204. static struct omap_hwmod_link *linkspace;
  205. /*
  206. * free_ls, max_ls: array indexes into linkspace; representing the
  207. * next free struct omap_hwmod_link index, and the maximum number of
  208. * struct omap_hwmod_link records allocated (respectively)
  209. */
  210. static unsigned short free_ls, max_ls, ls_supp;
  211. /* inited: set to true once the hwmod code is initialized */
  212. static bool inited;
  213. /* Private functions */
  214. /**
  215. * _fetch_next_ocp_if - return the next OCP interface in a list
  216. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  217. * @i: pointer to the index of the element pointed to by @p in the list
  218. *
  219. * Return a pointer to the struct omap_hwmod_ocp_if record
  220. * containing the struct list_head pointed to by @p, and increment
  221. * @p such that a future call to this routine will return the next
  222. * record.
  223. */
  224. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  225. int *i)
  226. {
  227. struct omap_hwmod_ocp_if *oi;
  228. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  229. *p = (*p)->next;
  230. *i = *i + 1;
  231. return oi;
  232. }
  233. /**
  234. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  235. * @oh: struct omap_hwmod *
  236. *
  237. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  238. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  239. * OCP_SYSCONFIG register or 0 upon success.
  240. */
  241. static int _update_sysc_cache(struct omap_hwmod *oh)
  242. {
  243. if (!oh->class->sysc) {
  244. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  245. return -EINVAL;
  246. }
  247. /* XXX ensure module interface clock is up */
  248. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  249. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  250. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  251. return 0;
  252. }
  253. /**
  254. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  255. * @v: OCP_SYSCONFIG value to write
  256. * @oh: struct omap_hwmod *
  257. *
  258. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  259. * one. No return value.
  260. */
  261. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  262. {
  263. if (!oh->class->sysc) {
  264. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  265. return;
  266. }
  267. /* XXX ensure module interface clock is up */
  268. /* Module might have lost context, always update cache and register */
  269. oh->_sysc_cache = v;
  270. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  271. }
  272. /**
  273. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  274. * @oh: struct omap_hwmod *
  275. * @standbymode: MIDLEMODE field bits
  276. * @v: pointer to register contents to modify
  277. *
  278. * Update the master standby mode bits in @v to be @standbymode for
  279. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  280. * upon error or 0 upon success.
  281. */
  282. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  283. u32 *v)
  284. {
  285. u32 mstandby_mask;
  286. u8 mstandby_shift;
  287. if (!oh->class->sysc ||
  288. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  289. return -EINVAL;
  290. if (!oh->class->sysc->sysc_fields) {
  291. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  292. return -EINVAL;
  293. }
  294. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  295. mstandby_mask = (0x3 << mstandby_shift);
  296. *v &= ~mstandby_mask;
  297. *v |= __ffs(standbymode) << mstandby_shift;
  298. return 0;
  299. }
  300. /**
  301. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  302. * @oh: struct omap_hwmod *
  303. * @idlemode: SIDLEMODE field bits
  304. * @v: pointer to register contents to modify
  305. *
  306. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  307. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  308. * or 0 upon success.
  309. */
  310. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  311. {
  312. u32 sidle_mask;
  313. u8 sidle_shift;
  314. if (!oh->class->sysc ||
  315. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  316. return -EINVAL;
  317. if (!oh->class->sysc->sysc_fields) {
  318. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  319. return -EINVAL;
  320. }
  321. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  322. sidle_mask = (0x3 << sidle_shift);
  323. *v &= ~sidle_mask;
  324. *v |= __ffs(idlemode) << sidle_shift;
  325. return 0;
  326. }
  327. /**
  328. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  329. * @oh: struct omap_hwmod *
  330. * @clockact: CLOCKACTIVITY field bits
  331. * @v: pointer to register contents to modify
  332. *
  333. * Update the clockactivity mode bits in @v to be @clockact for the
  334. * @oh hwmod. Used for additional powersaving on some modules. Does
  335. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  336. * success.
  337. */
  338. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  339. {
  340. u32 clkact_mask;
  341. u8 clkact_shift;
  342. if (!oh->class->sysc ||
  343. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  344. return -EINVAL;
  345. if (!oh->class->sysc->sysc_fields) {
  346. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  347. return -EINVAL;
  348. }
  349. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  350. clkact_mask = (0x3 << clkact_shift);
  351. *v &= ~clkact_mask;
  352. *v |= clockact << clkact_shift;
  353. return 0;
  354. }
  355. /**
  356. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  357. * @oh: struct omap_hwmod *
  358. * @v: pointer to register contents to modify
  359. *
  360. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  361. * error or 0 upon success.
  362. */
  363. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  364. {
  365. u32 softrst_mask;
  366. if (!oh->class->sysc ||
  367. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  368. return -EINVAL;
  369. if (!oh->class->sysc->sysc_fields) {
  370. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  371. return -EINVAL;
  372. }
  373. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  374. *v |= softrst_mask;
  375. return 0;
  376. }
  377. /**
  378. * _wait_softreset_complete - wait for an OCP softreset to complete
  379. * @oh: struct omap_hwmod * to wait on
  380. *
  381. * Wait until the IP block represented by @oh reports that its OCP
  382. * softreset is complete. This can be triggered by software (see
  383. * _ocp_softreset()) or by hardware upon returning from off-mode (one
  384. * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
  385. * microseconds. Returns the number of microseconds waited.
  386. */
  387. static int _wait_softreset_complete(struct omap_hwmod *oh)
  388. {
  389. struct omap_hwmod_class_sysconfig *sysc;
  390. u32 softrst_mask;
  391. int c = 0;
  392. sysc = oh->class->sysc;
  393. if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  394. omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
  395. & SYSS_RESETDONE_MASK),
  396. MAX_MODULE_SOFTRESET_WAIT, c);
  397. else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  398. softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
  399. omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
  400. & softrst_mask),
  401. MAX_MODULE_SOFTRESET_WAIT, c);
  402. }
  403. return c;
  404. }
  405. /**
  406. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  407. * @oh: struct omap_hwmod *
  408. *
  409. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  410. * of some modules. When the DMA must perform read/write accesses, the
  411. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  412. * for power management, software must set the DMADISABLE bit back to 1.
  413. *
  414. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  415. * error or 0 upon success.
  416. */
  417. static int _set_dmadisable(struct omap_hwmod *oh)
  418. {
  419. u32 v;
  420. u32 dmadisable_mask;
  421. if (!oh->class->sysc ||
  422. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  423. return -EINVAL;
  424. if (!oh->class->sysc->sysc_fields) {
  425. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  426. return -EINVAL;
  427. }
  428. /* clocks must be on for this operation */
  429. if (oh->_state != _HWMOD_STATE_ENABLED) {
  430. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  431. return -EINVAL;
  432. }
  433. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  434. v = oh->_sysc_cache;
  435. dmadisable_mask =
  436. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  437. v |= dmadisable_mask;
  438. _write_sysconfig(v, oh);
  439. return 0;
  440. }
  441. /**
  442. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  443. * @oh: struct omap_hwmod *
  444. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  445. * @v: pointer to register contents to modify
  446. *
  447. * Update the module autoidle bit in @v to be @autoidle for the @oh
  448. * hwmod. The autoidle bit controls whether the module can gate
  449. * internal clocks automatically when it isn't doing anything; the
  450. * exact function of this bit varies on a per-module basis. This
  451. * function does not write to the hardware. Returns -EINVAL upon
  452. * error or 0 upon success.
  453. */
  454. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  455. u32 *v)
  456. {
  457. u32 autoidle_mask;
  458. u8 autoidle_shift;
  459. if (!oh->class->sysc ||
  460. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  461. return -EINVAL;
  462. if (!oh->class->sysc->sysc_fields) {
  463. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  464. return -EINVAL;
  465. }
  466. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  467. autoidle_mask = (0x1 << autoidle_shift);
  468. *v &= ~autoidle_mask;
  469. *v |= autoidle << autoidle_shift;
  470. return 0;
  471. }
  472. /**
  473. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  474. * @oh: struct omap_hwmod *
  475. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  476. *
  477. * Set or clear the I/O pad wakeup flag in the mux entries for the
  478. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  479. * in memory. If the hwmod is currently idled, and the new idle
  480. * values don't match the previous ones, this function will also
  481. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  482. * currently idled, this function won't touch the hardware: the new
  483. * mux settings are written to the SCM PADCTRL registers when the
  484. * hwmod is idled. No return value.
  485. */
  486. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  487. {
  488. struct omap_device_pad *pad;
  489. bool change = false;
  490. u16 prev_idle;
  491. int j;
  492. if (!oh->mux || !oh->mux->enabled)
  493. return;
  494. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  495. pad = oh->mux->pads_dynamic[j];
  496. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  497. continue;
  498. prev_idle = pad->idle;
  499. if (set_wake)
  500. pad->idle |= OMAP_WAKEUP_EN;
  501. else
  502. pad->idle &= ~OMAP_WAKEUP_EN;
  503. if (prev_idle != pad->idle)
  504. change = true;
  505. }
  506. if (change && oh->_state == _HWMOD_STATE_IDLE)
  507. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  508. }
  509. /**
  510. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  511. * @oh: struct omap_hwmod *
  512. *
  513. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  514. * upon error or 0 upon success.
  515. */
  516. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  517. {
  518. if (!oh->class->sysc ||
  519. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  520. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  521. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  522. return -EINVAL;
  523. if (!oh->class->sysc->sysc_fields) {
  524. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  525. return -EINVAL;
  526. }
  527. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  528. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  529. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  530. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  531. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  532. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  533. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  534. return 0;
  535. }
  536. /**
  537. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  538. * @oh: struct omap_hwmod *
  539. *
  540. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  541. * upon error or 0 upon success.
  542. */
  543. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  544. {
  545. if (!oh->class->sysc ||
  546. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  547. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  548. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  549. return -EINVAL;
  550. if (!oh->class->sysc->sysc_fields) {
  551. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  552. return -EINVAL;
  553. }
  554. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  555. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  556. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  557. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  558. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  559. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  560. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  561. return 0;
  562. }
  563. static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
  564. {
  565. struct clk_hw_omap *clk;
  566. if (oh->clkdm) {
  567. return oh->clkdm;
  568. } else if (oh->_clk) {
  569. clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
  570. return clk->clkdm;
  571. }
  572. return NULL;
  573. }
  574. /**
  575. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  576. * @oh: struct omap_hwmod *
  577. *
  578. * Prevent the hardware module @oh from entering idle while the
  579. * hardare module initiator @init_oh is active. Useful when a module
  580. * will be accessed by a particular initiator (e.g., if a module will
  581. * be accessed by the IVA, there should be a sleepdep between the IVA
  582. * initiator and the module). Only applies to modules in smart-idle
  583. * mode. If the clockdomain is marked as not needing autodeps, return
  584. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  585. * passes along clkdm_add_sleepdep() value upon success.
  586. */
  587. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  588. {
  589. struct clockdomain *clkdm, *init_clkdm;
  590. clkdm = _get_clkdm(oh);
  591. init_clkdm = _get_clkdm(init_oh);
  592. if (!clkdm || !init_clkdm)
  593. return -EINVAL;
  594. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  595. return 0;
  596. return clkdm_add_sleepdep(clkdm, init_clkdm);
  597. }
  598. /**
  599. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  600. * @oh: struct omap_hwmod *
  601. *
  602. * Allow the hardware module @oh to enter idle while the hardare
  603. * module initiator @init_oh is active. Useful when a module will not
  604. * be accessed by a particular initiator (e.g., if a module will not
  605. * be accessed by the IVA, there should be no sleepdep between the IVA
  606. * initiator and the module). Only applies to modules in smart-idle
  607. * mode. If the clockdomain is marked as not needing autodeps, return
  608. * 0 without doing anything. Returns -EINVAL upon error or passes
  609. * along clkdm_del_sleepdep() value upon success.
  610. */
  611. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  612. {
  613. struct clockdomain *clkdm, *init_clkdm;
  614. clkdm = _get_clkdm(oh);
  615. init_clkdm = _get_clkdm(init_oh);
  616. if (!clkdm || !init_clkdm)
  617. return -EINVAL;
  618. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  619. return 0;
  620. return clkdm_del_sleepdep(clkdm, init_clkdm);
  621. }
  622. /**
  623. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  624. * @oh: struct omap_hwmod *
  625. *
  626. * Called from _init_clocks(). Populates the @oh _clk (main
  627. * functional clock pointer) if a main_clk is present. Returns 0 on
  628. * success or -EINVAL on error.
  629. */
  630. static int _init_main_clk(struct omap_hwmod *oh)
  631. {
  632. int ret = 0;
  633. if (!oh->main_clk)
  634. return 0;
  635. oh->_clk = clk_get(NULL, oh->main_clk);
  636. if (IS_ERR(oh->_clk)) {
  637. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  638. oh->name, oh->main_clk);
  639. return -EINVAL;
  640. }
  641. /*
  642. * HACK: This needs a re-visit once clk_prepare() is implemented
  643. * to do something meaningful. Today its just a no-op.
  644. * If clk_prepare() is used at some point to do things like
  645. * voltage scaling etc, then this would have to be moved to
  646. * some point where subsystems like i2c and pmic become
  647. * available.
  648. */
  649. clk_prepare(oh->_clk);
  650. if (!_get_clkdm(oh))
  651. pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
  652. oh->name, oh->main_clk);
  653. return ret;
  654. }
  655. /**
  656. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  657. * @oh: struct omap_hwmod *
  658. *
  659. * Called from _init_clocks(). Populates the @oh OCP slave interface
  660. * clock pointers. Returns 0 on success or -EINVAL on error.
  661. */
  662. static int _init_interface_clks(struct omap_hwmod *oh)
  663. {
  664. struct omap_hwmod_ocp_if *os;
  665. struct list_head *p;
  666. struct clk *c;
  667. int i = 0;
  668. int ret = 0;
  669. p = oh->slave_ports.next;
  670. while (i < oh->slaves_cnt) {
  671. os = _fetch_next_ocp_if(&p, &i);
  672. if (!os->clk)
  673. continue;
  674. c = clk_get(NULL, os->clk);
  675. if (IS_ERR(c)) {
  676. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  677. oh->name, os->clk);
  678. ret = -EINVAL;
  679. }
  680. os->_clk = c;
  681. /*
  682. * HACK: This needs a re-visit once clk_prepare() is implemented
  683. * to do something meaningful. Today its just a no-op.
  684. * If clk_prepare() is used at some point to do things like
  685. * voltage scaling etc, then this would have to be moved to
  686. * some point where subsystems like i2c and pmic become
  687. * available.
  688. */
  689. clk_prepare(os->_clk);
  690. }
  691. return ret;
  692. }
  693. /**
  694. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  695. * @oh: struct omap_hwmod *
  696. *
  697. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  698. * clock pointers. Returns 0 on success or -EINVAL on error.
  699. */
  700. static int _init_opt_clks(struct omap_hwmod *oh)
  701. {
  702. struct omap_hwmod_opt_clk *oc;
  703. struct clk *c;
  704. int i;
  705. int ret = 0;
  706. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  707. c = clk_get(NULL, oc->clk);
  708. if (IS_ERR(c)) {
  709. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  710. oh->name, oc->clk);
  711. ret = -EINVAL;
  712. }
  713. oc->_clk = c;
  714. /*
  715. * HACK: This needs a re-visit once clk_prepare() is implemented
  716. * to do something meaningful. Today its just a no-op.
  717. * If clk_prepare() is used at some point to do things like
  718. * voltage scaling etc, then this would have to be moved to
  719. * some point where subsystems like i2c and pmic become
  720. * available.
  721. */
  722. clk_prepare(oc->_clk);
  723. }
  724. return ret;
  725. }
  726. /**
  727. * _enable_clocks - enable hwmod main clock and interface clocks
  728. * @oh: struct omap_hwmod *
  729. *
  730. * Enables all clocks necessary for register reads and writes to succeed
  731. * on the hwmod @oh. Returns 0.
  732. */
  733. static int _enable_clocks(struct omap_hwmod *oh)
  734. {
  735. struct omap_hwmod_ocp_if *os;
  736. struct list_head *p;
  737. int i = 0;
  738. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  739. if (oh->_clk)
  740. clk_enable(oh->_clk);
  741. p = oh->slave_ports.next;
  742. while (i < oh->slaves_cnt) {
  743. os = _fetch_next_ocp_if(&p, &i);
  744. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  745. clk_enable(os->_clk);
  746. }
  747. /* The opt clocks are controlled by the device driver. */
  748. return 0;
  749. }
  750. /**
  751. * _disable_clocks - disable hwmod main clock and interface clocks
  752. * @oh: struct omap_hwmod *
  753. *
  754. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  755. */
  756. static int _disable_clocks(struct omap_hwmod *oh)
  757. {
  758. struct omap_hwmod_ocp_if *os;
  759. struct list_head *p;
  760. int i = 0;
  761. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  762. if (oh->_clk)
  763. clk_disable(oh->_clk);
  764. p = oh->slave_ports.next;
  765. while (i < oh->slaves_cnt) {
  766. os = _fetch_next_ocp_if(&p, &i);
  767. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  768. clk_disable(os->_clk);
  769. }
  770. /* The opt clocks are controlled by the device driver. */
  771. return 0;
  772. }
  773. static void _enable_optional_clocks(struct omap_hwmod *oh)
  774. {
  775. struct omap_hwmod_opt_clk *oc;
  776. int i;
  777. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  778. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  779. if (oc->_clk) {
  780. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  781. __clk_get_name(oc->_clk));
  782. clk_enable(oc->_clk);
  783. }
  784. }
  785. static void _disable_optional_clocks(struct omap_hwmod *oh)
  786. {
  787. struct omap_hwmod_opt_clk *oc;
  788. int i;
  789. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  790. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  791. if (oc->_clk) {
  792. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  793. __clk_get_name(oc->_clk));
  794. clk_disable(oc->_clk);
  795. }
  796. }
  797. /**
  798. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  799. * @oh: struct omap_hwmod *
  800. *
  801. * Enables the PRCM module mode related to the hwmod @oh.
  802. * No return value.
  803. */
  804. static void _omap4_enable_module(struct omap_hwmod *oh)
  805. {
  806. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  807. return;
  808. pr_debug("omap_hwmod: %s: %s: %d\n",
  809. oh->name, __func__, oh->prcm.omap4.modulemode);
  810. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  811. oh->clkdm->prcm_partition,
  812. oh->clkdm->cm_inst,
  813. oh->clkdm->clkdm_offs,
  814. oh->prcm.omap4.clkctrl_offs);
  815. }
  816. /**
  817. * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
  818. * @oh: struct omap_hwmod *
  819. *
  820. * Enables the PRCM module mode related to the hwmod @oh.
  821. * No return value.
  822. */
  823. static void _am33xx_enable_module(struct omap_hwmod *oh)
  824. {
  825. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  826. return;
  827. pr_debug("omap_hwmod: %s: %s: %d\n",
  828. oh->name, __func__, oh->prcm.omap4.modulemode);
  829. am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
  830. oh->clkdm->clkdm_offs,
  831. oh->prcm.omap4.clkctrl_offs);
  832. }
  833. /**
  834. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  835. * @oh: struct omap_hwmod *
  836. *
  837. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  838. * does not have an IDLEST bit or if the module successfully enters
  839. * slave idle; otherwise, pass along the return value of the
  840. * appropriate *_cm*_wait_module_idle() function.
  841. */
  842. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  843. {
  844. if (!oh)
  845. return -EINVAL;
  846. if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
  847. return 0;
  848. if (oh->flags & HWMOD_NO_IDLEST)
  849. return 0;
  850. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  851. oh->clkdm->cm_inst,
  852. oh->clkdm->clkdm_offs,
  853. oh->prcm.omap4.clkctrl_offs);
  854. }
  855. /**
  856. * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
  857. * @oh: struct omap_hwmod *
  858. *
  859. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  860. * does not have an IDLEST bit or if the module successfully enters
  861. * slave idle; otherwise, pass along the return value of the
  862. * appropriate *_cm*_wait_module_idle() function.
  863. */
  864. static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
  865. {
  866. if (!oh)
  867. return -EINVAL;
  868. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  869. return 0;
  870. if (oh->flags & HWMOD_NO_IDLEST)
  871. return 0;
  872. return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
  873. oh->clkdm->clkdm_offs,
  874. oh->prcm.omap4.clkctrl_offs);
  875. }
  876. /**
  877. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  878. * @oh: struct omap_hwmod *oh
  879. *
  880. * Count and return the number of MPU IRQs associated with the hwmod
  881. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  882. * NULL.
  883. */
  884. static int _count_mpu_irqs(struct omap_hwmod *oh)
  885. {
  886. struct omap_hwmod_irq_info *ohii;
  887. int i = 0;
  888. if (!oh || !oh->mpu_irqs)
  889. return 0;
  890. do {
  891. ohii = &oh->mpu_irqs[i++];
  892. } while (ohii->irq != -1);
  893. return i-1;
  894. }
  895. /**
  896. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  897. * @oh: struct omap_hwmod *oh
  898. *
  899. * Count and return the number of SDMA request lines associated with
  900. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  901. * if @oh is NULL.
  902. */
  903. static int _count_sdma_reqs(struct omap_hwmod *oh)
  904. {
  905. struct omap_hwmod_dma_info *ohdi;
  906. int i = 0;
  907. if (!oh || !oh->sdma_reqs)
  908. return 0;
  909. do {
  910. ohdi = &oh->sdma_reqs[i++];
  911. } while (ohdi->dma_req != -1);
  912. return i-1;
  913. }
  914. /**
  915. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  916. * @oh: struct omap_hwmod *oh
  917. *
  918. * Count and return the number of address space ranges associated with
  919. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  920. * if @oh is NULL.
  921. */
  922. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  923. {
  924. struct omap_hwmod_addr_space *mem;
  925. int i = 0;
  926. if (!os || !os->addr)
  927. return 0;
  928. do {
  929. mem = &os->addr[i++];
  930. } while (mem->pa_start != mem->pa_end);
  931. return i-1;
  932. }
  933. /**
  934. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  935. * @oh: struct omap_hwmod * to operate on
  936. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  937. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  938. *
  939. * Retrieve a MPU hardware IRQ line number named by @name associated
  940. * with the IP block pointed to by @oh. The IRQ number will be filled
  941. * into the address pointed to by @dma. When @name is non-null, the
  942. * IRQ line number associated with the named entry will be returned.
  943. * If @name is null, the first matching entry will be returned. Data
  944. * order is not meaningful in hwmod data, so callers are strongly
  945. * encouraged to use a non-null @name whenever possible to avoid
  946. * unpredictable effects if hwmod data is later added that causes data
  947. * ordering to change. Returns 0 upon success or a negative error
  948. * code upon error.
  949. */
  950. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  951. unsigned int *irq)
  952. {
  953. int i;
  954. bool found = false;
  955. if (!oh->mpu_irqs)
  956. return -ENOENT;
  957. i = 0;
  958. while (oh->mpu_irqs[i].irq != -1) {
  959. if (name == oh->mpu_irqs[i].name ||
  960. !strcmp(name, oh->mpu_irqs[i].name)) {
  961. found = true;
  962. break;
  963. }
  964. i++;
  965. }
  966. if (!found)
  967. return -ENOENT;
  968. *irq = oh->mpu_irqs[i].irq;
  969. return 0;
  970. }
  971. /**
  972. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  973. * @oh: struct omap_hwmod * to operate on
  974. * @name: pointer to the name of the SDMA request line to fetch (optional)
  975. * @dma: pointer to an unsigned int to store the request line ID to
  976. *
  977. * Retrieve an SDMA request line ID named by @name on the IP block
  978. * pointed to by @oh. The ID will be filled into the address pointed
  979. * to by @dma. When @name is non-null, the request line ID associated
  980. * with the named entry will be returned. If @name is null, the first
  981. * matching entry will be returned. Data order is not meaningful in
  982. * hwmod data, so callers are strongly encouraged to use a non-null
  983. * @name whenever possible to avoid unpredictable effects if hwmod
  984. * data is later added that causes data ordering to change. Returns 0
  985. * upon success or a negative error code upon error.
  986. */
  987. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  988. unsigned int *dma)
  989. {
  990. int i;
  991. bool found = false;
  992. if (!oh->sdma_reqs)
  993. return -ENOENT;
  994. i = 0;
  995. while (oh->sdma_reqs[i].dma_req != -1) {
  996. if (name == oh->sdma_reqs[i].name ||
  997. !strcmp(name, oh->sdma_reqs[i].name)) {
  998. found = true;
  999. break;
  1000. }
  1001. i++;
  1002. }
  1003. if (!found)
  1004. return -ENOENT;
  1005. *dma = oh->sdma_reqs[i].dma_req;
  1006. return 0;
  1007. }
  1008. /**
  1009. * _get_addr_space_by_name - fetch address space start & end by name
  1010. * @oh: struct omap_hwmod * to operate on
  1011. * @name: pointer to the name of the address space to fetch (optional)
  1012. * @pa_start: pointer to a u32 to store the starting address to
  1013. * @pa_end: pointer to a u32 to store the ending address to
  1014. *
  1015. * Retrieve address space start and end addresses for the IP block
  1016. * pointed to by @oh. The data will be filled into the addresses
  1017. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  1018. * address space data associated with the named entry will be
  1019. * returned. If @name is null, the first matching entry will be
  1020. * returned. Data order is not meaningful in hwmod data, so callers
  1021. * are strongly encouraged to use a non-null @name whenever possible
  1022. * to avoid unpredictable effects if hwmod data is later added that
  1023. * causes data ordering to change. Returns 0 upon success or a
  1024. * negative error code upon error.
  1025. */
  1026. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  1027. u32 *pa_start, u32 *pa_end)
  1028. {
  1029. int i, j;
  1030. struct omap_hwmod_ocp_if *os;
  1031. struct list_head *p = NULL;
  1032. bool found = false;
  1033. p = oh->slave_ports.next;
  1034. i = 0;
  1035. while (i < oh->slaves_cnt) {
  1036. os = _fetch_next_ocp_if(&p, &i);
  1037. if (!os->addr)
  1038. return -ENOENT;
  1039. j = 0;
  1040. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  1041. if (name == os->addr[j].name ||
  1042. !strcmp(name, os->addr[j].name)) {
  1043. found = true;
  1044. break;
  1045. }
  1046. j++;
  1047. }
  1048. if (found)
  1049. break;
  1050. }
  1051. if (!found)
  1052. return -ENOENT;
  1053. *pa_start = os->addr[j].pa_start;
  1054. *pa_end = os->addr[j].pa_end;
  1055. return 0;
  1056. }
  1057. /**
  1058. * _save_mpu_port_index - find and save the index to @oh's MPU port
  1059. * @oh: struct omap_hwmod *
  1060. *
  1061. * Determines the array index of the OCP slave port that the MPU uses
  1062. * to address the device, and saves it into the struct omap_hwmod.
  1063. * Intended to be called during hwmod registration only. No return
  1064. * value.
  1065. */
  1066. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  1067. {
  1068. struct omap_hwmod_ocp_if *os = NULL;
  1069. struct list_head *p;
  1070. int i = 0;
  1071. if (!oh)
  1072. return;
  1073. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1074. p = oh->slave_ports.next;
  1075. while (i < oh->slaves_cnt) {
  1076. os = _fetch_next_ocp_if(&p, &i);
  1077. if (os->user & OCP_USER_MPU) {
  1078. oh->_mpu_port = os;
  1079. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1080. break;
  1081. }
  1082. }
  1083. return;
  1084. }
  1085. /**
  1086. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1087. * @oh: struct omap_hwmod *
  1088. *
  1089. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1090. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1091. * communicate with the IP block. This interface need not be directly
  1092. * connected to the MPU (and almost certainly is not), but is directly
  1093. * connected to the IP block represented by @oh. Returns a pointer
  1094. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1095. * error or if there does not appear to be a path from the MPU to this
  1096. * IP block.
  1097. */
  1098. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1099. {
  1100. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1101. return NULL;
  1102. return oh->_mpu_port;
  1103. };
  1104. /**
  1105. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1106. * @oh: struct omap_hwmod *
  1107. *
  1108. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1109. * the register target MPU address space; or returns NULL upon error.
  1110. */
  1111. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1112. {
  1113. struct omap_hwmod_ocp_if *os;
  1114. struct omap_hwmod_addr_space *mem;
  1115. int found = 0, i = 0;
  1116. os = _find_mpu_rt_port(oh);
  1117. if (!os || !os->addr)
  1118. return NULL;
  1119. do {
  1120. mem = &os->addr[i++];
  1121. if (mem->flags & ADDR_TYPE_RT)
  1122. found = 1;
  1123. } while (!found && mem->pa_start != mem->pa_end);
  1124. return (found) ? mem : NULL;
  1125. }
  1126. /**
  1127. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1128. * @oh: struct omap_hwmod *
  1129. *
  1130. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1131. * by @oh is set to indicate to the PRCM that the IP block is active.
  1132. * Usually this means placing the module into smart-idle mode and
  1133. * smart-standby, but if there is a bug in the automatic idle handling
  1134. * for the IP block, it may need to be placed into the force-idle or
  1135. * no-idle variants of these modes. No return value.
  1136. */
  1137. static void _enable_sysc(struct omap_hwmod *oh)
  1138. {
  1139. u8 idlemode, sf;
  1140. u32 v;
  1141. bool clkdm_act;
  1142. struct clockdomain *clkdm;
  1143. if (!oh->class->sysc)
  1144. return;
  1145. /*
  1146. * Wait until reset has completed, this is needed as the IP
  1147. * block is reset automatically by hardware in some cases
  1148. * (off-mode for example), and the drivers require the
  1149. * IP to be ready when they access it
  1150. */
  1151. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1152. _enable_optional_clocks(oh);
  1153. _wait_softreset_complete(oh);
  1154. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1155. _disable_optional_clocks(oh);
  1156. v = oh->_sysc_cache;
  1157. sf = oh->class->sysc->sysc_flags;
  1158. clkdm = _get_clkdm(oh);
  1159. if (sf & SYSC_HAS_SIDLEMODE) {
  1160. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1161. oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
  1162. idlemode = HWMOD_IDLEMODE_NO;
  1163. } else {
  1164. if (sf & SYSC_HAS_ENAWAKEUP)
  1165. _enable_wakeup(oh, &v);
  1166. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  1167. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1168. else
  1169. idlemode = HWMOD_IDLEMODE_SMART;
  1170. }
  1171. /*
  1172. * This is special handling for some IPs like
  1173. * 32k sync timer. Force them to idle!
  1174. */
  1175. clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
  1176. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1177. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1178. idlemode = HWMOD_IDLEMODE_FORCE;
  1179. _set_slave_idlemode(oh, idlemode, &v);
  1180. }
  1181. if (sf & SYSC_HAS_MIDLEMODE) {
  1182. if (oh->flags & HWMOD_FORCE_MSTANDBY) {
  1183. idlemode = HWMOD_IDLEMODE_FORCE;
  1184. } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1185. idlemode = HWMOD_IDLEMODE_NO;
  1186. } else {
  1187. if (sf & SYSC_HAS_ENAWAKEUP)
  1188. _enable_wakeup(oh, &v);
  1189. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1190. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1191. else
  1192. idlemode = HWMOD_IDLEMODE_SMART;
  1193. }
  1194. _set_master_standbymode(oh, idlemode, &v);
  1195. }
  1196. /*
  1197. * XXX The clock framework should handle this, by
  1198. * calling into this code. But this must wait until the
  1199. * clock structures are tagged with omap_hwmod entries
  1200. */
  1201. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1202. (sf & SYSC_HAS_CLOCKACTIVITY))
  1203. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1204. _write_sysconfig(v, oh);
  1205. /*
  1206. * Set the autoidle bit only after setting the smartidle bit
  1207. * Setting this will not have any impact on the other modules.
  1208. */
  1209. if (sf & SYSC_HAS_AUTOIDLE) {
  1210. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1211. 0 : 1;
  1212. _set_module_autoidle(oh, idlemode, &v);
  1213. _write_sysconfig(v, oh);
  1214. }
  1215. }
  1216. /**
  1217. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1218. * @oh: struct omap_hwmod *
  1219. *
  1220. * If module is marked as SWSUP_SIDLE, force the module into slave
  1221. * idle; otherwise, configure it for smart-idle. If module is marked
  1222. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1223. * configure it for smart-standby. No return value.
  1224. */
  1225. static void _idle_sysc(struct omap_hwmod *oh)
  1226. {
  1227. u8 idlemode, sf;
  1228. u32 v;
  1229. if (!oh->class->sysc)
  1230. return;
  1231. v = oh->_sysc_cache;
  1232. sf = oh->class->sysc->sysc_flags;
  1233. if (sf & SYSC_HAS_SIDLEMODE) {
  1234. if (oh->flags & HWMOD_SWSUP_SIDLE) {
  1235. idlemode = HWMOD_IDLEMODE_FORCE;
  1236. } else {
  1237. if (sf & SYSC_HAS_ENAWAKEUP)
  1238. _enable_wakeup(oh, &v);
  1239. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  1240. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1241. else
  1242. idlemode = HWMOD_IDLEMODE_SMART;
  1243. }
  1244. _set_slave_idlemode(oh, idlemode, &v);
  1245. }
  1246. if (sf & SYSC_HAS_MIDLEMODE) {
  1247. if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
  1248. (oh->flags & HWMOD_FORCE_MSTANDBY)) {
  1249. idlemode = HWMOD_IDLEMODE_FORCE;
  1250. } else {
  1251. if (sf & SYSC_HAS_ENAWAKEUP)
  1252. _enable_wakeup(oh, &v);
  1253. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1254. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1255. else
  1256. idlemode = HWMOD_IDLEMODE_SMART;
  1257. }
  1258. _set_master_standbymode(oh, idlemode, &v);
  1259. }
  1260. _write_sysconfig(v, oh);
  1261. }
  1262. /**
  1263. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1264. * @oh: struct omap_hwmod *
  1265. *
  1266. * Force the module into slave idle and master suspend. No return
  1267. * value.
  1268. */
  1269. static void _shutdown_sysc(struct omap_hwmod *oh)
  1270. {
  1271. u32 v;
  1272. u8 sf;
  1273. if (!oh->class->sysc)
  1274. return;
  1275. v = oh->_sysc_cache;
  1276. sf = oh->class->sysc->sysc_flags;
  1277. if (sf & SYSC_HAS_SIDLEMODE)
  1278. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1279. if (sf & SYSC_HAS_MIDLEMODE)
  1280. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1281. if (sf & SYSC_HAS_AUTOIDLE)
  1282. _set_module_autoidle(oh, 1, &v);
  1283. _write_sysconfig(v, oh);
  1284. }
  1285. /**
  1286. * _lookup - find an omap_hwmod by name
  1287. * @name: find an omap_hwmod by name
  1288. *
  1289. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1290. */
  1291. static struct omap_hwmod *_lookup(const char *name)
  1292. {
  1293. struct omap_hwmod *oh, *temp_oh;
  1294. oh = NULL;
  1295. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1296. if (!strcmp(name, temp_oh->name)) {
  1297. oh = temp_oh;
  1298. break;
  1299. }
  1300. }
  1301. return oh;
  1302. }
  1303. /**
  1304. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1305. * @oh: struct omap_hwmod *
  1306. *
  1307. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1308. * clockdomain pointer, and save it into the struct omap_hwmod.
  1309. * Return -EINVAL if the clkdm_name lookup failed.
  1310. */
  1311. static int _init_clkdm(struct omap_hwmod *oh)
  1312. {
  1313. if (!oh->clkdm_name) {
  1314. pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
  1315. return 0;
  1316. }
  1317. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1318. if (!oh->clkdm) {
  1319. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1320. oh->name, oh->clkdm_name);
  1321. return -EINVAL;
  1322. }
  1323. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1324. oh->name, oh->clkdm_name);
  1325. return 0;
  1326. }
  1327. /**
  1328. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1329. * well the clockdomain.
  1330. * @oh: struct omap_hwmod *
  1331. * @data: not used; pass NULL
  1332. *
  1333. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1334. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1335. * success, or a negative error code on failure.
  1336. */
  1337. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1338. {
  1339. int ret = 0;
  1340. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1341. return 0;
  1342. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1343. if (soc_ops.init_clkdm)
  1344. ret |= soc_ops.init_clkdm(oh);
  1345. ret |= _init_main_clk(oh);
  1346. ret |= _init_interface_clks(oh);
  1347. ret |= _init_opt_clks(oh);
  1348. if (!ret)
  1349. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1350. else
  1351. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1352. return ret;
  1353. }
  1354. /**
  1355. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1356. * @oh: struct omap_hwmod *
  1357. * @name: name of the reset line in the context of this hwmod
  1358. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1359. *
  1360. * Return the bit position of the reset line that match the
  1361. * input name. Return -ENOENT if not found.
  1362. */
  1363. static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1364. struct omap_hwmod_rst_info *ohri)
  1365. {
  1366. int i;
  1367. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1368. const char *rst_line = oh->rst_lines[i].name;
  1369. if (!strcmp(rst_line, name)) {
  1370. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1371. ohri->st_shift = oh->rst_lines[i].st_shift;
  1372. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1373. oh->name, __func__, rst_line, ohri->rst_shift,
  1374. ohri->st_shift);
  1375. return 0;
  1376. }
  1377. }
  1378. return -ENOENT;
  1379. }
  1380. /**
  1381. * _assert_hardreset - assert the HW reset line of submodules
  1382. * contained in the hwmod module.
  1383. * @oh: struct omap_hwmod *
  1384. * @name: name of the reset line to lookup and assert
  1385. *
  1386. * Some IP like dsp, ipu or iva contain processor that require an HW
  1387. * reset line to be assert / deassert in order to enable fully the IP.
  1388. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1389. * asserting the hardreset line on the currently-booted SoC, or passes
  1390. * along the return value from _lookup_hardreset() or the SoC's
  1391. * assert_hardreset code.
  1392. */
  1393. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1394. {
  1395. struct omap_hwmod_rst_info ohri;
  1396. int ret = -EINVAL;
  1397. if (!oh)
  1398. return -EINVAL;
  1399. if (!soc_ops.assert_hardreset)
  1400. return -ENOSYS;
  1401. ret = _lookup_hardreset(oh, name, &ohri);
  1402. if (ret < 0)
  1403. return ret;
  1404. ret = soc_ops.assert_hardreset(oh, &ohri);
  1405. return ret;
  1406. }
  1407. /**
  1408. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1409. * in the hwmod module.
  1410. * @oh: struct omap_hwmod *
  1411. * @name: name of the reset line to look up and deassert
  1412. *
  1413. * Some IP like dsp, ipu or iva contain processor that require an HW
  1414. * reset line to be assert / deassert in order to enable fully the IP.
  1415. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1416. * deasserting the hardreset line on the currently-booted SoC, or passes
  1417. * along the return value from _lookup_hardreset() or the SoC's
  1418. * deassert_hardreset code.
  1419. */
  1420. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1421. {
  1422. struct omap_hwmod_rst_info ohri;
  1423. int ret = -EINVAL;
  1424. int hwsup = 0;
  1425. if (!oh)
  1426. return -EINVAL;
  1427. if (!soc_ops.deassert_hardreset)
  1428. return -ENOSYS;
  1429. ret = _lookup_hardreset(oh, name, &ohri);
  1430. if (ret < 0)
  1431. return ret;
  1432. if (oh->clkdm) {
  1433. /*
  1434. * A clockdomain must be in SW_SUP otherwise reset
  1435. * might not be completed. The clockdomain can be set
  1436. * in HW_AUTO only when the module become ready.
  1437. */
  1438. hwsup = clkdm_in_hwsup(oh->clkdm);
  1439. ret = clkdm_hwmod_enable(oh->clkdm, oh);
  1440. if (ret) {
  1441. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1442. oh->name, oh->clkdm->name, ret);
  1443. return ret;
  1444. }
  1445. }
  1446. _enable_clocks(oh);
  1447. if (soc_ops.enable_module)
  1448. soc_ops.enable_module(oh);
  1449. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1450. if (soc_ops.disable_module)
  1451. soc_ops.disable_module(oh);
  1452. _disable_clocks(oh);
  1453. if (ret == -EBUSY)
  1454. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1455. if (!ret) {
  1456. /*
  1457. * Set the clockdomain to HW_AUTO, assuming that the
  1458. * previous state was HW_AUTO.
  1459. */
  1460. if (oh->clkdm && hwsup)
  1461. clkdm_allow_idle(oh->clkdm);
  1462. } else {
  1463. if (oh->clkdm)
  1464. clkdm_hwmod_disable(oh->clkdm, oh);
  1465. }
  1466. return ret;
  1467. }
  1468. /**
  1469. * _read_hardreset - read the HW reset line state of submodules
  1470. * contained in the hwmod module
  1471. * @oh: struct omap_hwmod *
  1472. * @name: name of the reset line to look up and read
  1473. *
  1474. * Return the state of the reset line. Returns -EINVAL if @oh is
  1475. * null, -ENOSYS if we have no way of reading the hardreset line
  1476. * status on the currently-booted SoC, or passes along the return
  1477. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1478. * code.
  1479. */
  1480. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1481. {
  1482. struct omap_hwmod_rst_info ohri;
  1483. int ret = -EINVAL;
  1484. if (!oh)
  1485. return -EINVAL;
  1486. if (!soc_ops.is_hardreset_asserted)
  1487. return -ENOSYS;
  1488. ret = _lookup_hardreset(oh, name, &ohri);
  1489. if (ret < 0)
  1490. return ret;
  1491. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1492. }
  1493. /**
  1494. * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
  1495. * @oh: struct omap_hwmod *
  1496. *
  1497. * If all hardreset lines associated with @oh are asserted, then return true.
  1498. * Otherwise, if part of @oh is out hardreset or if no hardreset lines
  1499. * associated with @oh are asserted, then return false.
  1500. * This function is used to avoid executing some parts of the IP block
  1501. * enable/disable sequence if its hardreset line is set.
  1502. */
  1503. static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
  1504. {
  1505. int i, rst_cnt = 0;
  1506. if (oh->rst_lines_cnt == 0)
  1507. return false;
  1508. for (i = 0; i < oh->rst_lines_cnt; i++)
  1509. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1510. rst_cnt++;
  1511. if (oh->rst_lines_cnt == rst_cnt)
  1512. return true;
  1513. return false;
  1514. }
  1515. /**
  1516. * _are_any_hardreset_lines_asserted - return true if any part of @oh is
  1517. * hard-reset
  1518. * @oh: struct omap_hwmod *
  1519. *
  1520. * If any hardreset lines associated with @oh are asserted, then
  1521. * return true. Otherwise, if no hardreset lines associated with @oh
  1522. * are asserted, or if @oh has no hardreset lines, then return false.
  1523. * This function is used to avoid executing some parts of the IP block
  1524. * enable/disable sequence if any hardreset line is set.
  1525. */
  1526. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1527. {
  1528. int rst_cnt = 0;
  1529. int i;
  1530. for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
  1531. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1532. rst_cnt++;
  1533. return (rst_cnt) ? true : false;
  1534. }
  1535. /**
  1536. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1537. * @oh: struct omap_hwmod *
  1538. *
  1539. * Disable the PRCM module mode related to the hwmod @oh.
  1540. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1541. */
  1542. static int _omap4_disable_module(struct omap_hwmod *oh)
  1543. {
  1544. int v;
  1545. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1546. return -EINVAL;
  1547. /*
  1548. * Since integration code might still be doing something, only
  1549. * disable if all lines are under hardreset.
  1550. */
  1551. if (_are_any_hardreset_lines_asserted(oh))
  1552. return 0;
  1553. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1554. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1555. oh->clkdm->cm_inst,
  1556. oh->clkdm->clkdm_offs,
  1557. oh->prcm.omap4.clkctrl_offs);
  1558. v = _omap4_wait_target_disable(oh);
  1559. if (v)
  1560. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1561. oh->name);
  1562. return 0;
  1563. }
  1564. /**
  1565. * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
  1566. * @oh: struct omap_hwmod *
  1567. *
  1568. * Disable the PRCM module mode related to the hwmod @oh.
  1569. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1570. */
  1571. static int _am33xx_disable_module(struct omap_hwmod *oh)
  1572. {
  1573. int v;
  1574. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1575. return -EINVAL;
  1576. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1577. if (_are_any_hardreset_lines_asserted(oh))
  1578. return 0;
  1579. am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
  1580. oh->prcm.omap4.clkctrl_offs);
  1581. v = _am33xx_wait_target_disable(oh);
  1582. if (v)
  1583. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1584. oh->name);
  1585. return 0;
  1586. }
  1587. /**
  1588. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1589. * @oh: struct omap_hwmod *
  1590. *
  1591. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1592. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1593. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1594. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1595. *
  1596. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1597. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1598. * use the SYSCONFIG softreset bit to provide the status.
  1599. *
  1600. * Note that some IP like McBSP do have reset control but don't have
  1601. * reset status.
  1602. */
  1603. static int _ocp_softreset(struct omap_hwmod *oh)
  1604. {
  1605. u32 v;
  1606. int c = 0;
  1607. int ret = 0;
  1608. if (!oh->class->sysc ||
  1609. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1610. return -ENOENT;
  1611. /* clocks must be on for this operation */
  1612. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1613. pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
  1614. oh->name);
  1615. return -EINVAL;
  1616. }
  1617. /* For some modules, all optionnal clocks need to be enabled as well */
  1618. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1619. _enable_optional_clocks(oh);
  1620. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1621. v = oh->_sysc_cache;
  1622. ret = _set_softreset(oh, &v);
  1623. if (ret)
  1624. goto dis_opt_clks;
  1625. _write_sysconfig(v, oh);
  1626. if (oh->class->sysc->srst_udelay)
  1627. udelay(oh->class->sysc->srst_udelay);
  1628. c = _wait_softreset_complete(oh);
  1629. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1630. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1631. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1632. else
  1633. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1634. /*
  1635. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1636. * _wait_target_ready() or _reset()
  1637. */
  1638. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1639. dis_opt_clks:
  1640. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1641. _disable_optional_clocks(oh);
  1642. return ret;
  1643. }
  1644. /**
  1645. * _reset - reset an omap_hwmod
  1646. * @oh: struct omap_hwmod *
  1647. *
  1648. * Resets an omap_hwmod @oh. If the module has a custom reset
  1649. * function pointer defined, then call it to reset the IP block, and
  1650. * pass along its return value to the caller. Otherwise, if the IP
  1651. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1652. * associated with it, call a function to reset the IP block via that
  1653. * method, and pass along the return value to the caller. Finally, if
  1654. * the IP block has some hardreset lines associated with it, assert
  1655. * all of those, but do _not_ deassert them. (This is because driver
  1656. * authors have expressed an apparent requirement to control the
  1657. * deassertion of the hardreset lines themselves.)
  1658. *
  1659. * The default software reset mechanism for most OMAP IP blocks is
  1660. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1661. * hwmods cannot be reset via this method. Some are not targets and
  1662. * therefore have no OCP header registers to access. Others (like the
  1663. * IVA) have idiosyncratic reset sequences. So for these relatively
  1664. * rare cases, custom reset code can be supplied in the struct
  1665. * omap_hwmod_class .reset function pointer.
  1666. *
  1667. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1668. * does not prevent idling of the system. This is necessary for cases
  1669. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1670. * kernel without disabling dma.
  1671. *
  1672. * Passes along the return value from either _ocp_softreset() or the
  1673. * custom reset function - these must return -EINVAL if the hwmod
  1674. * cannot be reset this way or if the hwmod is in the wrong state,
  1675. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1676. */
  1677. static int _reset(struct omap_hwmod *oh)
  1678. {
  1679. int i, r;
  1680. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1681. if (oh->class->reset) {
  1682. r = oh->class->reset(oh);
  1683. } else {
  1684. if (oh->rst_lines_cnt > 0) {
  1685. for (i = 0; i < oh->rst_lines_cnt; i++)
  1686. _assert_hardreset(oh, oh->rst_lines[i].name);
  1687. return 0;
  1688. } else {
  1689. r = _ocp_softreset(oh);
  1690. if (r == -ENOENT)
  1691. r = 0;
  1692. }
  1693. }
  1694. _set_dmadisable(oh);
  1695. /*
  1696. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1697. * softreset. The _enable() function should be split to avoid
  1698. * the rewrite of the OCP_SYSCONFIG register.
  1699. */
  1700. if (oh->class->sysc) {
  1701. _update_sysc_cache(oh);
  1702. _enable_sysc(oh);
  1703. }
  1704. return r;
  1705. }
  1706. /**
  1707. * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
  1708. *
  1709. * Call the appropriate PRM function to clear any logged I/O chain
  1710. * wakeups and to reconfigure the chain. This apparently needs to be
  1711. * done upon every mux change. Since hwmods can be concurrently
  1712. * enabled and idled, hold a spinlock around the I/O chain
  1713. * reconfiguration sequence. No return value.
  1714. *
  1715. * XXX When the PRM code is moved to drivers, this function can be removed,
  1716. * as the PRM infrastructure should abstract this.
  1717. */
  1718. static void _reconfigure_io_chain(void)
  1719. {
  1720. unsigned long flags;
  1721. spin_lock_irqsave(&io_chain_lock, flags);
  1722. if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
  1723. omap3xxx_prm_reconfigure_io_chain();
  1724. else if (cpu_is_omap44xx())
  1725. omap44xx_prm_reconfigure_io_chain();
  1726. spin_unlock_irqrestore(&io_chain_lock, flags);
  1727. }
  1728. /**
  1729. * _omap4_update_context_lost - increment hwmod context loss counter if
  1730. * hwmod context was lost, and clear hardware context loss reg
  1731. * @oh: hwmod to check for context loss
  1732. *
  1733. * If the PRCM indicates that the hwmod @oh lost context, increment
  1734. * our in-memory context loss counter, and clear the RM_*_CONTEXT
  1735. * bits. No return value.
  1736. */
  1737. static void _omap4_update_context_lost(struct omap_hwmod *oh)
  1738. {
  1739. if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
  1740. return;
  1741. if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1742. oh->clkdm->pwrdm.ptr->prcm_offs,
  1743. oh->prcm.omap4.context_offs))
  1744. return;
  1745. oh->prcm.omap4.context_lost_counter++;
  1746. prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1747. oh->clkdm->pwrdm.ptr->prcm_offs,
  1748. oh->prcm.omap4.context_offs);
  1749. }
  1750. /**
  1751. * _omap4_get_context_lost - get context loss counter for a hwmod
  1752. * @oh: hwmod to get context loss counter for
  1753. *
  1754. * Returns the in-memory context loss counter for a hwmod.
  1755. */
  1756. static int _omap4_get_context_lost(struct omap_hwmod *oh)
  1757. {
  1758. return oh->prcm.omap4.context_lost_counter;
  1759. }
  1760. /**
  1761. * _enable_preprogram - Pre-program an IP block during the _enable() process
  1762. * @oh: struct omap_hwmod *
  1763. *
  1764. * Some IP blocks (such as AESS) require some additional programming
  1765. * after enable before they can enter idle. If a function pointer to
  1766. * do so is present in the hwmod data, then call it and pass along the
  1767. * return value; otherwise, return 0.
  1768. */
  1769. static int _enable_preprogram(struct omap_hwmod *oh)
  1770. {
  1771. if (!oh->class->enable_preprogram)
  1772. return 0;
  1773. return oh->class->enable_preprogram(oh);
  1774. }
  1775. /**
  1776. * _enable - enable an omap_hwmod
  1777. * @oh: struct omap_hwmod *
  1778. *
  1779. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1780. * register target. Returns -EINVAL if the hwmod is in the wrong
  1781. * state or passes along the return value of _wait_target_ready().
  1782. */
  1783. static int _enable(struct omap_hwmod *oh)
  1784. {
  1785. int r;
  1786. int hwsup = 0;
  1787. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1788. /*
  1789. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1790. * state at init. Now that someone is really trying to enable
  1791. * them, just ensure that the hwmod mux is set.
  1792. */
  1793. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1794. /*
  1795. * If the caller has mux data populated, do the mux'ing
  1796. * which wouldn't have been done as part of the _enable()
  1797. * done during setup.
  1798. */
  1799. if (oh->mux)
  1800. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1801. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1802. return 0;
  1803. }
  1804. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1805. oh->_state != _HWMOD_STATE_IDLE &&
  1806. oh->_state != _HWMOD_STATE_DISABLED) {
  1807. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1808. oh->name);
  1809. return -EINVAL;
  1810. }
  1811. /*
  1812. * If an IP block contains HW reset lines and all of them are
  1813. * asserted, we let integration code associated with that
  1814. * block handle the enable. We've received very little
  1815. * information on what those driver authors need, and until
  1816. * detailed information is provided and the driver code is
  1817. * posted to the public lists, this is probably the best we
  1818. * can do.
  1819. */
  1820. if (_are_all_hardreset_lines_asserted(oh))
  1821. return 0;
  1822. /* Mux pins for device runtime if populated */
  1823. if (oh->mux && (!oh->mux->enabled ||
  1824. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1825. oh->mux->pads_dynamic))) {
  1826. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1827. _reconfigure_io_chain();
  1828. }
  1829. _add_initiator_dep(oh, mpu_oh);
  1830. if (oh->clkdm) {
  1831. /*
  1832. * A clockdomain must be in SW_SUP before enabling
  1833. * completely the module. The clockdomain can be set
  1834. * in HW_AUTO only when the module become ready.
  1835. */
  1836. hwsup = clkdm_in_hwsup(oh->clkdm) &&
  1837. !clkdm_missing_idle_reporting(oh->clkdm);
  1838. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1839. if (r) {
  1840. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1841. oh->name, oh->clkdm->name, r);
  1842. return r;
  1843. }
  1844. }
  1845. _enable_clocks(oh);
  1846. if (soc_ops.enable_module)
  1847. soc_ops.enable_module(oh);
  1848. if (oh->flags & HWMOD_BLOCK_WFI)
  1849. cpu_idle_poll_ctrl(true);
  1850. if (soc_ops.update_context_lost)
  1851. soc_ops.update_context_lost(oh);
  1852. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1853. -EINVAL;
  1854. if (!r) {
  1855. /*
  1856. * Set the clockdomain to HW_AUTO only if the target is ready,
  1857. * assuming that the previous state was HW_AUTO
  1858. */
  1859. if (oh->clkdm && hwsup)
  1860. clkdm_allow_idle(oh->clkdm);
  1861. oh->_state = _HWMOD_STATE_ENABLED;
  1862. /* Access the sysconfig only if the target is ready */
  1863. if (oh->class->sysc) {
  1864. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1865. _update_sysc_cache(oh);
  1866. _enable_sysc(oh);
  1867. }
  1868. r = _enable_preprogram(oh);
  1869. } else {
  1870. if (soc_ops.disable_module)
  1871. soc_ops.disable_module(oh);
  1872. _disable_clocks(oh);
  1873. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1874. oh->name, r);
  1875. if (oh->clkdm)
  1876. clkdm_hwmod_disable(oh->clkdm, oh);
  1877. }
  1878. return r;
  1879. }
  1880. /**
  1881. * _idle - idle an omap_hwmod
  1882. * @oh: struct omap_hwmod *
  1883. *
  1884. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1885. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1886. * state or returns 0.
  1887. */
  1888. static int _idle(struct omap_hwmod *oh)
  1889. {
  1890. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1891. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1892. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1893. oh->name);
  1894. return -EINVAL;
  1895. }
  1896. if (_are_all_hardreset_lines_asserted(oh))
  1897. return 0;
  1898. if (oh->class->sysc)
  1899. _idle_sysc(oh);
  1900. _del_initiator_dep(oh, mpu_oh);
  1901. if (oh->flags & HWMOD_BLOCK_WFI)
  1902. cpu_idle_poll_ctrl(false);
  1903. if (soc_ops.disable_module)
  1904. soc_ops.disable_module(oh);
  1905. /*
  1906. * The module must be in idle mode before disabling any parents
  1907. * clocks. Otherwise, the parent clock might be disabled before
  1908. * the module transition is done, and thus will prevent the
  1909. * transition to complete properly.
  1910. */
  1911. _disable_clocks(oh);
  1912. if (oh->clkdm)
  1913. clkdm_hwmod_disable(oh->clkdm, oh);
  1914. /* Mux pins for device idle if populated */
  1915. if (oh->mux && oh->mux->pads_dynamic) {
  1916. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1917. _reconfigure_io_chain();
  1918. }
  1919. oh->_state = _HWMOD_STATE_IDLE;
  1920. return 0;
  1921. }
  1922. /**
  1923. * _shutdown - shutdown an omap_hwmod
  1924. * @oh: struct omap_hwmod *
  1925. *
  1926. * Shut down an omap_hwmod @oh. This should be called when the driver
  1927. * used for the hwmod is removed or unloaded or if the driver is not
  1928. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1929. * state or returns 0.
  1930. */
  1931. static int _shutdown(struct omap_hwmod *oh)
  1932. {
  1933. int ret, i;
  1934. u8 prev_state;
  1935. if (oh->_state != _HWMOD_STATE_IDLE &&
  1936. oh->_state != _HWMOD_STATE_ENABLED) {
  1937. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1938. oh->name);
  1939. return -EINVAL;
  1940. }
  1941. if (_are_all_hardreset_lines_asserted(oh))
  1942. return 0;
  1943. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1944. if (oh->class->pre_shutdown) {
  1945. prev_state = oh->_state;
  1946. if (oh->_state == _HWMOD_STATE_IDLE)
  1947. _enable(oh);
  1948. ret = oh->class->pre_shutdown(oh);
  1949. if (ret) {
  1950. if (prev_state == _HWMOD_STATE_IDLE)
  1951. _idle(oh);
  1952. return ret;
  1953. }
  1954. }
  1955. if (oh->class->sysc) {
  1956. if (oh->_state == _HWMOD_STATE_IDLE)
  1957. _enable(oh);
  1958. _shutdown_sysc(oh);
  1959. }
  1960. /* clocks and deps are already disabled in idle */
  1961. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1962. _del_initiator_dep(oh, mpu_oh);
  1963. /* XXX what about the other system initiators here? dma, dsp */
  1964. if (oh->flags & HWMOD_BLOCK_WFI)
  1965. cpu_idle_poll_ctrl(false);
  1966. if (soc_ops.disable_module)
  1967. soc_ops.disable_module(oh);
  1968. _disable_clocks(oh);
  1969. if (oh->clkdm)
  1970. clkdm_hwmod_disable(oh->clkdm, oh);
  1971. }
  1972. /* XXX Should this code also force-disable the optional clocks? */
  1973. for (i = 0; i < oh->rst_lines_cnt; i++)
  1974. _assert_hardreset(oh, oh->rst_lines[i].name);
  1975. /* Mux pins to safe mode or use populated off mode values */
  1976. if (oh->mux)
  1977. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1978. oh->_state = _HWMOD_STATE_DISABLED;
  1979. return 0;
  1980. }
  1981. /**
  1982. * of_dev_hwmod_lookup - look up needed hwmod from dt blob
  1983. * @np: struct device_node *
  1984. * @oh: struct omap_hwmod *
  1985. *
  1986. * Parse the dt blob and find out needed hwmod. Recursive function is
  1987. * implemented to take care hierarchical dt blob parsing.
  1988. * Return: The device node on success or NULL on failure.
  1989. */
  1990. static struct device_node *of_dev_hwmod_lookup(struct device_node *np,
  1991. struct omap_hwmod *oh)
  1992. {
  1993. struct device_node *np0 = NULL, *np1 = NULL;
  1994. const char *p;
  1995. for_each_child_of_node(np, np0) {
  1996. if (of_find_property(np0, "ti,hwmods", NULL)) {
  1997. p = of_get_property(np0, "ti,hwmods", NULL);
  1998. if (!strcmp(p, oh->name))
  1999. return np0;
  2000. np1 = of_dev_hwmod_lookup(np0, oh);
  2001. if (np1)
  2002. return np1;
  2003. }
  2004. }
  2005. return NULL;
  2006. }
  2007. /**
  2008. * _init_mpu_rt_base - populate the virtual address for a hwmod
  2009. * @oh: struct omap_hwmod * to locate the virtual address
  2010. *
  2011. * Cache the virtual address used by the MPU to access this IP block's
  2012. * registers. This address is needed early so the OCP registers that
  2013. * are part of the device's address space can be ioremapped properly.
  2014. * No return value.
  2015. */
  2016. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  2017. {
  2018. struct omap_hwmod_addr_space *mem;
  2019. void __iomem *va_start = NULL;
  2020. struct device_node *np;
  2021. if (!oh)
  2022. return;
  2023. _save_mpu_port_index(oh);
  2024. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2025. return;
  2026. mem = _find_mpu_rt_addr_space(oh);
  2027. if (!mem) {
  2028. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  2029. oh->name);
  2030. /* Extract the IO space from device tree blob */
  2031. if (!of_have_populated_dt())
  2032. return;
  2033. np = of_dev_hwmod_lookup(of_find_node_by_name(NULL, "ocp"), oh);
  2034. if (np)
  2035. va_start = of_iomap(np, 0);
  2036. } else {
  2037. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  2038. }
  2039. if (!va_start) {
  2040. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  2041. return;
  2042. }
  2043. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  2044. oh->name, va_start);
  2045. oh->_mpu_rt_va = va_start;
  2046. }
  2047. /**
  2048. * _init - initialize internal data for the hwmod @oh
  2049. * @oh: struct omap_hwmod *
  2050. * @n: (unused)
  2051. *
  2052. * Look up the clocks and the address space used by the MPU to access
  2053. * registers belonging to the hwmod @oh. @oh must already be
  2054. * registered at this point. This is the first of two phases for
  2055. * hwmod initialization. Code called here does not touch any hardware
  2056. * registers, it simply prepares internal data structures. Returns 0
  2057. * upon success or if the hwmod isn't registered, or -EINVAL upon
  2058. * failure.
  2059. */
  2060. static int __init _init(struct omap_hwmod *oh, void *data)
  2061. {
  2062. int r;
  2063. if (oh->_state != _HWMOD_STATE_REGISTERED)
  2064. return 0;
  2065. if (oh->class->sysc)
  2066. _init_mpu_rt_base(oh, NULL);
  2067. r = _init_clocks(oh, NULL);
  2068. if (r < 0) {
  2069. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  2070. return -EINVAL;
  2071. }
  2072. oh->_state = _HWMOD_STATE_INITIALIZED;
  2073. return 0;
  2074. }
  2075. /**
  2076. * _setup_iclk_autoidle - configure an IP block's interface clocks
  2077. * @oh: struct omap_hwmod *
  2078. *
  2079. * Set up the module's interface clocks. XXX This function is still mostly
  2080. * a stub; implementing this properly requires iclk autoidle usecounting in
  2081. * the clock code. No return value.
  2082. */
  2083. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  2084. {
  2085. struct omap_hwmod_ocp_if *os;
  2086. struct list_head *p;
  2087. int i = 0;
  2088. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2089. return;
  2090. p = oh->slave_ports.next;
  2091. while (i < oh->slaves_cnt) {
  2092. os = _fetch_next_ocp_if(&p, &i);
  2093. if (!os->_clk)
  2094. continue;
  2095. if (os->flags & OCPIF_SWSUP_IDLE) {
  2096. /* XXX omap_iclk_deny_idle(c); */
  2097. } else {
  2098. /* XXX omap_iclk_allow_idle(c); */
  2099. clk_enable(os->_clk);
  2100. }
  2101. }
  2102. return;
  2103. }
  2104. /**
  2105. * _setup_reset - reset an IP block during the setup process
  2106. * @oh: struct omap_hwmod *
  2107. *
  2108. * Reset the IP block corresponding to the hwmod @oh during the setup
  2109. * process. The IP block is first enabled so it can be successfully
  2110. * reset. Returns 0 upon success or a negative error code upon
  2111. * failure.
  2112. */
  2113. static int __init _setup_reset(struct omap_hwmod *oh)
  2114. {
  2115. int r;
  2116. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2117. return -EINVAL;
  2118. if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
  2119. return -EPERM;
  2120. if (oh->rst_lines_cnt == 0) {
  2121. r = _enable(oh);
  2122. if (r) {
  2123. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  2124. oh->name, oh->_state);
  2125. return -EINVAL;
  2126. }
  2127. }
  2128. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  2129. r = _reset(oh);
  2130. return r;
  2131. }
  2132. /**
  2133. * _setup_postsetup - transition to the appropriate state after _setup
  2134. * @oh: struct omap_hwmod *
  2135. *
  2136. * Place an IP block represented by @oh into a "post-setup" state --
  2137. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  2138. * this function is called at the end of _setup().) The postsetup
  2139. * state for an IP block can be changed by calling
  2140. * omap_hwmod_enter_postsetup_state() early in the boot process,
  2141. * before one of the omap_hwmod_setup*() functions are called for the
  2142. * IP block.
  2143. *
  2144. * The IP block stays in this state until a PM runtime-based driver is
  2145. * loaded for that IP block. A post-setup state of IDLE is
  2146. * appropriate for almost all IP blocks with runtime PM-enabled
  2147. * drivers, since those drivers are able to enable the IP block. A
  2148. * post-setup state of ENABLED is appropriate for kernels with PM
  2149. * runtime disabled. The DISABLED state is appropriate for unusual IP
  2150. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  2151. * included, since the WDTIMER starts running on reset and will reset
  2152. * the MPU if left active.
  2153. *
  2154. * This post-setup mechanism is deprecated. Once all of the OMAP
  2155. * drivers have been converted to use PM runtime, and all of the IP
  2156. * block data and interconnect data is available to the hwmod code, it
  2157. * should be possible to replace this mechanism with a "lazy reset"
  2158. * arrangement. In a "lazy reset" setup, each IP block is enabled
  2159. * when the driver first probes, then all remaining IP blocks without
  2160. * drivers are either shut down or enabled after the drivers have
  2161. * loaded. However, this cannot take place until the above
  2162. * preconditions have been met, since otherwise the late reset code
  2163. * has no way of knowing which IP blocks are in use by drivers, and
  2164. * which ones are unused.
  2165. *
  2166. * No return value.
  2167. */
  2168. static void __init _setup_postsetup(struct omap_hwmod *oh)
  2169. {
  2170. u8 postsetup_state;
  2171. if (oh->rst_lines_cnt > 0)
  2172. return;
  2173. postsetup_state = oh->_postsetup_state;
  2174. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  2175. postsetup_state = _HWMOD_STATE_ENABLED;
  2176. /*
  2177. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  2178. * it should be set by the core code as a runtime flag during startup
  2179. */
  2180. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  2181. (postsetup_state == _HWMOD_STATE_IDLE)) {
  2182. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  2183. postsetup_state = _HWMOD_STATE_ENABLED;
  2184. }
  2185. if (postsetup_state == _HWMOD_STATE_IDLE)
  2186. _idle(oh);
  2187. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  2188. _shutdown(oh);
  2189. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  2190. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  2191. oh->name, postsetup_state);
  2192. return;
  2193. }
  2194. /**
  2195. * _setup - prepare IP block hardware for use
  2196. * @oh: struct omap_hwmod *
  2197. * @n: (unused, pass NULL)
  2198. *
  2199. * Configure the IP block represented by @oh. This may include
  2200. * enabling the IP block, resetting it, and placing it into a
  2201. * post-setup state, depending on the type of IP block and applicable
  2202. * flags. IP blocks are reset to prevent any previous configuration
  2203. * by the bootloader or previous operating system from interfering
  2204. * with power management or other parts of the system. The reset can
  2205. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  2206. * two phases for hwmod initialization. Code called here generally
  2207. * affects the IP block hardware, or system integration hardware
  2208. * associated with the IP block. Returns 0.
  2209. */
  2210. static int __init _setup(struct omap_hwmod *oh, void *data)
  2211. {
  2212. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2213. return 0;
  2214. _setup_iclk_autoidle(oh);
  2215. if (!_setup_reset(oh))
  2216. _setup_postsetup(oh);
  2217. return 0;
  2218. }
  2219. /**
  2220. * _register - register a struct omap_hwmod
  2221. * @oh: struct omap_hwmod *
  2222. *
  2223. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  2224. * already has been registered by the same name; -EINVAL if the
  2225. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  2226. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  2227. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  2228. * success.
  2229. *
  2230. * XXX The data should be copied into bootmem, so the original data
  2231. * should be marked __initdata and freed after init. This would allow
  2232. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  2233. * that the copy process would be relatively complex due to the large number
  2234. * of substructures.
  2235. */
  2236. static int __init _register(struct omap_hwmod *oh)
  2237. {
  2238. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  2239. (oh->_state != _HWMOD_STATE_UNKNOWN))
  2240. return -EINVAL;
  2241. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  2242. if (_lookup(oh->name))
  2243. return -EEXIST;
  2244. list_add_tail(&oh->node, &omap_hwmod_list);
  2245. INIT_LIST_HEAD(&oh->master_ports);
  2246. INIT_LIST_HEAD(&oh->slave_ports);
  2247. spin_lock_init(&oh->_lock);
  2248. oh->_state = _HWMOD_STATE_REGISTERED;
  2249. /*
  2250. * XXX Rather than doing a strcmp(), this should test a flag
  2251. * set in the hwmod data, inserted by the autogenerator code.
  2252. */
  2253. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  2254. mpu_oh = oh;
  2255. return 0;
  2256. }
  2257. /**
  2258. * _alloc_links - return allocated memory for hwmod links
  2259. * @ml: pointer to a struct omap_hwmod_link * for the master link
  2260. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  2261. *
  2262. * Return pointers to two struct omap_hwmod_link records, via the
  2263. * addresses pointed to by @ml and @sl. Will first attempt to return
  2264. * memory allocated as part of a large initial block, but if that has
  2265. * been exhausted, will allocate memory itself. Since ideally this
  2266. * second allocation path will never occur, the number of these
  2267. * 'supplemental' allocations will be logged when debugging is
  2268. * enabled. Returns 0.
  2269. */
  2270. static int __init _alloc_links(struct omap_hwmod_link **ml,
  2271. struct omap_hwmod_link **sl)
  2272. {
  2273. unsigned int sz;
  2274. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  2275. *ml = &linkspace[free_ls++];
  2276. *sl = &linkspace[free_ls++];
  2277. return 0;
  2278. }
  2279. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  2280. *sl = NULL;
  2281. *ml = alloc_bootmem(sz);
  2282. memset(*ml, 0, sz);
  2283. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  2284. ls_supp++;
  2285. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2286. ls_supp * LINKS_PER_OCP_IF);
  2287. return 0;
  2288. };
  2289. /**
  2290. * _add_link - add an interconnect between two IP blocks
  2291. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2292. *
  2293. * Add struct omap_hwmod_link records connecting the master IP block
  2294. * specified in @oi->master to @oi, and connecting the slave IP block
  2295. * specified in @oi->slave to @oi. This code is assumed to run before
  2296. * preemption or SMP has been enabled, thus avoiding the need for
  2297. * locking in this code. Changes to this assumption will require
  2298. * additional locking. Returns 0.
  2299. */
  2300. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2301. {
  2302. struct omap_hwmod_link *ml, *sl;
  2303. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2304. oi->slave->name);
  2305. _alloc_links(&ml, &sl);
  2306. ml->ocp_if = oi;
  2307. INIT_LIST_HEAD(&ml->node);
  2308. list_add(&ml->node, &oi->master->master_ports);
  2309. oi->master->masters_cnt++;
  2310. sl->ocp_if = oi;
  2311. INIT_LIST_HEAD(&sl->node);
  2312. list_add(&sl->node, &oi->slave->slave_ports);
  2313. oi->slave->slaves_cnt++;
  2314. return 0;
  2315. }
  2316. /**
  2317. * _register_link - register a struct omap_hwmod_ocp_if
  2318. * @oi: struct omap_hwmod_ocp_if *
  2319. *
  2320. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2321. * has already been registered; -EINVAL if @oi is NULL or if the
  2322. * record pointed to by @oi is missing required fields; or 0 upon
  2323. * success.
  2324. *
  2325. * XXX The data should be copied into bootmem, so the original data
  2326. * should be marked __initdata and freed after init. This would allow
  2327. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2328. */
  2329. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2330. {
  2331. if (!oi || !oi->master || !oi->slave || !oi->user)
  2332. return -EINVAL;
  2333. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2334. return -EEXIST;
  2335. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2336. oi->master->name, oi->slave->name);
  2337. /*
  2338. * Register the connected hwmods, if they haven't been
  2339. * registered already
  2340. */
  2341. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2342. _register(oi->master);
  2343. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2344. _register(oi->slave);
  2345. _add_link(oi);
  2346. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2347. return 0;
  2348. }
  2349. /**
  2350. * _alloc_linkspace - allocate large block of hwmod links
  2351. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2352. *
  2353. * Allocate a large block of struct omap_hwmod_link records. This
  2354. * improves boot time significantly by avoiding the need to allocate
  2355. * individual records one by one. If the number of records to
  2356. * allocate in the block hasn't been manually specified, this function
  2357. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2358. * and use that to determine the allocation size. For SoC families
  2359. * that require multiple list registrations, such as OMAP3xxx, this
  2360. * estimation process isn't optimal, so manual estimation is advised
  2361. * in those cases. Returns -EEXIST if the allocation has already occurred
  2362. * or 0 upon success.
  2363. */
  2364. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2365. {
  2366. unsigned int i = 0;
  2367. unsigned int sz;
  2368. if (linkspace) {
  2369. WARN(1, "linkspace already allocated\n");
  2370. return -EEXIST;
  2371. }
  2372. if (max_ls == 0)
  2373. while (ois[i++])
  2374. max_ls += LINKS_PER_OCP_IF;
  2375. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2376. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2377. __func__, sz, max_ls);
  2378. linkspace = alloc_bootmem(sz);
  2379. memset(linkspace, 0, sz);
  2380. return 0;
  2381. }
  2382. /* Static functions intended only for use in soc_ops field function pointers */
  2383. /**
  2384. * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
  2385. * @oh: struct omap_hwmod *
  2386. *
  2387. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2388. * does not have an IDLEST bit or if the module successfully leaves
  2389. * slave idle; otherwise, pass along the return value of the
  2390. * appropriate *_cm*_wait_module_ready() function.
  2391. */
  2392. static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
  2393. {
  2394. if (!oh)
  2395. return -EINVAL;
  2396. if (oh->flags & HWMOD_NO_IDLEST)
  2397. return 0;
  2398. if (!_find_mpu_rt_port(oh))
  2399. return 0;
  2400. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2401. return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2402. oh->prcm.omap2.idlest_reg_id,
  2403. oh->prcm.omap2.idlest_idle_bit);
  2404. }
  2405. /**
  2406. * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
  2407. * @oh: struct omap_hwmod *
  2408. *
  2409. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2410. * does not have an IDLEST bit or if the module successfully leaves
  2411. * slave idle; otherwise, pass along the return value of the
  2412. * appropriate *_cm*_wait_module_ready() function.
  2413. */
  2414. static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
  2415. {
  2416. if (!oh)
  2417. return -EINVAL;
  2418. if (oh->flags & HWMOD_NO_IDLEST)
  2419. return 0;
  2420. if (!_find_mpu_rt_port(oh))
  2421. return 0;
  2422. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2423. return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2424. oh->prcm.omap2.idlest_reg_id,
  2425. oh->prcm.omap2.idlest_idle_bit);
  2426. }
  2427. /**
  2428. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2429. * @oh: struct omap_hwmod *
  2430. *
  2431. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2432. * does not have an IDLEST bit or if the module successfully leaves
  2433. * slave idle; otherwise, pass along the return value of the
  2434. * appropriate *_cm*_wait_module_ready() function.
  2435. */
  2436. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2437. {
  2438. if (!oh)
  2439. return -EINVAL;
  2440. if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
  2441. return 0;
  2442. if (!_find_mpu_rt_port(oh))
  2443. return 0;
  2444. /* XXX check module SIDLEMODE, hardreset status */
  2445. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2446. oh->clkdm->cm_inst,
  2447. oh->clkdm->clkdm_offs,
  2448. oh->prcm.omap4.clkctrl_offs);
  2449. }
  2450. /**
  2451. * _am33xx_wait_target_ready - wait for a module to leave slave idle
  2452. * @oh: struct omap_hwmod *
  2453. *
  2454. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2455. * does not have an IDLEST bit or if the module successfully leaves
  2456. * slave idle; otherwise, pass along the return value of the
  2457. * appropriate *_cm*_wait_module_ready() function.
  2458. */
  2459. static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
  2460. {
  2461. if (!oh || !oh->clkdm)
  2462. return -EINVAL;
  2463. if (oh->flags & HWMOD_NO_IDLEST)
  2464. return 0;
  2465. if (!_find_mpu_rt_port(oh))
  2466. return 0;
  2467. /* XXX check module SIDLEMODE, hardreset status */
  2468. return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
  2469. oh->clkdm->clkdm_offs,
  2470. oh->prcm.omap4.clkctrl_offs);
  2471. }
  2472. /**
  2473. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2474. * @oh: struct omap_hwmod * to assert hardreset
  2475. * @ohri: hardreset line data
  2476. *
  2477. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2478. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2479. * use as an soc_ops function pointer. Passes along the return value
  2480. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2481. * for removal when the PRM code is moved into drivers/.
  2482. */
  2483. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2484. struct omap_hwmod_rst_info *ohri)
  2485. {
  2486. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2487. ohri->rst_shift);
  2488. }
  2489. /**
  2490. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2491. * @oh: struct omap_hwmod * to deassert hardreset
  2492. * @ohri: hardreset line data
  2493. *
  2494. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2495. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2496. * use as an soc_ops function pointer. Passes along the return value
  2497. * from omap2_prm_deassert_hardreset(). XXX This function is
  2498. * scheduled for removal when the PRM code is moved into drivers/.
  2499. */
  2500. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2501. struct omap_hwmod_rst_info *ohri)
  2502. {
  2503. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2504. ohri->rst_shift,
  2505. ohri->st_shift);
  2506. }
  2507. /**
  2508. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2509. * @oh: struct omap_hwmod * to test hardreset
  2510. * @ohri: hardreset line data
  2511. *
  2512. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2513. * from the hwmod @oh and the hardreset line data @ohri. Only
  2514. * intended for use as an soc_ops function pointer. Passes along the
  2515. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2516. * function is scheduled for removal when the PRM code is moved into
  2517. * drivers/.
  2518. */
  2519. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2520. struct omap_hwmod_rst_info *ohri)
  2521. {
  2522. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2523. ohri->st_shift);
  2524. }
  2525. /**
  2526. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2527. * @oh: struct omap_hwmod * to assert hardreset
  2528. * @ohri: hardreset line data
  2529. *
  2530. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2531. * from the hwmod @oh and the hardreset line data @ohri. Only
  2532. * intended for use as an soc_ops function pointer. Passes along the
  2533. * return value from omap4_prminst_assert_hardreset(). XXX This
  2534. * function is scheduled for removal when the PRM code is moved into
  2535. * drivers/.
  2536. */
  2537. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2538. struct omap_hwmod_rst_info *ohri)
  2539. {
  2540. if (!oh->clkdm)
  2541. return -EINVAL;
  2542. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2543. oh->clkdm->pwrdm.ptr->prcm_partition,
  2544. oh->clkdm->pwrdm.ptr->prcm_offs,
  2545. oh->prcm.omap4.rstctrl_offs);
  2546. }
  2547. /**
  2548. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2549. * @oh: struct omap_hwmod * to deassert hardreset
  2550. * @ohri: hardreset line data
  2551. *
  2552. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2553. * from the hwmod @oh and the hardreset line data @ohri. Only
  2554. * intended for use as an soc_ops function pointer. Passes along the
  2555. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2556. * function is scheduled for removal when the PRM code is moved into
  2557. * drivers/.
  2558. */
  2559. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2560. struct omap_hwmod_rst_info *ohri)
  2561. {
  2562. if (!oh->clkdm)
  2563. return -EINVAL;
  2564. if (ohri->st_shift)
  2565. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2566. oh->name, ohri->name);
  2567. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2568. oh->clkdm->pwrdm.ptr->prcm_partition,
  2569. oh->clkdm->pwrdm.ptr->prcm_offs,
  2570. oh->prcm.omap4.rstctrl_offs);
  2571. }
  2572. /**
  2573. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2574. * @oh: struct omap_hwmod * to test hardreset
  2575. * @ohri: hardreset line data
  2576. *
  2577. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2578. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2579. * Only intended for use as an soc_ops function pointer. Passes along
  2580. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2581. * This function is scheduled for removal when the PRM code is moved
  2582. * into drivers/.
  2583. */
  2584. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2585. struct omap_hwmod_rst_info *ohri)
  2586. {
  2587. if (!oh->clkdm)
  2588. return -EINVAL;
  2589. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2590. oh->clkdm->pwrdm.ptr->prcm_partition,
  2591. oh->clkdm->pwrdm.ptr->prcm_offs,
  2592. oh->prcm.omap4.rstctrl_offs);
  2593. }
  2594. /**
  2595. * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2596. * @oh: struct omap_hwmod * to assert hardreset
  2597. * @ohri: hardreset line data
  2598. *
  2599. * Call am33xx_prminst_assert_hardreset() with parameters extracted
  2600. * from the hwmod @oh and the hardreset line data @ohri. Only
  2601. * intended for use as an soc_ops function pointer. Passes along the
  2602. * return value from am33xx_prminst_assert_hardreset(). XXX This
  2603. * function is scheduled for removal when the PRM code is moved into
  2604. * drivers/.
  2605. */
  2606. static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
  2607. struct omap_hwmod_rst_info *ohri)
  2608. {
  2609. return am33xx_prm_assert_hardreset(ohri->rst_shift,
  2610. oh->clkdm->pwrdm.ptr->prcm_offs,
  2611. oh->prcm.omap4.rstctrl_offs);
  2612. }
  2613. /**
  2614. * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2615. * @oh: struct omap_hwmod * to deassert hardreset
  2616. * @ohri: hardreset line data
  2617. *
  2618. * Call am33xx_prminst_deassert_hardreset() with parameters extracted
  2619. * from the hwmod @oh and the hardreset line data @ohri. Only
  2620. * intended for use as an soc_ops function pointer. Passes along the
  2621. * return value from am33xx_prminst_deassert_hardreset(). XXX This
  2622. * function is scheduled for removal when the PRM code is moved into
  2623. * drivers/.
  2624. */
  2625. static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
  2626. struct omap_hwmod_rst_info *ohri)
  2627. {
  2628. return am33xx_prm_deassert_hardreset(ohri->rst_shift,
  2629. ohri->st_shift,
  2630. oh->clkdm->pwrdm.ptr->prcm_offs,
  2631. oh->prcm.omap4.rstctrl_offs,
  2632. oh->prcm.omap4.rstst_offs);
  2633. }
  2634. /**
  2635. * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
  2636. * @oh: struct omap_hwmod * to test hardreset
  2637. * @ohri: hardreset line data
  2638. *
  2639. * Call am33xx_prminst_is_hardreset_asserted() with parameters
  2640. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2641. * Only intended for use as an soc_ops function pointer. Passes along
  2642. * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
  2643. * This function is scheduled for removal when the PRM code is moved
  2644. * into drivers/.
  2645. */
  2646. static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
  2647. struct omap_hwmod_rst_info *ohri)
  2648. {
  2649. return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
  2650. oh->clkdm->pwrdm.ptr->prcm_offs,
  2651. oh->prcm.omap4.rstctrl_offs);
  2652. }
  2653. /* Public functions */
  2654. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2655. {
  2656. if (oh->flags & HWMOD_16BIT_REG)
  2657. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2658. else
  2659. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2660. }
  2661. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2662. {
  2663. if (oh->flags & HWMOD_16BIT_REG)
  2664. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2665. else
  2666. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2667. }
  2668. /**
  2669. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2670. * @oh: struct omap_hwmod *
  2671. *
  2672. * This is a public function exposed to drivers. Some drivers may need to do
  2673. * some settings before and after resetting the device. Those drivers after
  2674. * doing the necessary settings could use this function to start a reset by
  2675. * setting the SYSCONFIG.SOFTRESET bit.
  2676. */
  2677. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2678. {
  2679. u32 v;
  2680. int ret;
  2681. if (!oh || !(oh->_sysc_cache))
  2682. return -EINVAL;
  2683. v = oh->_sysc_cache;
  2684. ret = _set_softreset(oh, &v);
  2685. if (ret)
  2686. goto error;
  2687. _write_sysconfig(v, oh);
  2688. error:
  2689. return ret;
  2690. }
  2691. /**
  2692. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2693. * @name: name of the omap_hwmod to look up
  2694. *
  2695. * Given a @name of an omap_hwmod, return a pointer to the registered
  2696. * struct omap_hwmod *, or NULL upon error.
  2697. */
  2698. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2699. {
  2700. struct omap_hwmod *oh;
  2701. if (!name)
  2702. return NULL;
  2703. oh = _lookup(name);
  2704. return oh;
  2705. }
  2706. /**
  2707. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2708. * @fn: pointer to a callback function
  2709. * @data: void * data to pass to callback function
  2710. *
  2711. * Call @fn for each registered omap_hwmod, passing @data to each
  2712. * function. @fn must return 0 for success or any other value for
  2713. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2714. * will stop and the non-zero return value will be passed to the
  2715. * caller of omap_hwmod_for_each(). @fn is called with
  2716. * omap_hwmod_for_each() held.
  2717. */
  2718. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2719. void *data)
  2720. {
  2721. struct omap_hwmod *temp_oh;
  2722. int ret = 0;
  2723. if (!fn)
  2724. return -EINVAL;
  2725. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2726. ret = (*fn)(temp_oh, data);
  2727. if (ret)
  2728. break;
  2729. }
  2730. return ret;
  2731. }
  2732. /**
  2733. * omap_hwmod_register_links - register an array of hwmod links
  2734. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2735. *
  2736. * Intended to be called early in boot before the clock framework is
  2737. * initialized. If @ois is not null, will register all omap_hwmods
  2738. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2739. * omap_hwmod_init() hasn't been called before calling this function,
  2740. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2741. * success.
  2742. */
  2743. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2744. {
  2745. int r, i;
  2746. if (!inited)
  2747. return -EINVAL;
  2748. if (!ois)
  2749. return 0;
  2750. if (!linkspace) {
  2751. if (_alloc_linkspace(ois)) {
  2752. pr_err("omap_hwmod: could not allocate link space\n");
  2753. return -ENOMEM;
  2754. }
  2755. }
  2756. i = 0;
  2757. do {
  2758. r = _register_link(ois[i]);
  2759. WARN(r && r != -EEXIST,
  2760. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2761. ois[i]->master->name, ois[i]->slave->name, r);
  2762. } while (ois[++i]);
  2763. return 0;
  2764. }
  2765. /**
  2766. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2767. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2768. *
  2769. * If the hwmod data corresponding to the MPU subsystem IP block
  2770. * hasn't been initialized and set up yet, do so now. This must be
  2771. * done first since sleep dependencies may be added from other hwmods
  2772. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2773. * return value.
  2774. */
  2775. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2776. {
  2777. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2778. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2779. __func__, MPU_INITIATOR_NAME);
  2780. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2781. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2782. }
  2783. /**
  2784. * omap_hwmod_setup_one - set up a single hwmod
  2785. * @oh_name: const char * name of the already-registered hwmod to set up
  2786. *
  2787. * Initialize and set up a single hwmod. Intended to be used for a
  2788. * small number of early devices, such as the timer IP blocks used for
  2789. * the scheduler clock. Must be called after omap2_clk_init().
  2790. * Resolves the struct clk names to struct clk pointers for each
  2791. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2792. * -EINVAL upon error or 0 upon success.
  2793. */
  2794. int __init omap_hwmod_setup_one(const char *oh_name)
  2795. {
  2796. struct omap_hwmod *oh;
  2797. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2798. oh = _lookup(oh_name);
  2799. if (!oh) {
  2800. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2801. return -EINVAL;
  2802. }
  2803. _ensure_mpu_hwmod_is_setup(oh);
  2804. _init(oh, NULL);
  2805. _setup(oh, NULL);
  2806. return 0;
  2807. }
  2808. /**
  2809. * omap_hwmod_setup_all - set up all registered IP blocks
  2810. *
  2811. * Initialize and set up all IP blocks registered with the hwmod code.
  2812. * Must be called after omap2_clk_init(). Resolves the struct clk
  2813. * names to struct clk pointers for each registered omap_hwmod. Also
  2814. * calls _setup() on each hwmod. Returns 0 upon success.
  2815. */
  2816. static int __init omap_hwmod_setup_all(void)
  2817. {
  2818. _ensure_mpu_hwmod_is_setup(NULL);
  2819. omap_hwmod_for_each(_init, NULL);
  2820. omap_hwmod_for_each(_setup, NULL);
  2821. return 0;
  2822. }
  2823. omap_core_initcall(omap_hwmod_setup_all);
  2824. /**
  2825. * omap_hwmod_enable - enable an omap_hwmod
  2826. * @oh: struct omap_hwmod *
  2827. *
  2828. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2829. * Returns -EINVAL on error or passes along the return value from _enable().
  2830. */
  2831. int omap_hwmod_enable(struct omap_hwmod *oh)
  2832. {
  2833. int r;
  2834. unsigned long flags;
  2835. if (!oh)
  2836. return -EINVAL;
  2837. spin_lock_irqsave(&oh->_lock, flags);
  2838. r = _enable(oh);
  2839. spin_unlock_irqrestore(&oh->_lock, flags);
  2840. return r;
  2841. }
  2842. /**
  2843. * omap_hwmod_idle - idle an omap_hwmod
  2844. * @oh: struct omap_hwmod *
  2845. *
  2846. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2847. * Returns -EINVAL on error or passes along the return value from _idle().
  2848. */
  2849. int omap_hwmod_idle(struct omap_hwmod *oh)
  2850. {
  2851. unsigned long flags;
  2852. if (!oh)
  2853. return -EINVAL;
  2854. spin_lock_irqsave(&oh->_lock, flags);
  2855. _idle(oh);
  2856. spin_unlock_irqrestore(&oh->_lock, flags);
  2857. return 0;
  2858. }
  2859. /**
  2860. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2861. * @oh: struct omap_hwmod *
  2862. *
  2863. * Shutdown an omap_hwmod @oh. Intended to be called by
  2864. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2865. * the return value from _shutdown().
  2866. */
  2867. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2868. {
  2869. unsigned long flags;
  2870. if (!oh)
  2871. return -EINVAL;
  2872. spin_lock_irqsave(&oh->_lock, flags);
  2873. _shutdown(oh);
  2874. spin_unlock_irqrestore(&oh->_lock, flags);
  2875. return 0;
  2876. }
  2877. /**
  2878. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2879. * @oh: struct omap_hwmod *oh
  2880. *
  2881. * Intended to be called by the omap_device code.
  2882. */
  2883. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2884. {
  2885. unsigned long flags;
  2886. spin_lock_irqsave(&oh->_lock, flags);
  2887. _enable_clocks(oh);
  2888. spin_unlock_irqrestore(&oh->_lock, flags);
  2889. return 0;
  2890. }
  2891. /**
  2892. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2893. * @oh: struct omap_hwmod *oh
  2894. *
  2895. * Intended to be called by the omap_device code.
  2896. */
  2897. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2898. {
  2899. unsigned long flags;
  2900. spin_lock_irqsave(&oh->_lock, flags);
  2901. _disable_clocks(oh);
  2902. spin_unlock_irqrestore(&oh->_lock, flags);
  2903. return 0;
  2904. }
  2905. /**
  2906. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2907. * @oh: struct omap_hwmod *oh
  2908. *
  2909. * Intended to be called by drivers and core code when all posted
  2910. * writes to a device must complete before continuing further
  2911. * execution (for example, after clearing some device IRQSTATUS
  2912. * register bits)
  2913. *
  2914. * XXX what about targets with multiple OCP threads?
  2915. */
  2916. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2917. {
  2918. BUG_ON(!oh);
  2919. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2920. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2921. oh->name);
  2922. return;
  2923. }
  2924. /*
  2925. * Forces posted writes to complete on the OCP thread handling
  2926. * register writes
  2927. */
  2928. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2929. }
  2930. /**
  2931. * omap_hwmod_reset - reset the hwmod
  2932. * @oh: struct omap_hwmod *
  2933. *
  2934. * Under some conditions, a driver may wish to reset the entire device.
  2935. * Called from omap_device code. Returns -EINVAL on error or passes along
  2936. * the return value from _reset().
  2937. */
  2938. int omap_hwmod_reset(struct omap_hwmod *oh)
  2939. {
  2940. int r;
  2941. unsigned long flags;
  2942. if (!oh)
  2943. return -EINVAL;
  2944. spin_lock_irqsave(&oh->_lock, flags);
  2945. r = _reset(oh);
  2946. spin_unlock_irqrestore(&oh->_lock, flags);
  2947. return r;
  2948. }
  2949. /*
  2950. * IP block data retrieval functions
  2951. */
  2952. /**
  2953. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2954. * @oh: struct omap_hwmod *
  2955. * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
  2956. *
  2957. * Count the number of struct resource array elements necessary to
  2958. * contain omap_hwmod @oh resources. Intended to be called by code
  2959. * that registers omap_devices. Intended to be used to determine the
  2960. * size of a dynamically-allocated struct resource array, before
  2961. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2962. * resource array elements needed.
  2963. *
  2964. * XXX This code is not optimized. It could attempt to merge adjacent
  2965. * resource IDs.
  2966. *
  2967. */
  2968. int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
  2969. {
  2970. int ret = 0;
  2971. if (flags & IORESOURCE_IRQ)
  2972. ret += _count_mpu_irqs(oh);
  2973. if (flags & IORESOURCE_DMA)
  2974. ret += _count_sdma_reqs(oh);
  2975. if (flags & IORESOURCE_MEM) {
  2976. int i = 0;
  2977. struct omap_hwmod_ocp_if *os;
  2978. struct list_head *p = oh->slave_ports.next;
  2979. while (i < oh->slaves_cnt) {
  2980. os = _fetch_next_ocp_if(&p, &i);
  2981. ret += _count_ocp_if_addr_spaces(os);
  2982. }
  2983. }
  2984. return ret;
  2985. }
  2986. /**
  2987. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2988. * @oh: struct omap_hwmod *
  2989. * @res: pointer to the first element of an array of struct resource to fill
  2990. *
  2991. * Fill the struct resource array @res with resource data from the
  2992. * omap_hwmod @oh. Intended to be called by code that registers
  2993. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2994. * number of array elements filled.
  2995. */
  2996. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2997. {
  2998. struct omap_hwmod_ocp_if *os;
  2999. struct list_head *p;
  3000. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  3001. int r = 0;
  3002. /* For each IRQ, DMA, memory area, fill in array.*/
  3003. mpu_irqs_cnt = _count_mpu_irqs(oh);
  3004. for (i = 0; i < mpu_irqs_cnt; i++) {
  3005. (res + r)->name = (oh->mpu_irqs + i)->name;
  3006. (res + r)->start = (oh->mpu_irqs + i)->irq;
  3007. (res + r)->end = (oh->mpu_irqs + i)->irq;
  3008. (res + r)->flags = IORESOURCE_IRQ;
  3009. r++;
  3010. }
  3011. sdma_reqs_cnt = _count_sdma_reqs(oh);
  3012. for (i = 0; i < sdma_reqs_cnt; i++) {
  3013. (res + r)->name = (oh->sdma_reqs + i)->name;
  3014. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  3015. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3016. (res + r)->flags = IORESOURCE_DMA;
  3017. r++;
  3018. }
  3019. p = oh->slave_ports.next;
  3020. i = 0;
  3021. while (i < oh->slaves_cnt) {
  3022. os = _fetch_next_ocp_if(&p, &i);
  3023. addr_cnt = _count_ocp_if_addr_spaces(os);
  3024. for (j = 0; j < addr_cnt; j++) {
  3025. (res + r)->name = (os->addr + j)->name;
  3026. (res + r)->start = (os->addr + j)->pa_start;
  3027. (res + r)->end = (os->addr + j)->pa_end;
  3028. (res + r)->flags = IORESOURCE_MEM;
  3029. r++;
  3030. }
  3031. }
  3032. return r;
  3033. }
  3034. /**
  3035. * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
  3036. * @oh: struct omap_hwmod *
  3037. * @res: pointer to the array of struct resource to fill
  3038. *
  3039. * Fill the struct resource array @res with dma resource data from the
  3040. * omap_hwmod @oh. Intended to be called by code that registers
  3041. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  3042. * number of array elements filled.
  3043. */
  3044. int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
  3045. {
  3046. int i, sdma_reqs_cnt;
  3047. int r = 0;
  3048. sdma_reqs_cnt = _count_sdma_reqs(oh);
  3049. for (i = 0; i < sdma_reqs_cnt; i++) {
  3050. (res + r)->name = (oh->sdma_reqs + i)->name;
  3051. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  3052. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3053. (res + r)->flags = IORESOURCE_DMA;
  3054. r++;
  3055. }
  3056. return r;
  3057. }
  3058. /**
  3059. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  3060. * @oh: struct omap_hwmod * to operate on
  3061. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  3062. * @name: pointer to the name of the data to fetch (optional)
  3063. * @rsrc: pointer to a struct resource, allocated by the caller
  3064. *
  3065. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  3066. * data for the IP block pointed to by @oh. The data will be filled
  3067. * into a struct resource record pointed to by @rsrc. The struct
  3068. * resource must be allocated by the caller. When @name is non-null,
  3069. * the data associated with the matching entry in the IRQ/SDMA/address
  3070. * space hwmod data arrays will be returned. If @name is null, the
  3071. * first array entry will be returned. Data order is not meaningful
  3072. * in hwmod data, so callers are strongly encouraged to use a non-null
  3073. * @name whenever possible to avoid unpredictable effects if hwmod
  3074. * data is later added that causes data ordering to change. This
  3075. * function is only intended for use by OMAP core code. Device
  3076. * drivers should not call this function - the appropriate bus-related
  3077. * data accessor functions should be used instead. Returns 0 upon
  3078. * success or a negative error code upon error.
  3079. */
  3080. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  3081. const char *name, struct resource *rsrc)
  3082. {
  3083. int r;
  3084. unsigned int irq, dma;
  3085. u32 pa_start, pa_end;
  3086. if (!oh || !rsrc)
  3087. return -EINVAL;
  3088. if (type == IORESOURCE_IRQ) {
  3089. r = _get_mpu_irq_by_name(oh, name, &irq);
  3090. if (r)
  3091. return r;
  3092. rsrc->start = irq;
  3093. rsrc->end = irq;
  3094. } else if (type == IORESOURCE_DMA) {
  3095. r = _get_sdma_req_by_name(oh, name, &dma);
  3096. if (r)
  3097. return r;
  3098. rsrc->start = dma;
  3099. rsrc->end = dma;
  3100. } else if (type == IORESOURCE_MEM) {
  3101. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  3102. if (r)
  3103. return r;
  3104. rsrc->start = pa_start;
  3105. rsrc->end = pa_end;
  3106. } else {
  3107. return -EINVAL;
  3108. }
  3109. rsrc->flags = type;
  3110. rsrc->name = name;
  3111. return 0;
  3112. }
  3113. /**
  3114. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  3115. * @oh: struct omap_hwmod *
  3116. *
  3117. * Return the powerdomain pointer associated with the OMAP module
  3118. * @oh's main clock. If @oh does not have a main clk, return the
  3119. * powerdomain associated with the interface clock associated with the
  3120. * module's MPU port. (XXX Perhaps this should use the SDMA port
  3121. * instead?) Returns NULL on error, or a struct powerdomain * on
  3122. * success.
  3123. */
  3124. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  3125. {
  3126. struct clk *c;
  3127. struct omap_hwmod_ocp_if *oi;
  3128. struct clockdomain *clkdm;
  3129. struct clk_hw_omap *clk;
  3130. if (!oh)
  3131. return NULL;
  3132. if (oh->clkdm)
  3133. return oh->clkdm->pwrdm.ptr;
  3134. if (oh->_clk) {
  3135. c = oh->_clk;
  3136. } else {
  3137. oi = _find_mpu_rt_port(oh);
  3138. if (!oi)
  3139. return NULL;
  3140. c = oi->_clk;
  3141. }
  3142. clk = to_clk_hw_omap(__clk_get_hw(c));
  3143. clkdm = clk->clkdm;
  3144. if (!clkdm)
  3145. return NULL;
  3146. return clkdm->pwrdm.ptr;
  3147. }
  3148. /**
  3149. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  3150. * @oh: struct omap_hwmod *
  3151. *
  3152. * Returns the virtual address corresponding to the beginning of the
  3153. * module's register target, in the address range that is intended to
  3154. * be used by the MPU. Returns the virtual address upon success or NULL
  3155. * upon error.
  3156. */
  3157. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  3158. {
  3159. if (!oh)
  3160. return NULL;
  3161. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  3162. return NULL;
  3163. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  3164. return NULL;
  3165. return oh->_mpu_rt_va;
  3166. }
  3167. /**
  3168. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  3169. * @oh: struct omap_hwmod *
  3170. * @init_oh: struct omap_hwmod * (initiator)
  3171. *
  3172. * Add a sleep dependency between the initiator @init_oh and @oh.
  3173. * Intended to be called by DSP/Bridge code via platform_data for the
  3174. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3175. * code needs to add/del initiator dependencies dynamically
  3176. * before/after accessing a device. Returns the return value from
  3177. * _add_initiator_dep().
  3178. *
  3179. * XXX Keep a usecount in the clockdomain code
  3180. */
  3181. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  3182. struct omap_hwmod *init_oh)
  3183. {
  3184. return _add_initiator_dep(oh, init_oh);
  3185. }
  3186. /*
  3187. * XXX what about functions for drivers to save/restore ocp_sysconfig
  3188. * for context save/restore operations?
  3189. */
  3190. /**
  3191. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  3192. * @oh: struct omap_hwmod *
  3193. * @init_oh: struct omap_hwmod * (initiator)
  3194. *
  3195. * Remove a sleep dependency between the initiator @init_oh and @oh.
  3196. * Intended to be called by DSP/Bridge code via platform_data for the
  3197. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3198. * code needs to add/del initiator dependencies dynamically
  3199. * before/after accessing a device. Returns the return value from
  3200. * _del_initiator_dep().
  3201. *
  3202. * XXX Keep a usecount in the clockdomain code
  3203. */
  3204. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  3205. struct omap_hwmod *init_oh)
  3206. {
  3207. return _del_initiator_dep(oh, init_oh);
  3208. }
  3209. /**
  3210. * omap_hwmod_enable_wakeup - allow device to wake up the system
  3211. * @oh: struct omap_hwmod *
  3212. *
  3213. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  3214. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  3215. * this IP block if it has dynamic mux entries. Eventually this
  3216. * should set PRCM wakeup registers to cause the PRCM to receive
  3217. * wakeup events from the module. Does not set any wakeup routing
  3218. * registers beyond this point - if the module is to wake up any other
  3219. * module or subsystem, that must be set separately. Called by
  3220. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3221. */
  3222. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  3223. {
  3224. unsigned long flags;
  3225. u32 v;
  3226. spin_lock_irqsave(&oh->_lock, flags);
  3227. if (oh->class->sysc &&
  3228. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3229. v = oh->_sysc_cache;
  3230. _enable_wakeup(oh, &v);
  3231. _write_sysconfig(v, oh);
  3232. }
  3233. _set_idle_ioring_wakeup(oh, true);
  3234. spin_unlock_irqrestore(&oh->_lock, flags);
  3235. return 0;
  3236. }
  3237. /**
  3238. * omap_hwmod_disable_wakeup - prevent device from waking the system
  3239. * @oh: struct omap_hwmod *
  3240. *
  3241. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  3242. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  3243. * events for this IP block if it has dynamic mux entries. Eventually
  3244. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  3245. * wakeup events from the module. Does not set any wakeup routing
  3246. * registers beyond this point - if the module is to wake up any other
  3247. * module or subsystem, that must be set separately. Called by
  3248. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3249. */
  3250. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  3251. {
  3252. unsigned long flags;
  3253. u32 v;
  3254. spin_lock_irqsave(&oh->_lock, flags);
  3255. if (oh->class->sysc &&
  3256. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3257. v = oh->_sysc_cache;
  3258. _disable_wakeup(oh, &v);
  3259. _write_sysconfig(v, oh);
  3260. }
  3261. _set_idle_ioring_wakeup(oh, false);
  3262. spin_unlock_irqrestore(&oh->_lock, flags);
  3263. return 0;
  3264. }
  3265. /**
  3266. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  3267. * contained in the hwmod module.
  3268. * @oh: struct omap_hwmod *
  3269. * @name: name of the reset line to lookup and assert
  3270. *
  3271. * Some IP like dsp, ipu or iva contain processor that require
  3272. * an HW reset line to be assert / deassert in order to enable fully
  3273. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3274. * yet supported on this OMAP; otherwise, passes along the return value
  3275. * from _assert_hardreset().
  3276. */
  3277. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  3278. {
  3279. int ret;
  3280. unsigned long flags;
  3281. if (!oh)
  3282. return -EINVAL;
  3283. spin_lock_irqsave(&oh->_lock, flags);
  3284. ret = _assert_hardreset(oh, name);
  3285. spin_unlock_irqrestore(&oh->_lock, flags);
  3286. return ret;
  3287. }
  3288. /**
  3289. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  3290. * contained in the hwmod module.
  3291. * @oh: struct omap_hwmod *
  3292. * @name: name of the reset line to look up and deassert
  3293. *
  3294. * Some IP like dsp, ipu or iva contain processor that require
  3295. * an HW reset line to be assert / deassert in order to enable fully
  3296. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3297. * yet supported on this OMAP; otherwise, passes along the return value
  3298. * from _deassert_hardreset().
  3299. */
  3300. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  3301. {
  3302. int ret;
  3303. unsigned long flags;
  3304. if (!oh)
  3305. return -EINVAL;
  3306. spin_lock_irqsave(&oh->_lock, flags);
  3307. ret = _deassert_hardreset(oh, name);
  3308. spin_unlock_irqrestore(&oh->_lock, flags);
  3309. return ret;
  3310. }
  3311. /**
  3312. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  3313. * contained in the hwmod module
  3314. * @oh: struct omap_hwmod *
  3315. * @name: name of the reset line to look up and read
  3316. *
  3317. * Return the current state of the hwmod @oh's reset line named @name:
  3318. * returns -EINVAL upon parameter error or if this operation
  3319. * is unsupported on the current OMAP; otherwise, passes along the return
  3320. * value from _read_hardreset().
  3321. */
  3322. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  3323. {
  3324. int ret;
  3325. unsigned long flags;
  3326. if (!oh)
  3327. return -EINVAL;
  3328. spin_lock_irqsave(&oh->_lock, flags);
  3329. ret = _read_hardreset(oh, name);
  3330. spin_unlock_irqrestore(&oh->_lock, flags);
  3331. return ret;
  3332. }
  3333. /**
  3334. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  3335. * @classname: struct omap_hwmod_class name to search for
  3336. * @fn: callback function pointer to call for each hwmod in class @classname
  3337. * @user: arbitrary context data to pass to the callback function
  3338. *
  3339. * For each omap_hwmod of class @classname, call @fn.
  3340. * If the callback function returns something other than
  3341. * zero, the iterator is terminated, and the callback function's return
  3342. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  3343. * if @classname or @fn are NULL, or passes back the error code from @fn.
  3344. */
  3345. int omap_hwmod_for_each_by_class(const char *classname,
  3346. int (*fn)(struct omap_hwmod *oh,
  3347. void *user),
  3348. void *user)
  3349. {
  3350. struct omap_hwmod *temp_oh;
  3351. int ret = 0;
  3352. if (!classname || !fn)
  3353. return -EINVAL;
  3354. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  3355. __func__, classname);
  3356. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  3357. if (!strcmp(temp_oh->class->name, classname)) {
  3358. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  3359. __func__, temp_oh->name);
  3360. ret = (*fn)(temp_oh, user);
  3361. if (ret)
  3362. break;
  3363. }
  3364. }
  3365. if (ret)
  3366. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  3367. __func__, ret);
  3368. return ret;
  3369. }
  3370. /**
  3371. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  3372. * @oh: struct omap_hwmod *
  3373. * @state: state that _setup() should leave the hwmod in
  3374. *
  3375. * Sets the hwmod state that @oh will enter at the end of _setup()
  3376. * (called by omap_hwmod_setup_*()). See also the documentation
  3377. * for _setup_postsetup(), above. Returns 0 upon success or
  3378. * -EINVAL if there is a problem with the arguments or if the hwmod is
  3379. * in the wrong state.
  3380. */
  3381. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  3382. {
  3383. int ret;
  3384. unsigned long flags;
  3385. if (!oh)
  3386. return -EINVAL;
  3387. if (state != _HWMOD_STATE_DISABLED &&
  3388. state != _HWMOD_STATE_ENABLED &&
  3389. state != _HWMOD_STATE_IDLE)
  3390. return -EINVAL;
  3391. spin_lock_irqsave(&oh->_lock, flags);
  3392. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3393. ret = -EINVAL;
  3394. goto ohsps_unlock;
  3395. }
  3396. oh->_postsetup_state = state;
  3397. ret = 0;
  3398. ohsps_unlock:
  3399. spin_unlock_irqrestore(&oh->_lock, flags);
  3400. return ret;
  3401. }
  3402. /**
  3403. * omap_hwmod_get_context_loss_count - get lost context count
  3404. * @oh: struct omap_hwmod *
  3405. *
  3406. * Returns the context loss count of associated @oh
  3407. * upon success, or zero if no context loss data is available.
  3408. *
  3409. * On OMAP4, this queries the per-hwmod context loss register,
  3410. * assuming one exists. If not, or on OMAP2/3, this queries the
  3411. * enclosing powerdomain context loss count.
  3412. */
  3413. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3414. {
  3415. struct powerdomain *pwrdm;
  3416. int ret = 0;
  3417. if (soc_ops.get_context_lost)
  3418. return soc_ops.get_context_lost(oh);
  3419. pwrdm = omap_hwmod_get_pwrdm(oh);
  3420. if (pwrdm)
  3421. ret = pwrdm_get_context_loss_count(pwrdm);
  3422. return ret;
  3423. }
  3424. /**
  3425. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  3426. * @oh: struct omap_hwmod *
  3427. *
  3428. * Prevent the hwmod @oh from being reset during the setup process.
  3429. * Intended for use by board-*.c files on boards with devices that
  3430. * cannot tolerate being reset. Must be called before the hwmod has
  3431. * been set up. Returns 0 upon success or negative error code upon
  3432. * failure.
  3433. */
  3434. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  3435. {
  3436. if (!oh)
  3437. return -EINVAL;
  3438. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3439. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  3440. oh->name);
  3441. return -EINVAL;
  3442. }
  3443. oh->flags |= HWMOD_INIT_NO_RESET;
  3444. return 0;
  3445. }
  3446. /**
  3447. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  3448. * @oh: struct omap_hwmod * containing hwmod mux entries
  3449. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  3450. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  3451. *
  3452. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  3453. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  3454. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  3455. * this function is not called for a given pad_idx, then the ISR
  3456. * associated with @oh's first MPU IRQ will be triggered when an I/O
  3457. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  3458. * the _dynamic or wakeup_ entry: if there are other entries not
  3459. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  3460. * entries are NOT COUNTED in the dynamic pad index. This function
  3461. * must be called separately for each pad that requires its interrupt
  3462. * to be re-routed this way. Returns -EINVAL if there is an argument
  3463. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  3464. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  3465. *
  3466. * XXX This function interface is fragile. Rather than using array
  3467. * indexes, which are subject to unpredictable change, it should be
  3468. * using hwmod IRQ names, and some other stable key for the hwmod mux
  3469. * pad records.
  3470. */
  3471. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  3472. {
  3473. int nr_irqs;
  3474. might_sleep();
  3475. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  3476. pad_idx >= oh->mux->nr_pads_dynamic)
  3477. return -EINVAL;
  3478. /* Check the number of available mpu_irqs */
  3479. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3480. ;
  3481. if (irq_idx >= nr_irqs)
  3482. return -EINVAL;
  3483. if (!oh->mux->irqs) {
  3484. /* XXX What frees this? */
  3485. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3486. GFP_KERNEL);
  3487. if (!oh->mux->irqs)
  3488. return -ENOMEM;
  3489. }
  3490. oh->mux->irqs[pad_idx] = irq_idx;
  3491. return 0;
  3492. }
  3493. /**
  3494. * omap_hwmod_init - initialize the hwmod code
  3495. *
  3496. * Sets up some function pointers needed by the hwmod code to operate on the
  3497. * currently-booted SoC. Intended to be called once during kernel init
  3498. * before any hwmods are registered. No return value.
  3499. */
  3500. void __init omap_hwmod_init(void)
  3501. {
  3502. if (cpu_is_omap24xx()) {
  3503. soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
  3504. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3505. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3506. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3507. } else if (cpu_is_omap34xx()) {
  3508. soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
  3509. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3510. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3511. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3512. } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
  3513. soc_ops.enable_module = _omap4_enable_module;
  3514. soc_ops.disable_module = _omap4_disable_module;
  3515. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3516. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3517. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3518. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3519. soc_ops.init_clkdm = _init_clkdm;
  3520. soc_ops.update_context_lost = _omap4_update_context_lost;
  3521. soc_ops.get_context_lost = _omap4_get_context_lost;
  3522. } else if (soc_is_am33xx()) {
  3523. soc_ops.enable_module = _am33xx_enable_module;
  3524. soc_ops.disable_module = _am33xx_disable_module;
  3525. soc_ops.wait_target_ready = _am33xx_wait_target_ready;
  3526. soc_ops.assert_hardreset = _am33xx_assert_hardreset;
  3527. soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
  3528. soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
  3529. soc_ops.init_clkdm = _init_clkdm;
  3530. } else {
  3531. WARN(1, "omap_hwmod: unknown SoC type\n");
  3532. }
  3533. inited = true;
  3534. }
  3535. /**
  3536. * omap_hwmod_get_main_clk - get pointer to main clock name
  3537. * @oh: struct omap_hwmod *
  3538. *
  3539. * Returns the main clock name assocated with @oh upon success,
  3540. * or NULL if @oh is NULL.
  3541. */
  3542. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3543. {
  3544. if (!oh)
  3545. return NULL;
  3546. return oh->main_clk;
  3547. }