i915_gem_context.c 6.3 KB

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  1. /*
  2. * Copyright © 2011-2012 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Ben Widawsky <ben@bwidawsk.net>
  25. *
  26. */
  27. /*
  28. * This file implements HW context support. On gen5+ a HW context consists of an
  29. * opaque GPU object which is referenced at times of context saves and restores.
  30. * With RC6 enabled, the context is also referenced as the GPU enters and exists
  31. * from RC6 (GPU has it's own internal power context, except on gen5). Though
  32. * something like a context does exist for the media ring, the code only
  33. * supports contexts for the render ring.
  34. *
  35. * In software, there is a distinction between contexts created by the user,
  36. * and the default HW context. The default HW context is used by GPU clients
  37. * that do not request setup of their own hardware context. The default
  38. * context's state is never restored to help prevent programming errors. This
  39. * would happen if a client ran and piggy-backed off another clients GPU state.
  40. * The default context only exists to give the GPU some offset to load as the
  41. * current to invoke a save of the context we actually care about. In fact, the
  42. * code could likely be constructed, albeit in a more complicated fashion, to
  43. * never use the default context, though that limits the driver's ability to
  44. * swap out, and/or destroy other contexts.
  45. *
  46. * All other contexts are created as a request by the GPU client. These contexts
  47. * store GPU state, and thus allow GPU clients to not re-emit state (and
  48. * potentially query certain state) at any time. The kernel driver makes
  49. * certain that the appropriate commands are inserted.
  50. *
  51. * The context life cycle is semi-complicated in that context BOs may live
  52. * longer than the context itself because of the way the hardware, and object
  53. * tracking works. Below is a very crude representation of the state machine
  54. * describing the context life.
  55. * refcount pincount active
  56. * S0: initial state 0 0 0
  57. * S1: context created 1 0 0
  58. * S2: context is currently running 2 1 X
  59. * S3: GPU referenced, but not current 2 0 1
  60. * S4: context is current, but destroyed 1 1 0
  61. * S5: like S3, but destroyed 1 0 1
  62. *
  63. * The most common (but not all) transitions:
  64. * S0->S1: client creates a context
  65. * S1->S2: client submits execbuf with context
  66. * S2->S3: other clients submits execbuf with context
  67. * S3->S1: context object was retired
  68. * S3->S2: clients submits another execbuf
  69. * S2->S4: context destroy called with current context
  70. * S3->S5->S0: destroy path
  71. * S4->S5->S0: destroy path on current context
  72. *
  73. * There are two confusing terms used above:
  74. * The "current context" means the context which is currently running on the
  75. * GPU. The GPU has loaded it's state already and has stored away the gtt
  76. * offset of the BO. The GPU is not actively referencing the data at this
  77. * offset, but it will on the next context switch. The only way to avoid this
  78. * is to do a GPU reset.
  79. *
  80. * An "active context' is one which was previously the "current context" and is
  81. * on the active list waiting for the next context switch to occur. Until this
  82. * happens, the object must remain at the same gtt offset. It is therefore
  83. * possible to destroy a context, but it is still active.
  84. *
  85. */
  86. #include "drmP.h"
  87. #include "i915_drm.h"
  88. #include "i915_drv.h"
  89. static int get_context_size(struct drm_device *dev)
  90. {
  91. struct drm_i915_private *dev_priv = dev->dev_private;
  92. int ret;
  93. u32 reg;
  94. switch (INTEL_INFO(dev)->gen) {
  95. case 6:
  96. reg = I915_READ(CXT_SIZE);
  97. ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
  98. break;
  99. case 7:
  100. reg = I915_READ(GEN7_CTX_SIZE);
  101. ret = GEN7_CTX_TOTAL_SIZE(reg) * 64;
  102. break;
  103. default:
  104. BUG();
  105. }
  106. return ret;
  107. }
  108. /**
  109. * The default context needs to exist per ring that uses contexts. It stores the
  110. * context state of the GPU for applications that don't utilize HW contexts, as
  111. * well as an idle case.
  112. */
  113. static int create_default_context(struct drm_i915_private *dev_priv)
  114. {
  115. return 0;
  116. }
  117. void i915_gem_context_init(struct drm_device *dev)
  118. {
  119. struct drm_i915_private *dev_priv = dev->dev_private;
  120. uint32_t ctx_size;
  121. if (!HAS_HW_CONTEXTS(dev))
  122. return;
  123. /* If called from reset, or thaw... we've been here already */
  124. if (dev_priv->hw_contexts_disabled)
  125. return;
  126. ctx_size = get_context_size(dev);
  127. dev_priv->hw_context_size = get_context_size(dev);
  128. dev_priv->hw_context_size = round_up(dev_priv->hw_context_size, 4096);
  129. if (ctx_size <= 0 || ctx_size > (1<<20)) {
  130. dev_priv->hw_contexts_disabled = true;
  131. return;
  132. }
  133. if (create_default_context(dev_priv)) {
  134. dev_priv->hw_contexts_disabled = true;
  135. return;
  136. }
  137. DRM_DEBUG_DRIVER("HW context support initialized\n");
  138. }
  139. void i915_gem_context_fini(struct drm_device *dev)
  140. {
  141. struct drm_i915_private *dev_priv = dev->dev_private;
  142. if (dev_priv->hw_contexts_disabled)
  143. return;
  144. }
  145. void i915_gem_context_open(struct drm_device *dev, struct drm_file *file)
  146. {
  147. struct drm_i915_private *dev_priv = dev->dev_private;
  148. if (dev_priv->hw_contexts_disabled)
  149. return;
  150. }
  151. void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
  152. {
  153. struct drm_i915_private *dev_priv = dev->dev_private;
  154. if (dev_priv->hw_contexts_disabled)
  155. return;
  156. }