atl1c_main.c 73 KB

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  1. /*
  2. * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
  3. *
  4. * Derived from Intel e1000 driver
  5. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 2 of the License, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include "atl1c.h"
  22. #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
  23. char atl1c_driver_name[] = "atl1c";
  24. char atl1c_driver_version[] = ATL1C_DRV_VERSION;
  25. /*
  26. * atl1c_pci_tbl - PCI Device ID Table
  27. *
  28. * Wildcard entries (PCI_ANY_ID) should come last
  29. * Last entry must be all 0s
  30. *
  31. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  32. * Class, Class Mask, private data (not used) }
  33. */
  34. static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
  35. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
  36. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
  37. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
  39. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
  40. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
  41. /* required last entry */
  42. { 0 }
  43. };
  44. MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
  45. MODULE_AUTHOR("Jie Yang");
  46. MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
  47. MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
  48. MODULE_LICENSE("GPL");
  49. MODULE_VERSION(ATL1C_DRV_VERSION);
  50. static int atl1c_stop_mac(struct atl1c_hw *hw);
  51. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
  52. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
  53. static void atl1c_start_mac(struct atl1c_adapter *adapter);
  54. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  55. int *work_done, int work_to_do);
  56. static int atl1c_up(struct atl1c_adapter *adapter);
  57. static void atl1c_down(struct atl1c_adapter *adapter);
  58. static const u16 atl1c_pay_load_size[] = {
  59. 128, 256, 512, 1024, 2048, 4096,
  60. };
  61. static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  62. NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
  63. static void atl1c_pcie_patch(struct atl1c_hw *hw)
  64. {
  65. u32 mst_data, data;
  66. /* pclk sel could switch to 25M */
  67. AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
  68. mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
  69. AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
  70. /* WoL/PCIE related settings */
  71. if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
  72. AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
  73. data |= PCIE_PHYMISC_FORCE_RCV_DET;
  74. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
  75. } else { /* new dev set bit5 of MASTER */
  76. if (!(mst_data & MASTER_CTRL_WAKEN_25M))
  77. AT_WRITE_REG(hw, REG_MASTER_CTRL,
  78. mst_data | MASTER_CTRL_WAKEN_25M);
  79. }
  80. /* aspm/PCIE setting only for l2cb 1.0 */
  81. if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
  82. AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
  83. data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
  84. L2CB1_PCIE_PHYMISC2_CDR_BW);
  85. data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
  86. L2CB1_PCIE_PHYMISC2_L0S_TH);
  87. AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
  88. /* extend L1 sync timer */
  89. AT_READ_REG(hw, REG_LINK_CTRL, &data);
  90. data |= LINK_CTRL_EXT_SYNC;
  91. AT_WRITE_REG(hw, REG_LINK_CTRL, data);
  92. }
  93. /* l2cb 1.x & l1d 1.x */
  94. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
  95. AT_READ_REG(hw, REG_PM_CTRL, &data);
  96. data |= PM_CTRL_L0S_BUFSRX_EN;
  97. AT_WRITE_REG(hw, REG_PM_CTRL, data);
  98. /* clear vendor msg */
  99. AT_READ_REG(hw, REG_DMA_DBG, &data);
  100. AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
  101. }
  102. }
  103. /* FIXME: no need any more ? */
  104. /*
  105. * atl1c_init_pcie - init PCIE module
  106. */
  107. static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
  108. {
  109. u32 data;
  110. u32 pci_cmd;
  111. struct pci_dev *pdev = hw->adapter->pdev;
  112. int pos;
  113. AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
  114. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  115. pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
  116. PCI_COMMAND_IO);
  117. AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
  118. /*
  119. * Clear any PowerSaveing Settings
  120. */
  121. pci_enable_wake(pdev, PCI_D3hot, 0);
  122. pci_enable_wake(pdev, PCI_D3cold, 0);
  123. /*
  124. * Mask some pcie error bits
  125. */
  126. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  127. pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
  128. data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
  129. pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
  130. /* clear error status */
  131. pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA,
  132. PCI_EXP_DEVSTA_NFED |
  133. PCI_EXP_DEVSTA_FED |
  134. PCI_EXP_DEVSTA_CED |
  135. PCI_EXP_DEVSTA_URD);
  136. AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
  137. data &= ~LTSSM_ID_EN_WRO;
  138. AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
  139. atl1c_pcie_patch(hw);
  140. if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
  141. atl1c_disable_l0s_l1(hw);
  142. msleep(5);
  143. }
  144. /*
  145. * atl1c_irq_enable - Enable default interrupt generation settings
  146. * @adapter: board private structure
  147. */
  148. static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
  149. {
  150. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  151. AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
  152. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  153. AT_WRITE_FLUSH(&adapter->hw);
  154. }
  155. }
  156. /*
  157. * atl1c_irq_disable - Mask off interrupt generation on the NIC
  158. * @adapter: board private structure
  159. */
  160. static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
  161. {
  162. atomic_inc(&adapter->irq_sem);
  163. AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
  164. AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
  165. AT_WRITE_FLUSH(&adapter->hw);
  166. synchronize_irq(adapter->pdev->irq);
  167. }
  168. /*
  169. * atl1c_irq_reset - reset interrupt confiure on the NIC
  170. * @adapter: board private structure
  171. */
  172. static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
  173. {
  174. atomic_set(&adapter->irq_sem, 1);
  175. atl1c_irq_enable(adapter);
  176. }
  177. /*
  178. * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
  179. * of the idle status register until the device is actually idle
  180. */
  181. static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
  182. {
  183. int timeout;
  184. u32 data;
  185. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  186. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  187. if ((data & modu_ctrl) == 0)
  188. return 0;
  189. msleep(1);
  190. }
  191. return data;
  192. }
  193. /*
  194. * atl1c_phy_config - Timer Call-back
  195. * @data: pointer to netdev cast into an unsigned long
  196. */
  197. static void atl1c_phy_config(unsigned long data)
  198. {
  199. struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
  200. struct atl1c_hw *hw = &adapter->hw;
  201. unsigned long flags;
  202. spin_lock_irqsave(&adapter->mdio_lock, flags);
  203. atl1c_restart_autoneg(hw);
  204. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  205. }
  206. void atl1c_reinit_locked(struct atl1c_adapter *adapter)
  207. {
  208. WARN_ON(in_interrupt());
  209. atl1c_down(adapter);
  210. atl1c_up(adapter);
  211. clear_bit(__AT_RESETTING, &adapter->flags);
  212. }
  213. static void atl1c_check_link_status(struct atl1c_adapter *adapter)
  214. {
  215. struct atl1c_hw *hw = &adapter->hw;
  216. struct net_device *netdev = adapter->netdev;
  217. struct pci_dev *pdev = adapter->pdev;
  218. int err;
  219. unsigned long flags;
  220. u16 speed, duplex, phy_data;
  221. spin_lock_irqsave(&adapter->mdio_lock, flags);
  222. /* MII_BMSR must read twise */
  223. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  224. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  225. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  226. if ((phy_data & BMSR_LSTATUS) == 0) {
  227. /* link down */
  228. hw->hibernate = true;
  229. if (atl1c_stop_mac(hw) != 0)
  230. if (netif_msg_hw(adapter))
  231. dev_warn(&pdev->dev, "stop mac failed\n");
  232. atl1c_set_aspm(hw, SPEED_0);
  233. netif_carrier_off(netdev);
  234. netif_stop_queue(netdev);
  235. } else {
  236. /* Link Up */
  237. hw->hibernate = false;
  238. spin_lock_irqsave(&adapter->mdio_lock, flags);
  239. err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
  240. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  241. if (unlikely(err))
  242. return;
  243. /* link result is our setting */
  244. if (adapter->link_speed != speed ||
  245. adapter->link_duplex != duplex) {
  246. adapter->link_speed = speed;
  247. adapter->link_duplex = duplex;
  248. atl1c_set_aspm(hw, speed);
  249. atl1c_start_mac(adapter);
  250. if (netif_msg_link(adapter))
  251. dev_info(&pdev->dev,
  252. "%s: %s NIC Link is Up<%d Mbps %s>\n",
  253. atl1c_driver_name, netdev->name,
  254. adapter->link_speed,
  255. adapter->link_duplex == FULL_DUPLEX ?
  256. "Full Duplex" : "Half Duplex");
  257. }
  258. if (!netif_carrier_ok(netdev))
  259. netif_carrier_on(netdev);
  260. }
  261. }
  262. static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
  263. {
  264. struct net_device *netdev = adapter->netdev;
  265. struct pci_dev *pdev = adapter->pdev;
  266. u16 phy_data;
  267. u16 link_up;
  268. spin_lock(&adapter->mdio_lock);
  269. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  270. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  271. spin_unlock(&adapter->mdio_lock);
  272. link_up = phy_data & BMSR_LSTATUS;
  273. /* notify upper layer link down ASAP */
  274. if (!link_up) {
  275. if (netif_carrier_ok(netdev)) {
  276. /* old link state: Up */
  277. netif_carrier_off(netdev);
  278. if (netif_msg_link(adapter))
  279. dev_info(&pdev->dev,
  280. "%s: %s NIC Link is Down\n",
  281. atl1c_driver_name, netdev->name);
  282. adapter->link_speed = SPEED_0;
  283. }
  284. }
  285. set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
  286. schedule_work(&adapter->common_task);
  287. }
  288. static void atl1c_common_task(struct work_struct *work)
  289. {
  290. struct atl1c_adapter *adapter;
  291. struct net_device *netdev;
  292. adapter = container_of(work, struct atl1c_adapter, common_task);
  293. netdev = adapter->netdev;
  294. if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
  295. netif_device_detach(netdev);
  296. atl1c_down(adapter);
  297. atl1c_up(adapter);
  298. netif_device_attach(netdev);
  299. }
  300. if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
  301. &adapter->work_event))
  302. atl1c_check_link_status(adapter);
  303. }
  304. static void atl1c_del_timer(struct atl1c_adapter *adapter)
  305. {
  306. del_timer_sync(&adapter->phy_config_timer);
  307. }
  308. /*
  309. * atl1c_tx_timeout - Respond to a Tx Hang
  310. * @netdev: network interface device structure
  311. */
  312. static void atl1c_tx_timeout(struct net_device *netdev)
  313. {
  314. struct atl1c_adapter *adapter = netdev_priv(netdev);
  315. /* Do the reset outside of interrupt context */
  316. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  317. schedule_work(&adapter->common_task);
  318. }
  319. /*
  320. * atl1c_set_multi - Multicast and Promiscuous mode set
  321. * @netdev: network interface device structure
  322. *
  323. * The set_multi entry point is called whenever the multicast address
  324. * list or the network interface flags are updated. This routine is
  325. * responsible for configuring the hardware for proper multicast,
  326. * promiscuous mode, and all-multi behavior.
  327. */
  328. static void atl1c_set_multi(struct net_device *netdev)
  329. {
  330. struct atl1c_adapter *adapter = netdev_priv(netdev);
  331. struct atl1c_hw *hw = &adapter->hw;
  332. struct netdev_hw_addr *ha;
  333. u32 mac_ctrl_data;
  334. u32 hash_value;
  335. /* Check for Promiscuous and All Multicast modes */
  336. AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
  337. if (netdev->flags & IFF_PROMISC) {
  338. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  339. } else if (netdev->flags & IFF_ALLMULTI) {
  340. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  341. mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
  342. } else {
  343. mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  344. }
  345. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  346. /* clear the old settings from the multicast hash table */
  347. AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
  348. AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
  349. /* comoute mc addresses' hash value ,and put it into hash table */
  350. netdev_for_each_mc_addr(ha, netdev) {
  351. hash_value = atl1c_hash_mc_addr(hw, ha->addr);
  352. atl1c_hash_set(hw, hash_value);
  353. }
  354. }
  355. static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
  356. {
  357. if (features & NETIF_F_HW_VLAN_RX) {
  358. /* enable VLAN tag insert/strip */
  359. *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  360. } else {
  361. /* disable VLAN tag insert/strip */
  362. *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
  363. }
  364. }
  365. static void atl1c_vlan_mode(struct net_device *netdev,
  366. netdev_features_t features)
  367. {
  368. struct atl1c_adapter *adapter = netdev_priv(netdev);
  369. struct pci_dev *pdev = adapter->pdev;
  370. u32 mac_ctrl_data = 0;
  371. if (netif_msg_pktdata(adapter))
  372. dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
  373. atl1c_irq_disable(adapter);
  374. AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
  375. __atl1c_vlan_mode(features, &mac_ctrl_data);
  376. AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
  377. atl1c_irq_enable(adapter);
  378. }
  379. static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
  380. {
  381. struct pci_dev *pdev = adapter->pdev;
  382. if (netif_msg_pktdata(adapter))
  383. dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
  384. atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
  385. }
  386. /*
  387. * atl1c_set_mac - Change the Ethernet Address of the NIC
  388. * @netdev: network interface device structure
  389. * @p: pointer to an address structure
  390. *
  391. * Returns 0 on success, negative on failure
  392. */
  393. static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
  394. {
  395. struct atl1c_adapter *adapter = netdev_priv(netdev);
  396. struct sockaddr *addr = p;
  397. if (!is_valid_ether_addr(addr->sa_data))
  398. return -EADDRNOTAVAIL;
  399. if (netif_running(netdev))
  400. return -EBUSY;
  401. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  402. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  403. netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
  404. atl1c_hw_set_mac_addr(&adapter->hw);
  405. return 0;
  406. }
  407. static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
  408. struct net_device *dev)
  409. {
  410. int mtu = dev->mtu;
  411. adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
  412. roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
  413. }
  414. static netdev_features_t atl1c_fix_features(struct net_device *netdev,
  415. netdev_features_t features)
  416. {
  417. /*
  418. * Since there is no support for separate rx/tx vlan accel
  419. * enable/disable make sure tx flag is always in same state as rx.
  420. */
  421. if (features & NETIF_F_HW_VLAN_RX)
  422. features |= NETIF_F_HW_VLAN_TX;
  423. else
  424. features &= ~NETIF_F_HW_VLAN_TX;
  425. if (netdev->mtu > MAX_TSO_FRAME_SIZE)
  426. features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  427. return features;
  428. }
  429. static int atl1c_set_features(struct net_device *netdev,
  430. netdev_features_t features)
  431. {
  432. netdev_features_t changed = netdev->features ^ features;
  433. if (changed & NETIF_F_HW_VLAN_RX)
  434. atl1c_vlan_mode(netdev, features);
  435. return 0;
  436. }
  437. /*
  438. * atl1c_change_mtu - Change the Maximum Transfer Unit
  439. * @netdev: network interface device structure
  440. * @new_mtu: new value for maximum frame size
  441. *
  442. * Returns 0 on success, negative on failure
  443. */
  444. static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
  445. {
  446. struct atl1c_adapter *adapter = netdev_priv(netdev);
  447. struct atl1c_hw *hw = &adapter->hw;
  448. int old_mtu = netdev->mtu;
  449. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  450. /* Fast Ethernet controller doesn't support jumbo packet */
  451. if (((hw->nic_type == athr_l2c ||
  452. hw->nic_type == athr_l2c_b ||
  453. hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) ||
  454. max_frame < ETH_ZLEN + ETH_FCS_LEN ||
  455. max_frame > MAX_JUMBO_FRAME_SIZE) {
  456. if (netif_msg_link(adapter))
  457. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  458. return -EINVAL;
  459. }
  460. /* set MTU */
  461. if (old_mtu != new_mtu && netif_running(netdev)) {
  462. while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
  463. msleep(1);
  464. netdev->mtu = new_mtu;
  465. adapter->hw.max_frame_size = new_mtu;
  466. atl1c_set_rxbufsize(adapter, netdev);
  467. atl1c_down(adapter);
  468. netdev_update_features(netdev);
  469. atl1c_up(adapter);
  470. clear_bit(__AT_RESETTING, &adapter->flags);
  471. if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
  472. u32 phy_data;
  473. AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
  474. phy_data |= 0x10000000;
  475. AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
  476. }
  477. }
  478. return 0;
  479. }
  480. /*
  481. * caller should hold mdio_lock
  482. */
  483. static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  484. {
  485. struct atl1c_adapter *adapter = netdev_priv(netdev);
  486. u16 result;
  487. atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
  488. return result;
  489. }
  490. static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
  491. int reg_num, int val)
  492. {
  493. struct atl1c_adapter *adapter = netdev_priv(netdev);
  494. atl1c_write_phy_reg(&adapter->hw, reg_num, val);
  495. }
  496. /*
  497. * atl1c_mii_ioctl -
  498. * @netdev:
  499. * @ifreq:
  500. * @cmd:
  501. */
  502. static int atl1c_mii_ioctl(struct net_device *netdev,
  503. struct ifreq *ifr, int cmd)
  504. {
  505. struct atl1c_adapter *adapter = netdev_priv(netdev);
  506. struct pci_dev *pdev = adapter->pdev;
  507. struct mii_ioctl_data *data = if_mii(ifr);
  508. unsigned long flags;
  509. int retval = 0;
  510. if (!netif_running(netdev))
  511. return -EINVAL;
  512. spin_lock_irqsave(&adapter->mdio_lock, flags);
  513. switch (cmd) {
  514. case SIOCGMIIPHY:
  515. data->phy_id = 0;
  516. break;
  517. case SIOCGMIIREG:
  518. if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  519. &data->val_out)) {
  520. retval = -EIO;
  521. goto out;
  522. }
  523. break;
  524. case SIOCSMIIREG:
  525. if (data->reg_num & ~(0x1F)) {
  526. retval = -EFAULT;
  527. goto out;
  528. }
  529. dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
  530. data->reg_num, data->val_in);
  531. if (atl1c_write_phy_reg(&adapter->hw,
  532. data->reg_num, data->val_in)) {
  533. retval = -EIO;
  534. goto out;
  535. }
  536. break;
  537. default:
  538. retval = -EOPNOTSUPP;
  539. break;
  540. }
  541. out:
  542. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  543. return retval;
  544. }
  545. /*
  546. * atl1c_ioctl -
  547. * @netdev:
  548. * @ifreq:
  549. * @cmd:
  550. */
  551. static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  552. {
  553. switch (cmd) {
  554. case SIOCGMIIPHY:
  555. case SIOCGMIIREG:
  556. case SIOCSMIIREG:
  557. return atl1c_mii_ioctl(netdev, ifr, cmd);
  558. default:
  559. return -EOPNOTSUPP;
  560. }
  561. }
  562. /*
  563. * atl1c_alloc_queues - Allocate memory for all rings
  564. * @adapter: board private structure to initialize
  565. *
  566. */
  567. static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
  568. {
  569. return 0;
  570. }
  571. static void atl1c_set_mac_type(struct atl1c_hw *hw)
  572. {
  573. switch (hw->device_id) {
  574. case PCI_DEVICE_ID_ATTANSIC_L2C:
  575. hw->nic_type = athr_l2c;
  576. break;
  577. case PCI_DEVICE_ID_ATTANSIC_L1C:
  578. hw->nic_type = athr_l1c;
  579. break;
  580. case PCI_DEVICE_ID_ATHEROS_L2C_B:
  581. hw->nic_type = athr_l2c_b;
  582. break;
  583. case PCI_DEVICE_ID_ATHEROS_L2C_B2:
  584. hw->nic_type = athr_l2c_b2;
  585. break;
  586. case PCI_DEVICE_ID_ATHEROS_L1D:
  587. hw->nic_type = athr_l1d;
  588. break;
  589. case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
  590. hw->nic_type = athr_l1d_2;
  591. break;
  592. default:
  593. break;
  594. }
  595. }
  596. static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
  597. {
  598. u32 link_ctrl_data;
  599. atl1c_set_mac_type(hw);
  600. AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
  601. hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
  602. ATL1C_TXQ_MODE_ENHANCE;
  603. hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
  604. ATL1C_ASPM_L1_SUPPORT;
  605. hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
  606. if (hw->nic_type == athr_l1c ||
  607. hw->nic_type == athr_l1d ||
  608. hw->nic_type == athr_l1d_2)
  609. hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
  610. return 0;
  611. }
  612. /*
  613. * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
  614. * @adapter: board private structure to initialize
  615. *
  616. * atl1c_sw_init initializes the Adapter private data structure.
  617. * Fields are initialized based on PCI device information and
  618. * OS network device settings (MTU size).
  619. */
  620. static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
  621. {
  622. struct atl1c_hw *hw = &adapter->hw;
  623. struct pci_dev *pdev = adapter->pdev;
  624. u32 revision;
  625. adapter->wol = 0;
  626. device_set_wakeup_enable(&pdev->dev, false);
  627. adapter->link_speed = SPEED_0;
  628. adapter->link_duplex = FULL_DUPLEX;
  629. adapter->tpd_ring[0].count = 1024;
  630. adapter->rfd_ring.count = 512;
  631. hw->vendor_id = pdev->vendor;
  632. hw->device_id = pdev->device;
  633. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  634. hw->subsystem_id = pdev->subsystem_device;
  635. AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
  636. hw->revision_id = revision & 0xFF;
  637. /* before link up, we assume hibernate is true */
  638. hw->hibernate = true;
  639. hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
  640. if (atl1c_setup_mac_funcs(hw) != 0) {
  641. dev_err(&pdev->dev, "set mac function pointers failed\n");
  642. return -1;
  643. }
  644. hw->intr_mask = IMR_NORMAL_MASK;
  645. hw->phy_configured = false;
  646. hw->preamble_len = 7;
  647. hw->max_frame_size = adapter->netdev->mtu;
  648. hw->autoneg_advertised = ADVERTISED_Autoneg;
  649. hw->indirect_tab = 0xE4E4E4E4;
  650. hw->base_cpu = 0;
  651. hw->ict = 50000; /* 100ms */
  652. hw->smb_timer = 200000; /* 400ms */
  653. hw->rx_imt = 200;
  654. hw->tx_imt = 1000;
  655. hw->tpd_burst = 5;
  656. hw->rfd_burst = 8;
  657. hw->dma_order = atl1c_dma_ord_out;
  658. hw->dmar_block = atl1c_dma_req_1024;
  659. if (atl1c_alloc_queues(adapter)) {
  660. dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
  661. return -ENOMEM;
  662. }
  663. /* TODO */
  664. atl1c_set_rxbufsize(adapter, adapter->netdev);
  665. atomic_set(&adapter->irq_sem, 1);
  666. spin_lock_init(&adapter->mdio_lock);
  667. spin_lock_init(&adapter->tx_lock);
  668. set_bit(__AT_DOWN, &adapter->flags);
  669. return 0;
  670. }
  671. static inline void atl1c_clean_buffer(struct pci_dev *pdev,
  672. struct atl1c_buffer *buffer_info, int in_irq)
  673. {
  674. u16 pci_driection;
  675. if (buffer_info->flags & ATL1C_BUFFER_FREE)
  676. return;
  677. if (buffer_info->dma) {
  678. if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
  679. pci_driection = PCI_DMA_FROMDEVICE;
  680. else
  681. pci_driection = PCI_DMA_TODEVICE;
  682. if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
  683. pci_unmap_single(pdev, buffer_info->dma,
  684. buffer_info->length, pci_driection);
  685. else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
  686. pci_unmap_page(pdev, buffer_info->dma,
  687. buffer_info->length, pci_driection);
  688. }
  689. if (buffer_info->skb) {
  690. if (in_irq)
  691. dev_kfree_skb_irq(buffer_info->skb);
  692. else
  693. dev_kfree_skb(buffer_info->skb);
  694. }
  695. buffer_info->dma = 0;
  696. buffer_info->skb = NULL;
  697. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  698. }
  699. /*
  700. * atl1c_clean_tx_ring - Free Tx-skb
  701. * @adapter: board private structure
  702. */
  703. static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
  704. enum atl1c_trans_queue type)
  705. {
  706. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  707. struct atl1c_buffer *buffer_info;
  708. struct pci_dev *pdev = adapter->pdev;
  709. u16 index, ring_count;
  710. ring_count = tpd_ring->count;
  711. for (index = 0; index < ring_count; index++) {
  712. buffer_info = &tpd_ring->buffer_info[index];
  713. atl1c_clean_buffer(pdev, buffer_info, 0);
  714. }
  715. /* Zero out Tx-buffers */
  716. memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
  717. ring_count);
  718. atomic_set(&tpd_ring->next_to_clean, 0);
  719. tpd_ring->next_to_use = 0;
  720. }
  721. /*
  722. * atl1c_clean_rx_ring - Free rx-reservation skbs
  723. * @adapter: board private structure
  724. */
  725. static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
  726. {
  727. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  728. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  729. struct atl1c_buffer *buffer_info;
  730. struct pci_dev *pdev = adapter->pdev;
  731. int j;
  732. for (j = 0; j < rfd_ring->count; j++) {
  733. buffer_info = &rfd_ring->buffer_info[j];
  734. atl1c_clean_buffer(pdev, buffer_info, 0);
  735. }
  736. /* zero out the descriptor ring */
  737. memset(rfd_ring->desc, 0, rfd_ring->size);
  738. rfd_ring->next_to_clean = 0;
  739. rfd_ring->next_to_use = 0;
  740. rrd_ring->next_to_use = 0;
  741. rrd_ring->next_to_clean = 0;
  742. }
  743. /*
  744. * Read / Write Ptr Initialize:
  745. */
  746. static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
  747. {
  748. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  749. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  750. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  751. struct atl1c_buffer *buffer_info;
  752. int i, j;
  753. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  754. tpd_ring[i].next_to_use = 0;
  755. atomic_set(&tpd_ring[i].next_to_clean, 0);
  756. buffer_info = tpd_ring[i].buffer_info;
  757. for (j = 0; j < tpd_ring->count; j++)
  758. ATL1C_SET_BUFFER_STATE(&buffer_info[i],
  759. ATL1C_BUFFER_FREE);
  760. }
  761. rfd_ring->next_to_use = 0;
  762. rfd_ring->next_to_clean = 0;
  763. rrd_ring->next_to_use = 0;
  764. rrd_ring->next_to_clean = 0;
  765. for (j = 0; j < rfd_ring->count; j++) {
  766. buffer_info = &rfd_ring->buffer_info[j];
  767. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  768. }
  769. }
  770. /*
  771. * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
  772. * @adapter: board private structure
  773. *
  774. * Free all transmit software resources
  775. */
  776. static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
  777. {
  778. struct pci_dev *pdev = adapter->pdev;
  779. pci_free_consistent(pdev, adapter->ring_header.size,
  780. adapter->ring_header.desc,
  781. adapter->ring_header.dma);
  782. adapter->ring_header.desc = NULL;
  783. /* Note: just free tdp_ring.buffer_info,
  784. * it contain rfd_ring.buffer_info, do not double free */
  785. if (adapter->tpd_ring[0].buffer_info) {
  786. kfree(adapter->tpd_ring[0].buffer_info);
  787. adapter->tpd_ring[0].buffer_info = NULL;
  788. }
  789. }
  790. /*
  791. * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
  792. * @adapter: board private structure
  793. *
  794. * Return 0 on success, negative on failure
  795. */
  796. static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
  797. {
  798. struct pci_dev *pdev = adapter->pdev;
  799. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  800. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  801. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  802. struct atl1c_ring_header *ring_header = &adapter->ring_header;
  803. int size;
  804. int i;
  805. int count = 0;
  806. int rx_desc_count = 0;
  807. u32 offset = 0;
  808. rrd_ring->count = rfd_ring->count;
  809. for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
  810. tpd_ring[i].count = tpd_ring[0].count;
  811. /* 2 tpd queue, one high priority queue,
  812. * another normal priority queue */
  813. size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
  814. rfd_ring->count);
  815. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  816. if (unlikely(!tpd_ring->buffer_info)) {
  817. dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
  818. size);
  819. goto err_nomem;
  820. }
  821. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  822. tpd_ring[i].buffer_info =
  823. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  824. count += tpd_ring[i].count;
  825. }
  826. rfd_ring->buffer_info =
  827. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  828. count += rfd_ring->count;
  829. rx_desc_count += rfd_ring->count;
  830. /*
  831. * real ring DMA buffer
  832. * each ring/block may need up to 8 bytes for alignment, hence the
  833. * additional bytes tacked onto the end.
  834. */
  835. ring_header->size = size =
  836. sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
  837. sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
  838. sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
  839. 8 * 4;
  840. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  841. &ring_header->dma);
  842. if (unlikely(!ring_header->desc)) {
  843. dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
  844. goto err_nomem;
  845. }
  846. memset(ring_header->desc, 0, ring_header->size);
  847. /* init TPD ring */
  848. tpd_ring[0].dma = roundup(ring_header->dma, 8);
  849. offset = tpd_ring[0].dma - ring_header->dma;
  850. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  851. tpd_ring[i].dma = ring_header->dma + offset;
  852. tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
  853. tpd_ring[i].size =
  854. sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
  855. offset += roundup(tpd_ring[i].size, 8);
  856. }
  857. /* init RFD ring */
  858. rfd_ring->dma = ring_header->dma + offset;
  859. rfd_ring->desc = (u8 *) ring_header->desc + offset;
  860. rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
  861. offset += roundup(rfd_ring->size, 8);
  862. /* init RRD ring */
  863. rrd_ring->dma = ring_header->dma + offset;
  864. rrd_ring->desc = (u8 *) ring_header->desc + offset;
  865. rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
  866. rrd_ring->count;
  867. offset += roundup(rrd_ring->size, 8);
  868. return 0;
  869. err_nomem:
  870. kfree(tpd_ring->buffer_info);
  871. return -ENOMEM;
  872. }
  873. static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
  874. {
  875. struct atl1c_hw *hw = &adapter->hw;
  876. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  877. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  878. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  879. adapter->tpd_ring;
  880. /* TPD */
  881. AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
  882. (u32)((tpd_ring[atl1c_trans_normal].dma &
  883. AT_DMA_HI_ADDR_MASK) >> 32));
  884. /* just enable normal priority TX queue */
  885. AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
  886. (u32)(tpd_ring[atl1c_trans_normal].dma &
  887. AT_DMA_LO_ADDR_MASK));
  888. AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
  889. (u32)(tpd_ring[atl1c_trans_high].dma &
  890. AT_DMA_LO_ADDR_MASK));
  891. AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
  892. (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
  893. /* RFD */
  894. AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
  895. (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
  896. AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
  897. (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
  898. AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
  899. rfd_ring->count & RFD_RING_SIZE_MASK);
  900. AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
  901. adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
  902. /* RRD */
  903. AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
  904. (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
  905. AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
  906. (rrd_ring->count & RRD_RING_SIZE_MASK));
  907. if (hw->nic_type == athr_l2c_b) {
  908. AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
  909. AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
  910. AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
  911. AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
  912. AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
  913. AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
  914. AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
  915. AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
  916. }
  917. /* Load all of base address above */
  918. AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
  919. }
  920. static void atl1c_configure_tx(struct atl1c_adapter *adapter)
  921. {
  922. struct atl1c_hw *hw = &adapter->hw;
  923. int max_pay_load;
  924. u16 tx_offload_thresh;
  925. u32 txq_ctrl_data;
  926. tx_offload_thresh = MAX_TSO_FRAME_SIZE;
  927. AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
  928. (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
  929. max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
  930. hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
  931. /*
  932. * if BIOS had changed the dam-read-max-length to an invalid value,
  933. * restore it to default value
  934. */
  935. if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
  936. pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
  937. hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
  938. }
  939. txq_ctrl_data =
  940. hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
  941. L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
  942. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
  943. }
  944. static void atl1c_configure_rx(struct atl1c_adapter *adapter)
  945. {
  946. struct atl1c_hw *hw = &adapter->hw;
  947. u32 rxq_ctrl_data;
  948. rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
  949. RXQ_RFD_BURST_NUM_SHIFT;
  950. if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
  951. rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
  952. /* aspm for gigabit */
  953. if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
  954. rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
  955. ASPM_THRUPUT_LIMIT_100M);
  956. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
  957. }
  958. static void atl1c_configure_dma(struct atl1c_adapter *adapter)
  959. {
  960. struct atl1c_hw *hw = &adapter->hw;
  961. u32 dma_ctrl_data;
  962. dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
  963. DMA_CTRL_RREQ_PRI_DATA |
  964. FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
  965. FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
  966. FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
  967. AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
  968. }
  969. /*
  970. * Stop the mac, transmit and receive units
  971. * hw - Struct containing variables accessed by shared code
  972. * return : 0 or idle status (if error)
  973. */
  974. static int atl1c_stop_mac(struct atl1c_hw *hw)
  975. {
  976. u32 data;
  977. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  978. data &= ~RXQ_CTRL_EN;
  979. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  980. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  981. data &= ~TXQ_CTRL_EN;
  982. AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
  983. atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
  984. AT_READ_REG(hw, REG_MAC_CTRL, &data);
  985. data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
  986. AT_WRITE_REG(hw, REG_MAC_CTRL, data);
  987. return (int)atl1c_wait_until_idle(hw,
  988. IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
  989. }
  990. static void atl1c_start_mac(struct atl1c_adapter *adapter)
  991. {
  992. struct atl1c_hw *hw = &adapter->hw;
  993. u32 mac, txq, rxq;
  994. hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false;
  995. hw->mac_speed = adapter->link_speed == SPEED_1000 ?
  996. atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
  997. AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
  998. AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
  999. AT_READ_REG(hw, REG_MAC_CTRL, &mac);
  1000. txq |= TXQ_CTRL_EN;
  1001. rxq |= RXQ_CTRL_EN;
  1002. mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
  1003. MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
  1004. MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
  1005. MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
  1006. MAC_CTRL_HASH_ALG_CRC32;
  1007. if (hw->mac_duplex)
  1008. mac |= MAC_CTRL_DUPLX;
  1009. else
  1010. mac &= ~MAC_CTRL_DUPLX;
  1011. mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
  1012. mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
  1013. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
  1014. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
  1015. AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
  1016. }
  1017. /*
  1018. * Reset the transmit and receive units; mask and clear all interrupts.
  1019. * hw - Struct containing variables accessed by shared code
  1020. * return : 0 or idle status (if error)
  1021. */
  1022. static int atl1c_reset_mac(struct atl1c_hw *hw)
  1023. {
  1024. struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
  1025. struct pci_dev *pdev = adapter->pdev;
  1026. u32 ctrl_data = 0;
  1027. AT_WRITE_REG(hw, REG_IMR, 0);
  1028. AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
  1029. atl1c_stop_mac(hw);
  1030. /*
  1031. * Issue Soft Reset to the MAC. This will reset the chip's
  1032. * transmit, receive, DMA. It will not effect
  1033. * the current PCI configuration. The global reset bit is self-
  1034. * clearing, and should clear within a microsecond.
  1035. */
  1036. AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
  1037. ctrl_data |= MASTER_CTRL_OOB_DIS;
  1038. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
  1039. AT_WRITE_FLUSH(hw);
  1040. msleep(10);
  1041. /* Wait at least 10ms for All module to be Idle */
  1042. if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
  1043. dev_err(&pdev->dev,
  1044. "MAC state machine can't be idle since"
  1045. " disabled for 10ms second\n");
  1046. return -1;
  1047. }
  1048. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
  1049. /* driver control speed/duplex */
  1050. AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
  1051. AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
  1052. /* clk switch setting */
  1053. AT_READ_REG(hw, REG_SERDES, &ctrl_data);
  1054. switch (hw->nic_type) {
  1055. case athr_l2c_b:
  1056. ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
  1057. SERDES_MAC_CLK_SLOWDOWN);
  1058. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1059. break;
  1060. case athr_l2c_b2:
  1061. case athr_l1d_2:
  1062. ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
  1063. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1064. break;
  1065. default:
  1066. break;
  1067. }
  1068. return 0;
  1069. }
  1070. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
  1071. {
  1072. u16 ctrl_flags = hw->ctrl_flags;
  1073. hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
  1074. atl1c_set_aspm(hw, SPEED_0);
  1075. hw->ctrl_flags = ctrl_flags;
  1076. }
  1077. /*
  1078. * Set ASPM state.
  1079. * Enable/disable L0s/L1 depend on link state.
  1080. */
  1081. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
  1082. {
  1083. u32 pm_ctrl_data;
  1084. u32 link_l1_timer;
  1085. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1086. pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
  1087. PM_CTRL_ASPM_L0S_EN |
  1088. PM_CTRL_MAC_ASPM_CHK);
  1089. /* L1 timer */
  1090. if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1091. pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
  1092. link_l1_timer =
  1093. link_speed == SPEED_1000 || link_speed == SPEED_100 ?
  1094. L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
  1095. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1096. L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
  1097. } else {
  1098. link_l1_timer = hw->nic_type == athr_l2c_b ?
  1099. L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
  1100. if (link_speed != SPEED_1000 && link_speed != SPEED_100)
  1101. link_l1_timer = 1;
  1102. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1103. PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
  1104. }
  1105. /* L0S/L1 enable */
  1106. if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
  1107. pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
  1108. if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
  1109. pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
  1110. /* l2cb & l1d & l2cb2 & l1d2 */
  1111. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
  1112. hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1113. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1114. PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
  1115. pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
  1116. PM_CTRL_SERDES_PD_EX_L1 |
  1117. PM_CTRL_CLK_SWH_L1;
  1118. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1119. PM_CTRL_SERDES_PLL_L1_EN |
  1120. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1121. PM_CTRL_SA_DLY_EN |
  1122. PM_CTRL_HOTRST);
  1123. /* disable l0s if link down or l2cb */
  1124. if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
  1125. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1126. } else { /* l1c */
  1127. pm_ctrl_data =
  1128. FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
  1129. if (link_speed != SPEED_0) {
  1130. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
  1131. PM_CTRL_SERDES_PLL_L1_EN |
  1132. PM_CTRL_SERDES_BUFS_RX_L1_EN;
  1133. pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
  1134. PM_CTRL_CLK_SWH_L1 |
  1135. PM_CTRL_ASPM_L0S_EN |
  1136. PM_CTRL_ASPM_L1_EN);
  1137. } else { /* link down */
  1138. pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
  1139. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1140. PM_CTRL_SERDES_PLL_L1_EN |
  1141. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1142. PM_CTRL_ASPM_L0S_EN);
  1143. }
  1144. }
  1145. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1146. return;
  1147. }
  1148. /*
  1149. * atl1c_configure - Configure Transmit&Receive Unit after Reset
  1150. * @adapter: board private structure
  1151. *
  1152. * Configure the Tx /Rx unit of the MAC after a reset.
  1153. */
  1154. static int atl1c_configure(struct atl1c_adapter *adapter)
  1155. {
  1156. struct atl1c_hw *hw = &adapter->hw;
  1157. u32 master_ctrl_data = 0;
  1158. u32 intr_modrt_data;
  1159. u32 data;
  1160. AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
  1161. master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
  1162. MASTER_CTRL_RX_ITIMER_EN |
  1163. MASTER_CTRL_INT_RDCLR);
  1164. /* clear interrupt status */
  1165. AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
  1166. /* Clear any WOL status */
  1167. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  1168. /* set Interrupt Clear Timer
  1169. * HW will enable self to assert interrupt event to system after
  1170. * waiting x-time for software to notify it accept interrupt.
  1171. */
  1172. data = CLK_GATING_EN_ALL;
  1173. if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
  1174. if (hw->nic_type == athr_l2c_b)
  1175. data &= ~CLK_GATING_RXMAC_EN;
  1176. } else
  1177. data = 0;
  1178. AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
  1179. AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
  1180. hw->ict & INT_RETRIG_TIMER_MASK);
  1181. atl1c_configure_des_ring(adapter);
  1182. if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
  1183. intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
  1184. IRQ_MODRT_TX_TIMER_SHIFT;
  1185. intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
  1186. IRQ_MODRT_RX_TIMER_SHIFT;
  1187. AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
  1188. master_ctrl_data |=
  1189. MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
  1190. }
  1191. if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
  1192. master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
  1193. master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
  1194. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  1195. AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
  1196. hw->smb_timer & SMB_STAT_TIMER_MASK);
  1197. /* set MTU */
  1198. AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
  1199. VLAN_HLEN + ETH_FCS_LEN);
  1200. atl1c_configure_tx(adapter);
  1201. atl1c_configure_rx(adapter);
  1202. atl1c_configure_dma(adapter);
  1203. return 0;
  1204. }
  1205. static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
  1206. {
  1207. u16 hw_reg_addr = 0;
  1208. unsigned long *stats_item = NULL;
  1209. u32 data;
  1210. /* update rx status */
  1211. hw_reg_addr = REG_MAC_RX_STATUS_BIN;
  1212. stats_item = &adapter->hw_stats.rx_ok;
  1213. while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
  1214. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1215. *stats_item += data;
  1216. stats_item++;
  1217. hw_reg_addr += 4;
  1218. }
  1219. /* update tx status */
  1220. hw_reg_addr = REG_MAC_TX_STATUS_BIN;
  1221. stats_item = &adapter->hw_stats.tx_ok;
  1222. while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
  1223. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1224. *stats_item += data;
  1225. stats_item++;
  1226. hw_reg_addr += 4;
  1227. }
  1228. }
  1229. /*
  1230. * atl1c_get_stats - Get System Network Statistics
  1231. * @netdev: network interface device structure
  1232. *
  1233. * Returns the address of the device statistics structure.
  1234. * The statistics are actually updated from the timer callback.
  1235. */
  1236. static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
  1237. {
  1238. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1239. struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
  1240. struct net_device_stats *net_stats = &netdev->stats;
  1241. atl1c_update_hw_stats(adapter);
  1242. net_stats->rx_packets = hw_stats->rx_ok;
  1243. net_stats->tx_packets = hw_stats->tx_ok;
  1244. net_stats->rx_bytes = hw_stats->rx_byte_cnt;
  1245. net_stats->tx_bytes = hw_stats->tx_byte_cnt;
  1246. net_stats->multicast = hw_stats->rx_mcast;
  1247. net_stats->collisions = hw_stats->tx_1_col +
  1248. hw_stats->tx_2_col * 2 +
  1249. hw_stats->tx_late_col + hw_stats->tx_abort_col;
  1250. net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
  1251. hw_stats->rx_len_err + hw_stats->rx_sz_ov +
  1252. hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
  1253. net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
  1254. net_stats->rx_length_errors = hw_stats->rx_len_err;
  1255. net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
  1256. net_stats->rx_frame_errors = hw_stats->rx_align_err;
  1257. net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1258. net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1259. net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
  1260. hw_stats->tx_underrun + hw_stats->tx_trunc;
  1261. net_stats->tx_fifo_errors = hw_stats->tx_underrun;
  1262. net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
  1263. net_stats->tx_window_errors = hw_stats->tx_late_col;
  1264. return net_stats;
  1265. }
  1266. static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
  1267. {
  1268. u16 phy_data;
  1269. spin_lock(&adapter->mdio_lock);
  1270. atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
  1271. spin_unlock(&adapter->mdio_lock);
  1272. }
  1273. static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
  1274. enum atl1c_trans_queue type)
  1275. {
  1276. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  1277. &adapter->tpd_ring[type];
  1278. struct atl1c_buffer *buffer_info;
  1279. struct pci_dev *pdev = adapter->pdev;
  1280. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1281. u16 hw_next_to_clean;
  1282. u16 reg;
  1283. reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
  1284. AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
  1285. while (next_to_clean != hw_next_to_clean) {
  1286. buffer_info = &tpd_ring->buffer_info[next_to_clean];
  1287. atl1c_clean_buffer(pdev, buffer_info, 1);
  1288. if (++next_to_clean == tpd_ring->count)
  1289. next_to_clean = 0;
  1290. atomic_set(&tpd_ring->next_to_clean, next_to_clean);
  1291. }
  1292. if (netif_queue_stopped(adapter->netdev) &&
  1293. netif_carrier_ok(adapter->netdev)) {
  1294. netif_wake_queue(adapter->netdev);
  1295. }
  1296. return true;
  1297. }
  1298. /*
  1299. * atl1c_intr - Interrupt Handler
  1300. * @irq: interrupt number
  1301. * @data: pointer to a network interface device structure
  1302. * @pt_regs: CPU registers structure
  1303. */
  1304. static irqreturn_t atl1c_intr(int irq, void *data)
  1305. {
  1306. struct net_device *netdev = data;
  1307. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1308. struct pci_dev *pdev = adapter->pdev;
  1309. struct atl1c_hw *hw = &adapter->hw;
  1310. int max_ints = AT_MAX_INT_WORK;
  1311. int handled = IRQ_NONE;
  1312. u32 status;
  1313. u32 reg_data;
  1314. do {
  1315. AT_READ_REG(hw, REG_ISR, &reg_data);
  1316. status = reg_data & hw->intr_mask;
  1317. if (status == 0 || (status & ISR_DIS_INT) != 0) {
  1318. if (max_ints != AT_MAX_INT_WORK)
  1319. handled = IRQ_HANDLED;
  1320. break;
  1321. }
  1322. /* link event */
  1323. if (status & ISR_GPHY)
  1324. atl1c_clear_phy_int(adapter);
  1325. /* Ack ISR */
  1326. AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
  1327. if (status & ISR_RX_PKT) {
  1328. if (likely(napi_schedule_prep(&adapter->napi))) {
  1329. hw->intr_mask &= ~ISR_RX_PKT;
  1330. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1331. __napi_schedule(&adapter->napi);
  1332. }
  1333. }
  1334. if (status & ISR_TX_PKT)
  1335. atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
  1336. handled = IRQ_HANDLED;
  1337. /* check if PCIE PHY Link down */
  1338. if (status & ISR_ERROR) {
  1339. if (netif_msg_hw(adapter))
  1340. dev_err(&pdev->dev,
  1341. "atl1c hardware error (status = 0x%x)\n",
  1342. status & ISR_ERROR);
  1343. /* reset MAC */
  1344. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  1345. schedule_work(&adapter->common_task);
  1346. return IRQ_HANDLED;
  1347. }
  1348. if (status & ISR_OVER)
  1349. if (netif_msg_intr(adapter))
  1350. dev_warn(&pdev->dev,
  1351. "TX/RX overflow (status = 0x%x)\n",
  1352. status & ISR_OVER);
  1353. /* link event */
  1354. if (status & (ISR_GPHY | ISR_MANUAL)) {
  1355. netdev->stats.tx_carrier_errors++;
  1356. atl1c_link_chg_event(adapter);
  1357. break;
  1358. }
  1359. } while (--max_ints > 0);
  1360. /* re-enable Interrupt*/
  1361. AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
  1362. return handled;
  1363. }
  1364. static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
  1365. struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
  1366. {
  1367. /*
  1368. * The pid field in RRS in not correct sometimes, so we
  1369. * cannot figure out if the packet is fragmented or not,
  1370. * so we tell the KERNEL CHECKSUM_NONE
  1371. */
  1372. skb_checksum_none_assert(skb);
  1373. }
  1374. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
  1375. {
  1376. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1377. struct pci_dev *pdev = adapter->pdev;
  1378. struct atl1c_buffer *buffer_info, *next_info;
  1379. struct sk_buff *skb;
  1380. void *vir_addr = NULL;
  1381. u16 num_alloc = 0;
  1382. u16 rfd_next_to_use, next_next;
  1383. struct atl1c_rx_free_desc *rfd_desc;
  1384. next_next = rfd_next_to_use = rfd_ring->next_to_use;
  1385. if (++next_next == rfd_ring->count)
  1386. next_next = 0;
  1387. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1388. next_info = &rfd_ring->buffer_info[next_next];
  1389. while (next_info->flags & ATL1C_BUFFER_FREE) {
  1390. rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  1391. skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
  1392. if (unlikely(!skb)) {
  1393. if (netif_msg_rx_err(adapter))
  1394. dev_warn(&pdev->dev, "alloc rx buffer failed\n");
  1395. break;
  1396. }
  1397. /*
  1398. * Make buffer alignment 2 beyond a 16 byte boundary
  1399. * this will result in a 16 byte aligned IP header after
  1400. * the 14 byte MAC header is removed
  1401. */
  1402. vir_addr = skb->data;
  1403. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1404. buffer_info->skb = skb;
  1405. buffer_info->length = adapter->rx_buffer_len;
  1406. buffer_info->dma = pci_map_single(pdev, vir_addr,
  1407. buffer_info->length,
  1408. PCI_DMA_FROMDEVICE);
  1409. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1410. ATL1C_PCIMAP_FROMDEVICE);
  1411. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1412. rfd_next_to_use = next_next;
  1413. if (++next_next == rfd_ring->count)
  1414. next_next = 0;
  1415. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1416. next_info = &rfd_ring->buffer_info[next_next];
  1417. num_alloc++;
  1418. }
  1419. if (num_alloc) {
  1420. /* TODO: update mailbox here */
  1421. wmb();
  1422. rfd_ring->next_to_use = rfd_next_to_use;
  1423. AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
  1424. rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
  1425. }
  1426. return num_alloc;
  1427. }
  1428. static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
  1429. struct atl1c_recv_ret_status *rrs, u16 num)
  1430. {
  1431. u16 i;
  1432. /* the relationship between rrd and rfd is one map one */
  1433. for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
  1434. rrd_ring->next_to_clean)) {
  1435. rrs->word3 &= ~RRS_RXD_UPDATED;
  1436. if (++rrd_ring->next_to_clean == rrd_ring->count)
  1437. rrd_ring->next_to_clean = 0;
  1438. }
  1439. }
  1440. static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
  1441. struct atl1c_recv_ret_status *rrs, u16 num)
  1442. {
  1443. u16 i;
  1444. u16 rfd_index;
  1445. struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
  1446. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1447. RRS_RX_RFD_INDEX_MASK;
  1448. for (i = 0; i < num; i++) {
  1449. buffer_info[rfd_index].skb = NULL;
  1450. ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
  1451. ATL1C_BUFFER_FREE);
  1452. if (++rfd_index == rfd_ring->count)
  1453. rfd_index = 0;
  1454. }
  1455. rfd_ring->next_to_clean = rfd_index;
  1456. }
  1457. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  1458. int *work_done, int work_to_do)
  1459. {
  1460. u16 rfd_num, rfd_index;
  1461. u16 count = 0;
  1462. u16 length;
  1463. struct pci_dev *pdev = adapter->pdev;
  1464. struct net_device *netdev = adapter->netdev;
  1465. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1466. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1467. struct sk_buff *skb;
  1468. struct atl1c_recv_ret_status *rrs;
  1469. struct atl1c_buffer *buffer_info;
  1470. while (1) {
  1471. if (*work_done >= work_to_do)
  1472. break;
  1473. rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
  1474. if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
  1475. rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
  1476. RRS_RX_RFD_CNT_MASK;
  1477. if (unlikely(rfd_num != 1))
  1478. /* TODO support mul rfd*/
  1479. if (netif_msg_rx_err(adapter))
  1480. dev_warn(&pdev->dev,
  1481. "Multi rfd not support yet!\n");
  1482. goto rrs_checked;
  1483. } else {
  1484. break;
  1485. }
  1486. rrs_checked:
  1487. atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
  1488. if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
  1489. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1490. if (netif_msg_rx_err(adapter))
  1491. dev_warn(&pdev->dev,
  1492. "wrong packet! rrs word3 is %x\n",
  1493. rrs->word3);
  1494. continue;
  1495. }
  1496. length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
  1497. RRS_PKT_SIZE_MASK);
  1498. /* Good Receive */
  1499. if (likely(rfd_num == 1)) {
  1500. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1501. RRS_RX_RFD_INDEX_MASK;
  1502. buffer_info = &rfd_ring->buffer_info[rfd_index];
  1503. pci_unmap_single(pdev, buffer_info->dma,
  1504. buffer_info->length, PCI_DMA_FROMDEVICE);
  1505. skb = buffer_info->skb;
  1506. } else {
  1507. /* TODO */
  1508. if (netif_msg_rx_err(adapter))
  1509. dev_warn(&pdev->dev,
  1510. "Multi rfd not support yet!\n");
  1511. break;
  1512. }
  1513. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1514. skb_put(skb, length - ETH_FCS_LEN);
  1515. skb->protocol = eth_type_trans(skb, netdev);
  1516. atl1c_rx_checksum(adapter, skb, rrs);
  1517. if (rrs->word3 & RRS_VLAN_INS) {
  1518. u16 vlan;
  1519. AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
  1520. vlan = le16_to_cpu(vlan);
  1521. __vlan_hwaccel_put_tag(skb, vlan);
  1522. }
  1523. netif_receive_skb(skb);
  1524. (*work_done)++;
  1525. count++;
  1526. }
  1527. if (count)
  1528. atl1c_alloc_rx_buffer(adapter);
  1529. }
  1530. /*
  1531. * atl1c_clean - NAPI Rx polling callback
  1532. * @adapter: board private structure
  1533. */
  1534. static int atl1c_clean(struct napi_struct *napi, int budget)
  1535. {
  1536. struct atl1c_adapter *adapter =
  1537. container_of(napi, struct atl1c_adapter, napi);
  1538. int work_done = 0;
  1539. /* Keep link state information with original netdev */
  1540. if (!netif_carrier_ok(adapter->netdev))
  1541. goto quit_polling;
  1542. /* just enable one RXQ */
  1543. atl1c_clean_rx_irq(adapter, &work_done, budget);
  1544. if (work_done < budget) {
  1545. quit_polling:
  1546. napi_complete(napi);
  1547. adapter->hw.intr_mask |= ISR_RX_PKT;
  1548. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  1549. }
  1550. return work_done;
  1551. }
  1552. #ifdef CONFIG_NET_POLL_CONTROLLER
  1553. /*
  1554. * Polling 'interrupt' - used by things like netconsole to send skbs
  1555. * without having to re-enable interrupts. It's not called while
  1556. * the interrupt routine is executing.
  1557. */
  1558. static void atl1c_netpoll(struct net_device *netdev)
  1559. {
  1560. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1561. disable_irq(adapter->pdev->irq);
  1562. atl1c_intr(adapter->pdev->irq, netdev);
  1563. enable_irq(adapter->pdev->irq);
  1564. }
  1565. #endif
  1566. static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
  1567. {
  1568. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1569. u16 next_to_use = 0;
  1570. u16 next_to_clean = 0;
  1571. next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1572. next_to_use = tpd_ring->next_to_use;
  1573. return (u16)(next_to_clean > next_to_use) ?
  1574. (next_to_clean - next_to_use - 1) :
  1575. (tpd_ring->count + next_to_clean - next_to_use - 1);
  1576. }
  1577. /*
  1578. * get next usable tpd
  1579. * Note: should call atl1c_tdp_avail to make sure
  1580. * there is enough tpd to use
  1581. */
  1582. static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
  1583. enum atl1c_trans_queue type)
  1584. {
  1585. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1586. struct atl1c_tpd_desc *tpd_desc;
  1587. u16 next_to_use = 0;
  1588. next_to_use = tpd_ring->next_to_use;
  1589. if (++tpd_ring->next_to_use == tpd_ring->count)
  1590. tpd_ring->next_to_use = 0;
  1591. tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
  1592. memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
  1593. return tpd_desc;
  1594. }
  1595. static struct atl1c_buffer *
  1596. atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
  1597. {
  1598. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  1599. return &tpd_ring->buffer_info[tpd -
  1600. (struct atl1c_tpd_desc *)tpd_ring->desc];
  1601. }
  1602. /* Calculate the transmit packet descript needed*/
  1603. static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
  1604. {
  1605. u16 tpd_req;
  1606. u16 proto_hdr_len = 0;
  1607. tpd_req = skb_shinfo(skb)->nr_frags + 1;
  1608. if (skb_is_gso(skb)) {
  1609. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1610. if (proto_hdr_len < skb_headlen(skb))
  1611. tpd_req++;
  1612. if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
  1613. tpd_req++;
  1614. }
  1615. return tpd_req;
  1616. }
  1617. static int atl1c_tso_csum(struct atl1c_adapter *adapter,
  1618. struct sk_buff *skb,
  1619. struct atl1c_tpd_desc **tpd,
  1620. enum atl1c_trans_queue type)
  1621. {
  1622. struct pci_dev *pdev = adapter->pdev;
  1623. u8 hdr_len;
  1624. u32 real_len;
  1625. unsigned short offload_type;
  1626. int err;
  1627. if (skb_is_gso(skb)) {
  1628. if (skb_header_cloned(skb)) {
  1629. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1630. if (unlikely(err))
  1631. return -1;
  1632. }
  1633. offload_type = skb_shinfo(skb)->gso_type;
  1634. if (offload_type & SKB_GSO_TCPV4) {
  1635. real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
  1636. + ntohs(ip_hdr(skb)->tot_len));
  1637. if (real_len < skb->len)
  1638. pskb_trim(skb, real_len);
  1639. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1640. if (unlikely(skb->len == hdr_len)) {
  1641. /* only xsum need */
  1642. if (netif_msg_tx_queued(adapter))
  1643. dev_warn(&pdev->dev,
  1644. "IPV4 tso with zero data??\n");
  1645. goto check_sum;
  1646. } else {
  1647. ip_hdr(skb)->check = 0;
  1648. tcp_hdr(skb)->check = ~csum_tcpudp_magic(
  1649. ip_hdr(skb)->saddr,
  1650. ip_hdr(skb)->daddr,
  1651. 0, IPPROTO_TCP, 0);
  1652. (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
  1653. }
  1654. }
  1655. if (offload_type & SKB_GSO_TCPV6) {
  1656. struct atl1c_tpd_ext_desc *etpd =
  1657. *(struct atl1c_tpd_ext_desc **)(tpd);
  1658. memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
  1659. *tpd = atl1c_get_tpd(adapter, type);
  1660. ipv6_hdr(skb)->payload_len = 0;
  1661. /* check payload == 0 byte ? */
  1662. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1663. if (unlikely(skb->len == hdr_len)) {
  1664. /* only xsum need */
  1665. if (netif_msg_tx_queued(adapter))
  1666. dev_warn(&pdev->dev,
  1667. "IPV6 tso with zero data??\n");
  1668. goto check_sum;
  1669. } else
  1670. tcp_hdr(skb)->check = ~csum_ipv6_magic(
  1671. &ipv6_hdr(skb)->saddr,
  1672. &ipv6_hdr(skb)->daddr,
  1673. 0, IPPROTO_TCP, 0);
  1674. etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1675. etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1676. etpd->pkt_len = cpu_to_le32(skb->len);
  1677. (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1678. }
  1679. (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1680. (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
  1681. TPD_TCPHDR_OFFSET_SHIFT;
  1682. (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
  1683. TPD_MSS_SHIFT;
  1684. return 0;
  1685. }
  1686. check_sum:
  1687. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1688. u8 css, cso;
  1689. cso = skb_checksum_start_offset(skb);
  1690. if (unlikely(cso & 0x1)) {
  1691. if (netif_msg_tx_err(adapter))
  1692. dev_err(&adapter->pdev->dev,
  1693. "payload offset should not an event number\n");
  1694. return -1;
  1695. } else {
  1696. css = cso + skb->csum_offset;
  1697. (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
  1698. TPD_PLOADOFFSET_SHIFT;
  1699. (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
  1700. TPD_CCSUM_OFFSET_SHIFT;
  1701. (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
  1702. }
  1703. }
  1704. return 0;
  1705. }
  1706. static void atl1c_tx_map(struct atl1c_adapter *adapter,
  1707. struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
  1708. enum atl1c_trans_queue type)
  1709. {
  1710. struct atl1c_tpd_desc *use_tpd = NULL;
  1711. struct atl1c_buffer *buffer_info = NULL;
  1712. u16 buf_len = skb_headlen(skb);
  1713. u16 map_len = 0;
  1714. u16 mapped_len = 0;
  1715. u16 hdr_len = 0;
  1716. u16 nr_frags;
  1717. u16 f;
  1718. int tso;
  1719. nr_frags = skb_shinfo(skb)->nr_frags;
  1720. tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
  1721. if (tso) {
  1722. /* TSO */
  1723. map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1724. use_tpd = tpd;
  1725. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1726. buffer_info->length = map_len;
  1727. buffer_info->dma = pci_map_single(adapter->pdev,
  1728. skb->data, hdr_len, PCI_DMA_TODEVICE);
  1729. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1730. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1731. ATL1C_PCIMAP_TODEVICE);
  1732. mapped_len += map_len;
  1733. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1734. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1735. }
  1736. if (mapped_len < buf_len) {
  1737. /* mapped_len == 0, means we should use the first tpd,
  1738. which is given by caller */
  1739. if (mapped_len == 0)
  1740. use_tpd = tpd;
  1741. else {
  1742. use_tpd = atl1c_get_tpd(adapter, type);
  1743. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1744. }
  1745. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1746. buffer_info->length = buf_len - mapped_len;
  1747. buffer_info->dma =
  1748. pci_map_single(adapter->pdev, skb->data + mapped_len,
  1749. buffer_info->length, PCI_DMA_TODEVICE);
  1750. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1751. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1752. ATL1C_PCIMAP_TODEVICE);
  1753. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1754. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1755. }
  1756. for (f = 0; f < nr_frags; f++) {
  1757. struct skb_frag_struct *frag;
  1758. frag = &skb_shinfo(skb)->frags[f];
  1759. use_tpd = atl1c_get_tpd(adapter, type);
  1760. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1761. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1762. buffer_info->length = skb_frag_size(frag);
  1763. buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
  1764. frag, 0,
  1765. buffer_info->length,
  1766. DMA_TO_DEVICE);
  1767. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1768. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
  1769. ATL1C_PCIMAP_TODEVICE);
  1770. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1771. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1772. }
  1773. /* The last tpd */
  1774. use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
  1775. /* The last buffer info contain the skb address,
  1776. so it will be free after unmap */
  1777. buffer_info->skb = skb;
  1778. }
  1779. static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
  1780. struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
  1781. {
  1782. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1783. u16 reg;
  1784. reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
  1785. AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
  1786. }
  1787. static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
  1788. struct net_device *netdev)
  1789. {
  1790. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1791. unsigned long flags;
  1792. u16 tpd_req = 1;
  1793. struct atl1c_tpd_desc *tpd;
  1794. enum atl1c_trans_queue type = atl1c_trans_normal;
  1795. if (test_bit(__AT_DOWN, &adapter->flags)) {
  1796. dev_kfree_skb_any(skb);
  1797. return NETDEV_TX_OK;
  1798. }
  1799. tpd_req = atl1c_cal_tpd_req(skb);
  1800. if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
  1801. if (netif_msg_pktdata(adapter))
  1802. dev_info(&adapter->pdev->dev, "tx locked\n");
  1803. return NETDEV_TX_LOCKED;
  1804. }
  1805. if (atl1c_tpd_avail(adapter, type) < tpd_req) {
  1806. /* no enough descriptor, just stop queue */
  1807. netif_stop_queue(netdev);
  1808. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1809. return NETDEV_TX_BUSY;
  1810. }
  1811. tpd = atl1c_get_tpd(adapter, type);
  1812. /* do TSO and check sum */
  1813. if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
  1814. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1815. dev_kfree_skb_any(skb);
  1816. return NETDEV_TX_OK;
  1817. }
  1818. if (unlikely(vlan_tx_tag_present(skb))) {
  1819. u16 vlan = vlan_tx_tag_get(skb);
  1820. __le16 tag;
  1821. vlan = cpu_to_le16(vlan);
  1822. AT_VLAN_TO_TAG(vlan, tag);
  1823. tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
  1824. tpd->vlan_tag = tag;
  1825. }
  1826. if (skb_network_offset(skb) != ETH_HLEN)
  1827. tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
  1828. atl1c_tx_map(adapter, skb, tpd, type);
  1829. atl1c_tx_queue(adapter, skb, tpd, type);
  1830. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1831. return NETDEV_TX_OK;
  1832. }
  1833. static void atl1c_free_irq(struct atl1c_adapter *adapter)
  1834. {
  1835. struct net_device *netdev = adapter->netdev;
  1836. free_irq(adapter->pdev->irq, netdev);
  1837. if (adapter->have_msi)
  1838. pci_disable_msi(adapter->pdev);
  1839. }
  1840. static int atl1c_request_irq(struct atl1c_adapter *adapter)
  1841. {
  1842. struct pci_dev *pdev = adapter->pdev;
  1843. struct net_device *netdev = adapter->netdev;
  1844. int flags = 0;
  1845. int err = 0;
  1846. adapter->have_msi = true;
  1847. err = pci_enable_msi(adapter->pdev);
  1848. if (err) {
  1849. if (netif_msg_ifup(adapter))
  1850. dev_err(&pdev->dev,
  1851. "Unable to allocate MSI interrupt Error: %d\n",
  1852. err);
  1853. adapter->have_msi = false;
  1854. }
  1855. if (!adapter->have_msi)
  1856. flags |= IRQF_SHARED;
  1857. err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
  1858. netdev->name, netdev);
  1859. if (err) {
  1860. if (netif_msg_ifup(adapter))
  1861. dev_err(&pdev->dev,
  1862. "Unable to allocate interrupt Error: %d\n",
  1863. err);
  1864. if (adapter->have_msi)
  1865. pci_disable_msi(adapter->pdev);
  1866. return err;
  1867. }
  1868. if (netif_msg_ifup(adapter))
  1869. dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
  1870. return err;
  1871. }
  1872. static int atl1c_up(struct atl1c_adapter *adapter)
  1873. {
  1874. struct net_device *netdev = adapter->netdev;
  1875. int num;
  1876. int err;
  1877. netif_carrier_off(netdev);
  1878. atl1c_init_ring_ptrs(adapter);
  1879. atl1c_set_multi(netdev);
  1880. atl1c_restore_vlan(adapter);
  1881. num = atl1c_alloc_rx_buffer(adapter);
  1882. if (unlikely(num == 0)) {
  1883. err = -ENOMEM;
  1884. goto err_alloc_rx;
  1885. }
  1886. if (atl1c_configure(adapter)) {
  1887. err = -EIO;
  1888. goto err_up;
  1889. }
  1890. err = atl1c_request_irq(adapter);
  1891. if (unlikely(err))
  1892. goto err_up;
  1893. clear_bit(__AT_DOWN, &adapter->flags);
  1894. napi_enable(&adapter->napi);
  1895. atl1c_irq_enable(adapter);
  1896. atl1c_check_link_status(adapter);
  1897. netif_start_queue(netdev);
  1898. return err;
  1899. err_up:
  1900. err_alloc_rx:
  1901. atl1c_clean_rx_ring(adapter);
  1902. return err;
  1903. }
  1904. static void atl1c_down(struct atl1c_adapter *adapter)
  1905. {
  1906. struct net_device *netdev = adapter->netdev;
  1907. atl1c_del_timer(adapter);
  1908. adapter->work_event = 0; /* clear all event */
  1909. /* signal that we're down so the interrupt handler does not
  1910. * reschedule our watchdog timer */
  1911. set_bit(__AT_DOWN, &adapter->flags);
  1912. netif_carrier_off(netdev);
  1913. napi_disable(&adapter->napi);
  1914. atl1c_irq_disable(adapter);
  1915. atl1c_free_irq(adapter);
  1916. /* disable ASPM if device inactive */
  1917. atl1c_disable_l0s_l1(&adapter->hw);
  1918. /* reset MAC to disable all RX/TX */
  1919. atl1c_reset_mac(&adapter->hw);
  1920. msleep(1);
  1921. adapter->link_speed = SPEED_0;
  1922. adapter->link_duplex = -1;
  1923. atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
  1924. atl1c_clean_tx_ring(adapter, atl1c_trans_high);
  1925. atl1c_clean_rx_ring(adapter);
  1926. }
  1927. /*
  1928. * atl1c_open - Called when a network interface is made active
  1929. * @netdev: network interface device structure
  1930. *
  1931. * Returns 0 on success, negative value on failure
  1932. *
  1933. * The open entry point is called when a network interface is made
  1934. * active by the system (IFF_UP). At this point all resources needed
  1935. * for transmit and receive operations are allocated, the interrupt
  1936. * handler is registered with the OS, the watchdog timer is started,
  1937. * and the stack is notified that the interface is ready.
  1938. */
  1939. static int atl1c_open(struct net_device *netdev)
  1940. {
  1941. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1942. int err;
  1943. /* disallow open during test */
  1944. if (test_bit(__AT_TESTING, &adapter->flags))
  1945. return -EBUSY;
  1946. /* allocate rx/tx dma buffer & descriptors */
  1947. err = atl1c_setup_ring_resources(adapter);
  1948. if (unlikely(err))
  1949. return err;
  1950. err = atl1c_up(adapter);
  1951. if (unlikely(err))
  1952. goto err_up;
  1953. return 0;
  1954. err_up:
  1955. atl1c_free_irq(adapter);
  1956. atl1c_free_ring_resources(adapter);
  1957. atl1c_reset_mac(&adapter->hw);
  1958. return err;
  1959. }
  1960. /*
  1961. * atl1c_close - Disables a network interface
  1962. * @netdev: network interface device structure
  1963. *
  1964. * Returns 0, this is not allowed to fail
  1965. *
  1966. * The close entry point is called when an interface is de-activated
  1967. * by the OS. The hardware is still under the drivers control, but
  1968. * needs to be disabled. A global MAC reset is issued to stop the
  1969. * hardware, and all transmit and receive resources are freed.
  1970. */
  1971. static int atl1c_close(struct net_device *netdev)
  1972. {
  1973. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1974. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  1975. atl1c_down(adapter);
  1976. atl1c_free_ring_resources(adapter);
  1977. return 0;
  1978. }
  1979. static int atl1c_suspend(struct device *dev)
  1980. {
  1981. struct pci_dev *pdev = to_pci_dev(dev);
  1982. struct net_device *netdev = pci_get_drvdata(pdev);
  1983. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1984. struct atl1c_hw *hw = &adapter->hw;
  1985. u32 wufc = adapter->wol;
  1986. atl1c_disable_l0s_l1(hw);
  1987. if (netif_running(netdev)) {
  1988. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  1989. atl1c_down(adapter);
  1990. }
  1991. netif_device_detach(netdev);
  1992. if (wufc)
  1993. if (atl1c_phy_to_ps_link(hw) != 0)
  1994. dev_dbg(&pdev->dev, "phy power saving failed");
  1995. atl1c_power_saving(hw, wufc);
  1996. return 0;
  1997. }
  1998. #ifdef CONFIG_PM_SLEEP
  1999. static int atl1c_resume(struct device *dev)
  2000. {
  2001. struct pci_dev *pdev = to_pci_dev(dev);
  2002. struct net_device *netdev = pci_get_drvdata(pdev);
  2003. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2004. AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
  2005. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2006. atl1c_phy_reset(&adapter->hw);
  2007. atl1c_reset_mac(&adapter->hw);
  2008. atl1c_phy_init(&adapter->hw);
  2009. #if 0
  2010. AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
  2011. pm_data &= ~PM_CTRLSTAT_PME_EN;
  2012. AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
  2013. #endif
  2014. netif_device_attach(netdev);
  2015. if (netif_running(netdev))
  2016. atl1c_up(adapter);
  2017. return 0;
  2018. }
  2019. #endif
  2020. static void atl1c_shutdown(struct pci_dev *pdev)
  2021. {
  2022. struct net_device *netdev = pci_get_drvdata(pdev);
  2023. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2024. atl1c_suspend(&pdev->dev);
  2025. pci_wake_from_d3(pdev, adapter->wol);
  2026. pci_set_power_state(pdev, PCI_D3hot);
  2027. }
  2028. static const struct net_device_ops atl1c_netdev_ops = {
  2029. .ndo_open = atl1c_open,
  2030. .ndo_stop = atl1c_close,
  2031. .ndo_validate_addr = eth_validate_addr,
  2032. .ndo_start_xmit = atl1c_xmit_frame,
  2033. .ndo_set_mac_address = atl1c_set_mac_addr,
  2034. .ndo_set_rx_mode = atl1c_set_multi,
  2035. .ndo_change_mtu = atl1c_change_mtu,
  2036. .ndo_fix_features = atl1c_fix_features,
  2037. .ndo_set_features = atl1c_set_features,
  2038. .ndo_do_ioctl = atl1c_ioctl,
  2039. .ndo_tx_timeout = atl1c_tx_timeout,
  2040. .ndo_get_stats = atl1c_get_stats,
  2041. #ifdef CONFIG_NET_POLL_CONTROLLER
  2042. .ndo_poll_controller = atl1c_netpoll,
  2043. #endif
  2044. };
  2045. static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
  2046. {
  2047. SET_NETDEV_DEV(netdev, &pdev->dev);
  2048. pci_set_drvdata(pdev, netdev);
  2049. netdev->netdev_ops = &atl1c_netdev_ops;
  2050. netdev->watchdog_timeo = AT_TX_WATCHDOG;
  2051. atl1c_set_ethtool_ops(netdev);
  2052. /* TODO: add when ready */
  2053. netdev->hw_features = NETIF_F_SG |
  2054. NETIF_F_HW_CSUM |
  2055. NETIF_F_HW_VLAN_RX |
  2056. NETIF_F_TSO |
  2057. NETIF_F_TSO6;
  2058. netdev->features = netdev->hw_features |
  2059. NETIF_F_HW_VLAN_TX;
  2060. return 0;
  2061. }
  2062. /*
  2063. * atl1c_probe - Device Initialization Routine
  2064. * @pdev: PCI device information struct
  2065. * @ent: entry in atl1c_pci_tbl
  2066. *
  2067. * Returns 0 on success, negative on failure
  2068. *
  2069. * atl1c_probe initializes an adapter identified by a pci_dev structure.
  2070. * The OS initialization, configuring of the adapter private structure,
  2071. * and a hardware reset occur.
  2072. */
  2073. static int __devinit atl1c_probe(struct pci_dev *pdev,
  2074. const struct pci_device_id *ent)
  2075. {
  2076. struct net_device *netdev;
  2077. struct atl1c_adapter *adapter;
  2078. static int cards_found;
  2079. int err = 0;
  2080. /* enable device (incl. PCI PM wakeup and hotplug setup) */
  2081. err = pci_enable_device_mem(pdev);
  2082. if (err) {
  2083. dev_err(&pdev->dev, "cannot enable PCI device\n");
  2084. return err;
  2085. }
  2086. /*
  2087. * The atl1c chip can DMA to 64-bit addresses, but it uses a single
  2088. * shared register for the high 32 bits, so only a single, aligned,
  2089. * 4 GB physical address range can be used at a time.
  2090. *
  2091. * Supporting 64-bit DMA on this hardware is more trouble than it's
  2092. * worth. It is far easier to limit to 32-bit DMA than update
  2093. * various kernel subsystems to support the mechanics required by a
  2094. * fixed-high-32-bit system.
  2095. */
  2096. if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
  2097. (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
  2098. dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
  2099. goto err_dma;
  2100. }
  2101. err = pci_request_regions(pdev, atl1c_driver_name);
  2102. if (err) {
  2103. dev_err(&pdev->dev, "cannot obtain PCI resources\n");
  2104. goto err_pci_reg;
  2105. }
  2106. pci_set_master(pdev);
  2107. netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
  2108. if (netdev == NULL) {
  2109. err = -ENOMEM;
  2110. goto err_alloc_etherdev;
  2111. }
  2112. err = atl1c_init_netdev(netdev, pdev);
  2113. if (err) {
  2114. dev_err(&pdev->dev, "init netdevice failed\n");
  2115. goto err_init_netdev;
  2116. }
  2117. adapter = netdev_priv(netdev);
  2118. adapter->bd_number = cards_found;
  2119. adapter->netdev = netdev;
  2120. adapter->pdev = pdev;
  2121. adapter->hw.adapter = adapter;
  2122. adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
  2123. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  2124. if (!adapter->hw.hw_addr) {
  2125. err = -EIO;
  2126. dev_err(&pdev->dev, "cannot map device registers\n");
  2127. goto err_ioremap;
  2128. }
  2129. /* init mii data */
  2130. adapter->mii.dev = netdev;
  2131. adapter->mii.mdio_read = atl1c_mdio_read;
  2132. adapter->mii.mdio_write = atl1c_mdio_write;
  2133. adapter->mii.phy_id_mask = 0x1f;
  2134. adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
  2135. netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
  2136. setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
  2137. (unsigned long)adapter);
  2138. /* setup the private structure */
  2139. err = atl1c_sw_init(adapter);
  2140. if (err) {
  2141. dev_err(&pdev->dev, "net device private data init failed\n");
  2142. goto err_sw_init;
  2143. }
  2144. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2145. /* Init GPHY as early as possible due to power saving issue */
  2146. atl1c_phy_reset(&adapter->hw);
  2147. err = atl1c_reset_mac(&adapter->hw);
  2148. if (err) {
  2149. err = -EIO;
  2150. goto err_reset;
  2151. }
  2152. /* reset the controller to
  2153. * put the device in a known good starting state */
  2154. err = atl1c_phy_init(&adapter->hw);
  2155. if (err) {
  2156. err = -EIO;
  2157. goto err_reset;
  2158. }
  2159. if (atl1c_read_mac_addr(&adapter->hw)) {
  2160. /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
  2161. netdev->addr_assign_type |= NET_ADDR_RANDOM;
  2162. }
  2163. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2164. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  2165. if (netif_msg_probe(adapter))
  2166. dev_dbg(&pdev->dev, "mac address : %pM\n",
  2167. adapter->hw.mac_addr);
  2168. atl1c_hw_set_mac_addr(&adapter->hw);
  2169. INIT_WORK(&adapter->common_task, atl1c_common_task);
  2170. adapter->work_event = 0;
  2171. err = register_netdev(netdev);
  2172. if (err) {
  2173. dev_err(&pdev->dev, "register netdevice failed\n");
  2174. goto err_register;
  2175. }
  2176. if (netif_msg_probe(adapter))
  2177. dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
  2178. cards_found++;
  2179. return 0;
  2180. err_reset:
  2181. err_register:
  2182. err_sw_init:
  2183. iounmap(adapter->hw.hw_addr);
  2184. err_init_netdev:
  2185. err_ioremap:
  2186. free_netdev(netdev);
  2187. err_alloc_etherdev:
  2188. pci_release_regions(pdev);
  2189. err_pci_reg:
  2190. err_dma:
  2191. pci_disable_device(pdev);
  2192. return err;
  2193. }
  2194. /*
  2195. * atl1c_remove - Device Removal Routine
  2196. * @pdev: PCI device information struct
  2197. *
  2198. * atl1c_remove is called by the PCI subsystem to alert the driver
  2199. * that it should release a PCI device. The could be caused by a
  2200. * Hot-Plug event, or because the driver is going to be removed from
  2201. * memory.
  2202. */
  2203. static void __devexit atl1c_remove(struct pci_dev *pdev)
  2204. {
  2205. struct net_device *netdev = pci_get_drvdata(pdev);
  2206. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2207. unregister_netdev(netdev);
  2208. atl1c_phy_disable(&adapter->hw);
  2209. iounmap(adapter->hw.hw_addr);
  2210. pci_release_regions(pdev);
  2211. pci_disable_device(pdev);
  2212. free_netdev(netdev);
  2213. }
  2214. /*
  2215. * atl1c_io_error_detected - called when PCI error is detected
  2216. * @pdev: Pointer to PCI device
  2217. * @state: The current pci connection state
  2218. *
  2219. * This function is called after a PCI bus error affecting
  2220. * this device has been detected.
  2221. */
  2222. static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
  2223. pci_channel_state_t state)
  2224. {
  2225. struct net_device *netdev = pci_get_drvdata(pdev);
  2226. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2227. netif_device_detach(netdev);
  2228. if (state == pci_channel_io_perm_failure)
  2229. return PCI_ERS_RESULT_DISCONNECT;
  2230. if (netif_running(netdev))
  2231. atl1c_down(adapter);
  2232. pci_disable_device(pdev);
  2233. /* Request a slot slot reset. */
  2234. return PCI_ERS_RESULT_NEED_RESET;
  2235. }
  2236. /*
  2237. * atl1c_io_slot_reset - called after the pci bus has been reset.
  2238. * @pdev: Pointer to PCI device
  2239. *
  2240. * Restart the card from scratch, as if from a cold-boot. Implementation
  2241. * resembles the first-half of the e1000_resume routine.
  2242. */
  2243. static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
  2244. {
  2245. struct net_device *netdev = pci_get_drvdata(pdev);
  2246. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2247. if (pci_enable_device(pdev)) {
  2248. if (netif_msg_hw(adapter))
  2249. dev_err(&pdev->dev,
  2250. "Cannot re-enable PCI device after reset\n");
  2251. return PCI_ERS_RESULT_DISCONNECT;
  2252. }
  2253. pci_set_master(pdev);
  2254. pci_enable_wake(pdev, PCI_D3hot, 0);
  2255. pci_enable_wake(pdev, PCI_D3cold, 0);
  2256. atl1c_reset_mac(&adapter->hw);
  2257. return PCI_ERS_RESULT_RECOVERED;
  2258. }
  2259. /*
  2260. * atl1c_io_resume - called when traffic can start flowing again.
  2261. * @pdev: Pointer to PCI device
  2262. *
  2263. * This callback is called when the error recovery driver tells us that
  2264. * its OK to resume normal operation. Implementation resembles the
  2265. * second-half of the atl1c_resume routine.
  2266. */
  2267. static void atl1c_io_resume(struct pci_dev *pdev)
  2268. {
  2269. struct net_device *netdev = pci_get_drvdata(pdev);
  2270. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2271. if (netif_running(netdev)) {
  2272. if (atl1c_up(adapter)) {
  2273. if (netif_msg_hw(adapter))
  2274. dev_err(&pdev->dev,
  2275. "Cannot bring device back up after reset\n");
  2276. return;
  2277. }
  2278. }
  2279. netif_device_attach(netdev);
  2280. }
  2281. static struct pci_error_handlers atl1c_err_handler = {
  2282. .error_detected = atl1c_io_error_detected,
  2283. .slot_reset = atl1c_io_slot_reset,
  2284. .resume = atl1c_io_resume,
  2285. };
  2286. static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
  2287. static struct pci_driver atl1c_driver = {
  2288. .name = atl1c_driver_name,
  2289. .id_table = atl1c_pci_tbl,
  2290. .probe = atl1c_probe,
  2291. .remove = __devexit_p(atl1c_remove),
  2292. .shutdown = atl1c_shutdown,
  2293. .err_handler = &atl1c_err_handler,
  2294. .driver.pm = &atl1c_pm_ops,
  2295. };
  2296. /*
  2297. * atl1c_init_module - Driver Registration Routine
  2298. *
  2299. * atl1c_init_module is the first routine called when the driver is
  2300. * loaded. All it does is register with the PCI subsystem.
  2301. */
  2302. static int __init atl1c_init_module(void)
  2303. {
  2304. return pci_register_driver(&atl1c_driver);
  2305. }
  2306. /*
  2307. * atl1c_exit_module - Driver Exit Cleanup Routine
  2308. *
  2309. * atl1c_exit_module is called just before the driver is removed
  2310. * from memory.
  2311. */
  2312. static void __exit atl1c_exit_module(void)
  2313. {
  2314. pci_unregister_driver(&atl1c_driver);
  2315. }
  2316. module_init(atl1c_init_module);
  2317. module_exit(atl1c_exit_module);