lpfc_sli.c 82 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2006 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. struct lpfc_iocbq *
  62. lpfc_sli_get_iocbq(struct lpfc_hba * phba)
  63. {
  64. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  65. struct lpfc_iocbq * iocbq = NULL;
  66. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  67. return iocbq;
  68. }
  69. void
  70. lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  71. {
  72. size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
  73. /*
  74. * Clean all volatile data fields, preserve iotag and node struct.
  75. */
  76. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  77. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  78. }
  79. /*
  80. * Translate the iocb command to an iocb command type used to decide the final
  81. * disposition of each completed IOCB.
  82. */
  83. static lpfc_iocb_type
  84. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  85. {
  86. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  87. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  88. return 0;
  89. switch (iocb_cmnd) {
  90. case CMD_XMIT_SEQUENCE_CR:
  91. case CMD_XMIT_SEQUENCE_CX:
  92. case CMD_XMIT_BCAST_CN:
  93. case CMD_XMIT_BCAST_CX:
  94. case CMD_ELS_REQUEST_CR:
  95. case CMD_ELS_REQUEST_CX:
  96. case CMD_CREATE_XRI_CR:
  97. case CMD_CREATE_XRI_CX:
  98. case CMD_GET_RPI_CN:
  99. case CMD_XMIT_ELS_RSP_CX:
  100. case CMD_GET_RPI_CR:
  101. case CMD_FCP_IWRITE_CR:
  102. case CMD_FCP_IWRITE_CX:
  103. case CMD_FCP_IREAD_CR:
  104. case CMD_FCP_IREAD_CX:
  105. case CMD_FCP_ICMND_CR:
  106. case CMD_FCP_ICMND_CX:
  107. case CMD_FCP_TSEND_CX:
  108. case CMD_FCP_TRSP_CX:
  109. case CMD_FCP_TRECEIVE_CX:
  110. case CMD_FCP_AUTO_TRSP_CX:
  111. case CMD_ADAPTER_MSG:
  112. case CMD_ADAPTER_DUMP:
  113. case CMD_XMIT_SEQUENCE64_CR:
  114. case CMD_XMIT_SEQUENCE64_CX:
  115. case CMD_XMIT_BCAST64_CN:
  116. case CMD_XMIT_BCAST64_CX:
  117. case CMD_ELS_REQUEST64_CR:
  118. case CMD_ELS_REQUEST64_CX:
  119. case CMD_FCP_IWRITE64_CR:
  120. case CMD_FCP_IWRITE64_CX:
  121. case CMD_FCP_IREAD64_CR:
  122. case CMD_FCP_IREAD64_CX:
  123. case CMD_FCP_ICMND64_CR:
  124. case CMD_FCP_ICMND64_CX:
  125. case CMD_FCP_TSEND64_CX:
  126. case CMD_FCP_TRSP64_CX:
  127. case CMD_FCP_TRECEIVE64_CX:
  128. case CMD_GEN_REQUEST64_CR:
  129. case CMD_GEN_REQUEST64_CX:
  130. case CMD_XMIT_ELS_RSP64_CX:
  131. type = LPFC_SOL_IOCB;
  132. break;
  133. case CMD_ABORT_XRI_CN:
  134. case CMD_ABORT_XRI_CX:
  135. case CMD_CLOSE_XRI_CN:
  136. case CMD_CLOSE_XRI_CX:
  137. case CMD_XRI_ABORTED_CX:
  138. case CMD_ABORT_MXRI64_CN:
  139. type = LPFC_ABORT_IOCB;
  140. break;
  141. case CMD_RCV_SEQUENCE_CX:
  142. case CMD_RCV_ELS_REQ_CX:
  143. case CMD_RCV_SEQUENCE64_CX:
  144. case CMD_RCV_ELS_REQ64_CX:
  145. type = LPFC_UNSOL_IOCB;
  146. break;
  147. default:
  148. type = LPFC_UNKNOWN_IOCB;
  149. break;
  150. }
  151. return type;
  152. }
  153. static int
  154. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  155. {
  156. struct lpfc_sli *psli = &phba->sli;
  157. MAILBOX_t *pmbox = &pmb->mb;
  158. int i, rc;
  159. for (i = 0; i < psli->num_rings; i++) {
  160. phba->hba_state = LPFC_INIT_MBX_CMDS;
  161. lpfc_config_ring(phba, i, pmb);
  162. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  163. if (rc != MBX_SUCCESS) {
  164. lpfc_printf_log(phba,
  165. KERN_ERR,
  166. LOG_INIT,
  167. "%d:0446 Adapter failed to init, "
  168. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  169. "ring %d\n",
  170. phba->brd_no,
  171. pmbox->mbxCommand,
  172. pmbox->mbxStatus,
  173. i);
  174. phba->hba_state = LPFC_HBA_ERROR;
  175. return -ENXIO;
  176. }
  177. }
  178. return 0;
  179. }
  180. static int
  181. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  182. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  183. {
  184. list_add_tail(&piocb->list, &pring->txcmplq);
  185. pring->txcmplq_cnt++;
  186. if (unlikely(pring->ringno == LPFC_ELS_RING))
  187. mod_timer(&phba->els_tmofunc,
  188. jiffies + HZ * (phba->fc_ratov << 1));
  189. return (0);
  190. }
  191. static struct lpfc_iocbq *
  192. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  193. {
  194. struct list_head *dlp;
  195. struct lpfc_iocbq *cmd_iocb;
  196. dlp = &pring->txq;
  197. cmd_iocb = NULL;
  198. list_remove_head((&pring->txq), cmd_iocb,
  199. struct lpfc_iocbq,
  200. list);
  201. if (cmd_iocb) {
  202. /* If the first ptr is not equal to the list header,
  203. * deque the IOCBQ_t and return it.
  204. */
  205. pring->txq_cnt--;
  206. }
  207. return (cmd_iocb);
  208. }
  209. static IOCB_t *
  210. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  211. {
  212. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  213. uint32_t max_cmd_idx = pring->numCiocb;
  214. IOCB_t *iocb = NULL;
  215. if ((pring->next_cmdidx == pring->cmdidx) &&
  216. (++pring->next_cmdidx >= max_cmd_idx))
  217. pring->next_cmdidx = 0;
  218. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  219. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  220. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  221. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  222. "%d:0315 Ring %d issue: portCmdGet %d "
  223. "is bigger then cmd ring %d\n",
  224. phba->brd_no, pring->ringno,
  225. pring->local_getidx, max_cmd_idx);
  226. phba->hba_state = LPFC_HBA_ERROR;
  227. /*
  228. * All error attention handlers are posted to
  229. * worker thread
  230. */
  231. phba->work_ha |= HA_ERATT;
  232. phba->work_hs = HS_FFER3;
  233. if (phba->work_wait)
  234. wake_up(phba->work_wait);
  235. return NULL;
  236. }
  237. if (pring->local_getidx == pring->next_cmdidx)
  238. return NULL;
  239. }
  240. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  241. return iocb;
  242. }
  243. uint16_t
  244. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  245. {
  246. struct lpfc_iocbq ** new_arr;
  247. struct lpfc_iocbq ** old_arr;
  248. size_t new_len;
  249. struct lpfc_sli *psli = &phba->sli;
  250. uint16_t iotag;
  251. spin_lock_irq(phba->host->host_lock);
  252. iotag = psli->last_iotag;
  253. if(++iotag < psli->iocbq_lookup_len) {
  254. psli->last_iotag = iotag;
  255. psli->iocbq_lookup[iotag] = iocbq;
  256. spin_unlock_irq(phba->host->host_lock);
  257. iocbq->iotag = iotag;
  258. return iotag;
  259. }
  260. else if (psli->iocbq_lookup_len < (0xffff
  261. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  262. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  263. spin_unlock_irq(phba->host->host_lock);
  264. new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
  265. GFP_KERNEL);
  266. if (new_arr) {
  267. memset((char *)new_arr, 0,
  268. new_len * sizeof (struct lpfc_iocbq *));
  269. spin_lock_irq(phba->host->host_lock);
  270. old_arr = psli->iocbq_lookup;
  271. if (new_len <= psli->iocbq_lookup_len) {
  272. /* highly unprobable case */
  273. kfree(new_arr);
  274. iotag = psli->last_iotag;
  275. if(++iotag < psli->iocbq_lookup_len) {
  276. psli->last_iotag = iotag;
  277. psli->iocbq_lookup[iotag] = iocbq;
  278. spin_unlock_irq(phba->host->host_lock);
  279. iocbq->iotag = iotag;
  280. return iotag;
  281. }
  282. spin_unlock_irq(phba->host->host_lock);
  283. return 0;
  284. }
  285. if (psli->iocbq_lookup)
  286. memcpy(new_arr, old_arr,
  287. ((psli->last_iotag + 1) *
  288. sizeof (struct lpfc_iocbq *)));
  289. psli->iocbq_lookup = new_arr;
  290. psli->iocbq_lookup_len = new_len;
  291. psli->last_iotag = iotag;
  292. psli->iocbq_lookup[iotag] = iocbq;
  293. spin_unlock_irq(phba->host->host_lock);
  294. iocbq->iotag = iotag;
  295. kfree(old_arr);
  296. return iotag;
  297. }
  298. } else
  299. spin_unlock_irq(phba->host->host_lock);
  300. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  301. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  302. phba->brd_no, psli->last_iotag);
  303. return 0;
  304. }
  305. static void
  306. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  307. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  308. {
  309. /*
  310. * Set up an iotag
  311. */
  312. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  313. /*
  314. * Issue iocb command to adapter
  315. */
  316. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  317. wmb();
  318. pring->stats.iocb_cmd++;
  319. /*
  320. * If there is no completion routine to call, we can release the
  321. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  322. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  323. */
  324. if (nextiocb->iocb_cmpl)
  325. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  326. else
  327. lpfc_sli_release_iocbq(phba, nextiocb);
  328. /*
  329. * Let the HBA know what IOCB slot will be the next one the
  330. * driver will put a command into.
  331. */
  332. pring->cmdidx = pring->next_cmdidx;
  333. writel(pring->cmdidx, phba->MBslimaddr
  334. + (SLIMOFF + (pring->ringno * 2)) * 4);
  335. }
  336. static void
  337. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  338. struct lpfc_sli_ring *pring)
  339. {
  340. int ringno = pring->ringno;
  341. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  342. wmb();
  343. /*
  344. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  345. * The HBA will tell us when an IOCB entry is available.
  346. */
  347. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  348. readl(phba->CAregaddr); /* flush */
  349. pring->stats.iocb_cmd_full++;
  350. }
  351. static void
  352. lpfc_sli_update_ring(struct lpfc_hba * phba,
  353. struct lpfc_sli_ring *pring)
  354. {
  355. int ringno = pring->ringno;
  356. /*
  357. * Tell the HBA that there is work to do in this ring.
  358. */
  359. wmb();
  360. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  361. readl(phba->CAregaddr); /* flush */
  362. }
  363. static void
  364. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  365. {
  366. IOCB_t *iocb;
  367. struct lpfc_iocbq *nextiocb;
  368. /*
  369. * Check to see if:
  370. * (a) there is anything on the txq to send
  371. * (b) link is up
  372. * (c) link attention events can be processed (fcp ring only)
  373. * (d) IOCB processing is not blocked by the outstanding mbox command.
  374. */
  375. if (pring->txq_cnt &&
  376. (phba->hba_state > LPFC_LINK_DOWN) &&
  377. (pring->ringno != phba->sli.fcp_ring ||
  378. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  379. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  380. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  381. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  382. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  383. if (iocb)
  384. lpfc_sli_update_ring(phba, pring);
  385. else
  386. lpfc_sli_update_full_ring(phba, pring);
  387. }
  388. return;
  389. }
  390. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  391. static void
  392. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  393. {
  394. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  395. /* If the ring is active, flag it */
  396. if (phba->sli.ring[ringno].cmdringaddr) {
  397. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  398. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  399. /*
  400. * Force update of the local copy of cmdGetInx
  401. */
  402. phba->sli.ring[ringno].local_getidx
  403. = le32_to_cpu(pgp->cmdGetInx);
  404. spin_lock_irq(phba->host->host_lock);
  405. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  406. spin_unlock_irq(phba->host->host_lock);
  407. }
  408. }
  409. }
  410. static int
  411. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  412. {
  413. uint8_t ret;
  414. switch (mbxCommand) {
  415. case MBX_LOAD_SM:
  416. case MBX_READ_NV:
  417. case MBX_WRITE_NV:
  418. case MBX_RUN_BIU_DIAG:
  419. case MBX_INIT_LINK:
  420. case MBX_DOWN_LINK:
  421. case MBX_CONFIG_LINK:
  422. case MBX_CONFIG_RING:
  423. case MBX_RESET_RING:
  424. case MBX_READ_CONFIG:
  425. case MBX_READ_RCONFIG:
  426. case MBX_READ_SPARM:
  427. case MBX_READ_STATUS:
  428. case MBX_READ_RPI:
  429. case MBX_READ_XRI:
  430. case MBX_READ_REV:
  431. case MBX_READ_LNK_STAT:
  432. case MBX_REG_LOGIN:
  433. case MBX_UNREG_LOGIN:
  434. case MBX_READ_LA:
  435. case MBX_CLEAR_LA:
  436. case MBX_DUMP_MEMORY:
  437. case MBX_DUMP_CONTEXT:
  438. case MBX_RUN_DIAGS:
  439. case MBX_RESTART:
  440. case MBX_UPDATE_CFG:
  441. case MBX_DOWN_LOAD:
  442. case MBX_DEL_LD_ENTRY:
  443. case MBX_RUN_PROGRAM:
  444. case MBX_SET_MASK:
  445. case MBX_SET_SLIM:
  446. case MBX_UNREG_D_ID:
  447. case MBX_KILL_BOARD:
  448. case MBX_CONFIG_FARP:
  449. case MBX_BEACON:
  450. case MBX_LOAD_AREA:
  451. case MBX_RUN_BIU_DIAG64:
  452. case MBX_CONFIG_PORT:
  453. case MBX_READ_SPARM64:
  454. case MBX_READ_RPI64:
  455. case MBX_REG_LOGIN64:
  456. case MBX_READ_LA64:
  457. case MBX_FLASH_WR_ULA:
  458. case MBX_SET_DEBUG:
  459. case MBX_LOAD_EXP_ROM:
  460. ret = mbxCommand;
  461. break;
  462. default:
  463. ret = MBX_SHUTDOWN;
  464. break;
  465. }
  466. return (ret);
  467. }
  468. static void
  469. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  470. {
  471. wait_queue_head_t *pdone_q;
  472. /*
  473. * If pdone_q is empty, the driver thread gave up waiting and
  474. * continued running.
  475. */
  476. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  477. if (pdone_q)
  478. wake_up_interruptible(pdone_q);
  479. return;
  480. }
  481. void
  482. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  483. {
  484. struct lpfc_dmabuf *mp;
  485. mp = (struct lpfc_dmabuf *) (pmb->context1);
  486. if (mp) {
  487. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  488. kfree(mp);
  489. }
  490. mempool_free( pmb, phba->mbox_mem_pool);
  491. return;
  492. }
  493. int
  494. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  495. {
  496. MAILBOX_t *mbox;
  497. MAILBOX_t *pmbox;
  498. LPFC_MBOXQ_t *pmb;
  499. struct lpfc_sli *psli;
  500. int i, rc;
  501. uint32_t process_next;
  502. psli = &phba->sli;
  503. /* We should only get here if we are in SLI2 mode */
  504. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  505. return (1);
  506. }
  507. phba->sli.slistat.mbox_event++;
  508. /* Get a Mailbox buffer to setup mailbox commands for callback */
  509. if ((pmb = phba->sli.mbox_active)) {
  510. pmbox = &pmb->mb;
  511. mbox = &phba->slim2p->mbx;
  512. /* First check out the status word */
  513. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  514. /* Sanity check to ensure the host owns the mailbox */
  515. if (pmbox->mbxOwner != OWN_HOST) {
  516. /* Lets try for a while */
  517. for (i = 0; i < 10240; i++) {
  518. /* First copy command data */
  519. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  520. sizeof (uint32_t));
  521. if (pmbox->mbxOwner == OWN_HOST)
  522. goto mbout;
  523. }
  524. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  525. <status> */
  526. lpfc_printf_log(phba,
  527. KERN_WARNING,
  528. LOG_MBOX | LOG_SLI,
  529. "%d:0304 Stray Mailbox Interrupt "
  530. "mbxCommand x%x mbxStatus x%x\n",
  531. phba->brd_no,
  532. pmbox->mbxCommand,
  533. pmbox->mbxStatus);
  534. spin_lock_irq(phba->host->host_lock);
  535. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  536. spin_unlock_irq(phba->host->host_lock);
  537. return (1);
  538. }
  539. mbout:
  540. del_timer_sync(&phba->sli.mbox_tmo);
  541. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  542. /*
  543. * It is a fatal error if unknown mbox command completion.
  544. */
  545. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  546. MBX_SHUTDOWN) {
  547. /* Unknow mailbox command compl */
  548. lpfc_printf_log(phba,
  549. KERN_ERR,
  550. LOG_MBOX | LOG_SLI,
  551. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  552. phba->brd_no,
  553. pmbox->mbxCommand);
  554. phba->hba_state = LPFC_HBA_ERROR;
  555. phba->work_hs = HS_FFER3;
  556. lpfc_handle_eratt(phba);
  557. return (0);
  558. }
  559. phba->sli.mbox_active = NULL;
  560. if (pmbox->mbxStatus) {
  561. phba->sli.slistat.mbox_stat_err++;
  562. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  563. /* Mbox cmd cmpl error - RETRYing */
  564. lpfc_printf_log(phba,
  565. KERN_INFO,
  566. LOG_MBOX | LOG_SLI,
  567. "%d:0305 Mbox cmd cmpl error - "
  568. "RETRYing Data: x%x x%x x%x x%x\n",
  569. phba->brd_no,
  570. pmbox->mbxCommand,
  571. pmbox->mbxStatus,
  572. pmbox->un.varWords[0],
  573. phba->hba_state);
  574. pmbox->mbxStatus = 0;
  575. pmbox->mbxOwner = OWN_HOST;
  576. spin_lock_irq(phba->host->host_lock);
  577. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  578. spin_unlock_irq(phba->host->host_lock);
  579. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  580. if (rc == MBX_SUCCESS)
  581. return (0);
  582. }
  583. }
  584. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  585. lpfc_printf_log(phba,
  586. KERN_INFO,
  587. LOG_MBOX | LOG_SLI,
  588. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  589. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  590. phba->brd_no,
  591. pmbox->mbxCommand,
  592. pmb->mbox_cmpl,
  593. *((uint32_t *) pmbox),
  594. pmbox->un.varWords[0],
  595. pmbox->un.varWords[1],
  596. pmbox->un.varWords[2],
  597. pmbox->un.varWords[3],
  598. pmbox->un.varWords[4],
  599. pmbox->un.varWords[5],
  600. pmbox->un.varWords[6],
  601. pmbox->un.varWords[7]);
  602. if (pmb->mbox_cmpl) {
  603. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  604. pmb->mbox_cmpl(phba,pmb);
  605. }
  606. }
  607. do {
  608. process_next = 0; /* by default don't loop */
  609. spin_lock_irq(phba->host->host_lock);
  610. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  611. /* Process next mailbox command if there is one */
  612. if ((pmb = lpfc_mbox_get(phba))) {
  613. spin_unlock_irq(phba->host->host_lock);
  614. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  615. if (rc == MBX_NOT_FINISHED) {
  616. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  617. pmb->mbox_cmpl(phba,pmb);
  618. process_next = 1;
  619. continue; /* loop back */
  620. }
  621. } else {
  622. spin_unlock_irq(phba->host->host_lock);
  623. /* Turn on IOCB processing */
  624. for (i = 0; i < phba->sli.num_rings; i++)
  625. lpfc_sli_turn_on_ring(phba, i);
  626. }
  627. } while (process_next);
  628. return (0);
  629. }
  630. static int
  631. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  632. struct lpfc_iocbq *saveq)
  633. {
  634. IOCB_t * irsp;
  635. WORD5 * w5p;
  636. uint32_t Rctl, Type;
  637. uint32_t match, i;
  638. match = 0;
  639. irsp = &(saveq->iocb);
  640. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  641. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  642. Rctl = FC_ELS_REQ;
  643. Type = FC_ELS_DATA;
  644. } else {
  645. w5p =
  646. (WORD5 *) & (saveq->iocb.un.
  647. ulpWord[5]);
  648. Rctl = w5p->hcsw.Rctl;
  649. Type = w5p->hcsw.Type;
  650. /* Firmware Workaround */
  651. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  652. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  653. Rctl = FC_ELS_REQ;
  654. Type = FC_ELS_DATA;
  655. w5p->hcsw.Rctl = Rctl;
  656. w5p->hcsw.Type = Type;
  657. }
  658. }
  659. /* unSolicited Responses */
  660. if (pring->prt[0].profile) {
  661. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  662. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  663. saveq);
  664. match = 1;
  665. } else {
  666. /* We must search, based on rctl / type
  667. for the right routine */
  668. for (i = 0; i < pring->num_mask;
  669. i++) {
  670. if ((pring->prt[i].rctl ==
  671. Rctl)
  672. && (pring->prt[i].
  673. type == Type)) {
  674. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  675. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  676. (phba, pring, saveq);
  677. match = 1;
  678. break;
  679. }
  680. }
  681. }
  682. if (match == 0) {
  683. /* Unexpected Rctl / Type received */
  684. /* Ring <ringno> handler: unexpected
  685. Rctl <Rctl> Type <Type> received */
  686. lpfc_printf_log(phba,
  687. KERN_WARNING,
  688. LOG_SLI,
  689. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  690. "Type x%x received \n",
  691. phba->brd_no,
  692. pring->ringno,
  693. Rctl,
  694. Type);
  695. }
  696. return(1);
  697. }
  698. static struct lpfc_iocbq *
  699. lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
  700. struct lpfc_sli_ring * pring,
  701. struct lpfc_iocbq * prspiocb)
  702. {
  703. struct lpfc_iocbq *cmd_iocb = NULL;
  704. uint16_t iotag;
  705. iotag = prspiocb->iocb.ulpIoTag;
  706. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  707. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  708. list_del(&cmd_iocb->list);
  709. pring->txcmplq_cnt--;
  710. return cmd_iocb;
  711. }
  712. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  713. "%d:0317 iotag x%x is out off "
  714. "range: max iotag x%x wd0 x%x\n",
  715. phba->brd_no, iotag,
  716. phba->sli.last_iotag,
  717. *(((uint32_t *) &prspiocb->iocb) + 7));
  718. return NULL;
  719. }
  720. static int
  721. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  722. struct lpfc_iocbq *saveq)
  723. {
  724. struct lpfc_iocbq * cmdiocbp;
  725. int rc = 1;
  726. unsigned long iflag;
  727. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  728. spin_lock_irqsave(phba->host->host_lock, iflag);
  729. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  730. if (cmdiocbp) {
  731. if (cmdiocbp->iocb_cmpl) {
  732. /*
  733. * Post all ELS completions to the worker thread.
  734. * All other are passed to the completion callback.
  735. */
  736. if (pring->ringno == LPFC_ELS_RING) {
  737. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  738. cmdiocbp->iocb_flag &=
  739. ~LPFC_DRIVER_ABORTED;
  740. saveq->iocb.ulpStatus =
  741. IOSTAT_LOCAL_REJECT;
  742. saveq->iocb.un.ulpWord[4] =
  743. IOERR_SLI_ABORTED;
  744. }
  745. spin_unlock_irqrestore(phba->host->host_lock,
  746. iflag);
  747. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  748. spin_lock_irqsave(phba->host->host_lock, iflag);
  749. }
  750. else {
  751. spin_unlock_irqrestore(phba->host->host_lock,
  752. iflag);
  753. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  754. spin_lock_irqsave(phba->host->host_lock, iflag);
  755. }
  756. } else
  757. lpfc_sli_release_iocbq(phba, cmdiocbp);
  758. } else {
  759. /*
  760. * Unknown initiating command based on the response iotag.
  761. * This could be the case on the ELS ring because of
  762. * lpfc_els_abort().
  763. */
  764. if (pring->ringno != LPFC_ELS_RING) {
  765. /*
  766. * Ring <ringno> handler: unexpected completion IoTag
  767. * <IoTag>
  768. */
  769. lpfc_printf_log(phba,
  770. KERN_WARNING,
  771. LOG_SLI,
  772. "%d:0322 Ring %d handler: unexpected "
  773. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  774. phba->brd_no,
  775. pring->ringno,
  776. saveq->iocb.ulpIoTag,
  777. saveq->iocb.ulpStatus,
  778. saveq->iocb.un.ulpWord[4],
  779. saveq->iocb.ulpCommand,
  780. saveq->iocb.ulpContext);
  781. }
  782. }
  783. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  784. return rc;
  785. }
  786. static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba,
  787. struct lpfc_sli_ring * pring)
  788. {
  789. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  790. /*
  791. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  792. * rsp ring <portRspMax>
  793. */
  794. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  795. "%d:0312 Ring %d handler: portRspPut %d "
  796. "is bigger then rsp ring %d\n",
  797. phba->brd_no, pring->ringno,
  798. le32_to_cpu(pgp->rspPutInx),
  799. pring->numRiocb);
  800. phba->hba_state = LPFC_HBA_ERROR;
  801. /*
  802. * All error attention handlers are posted to
  803. * worker thread
  804. */
  805. phba->work_ha |= HA_ERATT;
  806. phba->work_hs = HS_FFER3;
  807. if (phba->work_wait)
  808. wake_up(phba->work_wait);
  809. return;
  810. }
  811. void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba)
  812. {
  813. struct lpfc_sli * psli = &phba->sli;
  814. struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING];
  815. IOCB_t *irsp = NULL;
  816. IOCB_t *entry = NULL;
  817. struct lpfc_iocbq *cmdiocbq = NULL;
  818. struct lpfc_iocbq rspiocbq;
  819. struct lpfc_pgp *pgp;
  820. uint32_t status;
  821. uint32_t portRspPut, portRspMax;
  822. int type;
  823. uint32_t rsp_cmpl = 0;
  824. void __iomem *to_slim;
  825. uint32_t ha_copy;
  826. pring->stats.iocb_event++;
  827. /* The driver assumes SLI-2 mode */
  828. pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  829. /*
  830. * The next available response entry should never exceed the maximum
  831. * entries. If it does, treat it as an adapter hardware error.
  832. */
  833. portRspMax = pring->numRiocb;
  834. portRspPut = le32_to_cpu(pgp->rspPutInx);
  835. if (unlikely(portRspPut >= portRspMax)) {
  836. lpfc_sli_rsp_pointers_error(phba, pring);
  837. return;
  838. }
  839. rmb();
  840. while (pring->rspidx != portRspPut) {
  841. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  842. if (++pring->rspidx >= portRspMax)
  843. pring->rspidx = 0;
  844. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  845. (uint32_t *) &rspiocbq.iocb,
  846. sizeof (IOCB_t));
  847. irsp = &rspiocbq.iocb;
  848. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  849. pring->stats.iocb_rsp++;
  850. rsp_cmpl++;
  851. if (unlikely(irsp->ulpStatus)) {
  852. /* Rsp ring <ringno> error: IOCB */
  853. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  854. "%d:0326 Rsp Ring %d error: IOCB Data: "
  855. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  856. phba->brd_no, pring->ringno,
  857. irsp->un.ulpWord[0],
  858. irsp->un.ulpWord[1],
  859. irsp->un.ulpWord[2],
  860. irsp->un.ulpWord[3],
  861. irsp->un.ulpWord[4],
  862. irsp->un.ulpWord[5],
  863. *(((uint32_t *) irsp) + 6),
  864. *(((uint32_t *) irsp) + 7));
  865. }
  866. switch (type) {
  867. case LPFC_ABORT_IOCB:
  868. case LPFC_SOL_IOCB:
  869. /*
  870. * Idle exchange closed via ABTS from port. No iocb
  871. * resources need to be recovered.
  872. */
  873. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  874. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  875. "%d:0314 IOCB cmd 0x%x"
  876. " processed. Skipping"
  877. " completion", phba->brd_no,
  878. irsp->ulpCommand);
  879. break;
  880. }
  881. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  882. &rspiocbq);
  883. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  884. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  885. &rspiocbq);
  886. }
  887. break;
  888. default:
  889. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  890. char adaptermsg[LPFC_MAX_ADPTMSG];
  891. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  892. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  893. MAX_MSG_DATA);
  894. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  895. phba->brd_no, adaptermsg);
  896. } else {
  897. /* Unknown IOCB command */
  898. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  899. "%d:0321 Unknown IOCB command "
  900. "Data: x%x, x%x x%x x%x x%x\n",
  901. phba->brd_no, type,
  902. irsp->ulpCommand,
  903. irsp->ulpStatus,
  904. irsp->ulpIoTag,
  905. irsp->ulpContext);
  906. }
  907. break;
  908. }
  909. /*
  910. * The response IOCB has been processed. Update the ring
  911. * pointer in SLIM. If the port response put pointer has not
  912. * been updated, sync the pgp->rspPutInx and fetch the new port
  913. * response put pointer.
  914. */
  915. to_slim = phba->MBslimaddr +
  916. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  917. writeb(pring->rspidx, to_slim);
  918. if (pring->rspidx == portRspPut)
  919. portRspPut = le32_to_cpu(pgp->rspPutInx);
  920. }
  921. ha_copy = readl(phba->HAregaddr);
  922. ha_copy >>= (LPFC_FCP_RING * 4);
  923. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  924. pring->stats.iocb_rsp_full++;
  925. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  926. writel(status, phba->CAregaddr);
  927. readl(phba->CAregaddr);
  928. }
  929. if ((ha_copy & HA_R0CE_RSP) &&
  930. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  931. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  932. pring->stats.iocb_cmd_empty++;
  933. /* Force update of the local copy of cmdGetInx */
  934. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  935. lpfc_sli_resume_iocb(phba, pring);
  936. if ((pring->lpfc_sli_cmd_available))
  937. (pring->lpfc_sli_cmd_available) (phba, pring);
  938. }
  939. return;
  940. }
  941. /*
  942. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  943. * to check it explicitly.
  944. */
  945. static int
  946. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  947. struct lpfc_sli_ring * pring, uint32_t mask)
  948. {
  949. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  950. IOCB_t *irsp = NULL;
  951. IOCB_t *entry = NULL;
  952. struct lpfc_iocbq *cmdiocbq = NULL;
  953. struct lpfc_iocbq rspiocbq;
  954. uint32_t status;
  955. uint32_t portRspPut, portRspMax;
  956. int rc = 1;
  957. lpfc_iocb_type type;
  958. unsigned long iflag;
  959. uint32_t rsp_cmpl = 0;
  960. void __iomem *to_slim;
  961. spin_lock_irqsave(phba->host->host_lock, iflag);
  962. pring->stats.iocb_event++;
  963. /*
  964. * The next available response entry should never exceed the maximum
  965. * entries. If it does, treat it as an adapter hardware error.
  966. */
  967. portRspMax = pring->numRiocb;
  968. portRspPut = le32_to_cpu(pgp->rspPutInx);
  969. if (unlikely(portRspPut >= portRspMax)) {
  970. lpfc_sli_rsp_pointers_error(phba, pring);
  971. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  972. return 1;
  973. }
  974. rmb();
  975. while (pring->rspidx != portRspPut) {
  976. /*
  977. * Fetch an entry off the ring and copy it into a local data
  978. * structure. The copy involves a byte-swap since the
  979. * network byte order and pci byte orders are different.
  980. */
  981. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  982. if (++pring->rspidx >= portRspMax)
  983. pring->rspidx = 0;
  984. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  985. (uint32_t *) &rspiocbq.iocb,
  986. sizeof (IOCB_t));
  987. INIT_LIST_HEAD(&(rspiocbq.list));
  988. irsp = &rspiocbq.iocb;
  989. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  990. pring->stats.iocb_rsp++;
  991. rsp_cmpl++;
  992. if (unlikely(irsp->ulpStatus)) {
  993. /* Rsp ring <ringno> error: IOCB */
  994. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  995. "%d:0336 Rsp Ring %d error: IOCB Data: "
  996. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  997. phba->brd_no, pring->ringno,
  998. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  999. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  1000. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  1001. *(((uint32_t *) irsp) + 6),
  1002. *(((uint32_t *) irsp) + 7));
  1003. }
  1004. switch (type) {
  1005. case LPFC_ABORT_IOCB:
  1006. case LPFC_SOL_IOCB:
  1007. /*
  1008. * Idle exchange closed via ABTS from port. No iocb
  1009. * resources need to be recovered.
  1010. */
  1011. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1012. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1013. "%d:0333 IOCB cmd 0x%x"
  1014. " processed. Skipping"
  1015. " completion\n", phba->brd_no,
  1016. irsp->ulpCommand);
  1017. break;
  1018. }
  1019. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1020. &rspiocbq);
  1021. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1022. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1023. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1024. &rspiocbq);
  1025. } else {
  1026. spin_unlock_irqrestore(
  1027. phba->host->host_lock, iflag);
  1028. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1029. &rspiocbq);
  1030. spin_lock_irqsave(phba->host->host_lock,
  1031. iflag);
  1032. }
  1033. }
  1034. break;
  1035. case LPFC_UNSOL_IOCB:
  1036. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1037. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1038. spin_lock_irqsave(phba->host->host_lock, iflag);
  1039. break;
  1040. default:
  1041. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1042. char adaptermsg[LPFC_MAX_ADPTMSG];
  1043. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1044. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1045. MAX_MSG_DATA);
  1046. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1047. phba->brd_no, adaptermsg);
  1048. } else {
  1049. /* Unknown IOCB command */
  1050. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1051. "%d:0334 Unknown IOCB command "
  1052. "Data: x%x, x%x x%x x%x x%x\n",
  1053. phba->brd_no, type, irsp->ulpCommand,
  1054. irsp->ulpStatus, irsp->ulpIoTag,
  1055. irsp->ulpContext);
  1056. }
  1057. break;
  1058. }
  1059. /*
  1060. * The response IOCB has been processed. Update the ring
  1061. * pointer in SLIM. If the port response put pointer has not
  1062. * been updated, sync the pgp->rspPutInx and fetch the new port
  1063. * response put pointer.
  1064. */
  1065. to_slim = phba->MBslimaddr +
  1066. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  1067. writel(pring->rspidx, to_slim);
  1068. if (pring->rspidx == portRspPut)
  1069. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1070. }
  1071. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1072. pring->stats.iocb_rsp_full++;
  1073. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1074. writel(status, phba->CAregaddr);
  1075. readl(phba->CAregaddr);
  1076. }
  1077. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1078. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1079. pring->stats.iocb_cmd_empty++;
  1080. /* Force update of the local copy of cmdGetInx */
  1081. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1082. lpfc_sli_resume_iocb(phba, pring);
  1083. if ((pring->lpfc_sli_cmd_available))
  1084. (pring->lpfc_sli_cmd_available) (phba, pring);
  1085. }
  1086. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1087. return rc;
  1088. }
  1089. int
  1090. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  1091. struct lpfc_sli_ring * pring, uint32_t mask)
  1092. {
  1093. IOCB_t *entry;
  1094. IOCB_t *irsp = NULL;
  1095. struct lpfc_iocbq *rspiocbp = NULL;
  1096. struct lpfc_iocbq *next_iocb;
  1097. struct lpfc_iocbq *cmdiocbp;
  1098. struct lpfc_iocbq *saveq;
  1099. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1100. uint8_t iocb_cmd_type;
  1101. lpfc_iocb_type type;
  1102. uint32_t status, free_saveq;
  1103. uint32_t portRspPut, portRspMax;
  1104. int rc = 1;
  1105. unsigned long iflag;
  1106. void __iomem *to_slim;
  1107. spin_lock_irqsave(phba->host->host_lock, iflag);
  1108. pring->stats.iocb_event++;
  1109. /*
  1110. * The next available response entry should never exceed the maximum
  1111. * entries. If it does, treat it as an adapter hardware error.
  1112. */
  1113. portRspMax = pring->numRiocb;
  1114. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1115. if (portRspPut >= portRspMax) {
  1116. /*
  1117. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1118. * rsp ring <portRspMax>
  1119. */
  1120. lpfc_printf_log(phba,
  1121. KERN_ERR,
  1122. LOG_SLI,
  1123. "%d:0303 Ring %d handler: portRspPut %d "
  1124. "is bigger then rsp ring %d\n",
  1125. phba->brd_no,
  1126. pring->ringno, portRspPut, portRspMax);
  1127. phba->hba_state = LPFC_HBA_ERROR;
  1128. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1129. phba->work_hs = HS_FFER3;
  1130. lpfc_handle_eratt(phba);
  1131. return 1;
  1132. }
  1133. rmb();
  1134. while (pring->rspidx != portRspPut) {
  1135. /*
  1136. * Build a completion list and call the appropriate handler.
  1137. * The process is to get the next available response iocb, get
  1138. * a free iocb from the list, copy the response data into the
  1139. * free iocb, insert to the continuation list, and update the
  1140. * next response index to slim. This process makes response
  1141. * iocb's in the ring available to DMA as fast as possible but
  1142. * pays a penalty for a copy operation. Since the iocb is
  1143. * only 32 bytes, this penalty is considered small relative to
  1144. * the PCI reads for register values and a slim write. When
  1145. * the ulpLe field is set, the entire Command has been
  1146. * received.
  1147. */
  1148. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1149. rspiocbp = lpfc_sli_get_iocbq(phba);
  1150. if (rspiocbp == NULL) {
  1151. printk(KERN_ERR "%s: out of buffers! Failing "
  1152. "completion.\n", __FUNCTION__);
  1153. break;
  1154. }
  1155. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1156. irsp = &rspiocbp->iocb;
  1157. if (++pring->rspidx >= portRspMax)
  1158. pring->rspidx = 0;
  1159. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1160. + 1) * 4;
  1161. writel(pring->rspidx, to_slim);
  1162. if (list_empty(&(pring->iocb_continueq))) {
  1163. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1164. } else {
  1165. list_add_tail(&rspiocbp->list,
  1166. &(pring->iocb_continueq));
  1167. }
  1168. pring->iocb_continueq_cnt++;
  1169. if (irsp->ulpLe) {
  1170. /*
  1171. * By default, the driver expects to free all resources
  1172. * associated with this iocb completion.
  1173. */
  1174. free_saveq = 1;
  1175. saveq = list_get_first(&pring->iocb_continueq,
  1176. struct lpfc_iocbq, list);
  1177. irsp = &(saveq->iocb);
  1178. list_del_init(&pring->iocb_continueq);
  1179. pring->iocb_continueq_cnt = 0;
  1180. pring->stats.iocb_rsp++;
  1181. if (irsp->ulpStatus) {
  1182. /* Rsp ring <ringno> error: IOCB */
  1183. lpfc_printf_log(phba,
  1184. KERN_WARNING,
  1185. LOG_SLI,
  1186. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1187. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1188. phba->brd_no,
  1189. pring->ringno,
  1190. irsp->un.ulpWord[0],
  1191. irsp->un.ulpWord[1],
  1192. irsp->un.ulpWord[2],
  1193. irsp->un.ulpWord[3],
  1194. irsp->un.ulpWord[4],
  1195. irsp->un.ulpWord[5],
  1196. *(((uint32_t *) irsp) + 6),
  1197. *(((uint32_t *) irsp) + 7));
  1198. }
  1199. /*
  1200. * Fetch the IOCB command type and call the correct
  1201. * completion routine. Solicited and Unsolicited
  1202. * IOCBs on the ELS ring get freed back to the
  1203. * lpfc_iocb_list by the discovery kernel thread.
  1204. */
  1205. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1206. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1207. if (type == LPFC_SOL_IOCB) {
  1208. spin_unlock_irqrestore(phba->host->host_lock,
  1209. iflag);
  1210. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1211. saveq);
  1212. spin_lock_irqsave(phba->host->host_lock, iflag);
  1213. } else if (type == LPFC_UNSOL_IOCB) {
  1214. spin_unlock_irqrestore(phba->host->host_lock,
  1215. iflag);
  1216. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1217. saveq);
  1218. spin_lock_irqsave(phba->host->host_lock, iflag);
  1219. } else if (type == LPFC_ABORT_IOCB) {
  1220. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1221. ((cmdiocbp =
  1222. lpfc_sli_iocbq_lookup(phba, pring,
  1223. saveq)))) {
  1224. /* Call the specified completion
  1225. routine */
  1226. if (cmdiocbp->iocb_cmpl) {
  1227. spin_unlock_irqrestore(
  1228. phba->host->host_lock,
  1229. iflag);
  1230. (cmdiocbp->iocb_cmpl) (phba,
  1231. cmdiocbp, saveq);
  1232. spin_lock_irqsave(
  1233. phba->host->host_lock,
  1234. iflag);
  1235. } else
  1236. lpfc_sli_release_iocbq(phba,
  1237. cmdiocbp);
  1238. }
  1239. } else if (type == LPFC_UNKNOWN_IOCB) {
  1240. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1241. char adaptermsg[LPFC_MAX_ADPTMSG];
  1242. memset(adaptermsg, 0,
  1243. LPFC_MAX_ADPTMSG);
  1244. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1245. MAX_MSG_DATA);
  1246. dev_warn(&((phba->pcidev)->dev),
  1247. "lpfc%d: %s",
  1248. phba->brd_no, adaptermsg);
  1249. } else {
  1250. /* Unknown IOCB command */
  1251. lpfc_printf_log(phba,
  1252. KERN_ERR,
  1253. LOG_SLI,
  1254. "%d:0335 Unknown IOCB command "
  1255. "Data: x%x x%x x%x x%x\n",
  1256. phba->brd_no,
  1257. irsp->ulpCommand,
  1258. irsp->ulpStatus,
  1259. irsp->ulpIoTag,
  1260. irsp->ulpContext);
  1261. }
  1262. }
  1263. if (free_saveq) {
  1264. if (!list_empty(&saveq->list)) {
  1265. list_for_each_entry_safe(rspiocbp,
  1266. next_iocb,
  1267. &saveq->list,
  1268. list) {
  1269. list_del(&rspiocbp->list);
  1270. lpfc_sli_release_iocbq(phba,
  1271. rspiocbp);
  1272. }
  1273. }
  1274. lpfc_sli_release_iocbq(phba, saveq);
  1275. }
  1276. }
  1277. /*
  1278. * If the port response put pointer has not been updated, sync
  1279. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1280. * response put pointer.
  1281. */
  1282. if (pring->rspidx == portRspPut) {
  1283. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1284. }
  1285. } /* while (pring->rspidx != portRspPut) */
  1286. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1287. /* At least one response entry has been freed */
  1288. pring->stats.iocb_rsp_full++;
  1289. /* SET RxRE_RSP in Chip Att register */
  1290. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1291. writel(status, phba->CAregaddr);
  1292. readl(phba->CAregaddr); /* flush */
  1293. }
  1294. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1295. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1296. pring->stats.iocb_cmd_empty++;
  1297. /* Force update of the local copy of cmdGetInx */
  1298. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1299. lpfc_sli_resume_iocb(phba, pring);
  1300. if ((pring->lpfc_sli_cmd_available))
  1301. (pring->lpfc_sli_cmd_available) (phba, pring);
  1302. }
  1303. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1304. return rc;
  1305. }
  1306. int
  1307. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1308. {
  1309. LIST_HEAD(completions);
  1310. struct lpfc_iocbq *iocb, *next_iocb;
  1311. IOCB_t *cmd = NULL;
  1312. int errcnt;
  1313. errcnt = 0;
  1314. /* Error everything on txq and txcmplq
  1315. * First do the txq.
  1316. */
  1317. spin_lock_irq(phba->host->host_lock);
  1318. list_splice_init(&pring->txq, &completions);
  1319. pring->txq_cnt = 0;
  1320. /* Next issue ABTS for everything on the txcmplq */
  1321. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1322. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1323. spin_unlock_irq(phba->host->host_lock);
  1324. while (!list_empty(&completions)) {
  1325. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1326. cmd = &iocb->iocb;
  1327. list_del(&iocb->list);
  1328. if (iocb->iocb_cmpl) {
  1329. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1330. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1331. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1332. } else
  1333. lpfc_sli_release_iocbq(phba, iocb);
  1334. }
  1335. return errcnt;
  1336. }
  1337. int
  1338. lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
  1339. {
  1340. uint32_t status;
  1341. int i = 0;
  1342. int retval = 0;
  1343. /* Read the HBA Host Status Register */
  1344. status = readl(phba->HSregaddr);
  1345. /*
  1346. * Check status register every 100ms for 5 retries, then every
  1347. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1348. * every 2.5 sec for 4.
  1349. * Break our of the loop if errors occurred during init.
  1350. */
  1351. while (((status & mask) != mask) &&
  1352. !(status & HS_FFERM) &&
  1353. i++ < 20) {
  1354. if (i <= 5)
  1355. msleep(10);
  1356. else if (i <= 10)
  1357. msleep(500);
  1358. else
  1359. msleep(2500);
  1360. if (i == 15) {
  1361. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1362. lpfc_sli_brdrestart(phba);
  1363. }
  1364. /* Read the HBA Host Status Register */
  1365. status = readl(phba->HSregaddr);
  1366. }
  1367. /* Check to see if any errors occurred during init */
  1368. if ((status & HS_FFERM) || (i >= 20)) {
  1369. phba->hba_state = LPFC_HBA_ERROR;
  1370. retval = 1;
  1371. }
  1372. return retval;
  1373. }
  1374. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1375. void lpfc_reset_barrier(struct lpfc_hba * phba)
  1376. {
  1377. uint32_t __iomem *resp_buf;
  1378. uint32_t __iomem *mbox_buf;
  1379. volatile uint32_t mbox;
  1380. uint32_t hc_copy;
  1381. int i;
  1382. uint8_t hdrtype;
  1383. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1384. if (hdrtype != 0x80 ||
  1385. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1386. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1387. return;
  1388. /*
  1389. * Tell the other part of the chip to suspend temporarily all
  1390. * its DMA activity.
  1391. */
  1392. resp_buf = phba->MBslimaddr;
  1393. /* Disable the error attention */
  1394. hc_copy = readl(phba->HCregaddr);
  1395. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1396. readl(phba->HCregaddr); /* flush */
  1397. if (readl(phba->HAregaddr) & HA_ERATT) {
  1398. /* Clear Chip error bit */
  1399. writel(HA_ERATT, phba->HAregaddr);
  1400. phba->stopped = 1;
  1401. }
  1402. mbox = 0;
  1403. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1404. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1405. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1406. mbox_buf = phba->MBslimaddr;
  1407. writel(mbox, mbox_buf);
  1408. for (i = 0;
  1409. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1410. mdelay(1);
  1411. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1412. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1413. phba->stopped)
  1414. goto restore_hc;
  1415. else
  1416. goto clear_errat;
  1417. }
  1418. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1419. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1420. mdelay(1);
  1421. clear_errat:
  1422. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1423. mdelay(1);
  1424. if (readl(phba->HAregaddr) & HA_ERATT) {
  1425. writel(HA_ERATT, phba->HAregaddr);
  1426. phba->stopped = 1;
  1427. }
  1428. restore_hc:
  1429. writel(hc_copy, phba->HCregaddr);
  1430. readl(phba->HCregaddr); /* flush */
  1431. }
  1432. int
  1433. lpfc_sli_brdkill(struct lpfc_hba * phba)
  1434. {
  1435. struct lpfc_sli *psli;
  1436. LPFC_MBOXQ_t *pmb;
  1437. uint32_t status;
  1438. uint32_t ha_copy;
  1439. int retval;
  1440. int i = 0;
  1441. psli = &phba->sli;
  1442. /* Kill HBA */
  1443. lpfc_printf_log(phba,
  1444. KERN_INFO,
  1445. LOG_SLI,
  1446. "%d:0329 Kill HBA Data: x%x x%x\n",
  1447. phba->brd_no,
  1448. phba->hba_state,
  1449. psli->sli_flag);
  1450. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1451. GFP_KERNEL)) == 0)
  1452. return 1;
  1453. /* Disable the error attention */
  1454. spin_lock_irq(phba->host->host_lock);
  1455. status = readl(phba->HCregaddr);
  1456. status &= ~HC_ERINT_ENA;
  1457. writel(status, phba->HCregaddr);
  1458. readl(phba->HCregaddr); /* flush */
  1459. spin_unlock_irq(phba->host->host_lock);
  1460. lpfc_kill_board(phba, pmb);
  1461. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1462. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1463. if (retval != MBX_SUCCESS) {
  1464. if (retval != MBX_BUSY)
  1465. mempool_free(pmb, phba->mbox_mem_pool);
  1466. return 1;
  1467. }
  1468. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1469. mempool_free(pmb, phba->mbox_mem_pool);
  1470. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1471. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1472. * 3 seconds we still set HBA_ERROR state because the status of the
  1473. * board is now undefined.
  1474. */
  1475. ha_copy = readl(phba->HAregaddr);
  1476. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1477. mdelay(100);
  1478. ha_copy = readl(phba->HAregaddr);
  1479. }
  1480. del_timer_sync(&psli->mbox_tmo);
  1481. if (ha_copy & HA_ERATT) {
  1482. writel(HA_ERATT, phba->HAregaddr);
  1483. phba->stopped = 1;
  1484. }
  1485. spin_lock_irq(phba->host->host_lock);
  1486. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1487. spin_unlock_irq(phba->host->host_lock);
  1488. psli->mbox_active = NULL;
  1489. lpfc_hba_down_post(phba);
  1490. phba->hba_state = LPFC_HBA_ERROR;
  1491. return (ha_copy & HA_ERATT ? 0 : 1);
  1492. }
  1493. int
  1494. lpfc_sli_brdreset(struct lpfc_hba * phba)
  1495. {
  1496. struct lpfc_sli *psli;
  1497. struct lpfc_sli_ring *pring;
  1498. uint16_t cfg_value;
  1499. int i;
  1500. psli = &phba->sli;
  1501. /* Reset HBA */
  1502. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1503. "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
  1504. phba->hba_state, psli->sli_flag);
  1505. /* perform board reset */
  1506. phba->fc_eventTag = 0;
  1507. phba->fc_myDID = 0;
  1508. phba->fc_prevDID = 0;
  1509. /* Turn off parity checking and serr during the physical reset */
  1510. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1511. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1512. (cfg_value &
  1513. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1514. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1515. /* Now toggle INITFF bit in the Host Control Register */
  1516. writel(HC_INITFF, phba->HCregaddr);
  1517. mdelay(1);
  1518. readl(phba->HCregaddr); /* flush */
  1519. writel(0, phba->HCregaddr);
  1520. readl(phba->HCregaddr); /* flush */
  1521. /* Restore PCI cmd register */
  1522. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1523. /* Initialize relevant SLI info */
  1524. for (i = 0; i < psli->num_rings; i++) {
  1525. pring = &psli->ring[i];
  1526. pring->flag = 0;
  1527. pring->rspidx = 0;
  1528. pring->next_cmdidx = 0;
  1529. pring->local_getidx = 0;
  1530. pring->cmdidx = 0;
  1531. pring->missbufcnt = 0;
  1532. }
  1533. phba->hba_state = LPFC_WARM_START;
  1534. return 0;
  1535. }
  1536. int
  1537. lpfc_sli_brdrestart(struct lpfc_hba * phba)
  1538. {
  1539. MAILBOX_t *mb;
  1540. struct lpfc_sli *psli;
  1541. uint16_t skip_post;
  1542. volatile uint32_t word0;
  1543. void __iomem *to_slim;
  1544. spin_lock_irq(phba->host->host_lock);
  1545. psli = &phba->sli;
  1546. /* Restart HBA */
  1547. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1548. "%d:0337 Restart HBA Data: x%x x%x\n", phba->brd_no,
  1549. phba->hba_state, psli->sli_flag);
  1550. word0 = 0;
  1551. mb = (MAILBOX_t *) &word0;
  1552. mb->mbxCommand = MBX_RESTART;
  1553. mb->mbxHc = 1;
  1554. lpfc_reset_barrier(phba);
  1555. to_slim = phba->MBslimaddr;
  1556. writel(*(uint32_t *) mb, to_slim);
  1557. readl(to_slim); /* flush */
  1558. /* Only skip post after fc_ffinit is completed */
  1559. if (phba->hba_state) {
  1560. skip_post = 1;
  1561. word0 = 1; /* This is really setting up word1 */
  1562. } else {
  1563. skip_post = 0;
  1564. word0 = 0; /* This is really setting up word1 */
  1565. }
  1566. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1567. writel(*(uint32_t *) mb, to_slim);
  1568. readl(to_slim); /* flush */
  1569. lpfc_sli_brdreset(phba);
  1570. phba->stopped = 0;
  1571. phba->hba_state = LPFC_INIT_START;
  1572. spin_unlock_irq(phba->host->host_lock);
  1573. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1574. psli->stats_start = get_seconds();
  1575. if (skip_post)
  1576. mdelay(100);
  1577. else
  1578. mdelay(2000);
  1579. lpfc_hba_down_post(phba);
  1580. return 0;
  1581. }
  1582. static int
  1583. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1584. {
  1585. uint32_t status, i = 0;
  1586. /* Read the HBA Host Status Register */
  1587. status = readl(phba->HSregaddr);
  1588. /* Check status register to see what current state is */
  1589. i = 0;
  1590. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1591. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1592. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1593. * 4.
  1594. */
  1595. if (i++ >= 20) {
  1596. /* Adapter failed to init, timeout, status reg
  1597. <status> */
  1598. lpfc_printf_log(phba,
  1599. KERN_ERR,
  1600. LOG_INIT,
  1601. "%d:0436 Adapter failed to init, "
  1602. "timeout, status reg x%x\n",
  1603. phba->brd_no,
  1604. status);
  1605. phba->hba_state = LPFC_HBA_ERROR;
  1606. return -ETIMEDOUT;
  1607. }
  1608. /* Check to see if any errors occurred during init */
  1609. if (status & HS_FFERM) {
  1610. /* ERROR: During chipset initialization */
  1611. /* Adapter failed to init, chipset, status reg
  1612. <status> */
  1613. lpfc_printf_log(phba,
  1614. KERN_ERR,
  1615. LOG_INIT,
  1616. "%d:0437 Adapter failed to init, "
  1617. "chipset, status reg x%x\n",
  1618. phba->brd_no,
  1619. status);
  1620. phba->hba_state = LPFC_HBA_ERROR;
  1621. return -EIO;
  1622. }
  1623. if (i <= 5) {
  1624. msleep(10);
  1625. } else if (i <= 10) {
  1626. msleep(500);
  1627. } else {
  1628. msleep(2500);
  1629. }
  1630. if (i == 15) {
  1631. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1632. lpfc_sli_brdrestart(phba);
  1633. }
  1634. /* Read the HBA Host Status Register */
  1635. status = readl(phba->HSregaddr);
  1636. }
  1637. /* Check to see if any errors occurred during init */
  1638. if (status & HS_FFERM) {
  1639. /* ERROR: During chipset initialization */
  1640. /* Adapter failed to init, chipset, status reg <status> */
  1641. lpfc_printf_log(phba,
  1642. KERN_ERR,
  1643. LOG_INIT,
  1644. "%d:0438 Adapter failed to init, chipset, "
  1645. "status reg x%x\n",
  1646. phba->brd_no,
  1647. status);
  1648. phba->hba_state = LPFC_HBA_ERROR;
  1649. return -EIO;
  1650. }
  1651. /* Clear all interrupt enable conditions */
  1652. writel(0, phba->HCregaddr);
  1653. readl(phba->HCregaddr); /* flush */
  1654. /* setup host attn register */
  1655. writel(0xffffffff, phba->HAregaddr);
  1656. readl(phba->HAregaddr); /* flush */
  1657. return 0;
  1658. }
  1659. int
  1660. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1661. {
  1662. LPFC_MBOXQ_t *pmb;
  1663. uint32_t resetcount = 0, rc = 0, done = 0;
  1664. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1665. if (!pmb) {
  1666. phba->hba_state = LPFC_HBA_ERROR;
  1667. return -ENOMEM;
  1668. }
  1669. while (resetcount < 2 && !done) {
  1670. spin_lock_irq(phba->host->host_lock);
  1671. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1672. spin_unlock_irq(phba->host->host_lock);
  1673. phba->hba_state = LPFC_STATE_UNKNOWN;
  1674. lpfc_sli_brdrestart(phba);
  1675. msleep(2500);
  1676. rc = lpfc_sli_chipset_init(phba);
  1677. if (rc)
  1678. break;
  1679. spin_lock_irq(phba->host->host_lock);
  1680. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1681. spin_unlock_irq(phba->host->host_lock);
  1682. resetcount++;
  1683. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1684. * means the call was successful. Any other nonzero value is a failure,
  1685. * but if ERESTART is returned, the driver may reset the HBA and try
  1686. * again.
  1687. */
  1688. rc = lpfc_config_port_prep(phba);
  1689. if (rc == -ERESTART) {
  1690. phba->hba_state = 0;
  1691. continue;
  1692. } else if (rc) {
  1693. break;
  1694. }
  1695. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1696. lpfc_config_port(phba, pmb);
  1697. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1698. if (rc == MBX_SUCCESS)
  1699. done = 1;
  1700. else {
  1701. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1702. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1703. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1704. phba->brd_no, pmb->mb.mbxCommand,
  1705. pmb->mb.mbxStatus, 0);
  1706. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1707. }
  1708. }
  1709. if (!done)
  1710. goto lpfc_sli_hba_setup_error;
  1711. rc = lpfc_sli_ring_map(phba, pmb);
  1712. if (rc)
  1713. goto lpfc_sli_hba_setup_error;
  1714. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1715. rc = lpfc_config_port_post(phba);
  1716. if (rc)
  1717. goto lpfc_sli_hba_setup_error;
  1718. goto lpfc_sli_hba_setup_exit;
  1719. lpfc_sli_hba_setup_error:
  1720. phba->hba_state = LPFC_HBA_ERROR;
  1721. lpfc_sli_hba_setup_exit:
  1722. mempool_free(pmb, phba->mbox_mem_pool);
  1723. return rc;
  1724. }
  1725. /*! lpfc_mbox_timeout
  1726. *
  1727. * \pre
  1728. * \post
  1729. * \param hba Pointer to per struct lpfc_hba structure
  1730. * \param l1 Pointer to the driver's mailbox queue.
  1731. * \return
  1732. * void
  1733. *
  1734. * \b Description:
  1735. *
  1736. * This routine handles mailbox timeout events at timer interrupt context.
  1737. */
  1738. void
  1739. lpfc_mbox_timeout(unsigned long ptr)
  1740. {
  1741. struct lpfc_hba *phba;
  1742. unsigned long iflag;
  1743. phba = (struct lpfc_hba *)ptr;
  1744. spin_lock_irqsave(phba->host->host_lock, iflag);
  1745. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1746. phba->work_hba_events |= WORKER_MBOX_TMO;
  1747. if (phba->work_wait)
  1748. wake_up(phba->work_wait);
  1749. }
  1750. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1751. }
  1752. void
  1753. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1754. {
  1755. LPFC_MBOXQ_t *pmbox;
  1756. MAILBOX_t *mb;
  1757. struct lpfc_sli *psli = &phba->sli;
  1758. struct lpfc_sli_ring *pring;
  1759. spin_lock_irq(phba->host->host_lock);
  1760. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1761. spin_unlock_irq(phba->host->host_lock);
  1762. return;
  1763. }
  1764. pmbox = phba->sli.mbox_active;
  1765. mb = &pmbox->mb;
  1766. /* Mbox cmd <mbxCommand> timeout */
  1767. lpfc_printf_log(phba,
  1768. KERN_ERR,
  1769. LOG_MBOX | LOG_SLI,
  1770. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1771. phba->brd_no,
  1772. mb->mbxCommand,
  1773. phba->hba_state,
  1774. phba->sli.sli_flag,
  1775. phba->sli.mbox_active);
  1776. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  1777. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  1778. * it to fail all oustanding SCSI IO.
  1779. */
  1780. phba->hba_state = LPFC_STATE_UNKNOWN;
  1781. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1782. phba->fc_flag |= FC_ESTABLISH_LINK;
  1783. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1784. spin_unlock_irq(phba->host->host_lock);
  1785. pring = &psli->ring[psli->fcp_ring];
  1786. lpfc_sli_abort_iocb_ring(phba, pring);
  1787. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  1788. "%d:0316 Resetting board due to mailbox timeout\n",
  1789. phba->brd_no);
  1790. /*
  1791. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  1792. * on oustanding mailbox commands.
  1793. */
  1794. lpfc_offline_prep(phba);
  1795. lpfc_offline(phba);
  1796. lpfc_sli_brdrestart(phba);
  1797. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  1798. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  1799. lpfc_unblock_mgmt_io(phba);
  1800. return;
  1801. }
  1802. int
  1803. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1804. {
  1805. MAILBOX_t *mb;
  1806. struct lpfc_sli *psli;
  1807. uint32_t status, evtctr;
  1808. uint32_t ha_copy;
  1809. int i;
  1810. unsigned long drvr_flag = 0;
  1811. volatile uint32_t word0, ldata;
  1812. void __iomem *to_slim;
  1813. /* If the PCI channel is in offline state, do not post mbox. */
  1814. if (unlikely(pci_channel_offline(phba->pcidev)))
  1815. return MBX_NOT_FINISHED;
  1816. psli = &phba->sli;
  1817. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1818. mb = &pmbox->mb;
  1819. status = MBX_SUCCESS;
  1820. if (phba->hba_state == LPFC_HBA_ERROR) {
  1821. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1822. /* Mbox command <mbxCommand> cannot issue */
  1823. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1824. return (MBX_NOT_FINISHED);
  1825. }
  1826. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  1827. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  1828. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1829. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1830. return (MBX_NOT_FINISHED);
  1831. }
  1832. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1833. /* Polling for a mbox command when another one is already active
  1834. * is not allowed in SLI. Also, the driver must have established
  1835. * SLI2 mode to queue and process multiple mbox commands.
  1836. */
  1837. if (flag & MBX_POLL) {
  1838. spin_unlock_irqrestore(phba->host->host_lock,
  1839. drvr_flag);
  1840. /* Mbox command <mbxCommand> cannot issue */
  1841. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1842. return (MBX_NOT_FINISHED);
  1843. }
  1844. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1845. spin_unlock_irqrestore(phba->host->host_lock,
  1846. drvr_flag);
  1847. /* Mbox command <mbxCommand> cannot issue */
  1848. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1849. return (MBX_NOT_FINISHED);
  1850. }
  1851. /* Handle STOP IOCB processing flag. This is only meaningful
  1852. * if we are not polling for mbox completion.
  1853. */
  1854. if (flag & MBX_STOP_IOCB) {
  1855. flag &= ~MBX_STOP_IOCB;
  1856. /* Now flag each ring */
  1857. for (i = 0; i < psli->num_rings; i++) {
  1858. /* If the ring is active, flag it */
  1859. if (psli->ring[i].cmdringaddr) {
  1860. psli->ring[i].flag |=
  1861. LPFC_STOP_IOCB_MBX;
  1862. }
  1863. }
  1864. }
  1865. /* Another mailbox command is still being processed, queue this
  1866. * command to be processed later.
  1867. */
  1868. lpfc_mbox_put(phba, pmbox);
  1869. /* Mbox cmd issue - BUSY */
  1870. lpfc_printf_log(phba,
  1871. KERN_INFO,
  1872. LOG_MBOX | LOG_SLI,
  1873. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1874. phba->brd_no,
  1875. mb->mbxCommand,
  1876. phba->hba_state,
  1877. psli->sli_flag,
  1878. flag);
  1879. psli->slistat.mbox_busy++;
  1880. spin_unlock_irqrestore(phba->host->host_lock,
  1881. drvr_flag);
  1882. return (MBX_BUSY);
  1883. }
  1884. /* Handle STOP IOCB processing flag. This is only meaningful
  1885. * if we are not polling for mbox completion.
  1886. */
  1887. if (flag & MBX_STOP_IOCB) {
  1888. flag &= ~MBX_STOP_IOCB;
  1889. if (flag == MBX_NOWAIT) {
  1890. /* Now flag each ring */
  1891. for (i = 0; i < psli->num_rings; i++) {
  1892. /* If the ring is active, flag it */
  1893. if (psli->ring[i].cmdringaddr) {
  1894. psli->ring[i].flag |=
  1895. LPFC_STOP_IOCB_MBX;
  1896. }
  1897. }
  1898. }
  1899. }
  1900. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1901. /* If we are not polling, we MUST be in SLI2 mode */
  1902. if (flag != MBX_POLL) {
  1903. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  1904. (mb->mbxCommand != MBX_KILL_BOARD)) {
  1905. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1906. spin_unlock_irqrestore(phba->host->host_lock,
  1907. drvr_flag);
  1908. /* Mbox command <mbxCommand> cannot issue */
  1909. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1910. return (MBX_NOT_FINISHED);
  1911. }
  1912. /* timeout active mbox command */
  1913. mod_timer(&psli->mbox_tmo, (jiffies +
  1914. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  1915. }
  1916. /* Mailbox cmd <cmd> issue */
  1917. lpfc_printf_log(phba,
  1918. KERN_INFO,
  1919. LOG_MBOX | LOG_SLI,
  1920. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1921. phba->brd_no,
  1922. mb->mbxCommand,
  1923. phba->hba_state,
  1924. psli->sli_flag,
  1925. flag);
  1926. psli->slistat.mbox_cmd++;
  1927. evtctr = psli->slistat.mbox_event;
  1928. /* next set own bit for the adapter and copy over command word */
  1929. mb->mbxOwner = OWN_CHIP;
  1930. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1931. /* First copy command data to host SLIM area */
  1932. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1933. } else {
  1934. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1935. /* copy command data into host mbox for cmpl */
  1936. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1937. MAILBOX_CMD_SIZE);
  1938. }
  1939. /* First copy mbox command data to HBA SLIM, skip past first
  1940. word */
  1941. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1942. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1943. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1944. /* Next copy over first word, with mbxOwner set */
  1945. ldata = *((volatile uint32_t *)mb);
  1946. to_slim = phba->MBslimaddr;
  1947. writel(ldata, to_slim);
  1948. readl(to_slim); /* flush */
  1949. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1950. /* switch over to host mailbox */
  1951. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1952. }
  1953. }
  1954. wmb();
  1955. /* interrupt board to doit right away */
  1956. writel(CA_MBATT, phba->CAregaddr);
  1957. readl(phba->CAregaddr); /* flush */
  1958. switch (flag) {
  1959. case MBX_NOWAIT:
  1960. /* Don't wait for it to finish, just return */
  1961. psli->mbox_active = pmbox;
  1962. break;
  1963. case MBX_POLL:
  1964. psli->mbox_active = NULL;
  1965. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1966. /* First read mbox status word */
  1967. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  1968. word0 = le32_to_cpu(word0);
  1969. } else {
  1970. /* First read mbox status word */
  1971. word0 = readl(phba->MBslimaddr);
  1972. }
  1973. /* Read the HBA Host Attention Register */
  1974. ha_copy = readl(phba->HAregaddr);
  1975. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  1976. i *= 1000; /* Convert to ms */
  1977. /* Wait for command to complete */
  1978. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  1979. (!(ha_copy & HA_MBATT) &&
  1980. (phba->hba_state > LPFC_WARM_START))) {
  1981. if (i-- <= 0) {
  1982. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1983. spin_unlock_irqrestore(phba->host->host_lock,
  1984. drvr_flag);
  1985. return (MBX_NOT_FINISHED);
  1986. }
  1987. /* Check if we took a mbox interrupt while we were
  1988. polling */
  1989. if (((word0 & OWN_CHIP) != OWN_CHIP)
  1990. && (evtctr != psli->slistat.mbox_event))
  1991. break;
  1992. spin_unlock_irqrestore(phba->host->host_lock,
  1993. drvr_flag);
  1994. msleep(1);
  1995. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1996. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1997. /* First copy command data */
  1998. word0 = *((volatile uint32_t *)
  1999. &phba->slim2p->mbx);
  2000. word0 = le32_to_cpu(word0);
  2001. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2002. MAILBOX_t *slimmb;
  2003. volatile uint32_t slimword0;
  2004. /* Check real SLIM for any errors */
  2005. slimword0 = readl(phba->MBslimaddr);
  2006. slimmb = (MAILBOX_t *) & slimword0;
  2007. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2008. && slimmb->mbxStatus) {
  2009. psli->sli_flag &=
  2010. ~LPFC_SLI2_ACTIVE;
  2011. word0 = slimword0;
  2012. }
  2013. }
  2014. } else {
  2015. /* First copy command data */
  2016. word0 = readl(phba->MBslimaddr);
  2017. }
  2018. /* Read the HBA Host Attention Register */
  2019. ha_copy = readl(phba->HAregaddr);
  2020. }
  2021. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2022. /* copy results back to user */
  2023. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2024. MAILBOX_CMD_SIZE);
  2025. } else {
  2026. /* First copy command data */
  2027. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2028. MAILBOX_CMD_SIZE);
  2029. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2030. pmbox->context2) {
  2031. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2032. phba->MBslimaddr + DMP_RSP_OFFSET,
  2033. mb->un.varDmp.word_cnt);
  2034. }
  2035. }
  2036. writel(HA_MBATT, phba->HAregaddr);
  2037. readl(phba->HAregaddr); /* flush */
  2038. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2039. status = mb->mbxStatus;
  2040. }
  2041. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  2042. return (status);
  2043. }
  2044. static int
  2045. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2046. struct lpfc_iocbq * piocb)
  2047. {
  2048. /* Insert the caller's iocb in the txq tail for later processing. */
  2049. list_add_tail(&piocb->list, &pring->txq);
  2050. pring->txq_cnt++;
  2051. return (0);
  2052. }
  2053. static struct lpfc_iocbq *
  2054. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2055. struct lpfc_iocbq ** piocb)
  2056. {
  2057. struct lpfc_iocbq * nextiocb;
  2058. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2059. if (!nextiocb) {
  2060. nextiocb = *piocb;
  2061. *piocb = NULL;
  2062. }
  2063. return nextiocb;
  2064. }
  2065. int
  2066. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2067. struct lpfc_iocbq *piocb, uint32_t flag)
  2068. {
  2069. struct lpfc_iocbq *nextiocb;
  2070. IOCB_t *iocb;
  2071. /* If the PCI channel is in offline state, do not post iocbs. */
  2072. if (unlikely(pci_channel_offline(phba->pcidev)))
  2073. return IOCB_ERROR;
  2074. /*
  2075. * We should never get an IOCB if we are in a < LINK_DOWN state
  2076. */
  2077. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2078. return IOCB_ERROR;
  2079. /*
  2080. * Check to see if we are blocking IOCB processing because of a
  2081. * outstanding mbox command.
  2082. */
  2083. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2084. goto iocb_busy;
  2085. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  2086. /*
  2087. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  2088. * can be issued if the link is not up.
  2089. */
  2090. switch (piocb->iocb.ulpCommand) {
  2091. case CMD_QUE_RING_BUF_CN:
  2092. case CMD_QUE_RING_BUF64_CN:
  2093. /*
  2094. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2095. * completion, iocb_cmpl MUST be 0.
  2096. */
  2097. if (piocb->iocb_cmpl)
  2098. piocb->iocb_cmpl = NULL;
  2099. /*FALLTHROUGH*/
  2100. case CMD_CREATE_XRI_CR:
  2101. break;
  2102. default:
  2103. goto iocb_busy;
  2104. }
  2105. /*
  2106. * For FCP commands, we must be in a state where we can process link
  2107. * attention events.
  2108. */
  2109. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2110. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  2111. goto iocb_busy;
  2112. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2113. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2114. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2115. if (iocb)
  2116. lpfc_sli_update_ring(phba, pring);
  2117. else
  2118. lpfc_sli_update_full_ring(phba, pring);
  2119. if (!piocb)
  2120. return IOCB_SUCCESS;
  2121. goto out_busy;
  2122. iocb_busy:
  2123. pring->stats.iocb_cmd_delay++;
  2124. out_busy:
  2125. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2126. lpfc_sli_ringtx_put(phba, pring, piocb);
  2127. return IOCB_SUCCESS;
  2128. }
  2129. return IOCB_BUSY;
  2130. }
  2131. static int
  2132. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2133. {
  2134. struct lpfc_sli *psli;
  2135. struct lpfc_sli_ring *pring;
  2136. psli = &phba->sli;
  2137. /* Adjust cmd/rsp ring iocb entries more evenly */
  2138. /* Take some away from the FCP ring */
  2139. pring = &psli->ring[psli->fcp_ring];
  2140. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2141. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2142. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2143. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2144. /* and give them to the extra ring */
  2145. pring = &psli->ring[psli->extra_ring];
  2146. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2147. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2148. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2149. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2150. /* Setup default profile for this ring */
  2151. pring->iotag_max = 4096;
  2152. pring->num_mask = 1;
  2153. pring->prt[0].profile = 0; /* Mask 0 */
  2154. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2155. pring->prt[0].type = phba->cfg_multi_ring_type;
  2156. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2157. return 0;
  2158. }
  2159. int
  2160. lpfc_sli_setup(struct lpfc_hba *phba)
  2161. {
  2162. int i, totiocb = 0;
  2163. struct lpfc_sli *psli = &phba->sli;
  2164. struct lpfc_sli_ring *pring;
  2165. psli->num_rings = MAX_CONFIGURED_RINGS;
  2166. psli->sli_flag = 0;
  2167. psli->fcp_ring = LPFC_FCP_RING;
  2168. psli->next_ring = LPFC_FCP_NEXT_RING;
  2169. psli->extra_ring = LPFC_EXTRA_RING;
  2170. psli->iocbq_lookup = NULL;
  2171. psli->iocbq_lookup_len = 0;
  2172. psli->last_iotag = 0;
  2173. for (i = 0; i < psli->num_rings; i++) {
  2174. pring = &psli->ring[i];
  2175. switch (i) {
  2176. case LPFC_FCP_RING: /* ring 0 - FCP */
  2177. /* numCiocb and numRiocb are used in config_port */
  2178. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2179. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2180. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2181. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2182. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2183. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2184. pring->iotag_ctr = 0;
  2185. pring->iotag_max =
  2186. (phba->cfg_hba_queue_depth * 2);
  2187. pring->fast_iotag = pring->iotag_max;
  2188. pring->num_mask = 0;
  2189. break;
  2190. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2191. /* numCiocb and numRiocb are used in config_port */
  2192. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2193. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2194. pring->num_mask = 0;
  2195. break;
  2196. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2197. /* numCiocb and numRiocb are used in config_port */
  2198. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2199. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2200. pring->fast_iotag = 0;
  2201. pring->iotag_ctr = 0;
  2202. pring->iotag_max = 4096;
  2203. pring->num_mask = 4;
  2204. pring->prt[0].profile = 0; /* Mask 0 */
  2205. pring->prt[0].rctl = FC_ELS_REQ;
  2206. pring->prt[0].type = FC_ELS_DATA;
  2207. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2208. lpfc_els_unsol_event;
  2209. pring->prt[1].profile = 0; /* Mask 1 */
  2210. pring->prt[1].rctl = FC_ELS_RSP;
  2211. pring->prt[1].type = FC_ELS_DATA;
  2212. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2213. lpfc_els_unsol_event;
  2214. pring->prt[2].profile = 0; /* Mask 2 */
  2215. /* NameServer Inquiry */
  2216. pring->prt[2].rctl = FC_UNSOL_CTL;
  2217. /* NameServer */
  2218. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2219. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2220. lpfc_ct_unsol_event;
  2221. pring->prt[3].profile = 0; /* Mask 3 */
  2222. /* NameServer response */
  2223. pring->prt[3].rctl = FC_SOL_CTL;
  2224. /* NameServer */
  2225. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2226. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2227. lpfc_ct_unsol_event;
  2228. break;
  2229. }
  2230. totiocb += (pring->numCiocb + pring->numRiocb);
  2231. }
  2232. if (totiocb > MAX_SLI2_IOCB) {
  2233. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2234. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2235. "%d:0462 Too many cmd / rsp ring entries in "
  2236. "SLI2 SLIM Data: x%x x%x\n",
  2237. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  2238. }
  2239. if (phba->cfg_multi_ring_support == 2)
  2240. lpfc_extra_ring_setup(phba);
  2241. return 0;
  2242. }
  2243. int
  2244. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  2245. {
  2246. struct lpfc_sli *psli;
  2247. struct lpfc_sli_ring *pring;
  2248. int i;
  2249. psli = &phba->sli;
  2250. spin_lock_irq(phba->host->host_lock);
  2251. INIT_LIST_HEAD(&psli->mboxq);
  2252. /* Initialize list headers for txq and txcmplq as double linked lists */
  2253. for (i = 0; i < psli->num_rings; i++) {
  2254. pring = &psli->ring[i];
  2255. pring->ringno = i;
  2256. pring->next_cmdidx = 0;
  2257. pring->local_getidx = 0;
  2258. pring->cmdidx = 0;
  2259. INIT_LIST_HEAD(&pring->txq);
  2260. INIT_LIST_HEAD(&pring->txcmplq);
  2261. INIT_LIST_HEAD(&pring->iocb_continueq);
  2262. INIT_LIST_HEAD(&pring->postbufq);
  2263. }
  2264. spin_unlock_irq(phba->host->host_lock);
  2265. return (1);
  2266. }
  2267. int
  2268. lpfc_sli_hba_down(struct lpfc_hba * phba)
  2269. {
  2270. LIST_HEAD(completions);
  2271. struct lpfc_sli *psli;
  2272. struct lpfc_sli_ring *pring;
  2273. LPFC_MBOXQ_t *pmb;
  2274. struct lpfc_iocbq *iocb;
  2275. IOCB_t *cmd = NULL;
  2276. int i;
  2277. unsigned long flags = 0;
  2278. psli = &phba->sli;
  2279. lpfc_hba_down_prep(phba);
  2280. spin_lock_irqsave(phba->host->host_lock, flags);
  2281. for (i = 0; i < psli->num_rings; i++) {
  2282. pring = &psli->ring[i];
  2283. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2284. /*
  2285. * Error everything on the txq since these iocbs have not been
  2286. * given to the FW yet.
  2287. */
  2288. list_splice_init(&pring->txq, &completions);
  2289. pring->txq_cnt = 0;
  2290. }
  2291. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2292. while (!list_empty(&completions)) {
  2293. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  2294. cmd = &iocb->iocb;
  2295. list_del(&iocb->list);
  2296. if (iocb->iocb_cmpl) {
  2297. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2298. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2299. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2300. } else
  2301. lpfc_sli_release_iocbq(phba, iocb);
  2302. }
  2303. /* Return any active mbox cmds */
  2304. del_timer_sync(&psli->mbox_tmo);
  2305. spin_lock_irqsave(phba->host->host_lock, flags);
  2306. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2307. if (psli->mbox_active) {
  2308. pmb = psli->mbox_active;
  2309. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2310. if (pmb->mbox_cmpl) {
  2311. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2312. pmb->mbox_cmpl(phba,pmb);
  2313. spin_lock_irqsave(phba->host->host_lock, flags);
  2314. }
  2315. }
  2316. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2317. psli->mbox_active = NULL;
  2318. /* Return any pending mbox cmds */
  2319. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2320. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2321. if (pmb->mbox_cmpl) {
  2322. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2323. pmb->mbox_cmpl(phba,pmb);
  2324. spin_lock_irqsave(phba->host->host_lock, flags);
  2325. }
  2326. }
  2327. INIT_LIST_HEAD(&psli->mboxq);
  2328. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2329. return 1;
  2330. }
  2331. void
  2332. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2333. {
  2334. uint32_t *src = srcp;
  2335. uint32_t *dest = destp;
  2336. uint32_t ldata;
  2337. int i;
  2338. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2339. ldata = *src;
  2340. ldata = le32_to_cpu(ldata);
  2341. *dest = ldata;
  2342. src++;
  2343. dest++;
  2344. }
  2345. }
  2346. int
  2347. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2348. struct lpfc_dmabuf * mp)
  2349. {
  2350. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2351. later */
  2352. list_add_tail(&mp->list, &pring->postbufq);
  2353. pring->postbufq_cnt++;
  2354. return 0;
  2355. }
  2356. struct lpfc_dmabuf *
  2357. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2358. dma_addr_t phys)
  2359. {
  2360. struct lpfc_dmabuf *mp, *next_mp;
  2361. struct list_head *slp = &pring->postbufq;
  2362. /* Search postbufq, from the begining, looking for a match on phys */
  2363. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2364. if (mp->phys == phys) {
  2365. list_del_init(&mp->list);
  2366. pring->postbufq_cnt--;
  2367. return mp;
  2368. }
  2369. }
  2370. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2371. "%d:0410 Cannot find virtual addr for mapped buf on "
  2372. "ring %d Data x%llx x%p x%p x%x\n",
  2373. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2374. slp->next, slp->prev, pring->postbufq_cnt);
  2375. return NULL;
  2376. }
  2377. static void
  2378. lpfc_sli_abort_els_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2379. struct lpfc_iocbq * rspiocb)
  2380. {
  2381. spin_lock_irq(phba->host->host_lock);
  2382. lpfc_sli_release_iocbq(phba, cmdiocb);
  2383. spin_unlock_irq(phba->host->host_lock);
  2384. return;
  2385. }
  2386. int
  2387. lpfc_sli_issue_abort_iotag(struct lpfc_hba * phba,
  2388. struct lpfc_sli_ring * pring,
  2389. struct lpfc_iocbq * cmdiocb)
  2390. {
  2391. struct lpfc_iocbq *abtsiocbp;
  2392. IOCB_t *icmd = NULL;
  2393. IOCB_t *iabt = NULL;
  2394. int retval = IOCB_ERROR;
  2395. /* There are certain command types we don't want
  2396. * to abort.
  2397. */
  2398. icmd = &cmdiocb->iocb;
  2399. if ((icmd->ulpCommand == CMD_ABORT_XRI_CN) ||
  2400. (icmd->ulpCommand == CMD_CLOSE_XRI_CN))
  2401. return 0;
  2402. /* If we're unloading, interrupts are disabled so we
  2403. * need to cleanup the iocb here.
  2404. */
  2405. if (phba->fc_flag & FC_UNLOADING)
  2406. goto abort_iotag_exit;
  2407. /* issue ABTS for this IOCB based on iotag */
  2408. abtsiocbp = lpfc_sli_get_iocbq(phba);
  2409. if (abtsiocbp == NULL)
  2410. return 0;
  2411. /* This signals the response to set the correct status
  2412. * before calling the completion handler.
  2413. */
  2414. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  2415. iabt = &abtsiocbp->iocb;
  2416. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  2417. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  2418. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  2419. iabt->ulpLe = 1;
  2420. iabt->ulpClass = icmd->ulpClass;
  2421. if (phba->hba_state >= LPFC_LINK_UP)
  2422. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  2423. else
  2424. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  2425. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  2426. retval = lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  2427. abort_iotag_exit:
  2428. /* If we could not issue an abort dequeue the iocb and handle
  2429. * the completion here.
  2430. */
  2431. if (retval == IOCB_ERROR) {
  2432. list_del(&cmdiocb->list);
  2433. pring->txcmplq_cnt--;
  2434. if (cmdiocb->iocb_cmpl) {
  2435. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2436. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  2437. spin_unlock_irq(phba->host->host_lock);
  2438. (cmdiocb->iocb_cmpl) (phba, cmdiocb, cmdiocb);
  2439. spin_lock_irq(phba->host->host_lock);
  2440. } else
  2441. lpfc_sli_release_iocbq(phba, cmdiocb);
  2442. }
  2443. return 1;
  2444. }
  2445. static int
  2446. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
  2447. uint64_t lun_id, uint32_t ctx,
  2448. lpfc_ctx_cmd ctx_cmd)
  2449. {
  2450. struct lpfc_scsi_buf *lpfc_cmd;
  2451. struct scsi_cmnd *cmnd;
  2452. int rc = 1;
  2453. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  2454. return rc;
  2455. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  2456. cmnd = lpfc_cmd->pCmd;
  2457. if (cmnd == NULL)
  2458. return rc;
  2459. switch (ctx_cmd) {
  2460. case LPFC_CTX_LUN:
  2461. if ((cmnd->device->id == tgt_id) &&
  2462. (cmnd->device->lun == lun_id))
  2463. rc = 0;
  2464. break;
  2465. case LPFC_CTX_TGT:
  2466. if (cmnd->device->id == tgt_id)
  2467. rc = 0;
  2468. break;
  2469. case LPFC_CTX_CTX:
  2470. if (iocbq->iocb.ulpContext == ctx)
  2471. rc = 0;
  2472. break;
  2473. case LPFC_CTX_HOST:
  2474. rc = 0;
  2475. break;
  2476. default:
  2477. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2478. __FUNCTION__, ctx_cmd);
  2479. break;
  2480. }
  2481. return rc;
  2482. }
  2483. int
  2484. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2485. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2486. {
  2487. struct lpfc_iocbq *iocbq;
  2488. int sum, i;
  2489. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  2490. iocbq = phba->sli.iocbq_lookup[i];
  2491. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2492. 0, ctx_cmd) == 0)
  2493. sum++;
  2494. }
  2495. return sum;
  2496. }
  2497. void
  2498. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2499. struct lpfc_iocbq * rspiocb)
  2500. {
  2501. spin_lock_irq(phba->host->host_lock);
  2502. lpfc_sli_release_iocbq(phba, cmdiocb);
  2503. spin_unlock_irq(phba->host->host_lock);
  2504. return;
  2505. }
  2506. int
  2507. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2508. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2509. lpfc_ctx_cmd abort_cmd)
  2510. {
  2511. struct lpfc_iocbq *iocbq;
  2512. struct lpfc_iocbq *abtsiocb;
  2513. IOCB_t *cmd = NULL;
  2514. int errcnt = 0, ret_val = 0;
  2515. int i;
  2516. for (i = 1; i <= phba->sli.last_iotag; i++) {
  2517. iocbq = phba->sli.iocbq_lookup[i];
  2518. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2519. 0, abort_cmd) != 0)
  2520. continue;
  2521. /* issue ABTS for this IOCB based on iotag */
  2522. abtsiocb = lpfc_sli_get_iocbq(phba);
  2523. if (abtsiocb == NULL) {
  2524. errcnt++;
  2525. continue;
  2526. }
  2527. cmd = &iocbq->iocb;
  2528. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2529. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2530. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2531. abtsiocb->iocb.ulpLe = 1;
  2532. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2533. if (phba->hba_state >= LPFC_LINK_UP)
  2534. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2535. else
  2536. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2537. /* Setup callback routine and issue the command. */
  2538. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  2539. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2540. if (ret_val == IOCB_ERROR) {
  2541. lpfc_sli_release_iocbq(phba, abtsiocb);
  2542. errcnt++;
  2543. continue;
  2544. }
  2545. }
  2546. return errcnt;
  2547. }
  2548. static void
  2549. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  2550. struct lpfc_iocbq *cmdiocbq,
  2551. struct lpfc_iocbq *rspiocbq)
  2552. {
  2553. wait_queue_head_t *pdone_q;
  2554. unsigned long iflags;
  2555. spin_lock_irqsave(phba->host->host_lock, iflags);
  2556. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  2557. if (cmdiocbq->context2 && rspiocbq)
  2558. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  2559. &rspiocbq->iocb, sizeof(IOCB_t));
  2560. pdone_q = cmdiocbq->context_un.wait_queue;
  2561. spin_unlock_irqrestore(phba->host->host_lock, iflags);
  2562. if (pdone_q)
  2563. wake_up(pdone_q);
  2564. return;
  2565. }
  2566. /*
  2567. * Issue the caller's iocb and wait for its completion, but no longer than the
  2568. * caller's timeout. Note that iocb_flags is cleared before the
  2569. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  2570. * definition this is a wait function.
  2571. */
  2572. int
  2573. lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
  2574. struct lpfc_sli_ring * pring,
  2575. struct lpfc_iocbq * piocb,
  2576. struct lpfc_iocbq * prspiocbq,
  2577. uint32_t timeout)
  2578. {
  2579. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  2580. long timeleft, timeout_req = 0;
  2581. int retval = IOCB_SUCCESS;
  2582. uint32_t creg_val;
  2583. /*
  2584. * If the caller has provided a response iocbq buffer, then context2
  2585. * is NULL or its an error.
  2586. */
  2587. if (prspiocbq) {
  2588. if (piocb->context2)
  2589. return IOCB_ERROR;
  2590. piocb->context2 = prspiocbq;
  2591. }
  2592. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  2593. piocb->context_un.wait_queue = &done_q;
  2594. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  2595. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2596. creg_val = readl(phba->HCregaddr);
  2597. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  2598. writel(creg_val, phba->HCregaddr);
  2599. readl(phba->HCregaddr); /* flush */
  2600. }
  2601. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  2602. if (retval == IOCB_SUCCESS) {
  2603. timeout_req = timeout * HZ;
  2604. spin_unlock_irq(phba->host->host_lock);
  2605. timeleft = wait_event_timeout(done_q,
  2606. piocb->iocb_flag & LPFC_IO_WAKE,
  2607. timeout_req);
  2608. spin_lock_irq(phba->host->host_lock);
  2609. if (timeleft == 0) {
  2610. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2611. "%d:0338 IOCB wait timeout error - no "
  2612. "wake response Data x%x\n",
  2613. phba->brd_no, timeout);
  2614. retval = IOCB_TIMEDOUT;
  2615. } else if (!(piocb->iocb_flag & LPFC_IO_WAKE)) {
  2616. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2617. "%d:0330 IOCB wake NOT set, "
  2618. "Data x%x x%lx\n", phba->brd_no,
  2619. timeout, (timeleft / jiffies));
  2620. retval = IOCB_TIMEDOUT;
  2621. } else {
  2622. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2623. "%d:0331 IOCB wake signaled\n",
  2624. phba->brd_no);
  2625. }
  2626. } else {
  2627. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2628. "%d:0332 IOCB wait issue failed, Data x%x\n",
  2629. phba->brd_no, retval);
  2630. retval = IOCB_ERROR;
  2631. }
  2632. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2633. creg_val = readl(phba->HCregaddr);
  2634. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  2635. writel(creg_val, phba->HCregaddr);
  2636. readl(phba->HCregaddr); /* flush */
  2637. }
  2638. if (prspiocbq)
  2639. piocb->context2 = NULL;
  2640. piocb->context_un.wait_queue = NULL;
  2641. piocb->iocb_cmpl = NULL;
  2642. return retval;
  2643. }
  2644. int
  2645. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2646. uint32_t timeout)
  2647. {
  2648. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  2649. DECLARE_WAITQUEUE(wq_entry, current);
  2650. uint32_t timeleft = 0;
  2651. int retval;
  2652. /* The caller must leave context1 empty. */
  2653. if (pmboxq->context1 != 0) {
  2654. return (MBX_NOT_FINISHED);
  2655. }
  2656. /* setup wake call as IOCB callback */
  2657. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2658. /* setup context field to pass wait_queue pointer to wake function */
  2659. pmboxq->context1 = &done_q;
  2660. /* start to sleep before we wait, to avoid races */
  2661. set_current_state(TASK_INTERRUPTIBLE);
  2662. add_wait_queue(&done_q, &wq_entry);
  2663. /* now issue the command */
  2664. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2665. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2666. timeleft = schedule_timeout(timeout * HZ);
  2667. pmboxq->context1 = NULL;
  2668. /* if schedule_timeout returns 0, we timed out and were not
  2669. woken up */
  2670. if ((timeleft == 0) || signal_pending(current))
  2671. retval = MBX_TIMEOUT;
  2672. else
  2673. retval = MBX_SUCCESS;
  2674. }
  2675. set_current_state(TASK_RUNNING);
  2676. remove_wait_queue(&done_q, &wq_entry);
  2677. return retval;
  2678. }
  2679. int
  2680. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  2681. {
  2682. int i = 0;
  2683. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !phba->stopped) {
  2684. if (i++ > LPFC_MBOX_TMO * 1000)
  2685. return 1;
  2686. if (lpfc_sli_handle_mb_event(phba) == 0)
  2687. i = 0;
  2688. msleep(1);
  2689. }
  2690. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  2691. }
  2692. irqreturn_t
  2693. lpfc_intr_handler(int irq, void *dev_id)
  2694. {
  2695. struct lpfc_hba *phba;
  2696. uint32_t ha_copy;
  2697. uint32_t work_ha_copy;
  2698. unsigned long status;
  2699. int i;
  2700. uint32_t control;
  2701. /*
  2702. * Get the driver's phba structure from the dev_id and
  2703. * assume the HBA is not interrupting.
  2704. */
  2705. phba = (struct lpfc_hba *) dev_id;
  2706. if (unlikely(!phba))
  2707. return IRQ_NONE;
  2708. /* If the pci channel is offline, ignore all the interrupts. */
  2709. if (unlikely(pci_channel_offline(phba->pcidev)))
  2710. return IRQ_NONE;
  2711. phba->sli.slistat.sli_intr++;
  2712. /*
  2713. * Call the HBA to see if it is interrupting. If not, don't claim
  2714. * the interrupt
  2715. */
  2716. /* Ignore all interrupts during initialization. */
  2717. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2718. return IRQ_NONE;
  2719. /*
  2720. * Read host attention register to determine interrupt source
  2721. * Clear Attention Sources, except Error Attention (to
  2722. * preserve status) and Link Attention
  2723. */
  2724. spin_lock(phba->host->host_lock);
  2725. ha_copy = readl(phba->HAregaddr);
  2726. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2727. readl(phba->HAregaddr); /* flush */
  2728. spin_unlock(phba->host->host_lock);
  2729. if (unlikely(!ha_copy))
  2730. return IRQ_NONE;
  2731. work_ha_copy = ha_copy & phba->work_ha_mask;
  2732. if (unlikely(work_ha_copy)) {
  2733. if (work_ha_copy & HA_LATT) {
  2734. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2735. /*
  2736. * Turn off Link Attention interrupts
  2737. * until CLEAR_LA done
  2738. */
  2739. spin_lock(phba->host->host_lock);
  2740. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2741. control = readl(phba->HCregaddr);
  2742. control &= ~HC_LAINT_ENA;
  2743. writel(control, phba->HCregaddr);
  2744. readl(phba->HCregaddr); /* flush */
  2745. spin_unlock(phba->host->host_lock);
  2746. }
  2747. else
  2748. work_ha_copy &= ~HA_LATT;
  2749. }
  2750. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2751. for (i = 0; i < phba->sli.num_rings; i++) {
  2752. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2753. /*
  2754. * Turn off Slow Rings interrupts
  2755. */
  2756. spin_lock(phba->host->host_lock);
  2757. control = readl(phba->HCregaddr);
  2758. control &= ~(HC_R0INT_ENA << i);
  2759. writel(control, phba->HCregaddr);
  2760. readl(phba->HCregaddr); /* flush */
  2761. spin_unlock(phba->host->host_lock);
  2762. }
  2763. }
  2764. }
  2765. if (work_ha_copy & HA_ERATT) {
  2766. phba->hba_state = LPFC_HBA_ERROR;
  2767. /*
  2768. * There was a link/board error. Read the
  2769. * status register to retrieve the error event
  2770. * and process it.
  2771. */
  2772. phba->sli.slistat.err_attn_event++;
  2773. /* Save status info */
  2774. phba->work_hs = readl(phba->HSregaddr);
  2775. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2776. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2777. /* Clear Chip error bit */
  2778. writel(HA_ERATT, phba->HAregaddr);
  2779. readl(phba->HAregaddr); /* flush */
  2780. phba->stopped = 1;
  2781. }
  2782. spin_lock(phba->host->host_lock);
  2783. phba->work_ha |= work_ha_copy;
  2784. if (phba->work_wait)
  2785. wake_up(phba->work_wait);
  2786. spin_unlock(phba->host->host_lock);
  2787. }
  2788. ha_copy &= ~(phba->work_ha_mask);
  2789. /*
  2790. * Process all events on FCP ring. Take the optimized path for
  2791. * FCP IO. Any other IO is slow path and is handled by
  2792. * the worker thread.
  2793. */
  2794. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2795. status >>= (4*LPFC_FCP_RING);
  2796. if (status & HA_RXATT)
  2797. lpfc_sli_handle_fast_ring_event(phba,
  2798. &phba->sli.ring[LPFC_FCP_RING],
  2799. status);
  2800. if (phba->cfg_multi_ring_support == 2) {
  2801. /*
  2802. * Process all events on extra ring. Take the optimized path
  2803. * for extra ring IO. Any other IO is slow path and is handled
  2804. * by the worker thread.
  2805. */
  2806. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  2807. status >>= (4*LPFC_EXTRA_RING);
  2808. if (status & HA_RXATT) {
  2809. lpfc_sli_handle_fast_ring_event(phba,
  2810. &phba->sli.ring[LPFC_EXTRA_RING],
  2811. status);
  2812. }
  2813. }
  2814. return IRQ_HANDLED;
  2815. } /* lpfc_intr_handler */