dma-mapping.h 14 KB

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  1. #ifndef ASMARM_DMA_MAPPING_H
  2. #define ASMARM_DMA_MAPPING_H
  3. #ifdef __KERNEL__
  4. #include <linux/mm.h> /* need struct page */
  5. #include <linux/scatterlist.h>
  6. #include <asm-generic/dma-coherent.h>
  7. /*
  8. * DMA-consistent mapping functions. These allocate/free a region of
  9. * uncached, unwrite-buffered mapped memory space for use with DMA
  10. * devices. This is the "generic" version. The PCI specific version
  11. * is in pci.h
  12. *
  13. * Note: Drivers should NOT use this function directly, as it will break
  14. * platforms with CONFIG_DMABOUNCE.
  15. * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  16. */
  17. extern void dma_cache_maint(const void *kaddr, size_t size, int rw);
  18. /*
  19. * Return whether the given device DMA address mask can be supported
  20. * properly. For example, if your device can only drive the low 24-bits
  21. * during bus mastering, then you would pass 0x00ffffff as the mask
  22. * to this function.
  23. *
  24. * FIXME: This should really be a platform specific issue - we should
  25. * return false if GFP_DMA allocations may not satisfy the supplied 'mask'.
  26. */
  27. static inline int dma_supported(struct device *dev, u64 mask)
  28. {
  29. return dev->dma_mask && *dev->dma_mask != 0;
  30. }
  31. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  32. {
  33. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  34. return -EIO;
  35. *dev->dma_mask = dma_mask;
  36. return 0;
  37. }
  38. static inline int dma_get_cache_alignment(void)
  39. {
  40. return 32;
  41. }
  42. static inline int dma_is_consistent(struct device *dev, dma_addr_t handle)
  43. {
  44. return !!arch_is_coherent();
  45. }
  46. /*
  47. * DMA errors are defined by all-bits-set in the DMA address.
  48. */
  49. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  50. {
  51. return dma_addr == ~0;
  52. }
  53. /*
  54. * Dummy noncoherent implementation. We don't provide a dma_cache_sync
  55. * function so drivers using this API are highlighted with build warnings.
  56. */
  57. static inline void *
  58. dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
  59. {
  60. return NULL;
  61. }
  62. static inline void
  63. dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr,
  64. dma_addr_t handle)
  65. {
  66. }
  67. /**
  68. * dma_alloc_coherent - allocate consistent memory for DMA
  69. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  70. * @size: required memory size
  71. * @handle: bus-specific DMA address
  72. *
  73. * Allocate some uncached, unbuffered memory for a device for
  74. * performing DMA. This function allocates pages, and will
  75. * return the CPU-viewed address, and sets @handle to be the
  76. * device-viewed address.
  77. */
  78. extern void *
  79. dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
  80. /**
  81. * dma_free_coherent - free memory allocated by dma_alloc_coherent
  82. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  83. * @size: size of memory originally requested in dma_alloc_coherent
  84. * @cpu_addr: CPU-view address returned from dma_alloc_coherent
  85. * @handle: device-view address returned from dma_alloc_coherent
  86. *
  87. * Free (and unmap) a DMA buffer previously allocated by
  88. * dma_alloc_coherent().
  89. *
  90. * References to memory and mappings associated with cpu_addr/handle
  91. * during and after this call executing are illegal.
  92. */
  93. extern void
  94. dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,
  95. dma_addr_t handle);
  96. /**
  97. * dma_mmap_coherent - map a coherent DMA allocation into user space
  98. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  99. * @vma: vm_area_struct describing requested user mapping
  100. * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent
  101. * @handle: device-view address returned from dma_alloc_coherent
  102. * @size: size of memory originally requested in dma_alloc_coherent
  103. *
  104. * Map a coherent DMA buffer previously allocated by dma_alloc_coherent
  105. * into user space. The coherent DMA buffer must not be freed by the
  106. * driver until the user space mapping has been released.
  107. */
  108. int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
  109. void *cpu_addr, dma_addr_t handle, size_t size);
  110. /**
  111. * dma_alloc_writecombine - allocate writecombining memory for DMA
  112. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  113. * @size: required memory size
  114. * @handle: bus-specific DMA address
  115. *
  116. * Allocate some uncached, buffered memory for a device for
  117. * performing DMA. This function allocates pages, and will
  118. * return the CPU-viewed address, and sets @handle to be the
  119. * device-viewed address.
  120. */
  121. extern void *
  122. dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp);
  123. #define dma_free_writecombine(dev,size,cpu_addr,handle) \
  124. dma_free_coherent(dev,size,cpu_addr,handle)
  125. int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
  126. void *cpu_addr, dma_addr_t handle, size_t size);
  127. /**
  128. * dma_map_single - map a single buffer for streaming DMA
  129. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  130. * @cpu_addr: CPU direct mapped address of buffer
  131. * @size: size of buffer to map
  132. * @dir: DMA transfer direction
  133. *
  134. * Ensure that any data held in the cache is appropriately discarded
  135. * or written back.
  136. *
  137. * The device owns this memory once this call has completed. The CPU
  138. * can regain ownership by calling dma_unmap_single() or
  139. * dma_sync_single_for_cpu().
  140. */
  141. #ifndef CONFIG_DMABOUNCE
  142. static inline dma_addr_t
  143. dma_map_single(struct device *dev, void *cpu_addr, size_t size,
  144. enum dma_data_direction dir)
  145. {
  146. if (!arch_is_coherent())
  147. dma_cache_maint(cpu_addr, size, dir);
  148. return virt_to_dma(dev, (unsigned long)cpu_addr);
  149. }
  150. #else
  151. extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction);
  152. #endif
  153. /**
  154. * dma_map_page - map a portion of a page for streaming DMA
  155. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  156. * @page: page that buffer resides in
  157. * @offset: offset into page for start of buffer
  158. * @size: size of buffer to map
  159. * @dir: DMA transfer direction
  160. *
  161. * Ensure that any data held in the cache is appropriately discarded
  162. * or written back.
  163. *
  164. * The device owns this memory once this call has completed. The CPU
  165. * can regain ownership by calling dma_unmap_page() or
  166. * dma_sync_single_for_cpu().
  167. */
  168. static inline dma_addr_t
  169. dma_map_page(struct device *dev, struct page *page,
  170. unsigned long offset, size_t size,
  171. enum dma_data_direction dir)
  172. {
  173. return dma_map_single(dev, page_address(page) + offset, size, (int)dir);
  174. }
  175. /**
  176. * dma_unmap_single - unmap a single buffer previously mapped
  177. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  178. * @handle: DMA address of buffer
  179. * @size: size of buffer to map
  180. * @dir: DMA transfer direction
  181. *
  182. * Unmap a single streaming mode DMA translation. The handle and size
  183. * must match what was provided in the previous dma_map_single() call.
  184. * All other usages are undefined.
  185. *
  186. * After this call, reads by the CPU to the buffer are guaranteed to see
  187. * whatever the device wrote there.
  188. */
  189. #ifndef CONFIG_DMABOUNCE
  190. static inline void
  191. dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size,
  192. enum dma_data_direction dir)
  193. {
  194. /* nothing to do */
  195. }
  196. #else
  197. extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction);
  198. #endif
  199. /**
  200. * dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
  201. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  202. * @handle: DMA address of buffer
  203. * @size: size of buffer to map
  204. * @dir: DMA transfer direction
  205. *
  206. * Unmap a single streaming mode DMA translation. The handle and size
  207. * must match what was provided in the previous dma_map_single() call.
  208. * All other usages are undefined.
  209. *
  210. * After this call, reads by the CPU to the buffer are guaranteed to see
  211. * whatever the device wrote there.
  212. */
  213. static inline void
  214. dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size,
  215. enum dma_data_direction dir)
  216. {
  217. dma_unmap_single(dev, handle, size, (int)dir);
  218. }
  219. /**
  220. * dma_map_sg - map a set of SG buffers for streaming mode DMA
  221. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  222. * @sg: list of buffers
  223. * @nents: number of buffers to map
  224. * @dir: DMA transfer direction
  225. *
  226. * Map a set of buffers described by scatterlist in streaming
  227. * mode for DMA. This is the scatter-gather version of the
  228. * above dma_map_single interface. Here the scatter gather list
  229. * elements are each tagged with the appropriate dma address
  230. * and length. They are obtained via sg_dma_{address,length}(SG).
  231. *
  232. * NOTE: An implementation may be able to use a smaller number of
  233. * DMA address/length pairs than there are SG table elements.
  234. * (for example via virtual mapping capabilities)
  235. * The routine returns the number of addr/length pairs actually
  236. * used, at most nents.
  237. *
  238. * Device ownership issues as mentioned above for dma_map_single are
  239. * the same here.
  240. */
  241. #ifndef CONFIG_DMABOUNCE
  242. static inline int
  243. dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  244. enum dma_data_direction dir)
  245. {
  246. int i;
  247. for (i = 0; i < nents; i++, sg++) {
  248. char *virt;
  249. sg->dma_address = page_to_dma(dev, sg_page(sg)) + sg->offset;
  250. virt = sg_virt(sg);
  251. if (!arch_is_coherent())
  252. dma_cache_maint(virt, sg->length, dir);
  253. }
  254. return nents;
  255. }
  256. #else
  257. extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
  258. #endif
  259. /**
  260. * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
  261. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  262. * @sg: list of buffers
  263. * @nents: number of buffers to map
  264. * @dir: DMA transfer direction
  265. *
  266. * Unmap a set of streaming mode DMA translations.
  267. * Again, CPU read rules concerning calls here are the same as for
  268. * dma_unmap_single() above.
  269. */
  270. #ifndef CONFIG_DMABOUNCE
  271. static inline void
  272. dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
  273. enum dma_data_direction dir)
  274. {
  275. /* nothing to do */
  276. }
  277. #else
  278. extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction);
  279. #endif
  280. /**
  281. * dma_sync_single_for_cpu
  282. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  283. * @handle: DMA address of buffer
  284. * @size: size of buffer to map
  285. * @dir: DMA transfer direction
  286. *
  287. * Make physical memory consistent for a single streaming mode DMA
  288. * translation after a transfer.
  289. *
  290. * If you perform a dma_map_single() but wish to interrogate the
  291. * buffer using the cpu, yet do not wish to teardown the PCI dma
  292. * mapping, you must call this function before doing so. At the
  293. * next point you give the PCI dma address back to the card, you
  294. * must first the perform a dma_sync_for_device, and then the
  295. * device again owns the buffer.
  296. */
  297. #ifndef CONFIG_DMABOUNCE
  298. static inline void
  299. dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size,
  300. enum dma_data_direction dir)
  301. {
  302. if (!arch_is_coherent())
  303. dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir);
  304. }
  305. static inline void
  306. dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size,
  307. enum dma_data_direction dir)
  308. {
  309. if (!arch_is_coherent())
  310. dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir);
  311. }
  312. #else
  313. extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction);
  314. extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction);
  315. #endif
  316. /**
  317. * dma_sync_sg_for_cpu
  318. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  319. * @sg: list of buffers
  320. * @nents: number of buffers to map
  321. * @dir: DMA transfer direction
  322. *
  323. * Make physical memory consistent for a set of streaming
  324. * mode DMA translations after a transfer.
  325. *
  326. * The same as dma_sync_single_for_* but for a scatter-gather list,
  327. * same rules and usage.
  328. */
  329. #ifndef CONFIG_DMABOUNCE
  330. static inline void
  331. dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents,
  332. enum dma_data_direction dir)
  333. {
  334. int i;
  335. for (i = 0; i < nents; i++, sg++) {
  336. char *virt = sg_virt(sg);
  337. if (!arch_is_coherent())
  338. dma_cache_maint(virt, sg->length, dir);
  339. }
  340. }
  341. static inline void
  342. dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents,
  343. enum dma_data_direction dir)
  344. {
  345. int i;
  346. for (i = 0; i < nents; i++, sg++) {
  347. char *virt = sg_virt(sg);
  348. if (!arch_is_coherent())
  349. dma_cache_maint(virt, sg->length, dir);
  350. }
  351. }
  352. #else
  353. extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction);
  354. extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction);
  355. #endif
  356. #ifdef CONFIG_DMABOUNCE
  357. /*
  358. * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic"
  359. * and utilize bounce buffers as needed to work around limited DMA windows.
  360. *
  361. * On the SA-1111, a bug limits DMA to only certain regions of RAM.
  362. * On the IXP425, the PCI inbound window is 64MB (256MB total RAM)
  363. * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM)
  364. *
  365. * The following are helper functions used by the dmabounce subystem
  366. *
  367. */
  368. /**
  369. * dmabounce_register_dev
  370. *
  371. * @dev: valid struct device pointer
  372. * @small_buf_size: size of buffers to use with small buffer pool
  373. * @large_buf_size: size of buffers to use with large buffer pool (can be 0)
  374. *
  375. * This function should be called by low-level platform code to register
  376. * a device as requireing DMA buffer bouncing. The function will allocate
  377. * appropriate DMA pools for the device.
  378. *
  379. */
  380. extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long);
  381. /**
  382. * dmabounce_unregister_dev
  383. *
  384. * @dev: valid struct device pointer
  385. *
  386. * This function should be called by low-level platform code when device
  387. * that was previously registered with dmabounce_register_dev is removed
  388. * from the system.
  389. *
  390. */
  391. extern void dmabounce_unregister_dev(struct device *);
  392. /**
  393. * dma_needs_bounce
  394. *
  395. * @dev: valid struct device pointer
  396. * @dma_handle: dma_handle of unbounced buffer
  397. * @size: size of region being mapped
  398. *
  399. * Platforms that utilize the dmabounce mechanism must implement
  400. * this function.
  401. *
  402. * The dmabounce routines call this function whenever a dma-mapping
  403. * is requested to determine whether a given buffer needs to be bounced
  404. * or not. The function must return 0 if the buffer is OK for
  405. * DMA access and 1 if the buffer needs to be bounced.
  406. *
  407. */
  408. extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
  409. #endif /* CONFIG_DMABOUNCE */
  410. #endif /* __KERNEL__ */
  411. #endif