iwl-agn-tx.c 40 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/sched.h>
  33. #include "iwl-dev.h"
  34. #include "iwl-core.h"
  35. #include "iwl-sta.h"
  36. #include "iwl-io.h"
  37. #include "iwl-helpers.h"
  38. #include "iwl-agn-hw.h"
  39. #include "iwl-agn.h"
  40. /*
  41. * mac80211 queues, ACs, hardware queues, FIFOs.
  42. *
  43. * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
  44. *
  45. * Mac80211 uses the following numbers, which we get as from it
  46. * by way of skb_get_queue_mapping(skb):
  47. *
  48. * VO 0
  49. * VI 1
  50. * BE 2
  51. * BK 3
  52. *
  53. *
  54. * Regular (not A-MPDU) frames are put into hardware queues corresponding
  55. * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
  56. * own queue per aggregation session (RA/TID combination), such queues are
  57. * set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
  58. * order to map frames to the right queue, we also need an AC->hw queue
  59. * mapping. This is implemented here.
  60. *
  61. * Due to the way hw queues are set up (by the hw specific modules like
  62. * iwl-4965.c, iwl-5000.c etc.), the AC->hw queue mapping is the identity
  63. * mapping.
  64. */
  65. static const u8 tid_to_ac[] = {
  66. IEEE80211_AC_BE,
  67. IEEE80211_AC_BK,
  68. IEEE80211_AC_BK,
  69. IEEE80211_AC_BE,
  70. IEEE80211_AC_VI,
  71. IEEE80211_AC_VI,
  72. IEEE80211_AC_VO,
  73. IEEE80211_AC_VO
  74. };
  75. static inline int get_ac_from_tid(u16 tid)
  76. {
  77. if (likely(tid < ARRAY_SIZE(tid_to_ac)))
  78. return tid_to_ac[tid];
  79. /* no support for TIDs 8-15 yet */
  80. return -EINVAL;
  81. }
  82. static inline int get_fifo_from_tid(struct iwl_rxon_context *ctx, u16 tid)
  83. {
  84. if (likely(tid < ARRAY_SIZE(tid_to_ac)))
  85. return ctx->ac_to_fifo[tid_to_ac[tid]];
  86. /* no support for TIDs 8-15 yet */
  87. return -EINVAL;
  88. }
  89. /**
  90. * iwlagn_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
  91. */
  92. static void iwlagn_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
  93. struct iwl_tx_queue *txq,
  94. u16 byte_cnt)
  95. {
  96. struct iwlagn_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
  97. int write_ptr = txq->q.write_ptr;
  98. int txq_id = txq->q.id;
  99. u8 sec_ctl = 0;
  100. u8 sta_id = 0;
  101. u16 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
  102. __le16 bc_ent;
  103. WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
  104. sta_id = txq->cmd[txq->q.write_ptr]->cmd.tx.sta_id;
  105. sec_ctl = txq->cmd[txq->q.write_ptr]->cmd.tx.sec_ctl;
  106. switch (sec_ctl & TX_CMD_SEC_MSK) {
  107. case TX_CMD_SEC_CCM:
  108. len += CCMP_MIC_LEN;
  109. break;
  110. case TX_CMD_SEC_TKIP:
  111. len += TKIP_ICV_LEN;
  112. break;
  113. case TX_CMD_SEC_WEP:
  114. len += WEP_IV_LEN + WEP_ICV_LEN;
  115. break;
  116. }
  117. bc_ent = cpu_to_le16((len & 0xFFF) | (sta_id << 12));
  118. scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
  119. if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
  120. scd_bc_tbl[txq_id].
  121. tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
  122. }
  123. static void iwlagn_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
  124. struct iwl_tx_queue *txq)
  125. {
  126. struct iwlagn_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
  127. int txq_id = txq->q.id;
  128. int read_ptr = txq->q.read_ptr;
  129. u8 sta_id = 0;
  130. __le16 bc_ent;
  131. WARN_ON(read_ptr >= TFD_QUEUE_SIZE_MAX);
  132. if (txq_id != priv->cmd_queue)
  133. sta_id = txq->cmd[read_ptr]->cmd.tx.sta_id;
  134. bc_ent = cpu_to_le16(1 | (sta_id << 12));
  135. scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent;
  136. if (read_ptr < TFD_QUEUE_SIZE_BC_DUP)
  137. scd_bc_tbl[txq_id].
  138. tfd_offset[TFD_QUEUE_SIZE_MAX + read_ptr] = bc_ent;
  139. }
  140. static int iwlagn_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
  141. u16 txq_id)
  142. {
  143. u32 tbl_dw_addr;
  144. u32 tbl_dw;
  145. u16 scd_q2ratid;
  146. scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
  147. tbl_dw_addr = priv->scd_base_addr +
  148. IWLAGN_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
  149. tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
  150. if (txq_id & 0x1)
  151. tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
  152. else
  153. tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
  154. iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
  155. return 0;
  156. }
  157. static void iwlagn_tx_queue_stop_scheduler(struct iwl_priv *priv, u16 txq_id)
  158. {
  159. /* Simply stop the queue, but don't change any configuration;
  160. * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
  161. iwl_write_prph(priv,
  162. IWLAGN_SCD_QUEUE_STATUS_BITS(txq_id),
  163. (0 << IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
  164. (1 << IWLAGN_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
  165. }
  166. void iwlagn_set_wr_ptrs(struct iwl_priv *priv,
  167. int txq_id, u32 index)
  168. {
  169. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  170. (index & 0xff) | (txq_id << 8));
  171. iwl_write_prph(priv, IWLAGN_SCD_QUEUE_RDPTR(txq_id), index);
  172. }
  173. void iwlagn_tx_queue_set_status(struct iwl_priv *priv,
  174. struct iwl_tx_queue *txq,
  175. int tx_fifo_id, int scd_retry)
  176. {
  177. int txq_id = txq->q.id;
  178. int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
  179. iwl_write_prph(priv, IWLAGN_SCD_QUEUE_STATUS_BITS(txq_id),
  180. (active << IWLAGN_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
  181. (tx_fifo_id << IWLAGN_SCD_QUEUE_STTS_REG_POS_TXF) |
  182. (1 << IWLAGN_SCD_QUEUE_STTS_REG_POS_WSL) |
  183. IWLAGN_SCD_QUEUE_STTS_REG_MSK);
  184. txq->sched_retry = scd_retry;
  185. IWL_DEBUG_INFO(priv, "%s %s Queue %d on FIFO %d\n",
  186. active ? "Activate" : "Deactivate",
  187. scd_retry ? "BA" : "AC/CMD", txq_id, tx_fifo_id);
  188. }
  189. static int iwlagn_txq_agg_enable(struct iwl_priv *priv, int txq_id, int sta_id, int tid)
  190. {
  191. if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
  192. (IWLAGN_FIRST_AMPDU_QUEUE +
  193. priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
  194. IWL_WARN(priv,
  195. "queue number out of range: %d, must be %d to %d\n",
  196. txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
  197. IWLAGN_FIRST_AMPDU_QUEUE +
  198. priv->cfg->base_params->num_of_ampdu_queues - 1);
  199. return -EINVAL;
  200. }
  201. /* Modify device's station table to Tx this TID */
  202. return iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
  203. }
  204. void iwlagn_txq_agg_queue_setup(struct iwl_priv *priv,
  205. struct ieee80211_sta *sta,
  206. int tid, int frame_limit)
  207. {
  208. int sta_id, tx_fifo, txq_id, ssn_idx;
  209. u16 ra_tid;
  210. unsigned long flags;
  211. struct iwl_tid_data *tid_data;
  212. sta_id = iwl_sta_id(sta);
  213. if (WARN_ON(sta_id == IWL_INVALID_STATION))
  214. return;
  215. if (WARN_ON(tid >= MAX_TID_COUNT))
  216. return;
  217. spin_lock_irqsave(&priv->sta_lock, flags);
  218. tid_data = &priv->stations[sta_id].tid[tid];
  219. ssn_idx = SEQ_TO_SN(tid_data->seq_number);
  220. txq_id = tid_data->agg.txq_id;
  221. tx_fifo = tid_data->agg.tx_fifo;
  222. spin_unlock_irqrestore(&priv->sta_lock, flags);
  223. ra_tid = BUILD_RAxTID(sta_id, tid);
  224. spin_lock_irqsave(&priv->lock, flags);
  225. /* Stop this Tx queue before configuring it */
  226. iwlagn_tx_queue_stop_scheduler(priv, txq_id);
  227. /* Map receiver-address / traffic-ID to this queue */
  228. iwlagn_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
  229. /* Set this queue as a chain-building queue */
  230. iwl_set_bits_prph(priv, IWLAGN_SCD_QUEUECHAIN_SEL, (1<<txq_id));
  231. /* enable aggregations for the queue */
  232. iwl_set_bits_prph(priv, IWLAGN_SCD_AGGR_SEL, (1<<txq_id));
  233. /* Place first TFD at index corresponding to start sequence number.
  234. * Assumes that ssn_idx is valid (!= 0xFFF) */
  235. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  236. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  237. iwlagn_set_wr_ptrs(priv, txq_id, ssn_idx);
  238. /* Set up Tx window size and frame limit for this queue */
  239. iwl_write_targ_mem(priv, priv->scd_base_addr +
  240. IWLAGN_SCD_CONTEXT_QUEUE_OFFSET(txq_id) +
  241. sizeof(u32),
  242. ((frame_limit <<
  243. IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_POS) &
  244. IWLAGN_SCD_QUEUE_CTX_REG2_WIN_SIZE_MSK) |
  245. ((frame_limit <<
  246. IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
  247. IWLAGN_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK));
  248. iwl_set_bits_prph(priv, IWLAGN_SCD_INTERRUPT_MASK, (1 << txq_id));
  249. /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
  250. iwlagn_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
  251. spin_unlock_irqrestore(&priv->lock, flags);
  252. }
  253. static int iwlagn_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
  254. u16 ssn_idx, u8 tx_fifo)
  255. {
  256. if ((IWLAGN_FIRST_AMPDU_QUEUE > txq_id) ||
  257. (IWLAGN_FIRST_AMPDU_QUEUE +
  258. priv->cfg->base_params->num_of_ampdu_queues <= txq_id)) {
  259. IWL_ERR(priv,
  260. "queue number out of range: %d, must be %d to %d\n",
  261. txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
  262. IWLAGN_FIRST_AMPDU_QUEUE +
  263. priv->cfg->base_params->num_of_ampdu_queues - 1);
  264. return -EINVAL;
  265. }
  266. iwlagn_tx_queue_stop_scheduler(priv, txq_id);
  267. iwl_clear_bits_prph(priv, IWLAGN_SCD_AGGR_SEL, (1 << txq_id));
  268. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  269. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  270. /* supposes that ssn_idx is valid (!= 0xFFF) */
  271. iwlagn_set_wr_ptrs(priv, txq_id, ssn_idx);
  272. iwl_clear_bits_prph(priv, IWLAGN_SCD_INTERRUPT_MASK, (1 << txq_id));
  273. iwl_txq_ctx_deactivate(priv, txq_id);
  274. iwlagn_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
  275. return 0;
  276. }
  277. /*
  278. * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
  279. * must be called under priv->lock and mac access
  280. */
  281. void iwlagn_txq_set_sched(struct iwl_priv *priv, u32 mask)
  282. {
  283. iwl_write_prph(priv, IWLAGN_SCD_TXFACT, mask);
  284. }
  285. static void iwlagn_tx_cmd_protection(struct iwl_priv *priv,
  286. struct ieee80211_tx_info *info,
  287. __le16 fc, __le32 *tx_flags)
  288. {
  289. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS ||
  290. info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT ||
  291. info->flags & IEEE80211_TX_CTL_AMPDU)
  292. *tx_flags |= TX_CMD_FLG_PROT_REQUIRE_MSK;
  293. }
  294. /*
  295. * handle build REPLY_TX command notification.
  296. */
  297. static void iwlagn_tx_cmd_build_basic(struct iwl_priv *priv,
  298. struct sk_buff *skb,
  299. struct iwl_tx_cmd *tx_cmd,
  300. struct ieee80211_tx_info *info,
  301. struct ieee80211_hdr *hdr,
  302. u8 std_id)
  303. {
  304. __le16 fc = hdr->frame_control;
  305. __le32 tx_flags = tx_cmd->tx_flags;
  306. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  307. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  308. tx_flags |= TX_CMD_FLG_ACK_MSK;
  309. if (ieee80211_is_mgmt(fc))
  310. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  311. if (ieee80211_is_probe_resp(fc) &&
  312. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  313. tx_flags |= TX_CMD_FLG_TSF_MSK;
  314. } else {
  315. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  316. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  317. }
  318. if (ieee80211_is_back_req(fc))
  319. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  320. else if (info->band == IEEE80211_BAND_2GHZ &&
  321. priv->cfg->bt_params &&
  322. priv->cfg->bt_params->advanced_bt_coexist &&
  323. (ieee80211_is_auth(fc) || ieee80211_is_assoc_req(fc) ||
  324. ieee80211_is_reassoc_req(fc) ||
  325. skb->protocol == cpu_to_be16(ETH_P_PAE)))
  326. tx_flags |= TX_CMD_FLG_IGNORE_BT;
  327. tx_cmd->sta_id = std_id;
  328. if (ieee80211_has_morefrags(fc))
  329. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  330. if (ieee80211_is_data_qos(fc)) {
  331. u8 *qc = ieee80211_get_qos_ctl(hdr);
  332. tx_cmd->tid_tspec = qc[0] & 0xf;
  333. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  334. } else {
  335. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  336. }
  337. iwlagn_tx_cmd_protection(priv, info, fc, &tx_flags);
  338. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  339. if (ieee80211_is_mgmt(fc)) {
  340. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  341. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  342. else
  343. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  344. } else {
  345. tx_cmd->timeout.pm_frame_timeout = 0;
  346. }
  347. tx_cmd->driver_txop = 0;
  348. tx_cmd->tx_flags = tx_flags;
  349. tx_cmd->next_frame_len = 0;
  350. }
  351. #define RTS_DFAULT_RETRY_LIMIT 60
  352. static void iwlagn_tx_cmd_build_rate(struct iwl_priv *priv,
  353. struct iwl_tx_cmd *tx_cmd,
  354. struct ieee80211_tx_info *info,
  355. __le16 fc)
  356. {
  357. u32 rate_flags;
  358. int rate_idx;
  359. u8 rts_retry_limit;
  360. u8 data_retry_limit;
  361. u8 rate_plcp;
  362. /* Set retry limit on DATA packets and Probe Responses*/
  363. if (ieee80211_is_probe_resp(fc))
  364. data_retry_limit = 3;
  365. else
  366. data_retry_limit = IWLAGN_DEFAULT_TX_RETRY;
  367. tx_cmd->data_retry_limit = data_retry_limit;
  368. /* Set retry limit on RTS packets */
  369. rts_retry_limit = RTS_DFAULT_RETRY_LIMIT;
  370. if (data_retry_limit < rts_retry_limit)
  371. rts_retry_limit = data_retry_limit;
  372. tx_cmd->rts_retry_limit = rts_retry_limit;
  373. /* DATA packets will use the uCode station table for rate/antenna
  374. * selection */
  375. if (ieee80211_is_data(fc)) {
  376. tx_cmd->initial_rate_index = 0;
  377. tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
  378. if (priv->tm_fixed_rate) {
  379. /*
  380. * rate overwrite by testmode
  381. * we not only send lq command to change rate
  382. * we also re-enforce per data pkt base.
  383. */
  384. tx_cmd->tx_flags &= ~TX_CMD_FLG_STA_RATE_MSK;
  385. memcpy(&tx_cmd->rate_n_flags, &priv->tm_fixed_rate,
  386. sizeof(tx_cmd->rate_n_flags));
  387. }
  388. return;
  389. }
  390. /**
  391. * If the current TX rate stored in mac80211 has the MCS bit set, it's
  392. * not really a TX rate. Thus, we use the lowest supported rate for
  393. * this band. Also use the lowest supported rate if the stored rate
  394. * index is invalid.
  395. */
  396. rate_idx = info->control.rates[0].idx;
  397. if (info->control.rates[0].flags & IEEE80211_TX_RC_MCS ||
  398. (rate_idx < 0) || (rate_idx > IWL_RATE_COUNT_LEGACY))
  399. rate_idx = rate_lowest_index(&priv->bands[info->band],
  400. info->control.sta);
  401. /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
  402. if (info->band == IEEE80211_BAND_5GHZ)
  403. rate_idx += IWL_FIRST_OFDM_RATE;
  404. /* Get PLCP rate for tx_cmd->rate_n_flags */
  405. rate_plcp = iwl_rates[rate_idx].plcp;
  406. /* Zero out flags for this packet */
  407. rate_flags = 0;
  408. /* Set CCK flag as needed */
  409. if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
  410. rate_flags |= RATE_MCS_CCK_MSK;
  411. /* Set up antennas */
  412. if (priv->cfg->bt_params &&
  413. priv->cfg->bt_params->advanced_bt_coexist &&
  414. priv->bt_full_concurrent) {
  415. /* operated as 1x1 in full concurrency mode */
  416. priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
  417. first_antenna(priv->hw_params.valid_tx_ant));
  418. } else
  419. priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
  420. priv->hw_params.valid_tx_ant);
  421. rate_flags |= iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
  422. /* Set the rate in the TX cmd */
  423. tx_cmd->rate_n_flags = iwl_hw_set_rate_n_flags(rate_plcp, rate_flags);
  424. }
  425. static void iwlagn_tx_cmd_build_hwcrypto(struct iwl_priv *priv,
  426. struct ieee80211_tx_info *info,
  427. struct iwl_tx_cmd *tx_cmd,
  428. struct sk_buff *skb_frag,
  429. int sta_id)
  430. {
  431. struct ieee80211_key_conf *keyconf = info->control.hw_key;
  432. switch (keyconf->cipher) {
  433. case WLAN_CIPHER_SUITE_CCMP:
  434. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  435. memcpy(tx_cmd->key, keyconf->key, keyconf->keylen);
  436. if (info->flags & IEEE80211_TX_CTL_AMPDU)
  437. tx_cmd->tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  438. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  439. break;
  440. case WLAN_CIPHER_SUITE_TKIP:
  441. tx_cmd->sec_ctl = TX_CMD_SEC_TKIP;
  442. ieee80211_get_tkip_p2k(keyconf, skb_frag, tx_cmd->key);
  443. IWL_DEBUG_TX(priv, "tx_cmd with tkip hwcrypto\n");
  444. break;
  445. case WLAN_CIPHER_SUITE_WEP104:
  446. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  447. /* fall through */
  448. case WLAN_CIPHER_SUITE_WEP40:
  449. tx_cmd->sec_ctl |= (TX_CMD_SEC_WEP |
  450. (keyconf->keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
  451. memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen);
  452. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  453. "with key %d\n", keyconf->keyidx);
  454. break;
  455. default:
  456. IWL_ERR(priv, "Unknown encode cipher %x\n", keyconf->cipher);
  457. break;
  458. }
  459. }
  460. /*
  461. * start REPLY_TX command process
  462. */
  463. int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  464. {
  465. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  466. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  467. struct ieee80211_sta *sta = info->control.sta;
  468. struct iwl_station_priv *sta_priv = NULL;
  469. struct iwl_tx_queue *txq;
  470. struct iwl_queue *q;
  471. struct iwl_device_cmd *out_cmd;
  472. struct iwl_cmd_meta *out_meta;
  473. struct iwl_tx_cmd *tx_cmd;
  474. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  475. int txq_id;
  476. dma_addr_t phys_addr = 0;
  477. dma_addr_t txcmd_phys;
  478. dma_addr_t scratch_phys;
  479. u16 len, firstlen, secondlen;
  480. u16 seq_number = 0;
  481. __le16 fc;
  482. u8 hdr_len;
  483. u8 sta_id;
  484. u8 wait_write_ptr = 0;
  485. u8 tid = 0;
  486. u8 *qc = NULL;
  487. unsigned long flags;
  488. bool is_agg = false;
  489. /*
  490. * If the frame needs to go out off-channel, then
  491. * we'll have put the PAN context to that channel,
  492. * so make the frame go out there.
  493. */
  494. if (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)
  495. ctx = &priv->contexts[IWL_RXON_CTX_PAN];
  496. else if (info->control.vif)
  497. ctx = iwl_rxon_ctx_from_vif(info->control.vif);
  498. spin_lock_irqsave(&priv->lock, flags);
  499. if (iwl_is_rfkill(priv)) {
  500. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  501. goto drop_unlock_priv;
  502. }
  503. fc = hdr->frame_control;
  504. #ifdef CONFIG_IWLWIFI_DEBUG
  505. if (ieee80211_is_auth(fc))
  506. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  507. else if (ieee80211_is_assoc_req(fc))
  508. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  509. else if (ieee80211_is_reassoc_req(fc))
  510. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  511. #endif
  512. hdr_len = ieee80211_hdrlen(fc);
  513. /* For management frames use broadcast id to do not break aggregation */
  514. if (!ieee80211_is_data(fc))
  515. sta_id = ctx->bcast_sta_id;
  516. else {
  517. /* Find index into station table for destination station */
  518. sta_id = iwl_sta_id_or_broadcast(priv, ctx, info->control.sta);
  519. if (sta_id == IWL_INVALID_STATION) {
  520. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  521. hdr->addr1);
  522. goto drop_unlock_priv;
  523. }
  524. }
  525. IWL_DEBUG_TX(priv, "station Id %d\n", sta_id);
  526. if (sta)
  527. sta_priv = (void *)sta->drv_priv;
  528. if (sta_priv && sta_priv->asleep &&
  529. (info->flags & IEEE80211_TX_CTL_PSPOLL_RESPONSE)) {
  530. /*
  531. * This sends an asynchronous command to the device,
  532. * but we can rely on it being processed before the
  533. * next frame is processed -- and the next frame to
  534. * this station is the one that will consume this
  535. * counter.
  536. * For now set the counter to just 1 since we do not
  537. * support uAPSD yet.
  538. */
  539. iwl_sta_modify_sleep_tx_count(priv, sta_id, 1);
  540. }
  541. /*
  542. * Send this frame after DTIM -- there's a special queue
  543. * reserved for this for contexts that support AP mode.
  544. */
  545. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  546. txq_id = ctx->mcast_queue;
  547. /*
  548. * The microcode will clear the more data
  549. * bit in the last frame it transmits.
  550. */
  551. hdr->frame_control |=
  552. cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  553. } else
  554. txq_id = ctx->ac_to_queue[skb_get_queue_mapping(skb)];
  555. /* irqs already disabled/saved above when locking priv->lock */
  556. spin_lock(&priv->sta_lock);
  557. if (ieee80211_is_data_qos(fc)) {
  558. qc = ieee80211_get_qos_ctl(hdr);
  559. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  560. if (WARN_ON_ONCE(tid >= MAX_TID_COUNT))
  561. goto drop_unlock_sta;
  562. seq_number = priv->stations[sta_id].tid[tid].seq_number;
  563. seq_number &= IEEE80211_SCTL_SEQ;
  564. hdr->seq_ctrl = hdr->seq_ctrl &
  565. cpu_to_le16(IEEE80211_SCTL_FRAG);
  566. hdr->seq_ctrl |= cpu_to_le16(seq_number);
  567. seq_number += 0x10;
  568. /* aggregation is on for this <sta,tid> */
  569. if (info->flags & IEEE80211_TX_CTL_AMPDU &&
  570. priv->stations[sta_id].tid[tid].agg.state == IWL_AGG_ON) {
  571. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  572. is_agg = true;
  573. }
  574. }
  575. txq = &priv->txq[txq_id];
  576. q = &txq->q;
  577. if (unlikely(iwl_queue_space(q) < q->high_mark))
  578. goto drop_unlock_sta;
  579. /* Set up driver data for this TFD */
  580. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  581. txq->txb[q->write_ptr].skb = skb;
  582. txq->txb[q->write_ptr].ctx = ctx;
  583. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  584. out_cmd = txq->cmd[q->write_ptr];
  585. out_meta = &txq->meta[q->write_ptr];
  586. tx_cmd = &out_cmd->cmd.tx;
  587. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  588. memset(tx_cmd, 0, sizeof(struct iwl_tx_cmd));
  589. /*
  590. * Set up the Tx-command (not MAC!) header.
  591. * Store the chosen Tx queue and TFD index within the sequence field;
  592. * after Tx, uCode's Tx response will return this value so driver can
  593. * locate the frame within the tx queue and do post-tx processing.
  594. */
  595. out_cmd->hdr.cmd = REPLY_TX;
  596. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  597. INDEX_TO_SEQ(q->write_ptr)));
  598. /* Copy MAC header from skb into command buffer */
  599. memcpy(tx_cmd->hdr, hdr, hdr_len);
  600. /* Total # bytes to be transmitted */
  601. len = (u16)skb->len;
  602. tx_cmd->len = cpu_to_le16(len);
  603. if (info->control.hw_key)
  604. iwlagn_tx_cmd_build_hwcrypto(priv, info, tx_cmd, skb, sta_id);
  605. /* TODO need this for burst mode later on */
  606. iwlagn_tx_cmd_build_basic(priv, skb, tx_cmd, info, hdr, sta_id);
  607. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  608. iwlagn_tx_cmd_build_rate(priv, tx_cmd, info, fc);
  609. iwl_update_stats(priv, true, fc, len);
  610. /*
  611. * Use the first empty entry in this queue's command buffer array
  612. * to contain the Tx command and MAC header concatenated together
  613. * (payload data will be in another buffer).
  614. * Size of this varies, due to varying MAC header length.
  615. * If end is not dword aligned, we'll have 2 extra bytes at the end
  616. * of the MAC header (device reads on dword boundaries).
  617. * We'll tell device about this padding later.
  618. */
  619. len = sizeof(struct iwl_tx_cmd) +
  620. sizeof(struct iwl_cmd_header) + hdr_len;
  621. firstlen = (len + 3) & ~3;
  622. /* Tell NIC about any 2-byte padding after MAC header */
  623. if (firstlen != len)
  624. tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  625. /* Physical address of this Tx command's header (not MAC header!),
  626. * within command buffer array. */
  627. txcmd_phys = dma_map_single(priv->bus.dev,
  628. &out_cmd->hdr, firstlen,
  629. DMA_BIDIRECTIONAL);
  630. if (unlikely(dma_mapping_error(priv->bus.dev, txcmd_phys)))
  631. goto drop_unlock_sta;
  632. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  633. dma_unmap_len_set(out_meta, len, firstlen);
  634. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  635. txq->need_update = 1;
  636. } else {
  637. wait_write_ptr = 1;
  638. txq->need_update = 0;
  639. }
  640. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  641. * if any (802.11 null frames have no payload). */
  642. secondlen = skb->len - hdr_len;
  643. if (secondlen > 0) {
  644. phys_addr = dma_map_single(priv->bus.dev, skb->data + hdr_len,
  645. secondlen, DMA_TO_DEVICE);
  646. if (unlikely(dma_mapping_error(priv->bus.dev, phys_addr))) {
  647. dma_unmap_single(priv->bus.dev,
  648. dma_unmap_addr(out_meta, mapping),
  649. dma_unmap_len(out_meta, len),
  650. DMA_BIDIRECTIONAL);
  651. goto drop_unlock_sta;
  652. }
  653. }
  654. if (ieee80211_is_data_qos(fc)) {
  655. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  656. if (!ieee80211_has_morefrags(fc))
  657. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  658. }
  659. spin_unlock(&priv->sta_lock);
  660. /* Attach buffers to TFD */
  661. iwlagn_txq_attach_buf_to_tfd(priv, txq, txcmd_phys, firstlen, 1);
  662. if (secondlen > 0)
  663. iwlagn_txq_attach_buf_to_tfd(priv, txq, phys_addr,
  664. secondlen, 0);
  665. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  666. offsetof(struct iwl_tx_cmd, scratch);
  667. /* take back ownership of DMA buffer to enable update */
  668. dma_sync_single_for_cpu(priv->bus.dev, txcmd_phys, firstlen,
  669. DMA_BIDIRECTIONAL);
  670. tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
  671. tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
  672. IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
  673. le16_to_cpu(out_cmd->hdr.sequence));
  674. IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  675. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
  676. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
  677. /* Set up entry for this TFD in Tx byte-count array */
  678. if (info->flags & IEEE80211_TX_CTL_AMPDU)
  679. iwlagn_txq_update_byte_cnt_tbl(priv, txq,
  680. le16_to_cpu(tx_cmd->len));
  681. dma_sync_single_for_device(priv->bus.dev, txcmd_phys, firstlen,
  682. DMA_BIDIRECTIONAL);
  683. trace_iwlwifi_dev_tx(priv,
  684. &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
  685. sizeof(struct iwl_tfd),
  686. &out_cmd->hdr, firstlen,
  687. skb->data + hdr_len, secondlen);
  688. /* Tell device the write index *just past* this latest filled TFD */
  689. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  690. iwl_txq_update_write_ptr(priv, txq);
  691. spin_unlock_irqrestore(&priv->lock, flags);
  692. /*
  693. * At this point the frame is "transmitted" successfully
  694. * and we will get a TX status notification eventually,
  695. * regardless of the value of ret. "ret" only indicates
  696. * whether or not we should update the write pointer.
  697. */
  698. /*
  699. * Avoid atomic ops if it isn't an associated client.
  700. * Also, if this is a packet for aggregation, don't
  701. * increase the counter because the ucode will stop
  702. * aggregation queues when their respective station
  703. * goes to sleep.
  704. */
  705. if (sta_priv && sta_priv->client && !is_agg)
  706. atomic_inc(&sta_priv->pending_frames);
  707. if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) {
  708. if (wait_write_ptr) {
  709. spin_lock_irqsave(&priv->lock, flags);
  710. txq->need_update = 1;
  711. iwl_txq_update_write_ptr(priv, txq);
  712. spin_unlock_irqrestore(&priv->lock, flags);
  713. } else {
  714. iwl_stop_queue(priv, txq);
  715. }
  716. }
  717. return 0;
  718. drop_unlock_sta:
  719. spin_unlock(&priv->sta_lock);
  720. drop_unlock_priv:
  721. spin_unlock_irqrestore(&priv->lock, flags);
  722. return -1;
  723. }
  724. /*
  725. * Find first available (lowest unused) Tx Queue, mark it "active".
  726. * Called only when finding queue for aggregation.
  727. * Should never return anything < 7, because they should already
  728. * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
  729. */
  730. static int iwlagn_txq_ctx_activate_free(struct iwl_priv *priv)
  731. {
  732. int txq_id;
  733. for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
  734. if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
  735. return txq_id;
  736. return -1;
  737. }
  738. int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
  739. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  740. {
  741. int sta_id;
  742. int tx_fifo;
  743. int txq_id;
  744. int ret;
  745. unsigned long flags;
  746. struct iwl_tid_data *tid_data;
  747. tx_fifo = get_fifo_from_tid(iwl_rxon_ctx_from_vif(vif), tid);
  748. if (unlikely(tx_fifo < 0))
  749. return tx_fifo;
  750. IWL_DEBUG_HT(priv, "TX AGG request on ra = %pM tid = %d\n",
  751. sta->addr, tid);
  752. sta_id = iwl_sta_id(sta);
  753. if (sta_id == IWL_INVALID_STATION) {
  754. IWL_ERR(priv, "Start AGG on invalid station\n");
  755. return -ENXIO;
  756. }
  757. if (unlikely(tid >= MAX_TID_COUNT))
  758. return -EINVAL;
  759. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
  760. IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n");
  761. return -ENXIO;
  762. }
  763. txq_id = iwlagn_txq_ctx_activate_free(priv);
  764. if (txq_id == -1) {
  765. IWL_ERR(priv, "No free aggregation queue available\n");
  766. return -ENXIO;
  767. }
  768. spin_lock_irqsave(&priv->sta_lock, flags);
  769. tid_data = &priv->stations[sta_id].tid[tid];
  770. *ssn = SEQ_TO_SN(tid_data->seq_number);
  771. tid_data->agg.txq_id = txq_id;
  772. tid_data->agg.tx_fifo = tx_fifo;
  773. iwl_set_swq_id(&priv->txq[txq_id], get_ac_from_tid(tid), txq_id);
  774. spin_unlock_irqrestore(&priv->sta_lock, flags);
  775. ret = iwlagn_txq_agg_enable(priv, txq_id, sta_id, tid);
  776. if (ret)
  777. return ret;
  778. spin_lock_irqsave(&priv->sta_lock, flags);
  779. tid_data = &priv->stations[sta_id].tid[tid];
  780. if (tid_data->tfds_in_queue == 0) {
  781. IWL_DEBUG_HT(priv, "HW queue is empty\n");
  782. tid_data->agg.state = IWL_AGG_ON;
  783. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  784. } else {
  785. IWL_DEBUG_HT(priv, "HW queue is NOT empty: %d packets in HW queue\n",
  786. tid_data->tfds_in_queue);
  787. tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
  788. }
  789. spin_unlock_irqrestore(&priv->sta_lock, flags);
  790. return ret;
  791. }
  792. int iwlagn_tx_agg_stop(struct iwl_priv *priv, struct ieee80211_vif *vif,
  793. struct ieee80211_sta *sta, u16 tid)
  794. {
  795. int tx_fifo_id, txq_id, sta_id, ssn;
  796. struct iwl_tid_data *tid_data;
  797. int write_ptr, read_ptr;
  798. unsigned long flags;
  799. tx_fifo_id = get_fifo_from_tid(iwl_rxon_ctx_from_vif(vif), tid);
  800. if (unlikely(tx_fifo_id < 0))
  801. return tx_fifo_id;
  802. sta_id = iwl_sta_id(sta);
  803. if (sta_id == IWL_INVALID_STATION) {
  804. IWL_ERR(priv, "Invalid station for AGG tid %d\n", tid);
  805. return -ENXIO;
  806. }
  807. spin_lock_irqsave(&priv->sta_lock, flags);
  808. tid_data = &priv->stations[sta_id].tid[tid];
  809. ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
  810. txq_id = tid_data->agg.txq_id;
  811. switch (priv->stations[sta_id].tid[tid].agg.state) {
  812. case IWL_EMPTYING_HW_QUEUE_ADDBA:
  813. /*
  814. * This can happen if the peer stops aggregation
  815. * again before we've had a chance to drain the
  816. * queue we selected previously, i.e. before the
  817. * session was really started completely.
  818. */
  819. IWL_DEBUG_HT(priv, "AGG stop before setup done\n");
  820. goto turn_off;
  821. case IWL_AGG_ON:
  822. break;
  823. default:
  824. IWL_WARN(priv, "Stopping AGG while state not ON or starting\n");
  825. }
  826. write_ptr = priv->txq[txq_id].q.write_ptr;
  827. read_ptr = priv->txq[txq_id].q.read_ptr;
  828. /* The queue is not empty */
  829. if (write_ptr != read_ptr) {
  830. IWL_DEBUG_HT(priv, "Stopping a non empty AGG HW QUEUE\n");
  831. priv->stations[sta_id].tid[tid].agg.state =
  832. IWL_EMPTYING_HW_QUEUE_DELBA;
  833. spin_unlock_irqrestore(&priv->sta_lock, flags);
  834. return 0;
  835. }
  836. IWL_DEBUG_HT(priv, "HW queue is empty\n");
  837. turn_off:
  838. priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
  839. /* do not restore/save irqs */
  840. spin_unlock(&priv->sta_lock);
  841. spin_lock(&priv->lock);
  842. /*
  843. * the only reason this call can fail is queue number out of range,
  844. * which can happen if uCode is reloaded and all the station
  845. * information are lost. if it is outside the range, there is no need
  846. * to deactivate the uCode queue, just return "success" to allow
  847. * mac80211 to clean up it own data.
  848. */
  849. iwlagn_txq_agg_disable(priv, txq_id, ssn, tx_fifo_id);
  850. spin_unlock_irqrestore(&priv->lock, flags);
  851. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  852. return 0;
  853. }
  854. int iwlagn_txq_check_empty(struct iwl_priv *priv,
  855. int sta_id, u8 tid, int txq_id)
  856. {
  857. struct iwl_queue *q = &priv->txq[txq_id].q;
  858. u8 *addr = priv->stations[sta_id].sta.sta.addr;
  859. struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
  860. struct iwl_rxon_context *ctx;
  861. ctx = &priv->contexts[priv->stations[sta_id].ctxid];
  862. lockdep_assert_held(&priv->sta_lock);
  863. switch (priv->stations[sta_id].tid[tid].agg.state) {
  864. case IWL_EMPTYING_HW_QUEUE_DELBA:
  865. /* We are reclaiming the last packet of the */
  866. /* aggregated HW queue */
  867. if ((txq_id == tid_data->agg.txq_id) &&
  868. (q->read_ptr == q->write_ptr)) {
  869. u16 ssn = SEQ_TO_SN(tid_data->seq_number);
  870. int tx_fifo = get_fifo_from_tid(ctx, tid);
  871. IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n");
  872. iwlagn_txq_agg_disable(priv, txq_id, ssn, tx_fifo);
  873. tid_data->agg.state = IWL_AGG_OFF;
  874. ieee80211_stop_tx_ba_cb_irqsafe(ctx->vif, addr, tid);
  875. }
  876. break;
  877. case IWL_EMPTYING_HW_QUEUE_ADDBA:
  878. /* We are reclaiming the last packet of the queue */
  879. if (tid_data->tfds_in_queue == 0) {
  880. IWL_DEBUG_HT(priv, "HW queue empty: continue ADDBA flow\n");
  881. tid_data->agg.state = IWL_AGG_ON;
  882. ieee80211_start_tx_ba_cb_irqsafe(ctx->vif, addr, tid);
  883. }
  884. break;
  885. }
  886. return 0;
  887. }
  888. static void iwlagn_non_agg_tx_status(struct iwl_priv *priv,
  889. struct iwl_rxon_context *ctx,
  890. const u8 *addr1)
  891. {
  892. struct ieee80211_sta *sta;
  893. struct iwl_station_priv *sta_priv;
  894. rcu_read_lock();
  895. sta = ieee80211_find_sta(ctx->vif, addr1);
  896. if (sta) {
  897. sta_priv = (void *)sta->drv_priv;
  898. /* avoid atomic ops if this isn't a client */
  899. if (sta_priv->client &&
  900. atomic_dec_return(&sta_priv->pending_frames) == 0)
  901. ieee80211_sta_block_awake(priv->hw, sta, false);
  902. }
  903. rcu_read_unlock();
  904. }
  905. static void iwlagn_tx_status(struct iwl_priv *priv, struct iwl_tx_info *tx_info,
  906. bool is_agg)
  907. {
  908. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) tx_info->skb->data;
  909. if (!is_agg)
  910. iwlagn_non_agg_tx_status(priv, tx_info->ctx, hdr->addr1);
  911. ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb);
  912. }
  913. int iwlagn_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  914. {
  915. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  916. struct iwl_queue *q = &txq->q;
  917. struct iwl_tx_info *tx_info;
  918. int nfreed = 0;
  919. struct ieee80211_hdr *hdr;
  920. if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
  921. IWL_ERR(priv, "%s: Read index for DMA queue txq id (%d), "
  922. "index %d is out of range [0-%d] %d %d.\n", __func__,
  923. txq_id, index, q->n_bd, q->write_ptr, q->read_ptr);
  924. return 0;
  925. }
  926. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  927. q->read_ptr != index;
  928. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  929. tx_info = &txq->txb[txq->q.read_ptr];
  930. if (WARN_ON_ONCE(tx_info->skb == NULL))
  931. continue;
  932. hdr = (struct ieee80211_hdr *)tx_info->skb->data;
  933. if (ieee80211_is_data_qos(hdr->frame_control))
  934. nfreed++;
  935. iwlagn_tx_status(priv, tx_info,
  936. txq_id >= IWLAGN_FIRST_AMPDU_QUEUE);
  937. tx_info->skb = NULL;
  938. iwlagn_txq_inval_byte_cnt_tbl(priv, txq);
  939. iwlagn_txq_free_tfd(priv, txq, txq->q.read_ptr);
  940. }
  941. return nfreed;
  942. }
  943. /**
  944. * iwlagn_tx_status_reply_compressed_ba - Update tx status from block-ack
  945. *
  946. * Go through block-ack's bitmap of ACK'd frames, update driver's record of
  947. * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
  948. */
  949. static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv,
  950. struct iwl_ht_agg *agg,
  951. struct iwl_compressed_ba_resp *ba_resp)
  952. {
  953. int sh;
  954. u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
  955. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  956. struct ieee80211_tx_info *info;
  957. u64 bitmap, sent_bitmap;
  958. if (unlikely(!agg->wait_for_ba)) {
  959. if (unlikely(ba_resp->bitmap))
  960. IWL_ERR(priv, "Received BA when not expected\n");
  961. return -EINVAL;
  962. }
  963. /* Mark that the expected block-ack response arrived */
  964. agg->wait_for_ba = 0;
  965. IWL_DEBUG_TX_REPLY(priv, "BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
  966. /* Calculate shift to align block-ack bits with our Tx window bits */
  967. sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl >> 4);
  968. if (sh < 0)
  969. sh += 0x100;
  970. /*
  971. * Check for success or failure according to the
  972. * transmitted bitmap and block-ack bitmap
  973. */
  974. bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
  975. sent_bitmap = bitmap & agg->bitmap;
  976. /* Sanity check values reported by uCode */
  977. if (ba_resp->txed_2_done > ba_resp->txed) {
  978. IWL_DEBUG_TX_REPLY(priv,
  979. "bogus sent(%d) and ack(%d) count\n",
  980. ba_resp->txed, ba_resp->txed_2_done);
  981. /*
  982. * set txed_2_done = txed,
  983. * so it won't impact rate scale
  984. */
  985. ba_resp->txed = ba_resp->txed_2_done;
  986. }
  987. IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n",
  988. ba_resp->txed, ba_resp->txed_2_done);
  989. /* Find the first ACKed frame to store the TX status */
  990. while (sent_bitmap && !(sent_bitmap & 1)) {
  991. agg->start_idx = (agg->start_idx + 1) & 0xff;
  992. sent_bitmap >>= 1;
  993. }
  994. info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb);
  995. memset(&info->status, 0, sizeof(info->status));
  996. info->flags |= IEEE80211_TX_STAT_ACK;
  997. info->flags |= IEEE80211_TX_STAT_AMPDU;
  998. info->status.ampdu_ack_len = ba_resp->txed_2_done;
  999. info->status.ampdu_len = ba_resp->txed;
  1000. iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
  1001. return 0;
  1002. }
  1003. /**
  1004. * translate ucode response to mac80211 tx status control values
  1005. */
  1006. void iwlagn_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  1007. struct ieee80211_tx_info *info)
  1008. {
  1009. struct ieee80211_tx_rate *r = &info->control.rates[0];
  1010. info->antenna_sel_tx =
  1011. ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
  1012. if (rate_n_flags & RATE_MCS_HT_MSK)
  1013. r->flags |= IEEE80211_TX_RC_MCS;
  1014. if (rate_n_flags & RATE_MCS_GF_MSK)
  1015. r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
  1016. if (rate_n_flags & RATE_MCS_HT40_MSK)
  1017. r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
  1018. if (rate_n_flags & RATE_MCS_DUP_MSK)
  1019. r->flags |= IEEE80211_TX_RC_DUP_DATA;
  1020. if (rate_n_flags & RATE_MCS_SGI_MSK)
  1021. r->flags |= IEEE80211_TX_RC_SHORT_GI;
  1022. r->idx = iwlagn_hwrate_to_mac80211_idx(rate_n_flags, info->band);
  1023. }
  1024. /**
  1025. * iwlagn_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
  1026. *
  1027. * Handles block-acknowledge notification from device, which reports success
  1028. * of frames sent via aggregation.
  1029. */
  1030. void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
  1031. struct iwl_rx_mem_buffer *rxb)
  1032. {
  1033. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1034. struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
  1035. struct iwl_tx_queue *txq = NULL;
  1036. struct iwl_ht_agg *agg;
  1037. int index;
  1038. int sta_id;
  1039. int tid;
  1040. unsigned long flags;
  1041. /* "flow" corresponds to Tx queue */
  1042. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  1043. /* "ssn" is start of block-ack Tx window, corresponds to index
  1044. * (in Tx queue's circular buffer) of first TFD/frame in window */
  1045. u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
  1046. if (scd_flow >= priv->hw_params.max_txq_num) {
  1047. IWL_ERR(priv,
  1048. "BUG_ON scd_flow is bigger than number of queues\n");
  1049. return;
  1050. }
  1051. txq = &priv->txq[scd_flow];
  1052. sta_id = ba_resp->sta_id;
  1053. tid = ba_resp->tid;
  1054. agg = &priv->stations[sta_id].tid[tid].agg;
  1055. if (unlikely(agg->txq_id != scd_flow)) {
  1056. /*
  1057. * FIXME: this is a uCode bug which need to be addressed,
  1058. * log the information and return for now!
  1059. * since it is possible happen very often and in order
  1060. * not to fill the syslog, don't enable the logging by default
  1061. */
  1062. IWL_DEBUG_TX_REPLY(priv,
  1063. "BA scd_flow %d does not match txq_id %d\n",
  1064. scd_flow, agg->txq_id);
  1065. return;
  1066. }
  1067. /* Find index just before block-ack window */
  1068. index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
  1069. spin_lock_irqsave(&priv->sta_lock, flags);
  1070. IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, "
  1071. "sta_id = %d\n",
  1072. agg->wait_for_ba,
  1073. (u8 *) &ba_resp->sta_addr_lo32,
  1074. ba_resp->sta_id);
  1075. IWL_DEBUG_TX_REPLY(priv, "TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
  1076. "%d, scd_ssn = %d\n",
  1077. ba_resp->tid,
  1078. ba_resp->seq_ctl,
  1079. (unsigned long long)le64_to_cpu(ba_resp->bitmap),
  1080. ba_resp->scd_flow,
  1081. ba_resp->scd_ssn);
  1082. IWL_DEBUG_TX_REPLY(priv, "DAT start_idx = %d, bitmap = 0x%llx\n",
  1083. agg->start_idx,
  1084. (unsigned long long)agg->bitmap);
  1085. /* Update driver's record of ACK vs. not for each frame in window */
  1086. iwlagn_tx_status_reply_compressed_ba(priv, agg, ba_resp);
  1087. /* Release all TFDs before the SSN, i.e. all TFDs in front of
  1088. * block-ack window (we assume that they've been successfully
  1089. * transmitted ... if not, it's too late anyway). */
  1090. if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
  1091. /* calculate mac80211 ampdu sw queue to wake */
  1092. int freed = iwlagn_tx_queue_reclaim(priv, scd_flow, index);
  1093. iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
  1094. if ((iwl_queue_space(&txq->q) > txq->q.low_mark) &&
  1095. priv->mac80211_registered &&
  1096. (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
  1097. iwl_wake_queue(priv, txq);
  1098. iwlagn_txq_check_empty(priv, sta_id, tid, scd_flow);
  1099. }
  1100. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1101. }
  1102. #ifdef CONFIG_IWLWIFI_DEBUG
  1103. const char *iwl_get_tx_fail_reason(u32 status)
  1104. {
  1105. #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
  1106. #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
  1107. switch (status & TX_STATUS_MSK) {
  1108. case TX_STATUS_SUCCESS:
  1109. return "SUCCESS";
  1110. TX_STATUS_POSTPONE(DELAY);
  1111. TX_STATUS_POSTPONE(FEW_BYTES);
  1112. TX_STATUS_POSTPONE(BT_PRIO);
  1113. TX_STATUS_POSTPONE(QUIET_PERIOD);
  1114. TX_STATUS_POSTPONE(CALC_TTAK);
  1115. TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY);
  1116. TX_STATUS_FAIL(SHORT_LIMIT);
  1117. TX_STATUS_FAIL(LONG_LIMIT);
  1118. TX_STATUS_FAIL(FIFO_UNDERRUN);
  1119. TX_STATUS_FAIL(DRAIN_FLOW);
  1120. TX_STATUS_FAIL(RFKILL_FLUSH);
  1121. TX_STATUS_FAIL(LIFE_EXPIRE);
  1122. TX_STATUS_FAIL(DEST_PS);
  1123. TX_STATUS_FAIL(HOST_ABORTED);
  1124. TX_STATUS_FAIL(BT_RETRY);
  1125. TX_STATUS_FAIL(STA_INVALID);
  1126. TX_STATUS_FAIL(FRAG_DROPPED);
  1127. TX_STATUS_FAIL(TID_DISABLE);
  1128. TX_STATUS_FAIL(FIFO_FLUSHED);
  1129. TX_STATUS_FAIL(INSUFFICIENT_CF_POLL);
  1130. TX_STATUS_FAIL(PASSIVE_NO_RX);
  1131. TX_STATUS_FAIL(NO_BEACON_ON_RADAR);
  1132. }
  1133. return "UNKNOWN";
  1134. #undef TX_STATUS_FAIL
  1135. #undef TX_STATUS_POSTPONE
  1136. }
  1137. #endif /* CONFIG_IWLWIFI_DEBUG */