omap_hwmod.c 89 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include "common.h"
  140. #include <plat/cpu.h>
  141. #include "clockdomain.h"
  142. #include "powerdomain.h"
  143. #include <plat/clock.h>
  144. #include <plat/omap_hwmod.h>
  145. #include <plat/prcm.h>
  146. #include "cm2xxx_3xxx.h"
  147. #include "cminst44xx.h"
  148. #include "prm2xxx_3xxx.h"
  149. #include "prm44xx.h"
  150. #include "prminst44xx.h"
  151. #include "mux.h"
  152. /* Maximum microseconds to wait for OMAP module to softreset */
  153. #define MAX_MODULE_SOFTRESET_WAIT 10000
  154. /* Name of the OMAP hwmod for the MPU */
  155. #define MPU_INITIATOR_NAME "mpu"
  156. /* omap_hwmod_list contains all registered struct omap_hwmods */
  157. static LIST_HEAD(omap_hwmod_list);
  158. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  159. static struct omap_hwmod *mpu_oh;
  160. /* Private functions */
  161. /**
  162. * _fetch_next_ocp_if - return @i'th OCP interface in an array
  163. * @p: ptr to a ptr to the list_head inside the ocp_if to return (not yet used)
  164. * @old: ptr to an array of struct omap_hwmod_ocp_if records
  165. * @i: pointer to the index into the @old array
  166. *
  167. * Return a pointer to the next struct omap_hwmod_ocp_if record in a
  168. * sequence. Currently returns a struct omap_hwmod_ocp_if record
  169. * corresponding to the element index pointed to by @i in the @old
  170. * array, and increments the index pointed to by @i.
  171. */
  172. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  173. struct omap_hwmod_ocp_if **old,
  174. int *i)
  175. {
  176. struct omap_hwmod_ocp_if *oi;
  177. oi = old[*i];
  178. *i = *i + 1;
  179. return oi;
  180. }
  181. /**
  182. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  183. * @oh: struct omap_hwmod *
  184. *
  185. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  186. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  187. * OCP_SYSCONFIG register or 0 upon success.
  188. */
  189. static int _update_sysc_cache(struct omap_hwmod *oh)
  190. {
  191. if (!oh->class->sysc) {
  192. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  193. return -EINVAL;
  194. }
  195. /* XXX ensure module interface clock is up */
  196. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  197. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  198. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  199. return 0;
  200. }
  201. /**
  202. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  203. * @v: OCP_SYSCONFIG value to write
  204. * @oh: struct omap_hwmod *
  205. *
  206. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  207. * one. No return value.
  208. */
  209. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  210. {
  211. if (!oh->class->sysc) {
  212. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  213. return;
  214. }
  215. /* XXX ensure module interface clock is up */
  216. /* Module might have lost context, always update cache and register */
  217. oh->_sysc_cache = v;
  218. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  219. }
  220. /**
  221. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  222. * @oh: struct omap_hwmod *
  223. * @standbymode: MIDLEMODE field bits
  224. * @v: pointer to register contents to modify
  225. *
  226. * Update the master standby mode bits in @v to be @standbymode for
  227. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  228. * upon error or 0 upon success.
  229. */
  230. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  231. u32 *v)
  232. {
  233. u32 mstandby_mask;
  234. u8 mstandby_shift;
  235. if (!oh->class->sysc ||
  236. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  237. return -EINVAL;
  238. if (!oh->class->sysc->sysc_fields) {
  239. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  240. return -EINVAL;
  241. }
  242. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  243. mstandby_mask = (0x3 << mstandby_shift);
  244. *v &= ~mstandby_mask;
  245. *v |= __ffs(standbymode) << mstandby_shift;
  246. return 0;
  247. }
  248. /**
  249. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  250. * @oh: struct omap_hwmod *
  251. * @idlemode: SIDLEMODE field bits
  252. * @v: pointer to register contents to modify
  253. *
  254. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  255. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  256. * or 0 upon success.
  257. */
  258. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  259. {
  260. u32 sidle_mask;
  261. u8 sidle_shift;
  262. if (!oh->class->sysc ||
  263. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  264. return -EINVAL;
  265. if (!oh->class->sysc->sysc_fields) {
  266. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  267. return -EINVAL;
  268. }
  269. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  270. sidle_mask = (0x3 << sidle_shift);
  271. *v &= ~sidle_mask;
  272. *v |= __ffs(idlemode) << sidle_shift;
  273. return 0;
  274. }
  275. /**
  276. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  277. * @oh: struct omap_hwmod *
  278. * @clockact: CLOCKACTIVITY field bits
  279. * @v: pointer to register contents to modify
  280. *
  281. * Update the clockactivity mode bits in @v to be @clockact for the
  282. * @oh hwmod. Used for additional powersaving on some modules. Does
  283. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  284. * success.
  285. */
  286. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  287. {
  288. u32 clkact_mask;
  289. u8 clkact_shift;
  290. if (!oh->class->sysc ||
  291. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  292. return -EINVAL;
  293. if (!oh->class->sysc->sysc_fields) {
  294. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  295. return -EINVAL;
  296. }
  297. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  298. clkact_mask = (0x3 << clkact_shift);
  299. *v &= ~clkact_mask;
  300. *v |= clockact << clkact_shift;
  301. return 0;
  302. }
  303. /**
  304. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  305. * @oh: struct omap_hwmod *
  306. * @v: pointer to register contents to modify
  307. *
  308. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  309. * error or 0 upon success.
  310. */
  311. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  312. {
  313. u32 softrst_mask;
  314. if (!oh->class->sysc ||
  315. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  316. return -EINVAL;
  317. if (!oh->class->sysc->sysc_fields) {
  318. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  319. return -EINVAL;
  320. }
  321. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  322. *v |= softrst_mask;
  323. return 0;
  324. }
  325. /**
  326. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  327. * @oh: struct omap_hwmod *
  328. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  329. * @v: pointer to register contents to modify
  330. *
  331. * Update the module autoidle bit in @v to be @autoidle for the @oh
  332. * hwmod. The autoidle bit controls whether the module can gate
  333. * internal clocks automatically when it isn't doing anything; the
  334. * exact function of this bit varies on a per-module basis. This
  335. * function does not write to the hardware. Returns -EINVAL upon
  336. * error or 0 upon success.
  337. */
  338. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  339. u32 *v)
  340. {
  341. u32 autoidle_mask;
  342. u8 autoidle_shift;
  343. if (!oh->class->sysc ||
  344. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  345. return -EINVAL;
  346. if (!oh->class->sysc->sysc_fields) {
  347. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  348. return -EINVAL;
  349. }
  350. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  351. autoidle_mask = (0x1 << autoidle_shift);
  352. *v &= ~autoidle_mask;
  353. *v |= autoidle << autoidle_shift;
  354. return 0;
  355. }
  356. /**
  357. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  358. * @oh: struct omap_hwmod *
  359. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  360. *
  361. * Set or clear the I/O pad wakeup flag in the mux entries for the
  362. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  363. * in memory. If the hwmod is currently idled, and the new idle
  364. * values don't match the previous ones, this function will also
  365. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  366. * currently idled, this function won't touch the hardware: the new
  367. * mux settings are written to the SCM PADCTRL registers when the
  368. * hwmod is idled. No return value.
  369. */
  370. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  371. {
  372. struct omap_device_pad *pad;
  373. bool change = false;
  374. u16 prev_idle;
  375. int j;
  376. if (!oh->mux || !oh->mux->enabled)
  377. return;
  378. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  379. pad = oh->mux->pads_dynamic[j];
  380. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  381. continue;
  382. prev_idle = pad->idle;
  383. if (set_wake)
  384. pad->idle |= OMAP_WAKEUP_EN;
  385. else
  386. pad->idle &= ~OMAP_WAKEUP_EN;
  387. if (prev_idle != pad->idle)
  388. change = true;
  389. }
  390. if (change && oh->_state == _HWMOD_STATE_IDLE)
  391. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  392. }
  393. /**
  394. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  395. * @oh: struct omap_hwmod *
  396. *
  397. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  398. * upon error or 0 upon success.
  399. */
  400. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  401. {
  402. if (!oh->class->sysc ||
  403. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  404. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  405. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  406. return -EINVAL;
  407. if (!oh->class->sysc->sysc_fields) {
  408. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  409. return -EINVAL;
  410. }
  411. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  412. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  413. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  414. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  415. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  416. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  417. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  418. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  419. return 0;
  420. }
  421. /**
  422. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  423. * @oh: struct omap_hwmod *
  424. *
  425. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  426. * upon error or 0 upon success.
  427. */
  428. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  429. {
  430. if (!oh->class->sysc ||
  431. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  432. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  433. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  434. return -EINVAL;
  435. if (!oh->class->sysc->sysc_fields) {
  436. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  437. return -EINVAL;
  438. }
  439. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  440. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  441. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  442. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  443. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  444. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  445. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  446. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  447. return 0;
  448. }
  449. /**
  450. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  451. * @oh: struct omap_hwmod *
  452. *
  453. * Prevent the hardware module @oh from entering idle while the
  454. * hardare module initiator @init_oh is active. Useful when a module
  455. * will be accessed by a particular initiator (e.g., if a module will
  456. * be accessed by the IVA, there should be a sleepdep between the IVA
  457. * initiator and the module). Only applies to modules in smart-idle
  458. * mode. If the clockdomain is marked as not needing autodeps, return
  459. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  460. * passes along clkdm_add_sleepdep() value upon success.
  461. */
  462. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  463. {
  464. if (!oh->_clk)
  465. return -EINVAL;
  466. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  467. return 0;
  468. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  469. }
  470. /**
  471. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  472. * @oh: struct omap_hwmod *
  473. *
  474. * Allow the hardware module @oh to enter idle while the hardare
  475. * module initiator @init_oh is active. Useful when a module will not
  476. * be accessed by a particular initiator (e.g., if a module will not
  477. * be accessed by the IVA, there should be no sleepdep between the IVA
  478. * initiator and the module). Only applies to modules in smart-idle
  479. * mode. If the clockdomain is marked as not needing autodeps, return
  480. * 0 without doing anything. Returns -EINVAL upon error or passes
  481. * along clkdm_del_sleepdep() value upon success.
  482. */
  483. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  484. {
  485. if (!oh->_clk)
  486. return -EINVAL;
  487. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  488. return 0;
  489. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  490. }
  491. /**
  492. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  493. * @oh: struct omap_hwmod *
  494. *
  495. * Called from _init_clocks(). Populates the @oh _clk (main
  496. * functional clock pointer) if a main_clk is present. Returns 0 on
  497. * success or -EINVAL on error.
  498. */
  499. static int _init_main_clk(struct omap_hwmod *oh)
  500. {
  501. int ret = 0;
  502. if (!oh->main_clk)
  503. return 0;
  504. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  505. if (!oh->_clk) {
  506. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  507. oh->name, oh->main_clk);
  508. return -EINVAL;
  509. }
  510. if (!oh->_clk->clkdm)
  511. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  512. oh->main_clk, oh->_clk->name);
  513. return ret;
  514. }
  515. /**
  516. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  517. * @oh: struct omap_hwmod *
  518. *
  519. * Called from _init_clocks(). Populates the @oh OCP slave interface
  520. * clock pointers. Returns 0 on success or -EINVAL on error.
  521. */
  522. static int _init_interface_clks(struct omap_hwmod *oh)
  523. {
  524. struct omap_hwmod_ocp_if *os;
  525. struct clk *c;
  526. int i = 0;
  527. int ret = 0;
  528. while (i < oh->slaves_cnt) {
  529. os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
  530. if (!os->clk)
  531. continue;
  532. c = omap_clk_get_by_name(os->clk);
  533. if (!c) {
  534. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  535. oh->name, os->clk);
  536. ret = -EINVAL;
  537. }
  538. os->_clk = c;
  539. }
  540. return ret;
  541. }
  542. /**
  543. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  544. * @oh: struct omap_hwmod *
  545. *
  546. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  547. * clock pointers. Returns 0 on success or -EINVAL on error.
  548. */
  549. static int _init_opt_clks(struct omap_hwmod *oh)
  550. {
  551. struct omap_hwmod_opt_clk *oc;
  552. struct clk *c;
  553. int i;
  554. int ret = 0;
  555. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  556. c = omap_clk_get_by_name(oc->clk);
  557. if (!c) {
  558. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  559. oh->name, oc->clk);
  560. ret = -EINVAL;
  561. }
  562. oc->_clk = c;
  563. }
  564. return ret;
  565. }
  566. /**
  567. * _enable_clocks - enable hwmod main clock and interface clocks
  568. * @oh: struct omap_hwmod *
  569. *
  570. * Enables all clocks necessary for register reads and writes to succeed
  571. * on the hwmod @oh. Returns 0.
  572. */
  573. static int _enable_clocks(struct omap_hwmod *oh)
  574. {
  575. struct omap_hwmod_ocp_if *os;
  576. int i = 0;
  577. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  578. if (oh->_clk)
  579. clk_enable(oh->_clk);
  580. while (i < oh->slaves_cnt) {
  581. os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
  582. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  583. clk_enable(os->_clk);
  584. }
  585. /* The opt clocks are controlled by the device driver. */
  586. return 0;
  587. }
  588. /**
  589. * _disable_clocks - disable hwmod main clock and interface clocks
  590. * @oh: struct omap_hwmod *
  591. *
  592. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  593. */
  594. static int _disable_clocks(struct omap_hwmod *oh)
  595. {
  596. struct omap_hwmod_ocp_if *os;
  597. int i = 0;
  598. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  599. if (oh->_clk)
  600. clk_disable(oh->_clk);
  601. while (i < oh->slaves_cnt) {
  602. os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
  603. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  604. clk_disable(os->_clk);
  605. }
  606. /* The opt clocks are controlled by the device driver. */
  607. return 0;
  608. }
  609. static void _enable_optional_clocks(struct omap_hwmod *oh)
  610. {
  611. struct omap_hwmod_opt_clk *oc;
  612. int i;
  613. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  614. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  615. if (oc->_clk) {
  616. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  617. oc->_clk->name);
  618. clk_enable(oc->_clk);
  619. }
  620. }
  621. static void _disable_optional_clocks(struct omap_hwmod *oh)
  622. {
  623. struct omap_hwmod_opt_clk *oc;
  624. int i;
  625. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  626. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  627. if (oc->_clk) {
  628. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  629. oc->_clk->name);
  630. clk_disable(oc->_clk);
  631. }
  632. }
  633. /**
  634. * _enable_module - enable CLKCTRL modulemode on OMAP4
  635. * @oh: struct omap_hwmod *
  636. *
  637. * Enables the PRCM module mode related to the hwmod @oh.
  638. * No return value.
  639. */
  640. static void _enable_module(struct omap_hwmod *oh)
  641. {
  642. /* The module mode does not exist prior OMAP4 */
  643. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  644. return;
  645. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  646. return;
  647. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  648. oh->name, oh->prcm.omap4.modulemode);
  649. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  650. oh->clkdm->prcm_partition,
  651. oh->clkdm->cm_inst,
  652. oh->clkdm->clkdm_offs,
  653. oh->prcm.omap4.clkctrl_offs);
  654. }
  655. /**
  656. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  657. * @oh: struct omap_hwmod *
  658. *
  659. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  660. * does not have an IDLEST bit or if the module successfully enters
  661. * slave idle; otherwise, pass along the return value of the
  662. * appropriate *_cm*_wait_module_idle() function.
  663. */
  664. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  665. {
  666. if (!cpu_is_omap44xx())
  667. return 0;
  668. if (!oh)
  669. return -EINVAL;
  670. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  671. return 0;
  672. if (oh->flags & HWMOD_NO_IDLEST)
  673. return 0;
  674. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  675. oh->clkdm->cm_inst,
  676. oh->clkdm->clkdm_offs,
  677. oh->prcm.omap4.clkctrl_offs);
  678. }
  679. /**
  680. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  681. * @oh: struct omap_hwmod *oh
  682. *
  683. * Count and return the number of MPU IRQs associated with the hwmod
  684. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  685. * NULL.
  686. */
  687. static int _count_mpu_irqs(struct omap_hwmod *oh)
  688. {
  689. struct omap_hwmod_irq_info *ohii;
  690. int i = 0;
  691. if (!oh || !oh->mpu_irqs)
  692. return 0;
  693. do {
  694. ohii = &oh->mpu_irqs[i++];
  695. } while (ohii->irq != -1);
  696. return i-1;
  697. }
  698. /**
  699. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  700. * @oh: struct omap_hwmod *oh
  701. *
  702. * Count and return the number of SDMA request lines associated with
  703. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  704. * if @oh is NULL.
  705. */
  706. static int _count_sdma_reqs(struct omap_hwmod *oh)
  707. {
  708. struct omap_hwmod_dma_info *ohdi;
  709. int i = 0;
  710. if (!oh || !oh->sdma_reqs)
  711. return 0;
  712. do {
  713. ohdi = &oh->sdma_reqs[i++];
  714. } while (ohdi->dma_req != -1);
  715. return i-1;
  716. }
  717. /**
  718. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  719. * @oh: struct omap_hwmod *oh
  720. *
  721. * Count and return the number of address space ranges associated with
  722. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  723. * if @oh is NULL.
  724. */
  725. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  726. {
  727. struct omap_hwmod_addr_space *mem;
  728. int i = 0;
  729. if (!os || !os->addr)
  730. return 0;
  731. do {
  732. mem = &os->addr[i++];
  733. } while (mem->pa_start != mem->pa_end);
  734. return i-1;
  735. }
  736. /**
  737. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  738. * @oh: struct omap_hwmod * to operate on
  739. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  740. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  741. *
  742. * Retrieve a MPU hardware IRQ line number named by @name associated
  743. * with the IP block pointed to by @oh. The IRQ number will be filled
  744. * into the address pointed to by @dma. When @name is non-null, the
  745. * IRQ line number associated with the named entry will be returned.
  746. * If @name is null, the first matching entry will be returned. Data
  747. * order is not meaningful in hwmod data, so callers are strongly
  748. * encouraged to use a non-null @name whenever possible to avoid
  749. * unpredictable effects if hwmod data is later added that causes data
  750. * ordering to change. Returns 0 upon success or a negative error
  751. * code upon error.
  752. */
  753. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  754. unsigned int *irq)
  755. {
  756. int i;
  757. bool found = false;
  758. if (!oh->mpu_irqs)
  759. return -ENOENT;
  760. i = 0;
  761. while (oh->mpu_irqs[i].irq != -1) {
  762. if (name == oh->mpu_irqs[i].name ||
  763. !strcmp(name, oh->mpu_irqs[i].name)) {
  764. found = true;
  765. break;
  766. }
  767. i++;
  768. }
  769. if (!found)
  770. return -ENOENT;
  771. *irq = oh->mpu_irqs[i].irq;
  772. return 0;
  773. }
  774. /**
  775. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  776. * @oh: struct omap_hwmod * to operate on
  777. * @name: pointer to the name of the SDMA request line to fetch (optional)
  778. * @dma: pointer to an unsigned int to store the request line ID to
  779. *
  780. * Retrieve an SDMA request line ID named by @name on the IP block
  781. * pointed to by @oh. The ID will be filled into the address pointed
  782. * to by @dma. When @name is non-null, the request line ID associated
  783. * with the named entry will be returned. If @name is null, the first
  784. * matching entry will be returned. Data order is not meaningful in
  785. * hwmod data, so callers are strongly encouraged to use a non-null
  786. * @name whenever possible to avoid unpredictable effects if hwmod
  787. * data is later added that causes data ordering to change. Returns 0
  788. * upon success or a negative error code upon error.
  789. */
  790. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  791. unsigned int *dma)
  792. {
  793. int i;
  794. bool found = false;
  795. if (!oh->sdma_reqs)
  796. return -ENOENT;
  797. i = 0;
  798. while (oh->sdma_reqs[i].dma_req != -1) {
  799. if (name == oh->sdma_reqs[i].name ||
  800. !strcmp(name, oh->sdma_reqs[i].name)) {
  801. found = true;
  802. break;
  803. }
  804. i++;
  805. }
  806. if (!found)
  807. return -ENOENT;
  808. *dma = oh->sdma_reqs[i].dma_req;
  809. return 0;
  810. }
  811. /**
  812. * _get_addr_space_by_name - fetch address space start & end by name
  813. * @oh: struct omap_hwmod * to operate on
  814. * @name: pointer to the name of the address space to fetch (optional)
  815. * @pa_start: pointer to a u32 to store the starting address to
  816. * @pa_end: pointer to a u32 to store the ending address to
  817. *
  818. * Retrieve address space start and end addresses for the IP block
  819. * pointed to by @oh. The data will be filled into the addresses
  820. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  821. * address space data associated with the named entry will be
  822. * returned. If @name is null, the first matching entry will be
  823. * returned. Data order is not meaningful in hwmod data, so callers
  824. * are strongly encouraged to use a non-null @name whenever possible
  825. * to avoid unpredictable effects if hwmod data is later added that
  826. * causes data ordering to change. Returns 0 upon success or a
  827. * negative error code upon error.
  828. */
  829. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  830. u32 *pa_start, u32 *pa_end)
  831. {
  832. int i, j;
  833. struct omap_hwmod_ocp_if *os;
  834. bool found = false;
  835. i = 0;
  836. while (i < oh->slaves_cnt) {
  837. os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
  838. if (!os->addr)
  839. return -ENOENT;
  840. j = 0;
  841. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  842. if (name == os->addr[j].name ||
  843. !strcmp(name, os->addr[j].name)) {
  844. found = true;
  845. break;
  846. }
  847. j++;
  848. }
  849. if (found)
  850. break;
  851. }
  852. if (!found)
  853. return -ENOENT;
  854. *pa_start = os->addr[j].pa_start;
  855. *pa_end = os->addr[j].pa_end;
  856. return 0;
  857. }
  858. /**
  859. * _save_mpu_port_index - find and save the index to @oh's MPU port
  860. * @oh: struct omap_hwmod *
  861. *
  862. * Determines the array index of the OCP slave port that the MPU uses
  863. * to address the device, and saves it into the struct omap_hwmod.
  864. * Intended to be called during hwmod registration only. No return
  865. * value.
  866. */
  867. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  868. {
  869. struct omap_hwmod_ocp_if *os = NULL;
  870. int i = 0;
  871. if (!oh)
  872. return;
  873. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  874. while (i < oh->slaves_cnt) {
  875. os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
  876. if (os->user & OCP_USER_MPU) {
  877. oh->_mpu_port_index = i - 1;
  878. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  879. break;
  880. }
  881. }
  882. return;
  883. }
  884. /**
  885. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  886. * @oh: struct omap_hwmod *
  887. *
  888. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  889. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  890. * communicate with the IP block. This interface need not be directly
  891. * connected to the MPU (and almost certainly is not), but is directly
  892. * connected to the IP block represented by @oh. Returns a pointer
  893. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  894. * error or if there does not appear to be a path from the MPU to this
  895. * IP block.
  896. */
  897. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  898. {
  899. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  900. return NULL;
  901. return oh->slaves[oh->_mpu_port_index];
  902. };
  903. /**
  904. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  905. * @oh: struct omap_hwmod *
  906. *
  907. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  908. * the register target MPU address space; or returns NULL upon error.
  909. */
  910. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  911. {
  912. struct omap_hwmod_ocp_if *os;
  913. struct omap_hwmod_addr_space *mem;
  914. int found = 0, i = 0;
  915. os = _find_mpu_rt_port(oh);
  916. if (!os || !os->addr)
  917. return NULL;
  918. do {
  919. mem = &os->addr[i++];
  920. if (mem->flags & ADDR_TYPE_RT)
  921. found = 1;
  922. } while (!found && mem->pa_start != mem->pa_end);
  923. return (found) ? mem : NULL;
  924. }
  925. /**
  926. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  927. * @oh: struct omap_hwmod *
  928. *
  929. * If module is marked as SWSUP_SIDLE, force the module out of slave
  930. * idle; otherwise, configure it for smart-idle. If module is marked
  931. * as SWSUP_MSUSPEND, force the module out of master standby;
  932. * otherwise, configure it for smart-standby. No return value.
  933. */
  934. static void _enable_sysc(struct omap_hwmod *oh)
  935. {
  936. u8 idlemode, sf;
  937. u32 v;
  938. if (!oh->class->sysc)
  939. return;
  940. v = oh->_sysc_cache;
  941. sf = oh->class->sysc->sysc_flags;
  942. if (sf & SYSC_HAS_SIDLEMODE) {
  943. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  944. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  945. _set_slave_idlemode(oh, idlemode, &v);
  946. }
  947. if (sf & SYSC_HAS_MIDLEMODE) {
  948. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  949. idlemode = HWMOD_IDLEMODE_NO;
  950. } else {
  951. if (sf & SYSC_HAS_ENAWAKEUP)
  952. _enable_wakeup(oh, &v);
  953. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  954. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  955. else
  956. idlemode = HWMOD_IDLEMODE_SMART;
  957. }
  958. _set_master_standbymode(oh, idlemode, &v);
  959. }
  960. /*
  961. * XXX The clock framework should handle this, by
  962. * calling into this code. But this must wait until the
  963. * clock structures are tagged with omap_hwmod entries
  964. */
  965. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  966. (sf & SYSC_HAS_CLOCKACTIVITY))
  967. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  968. /* If slave is in SMARTIDLE, also enable wakeup */
  969. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  970. _enable_wakeup(oh, &v);
  971. _write_sysconfig(v, oh);
  972. /*
  973. * Set the autoidle bit only after setting the smartidle bit
  974. * Setting this will not have any impact on the other modules.
  975. */
  976. if (sf & SYSC_HAS_AUTOIDLE) {
  977. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  978. 0 : 1;
  979. _set_module_autoidle(oh, idlemode, &v);
  980. _write_sysconfig(v, oh);
  981. }
  982. }
  983. /**
  984. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  985. * @oh: struct omap_hwmod *
  986. *
  987. * If module is marked as SWSUP_SIDLE, force the module into slave
  988. * idle; otherwise, configure it for smart-idle. If module is marked
  989. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  990. * configure it for smart-standby. No return value.
  991. */
  992. static void _idle_sysc(struct omap_hwmod *oh)
  993. {
  994. u8 idlemode, sf;
  995. u32 v;
  996. if (!oh->class->sysc)
  997. return;
  998. v = oh->_sysc_cache;
  999. sf = oh->class->sysc->sysc_flags;
  1000. if (sf & SYSC_HAS_SIDLEMODE) {
  1001. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1002. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  1003. _set_slave_idlemode(oh, idlemode, &v);
  1004. }
  1005. if (sf & SYSC_HAS_MIDLEMODE) {
  1006. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1007. idlemode = HWMOD_IDLEMODE_FORCE;
  1008. } else {
  1009. if (sf & SYSC_HAS_ENAWAKEUP)
  1010. _enable_wakeup(oh, &v);
  1011. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1012. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1013. else
  1014. idlemode = HWMOD_IDLEMODE_SMART;
  1015. }
  1016. _set_master_standbymode(oh, idlemode, &v);
  1017. }
  1018. /* If slave is in SMARTIDLE, also enable wakeup */
  1019. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1020. _enable_wakeup(oh, &v);
  1021. _write_sysconfig(v, oh);
  1022. }
  1023. /**
  1024. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1025. * @oh: struct omap_hwmod *
  1026. *
  1027. * Force the module into slave idle and master suspend. No return
  1028. * value.
  1029. */
  1030. static void _shutdown_sysc(struct omap_hwmod *oh)
  1031. {
  1032. u32 v;
  1033. u8 sf;
  1034. if (!oh->class->sysc)
  1035. return;
  1036. v = oh->_sysc_cache;
  1037. sf = oh->class->sysc->sysc_flags;
  1038. if (sf & SYSC_HAS_SIDLEMODE)
  1039. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1040. if (sf & SYSC_HAS_MIDLEMODE)
  1041. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1042. if (sf & SYSC_HAS_AUTOIDLE)
  1043. _set_module_autoidle(oh, 1, &v);
  1044. _write_sysconfig(v, oh);
  1045. }
  1046. /**
  1047. * _lookup - find an omap_hwmod by name
  1048. * @name: find an omap_hwmod by name
  1049. *
  1050. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1051. */
  1052. static struct omap_hwmod *_lookup(const char *name)
  1053. {
  1054. struct omap_hwmod *oh, *temp_oh;
  1055. oh = NULL;
  1056. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1057. if (!strcmp(name, temp_oh->name)) {
  1058. oh = temp_oh;
  1059. break;
  1060. }
  1061. }
  1062. return oh;
  1063. }
  1064. /**
  1065. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1066. * @oh: struct omap_hwmod *
  1067. *
  1068. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1069. * clockdomain pointer, and save it into the struct omap_hwmod.
  1070. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  1071. */
  1072. static int _init_clkdm(struct omap_hwmod *oh)
  1073. {
  1074. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1075. return 0;
  1076. if (!oh->clkdm_name) {
  1077. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  1078. return -EINVAL;
  1079. }
  1080. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1081. if (!oh->clkdm) {
  1082. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1083. oh->name, oh->clkdm_name);
  1084. return -EINVAL;
  1085. }
  1086. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1087. oh->name, oh->clkdm_name);
  1088. return 0;
  1089. }
  1090. /**
  1091. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1092. * well the clockdomain.
  1093. * @oh: struct omap_hwmod *
  1094. * @data: not used; pass NULL
  1095. *
  1096. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1097. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1098. * success, or a negative error code on failure.
  1099. */
  1100. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1101. {
  1102. int ret = 0;
  1103. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1104. return 0;
  1105. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1106. ret |= _init_main_clk(oh);
  1107. ret |= _init_interface_clks(oh);
  1108. ret |= _init_opt_clks(oh);
  1109. ret |= _init_clkdm(oh);
  1110. if (!ret)
  1111. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1112. else
  1113. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1114. return ret;
  1115. }
  1116. /**
  1117. * _wait_target_ready - wait for a module to leave slave idle
  1118. * @oh: struct omap_hwmod *
  1119. *
  1120. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  1121. * does not have an IDLEST bit or if the module successfully leaves
  1122. * slave idle; otherwise, pass along the return value of the
  1123. * appropriate *_cm*_wait_module_ready() function.
  1124. */
  1125. static int _wait_target_ready(struct omap_hwmod *oh)
  1126. {
  1127. struct omap_hwmod_ocp_if *os;
  1128. int ret;
  1129. if (!oh)
  1130. return -EINVAL;
  1131. if (oh->flags & HWMOD_NO_IDLEST)
  1132. return 0;
  1133. os = _find_mpu_rt_port(oh);
  1134. if (!os)
  1135. return 0;
  1136. /* XXX check module SIDLEMODE */
  1137. /* XXX check clock enable states */
  1138. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1139. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  1140. oh->prcm.omap2.idlest_reg_id,
  1141. oh->prcm.omap2.idlest_idle_bit);
  1142. } else if (cpu_is_omap44xx()) {
  1143. if (!oh->clkdm)
  1144. return -EINVAL;
  1145. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  1146. oh->clkdm->cm_inst,
  1147. oh->clkdm->clkdm_offs,
  1148. oh->prcm.omap4.clkctrl_offs);
  1149. } else {
  1150. BUG();
  1151. };
  1152. return ret;
  1153. }
  1154. /**
  1155. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1156. * @oh: struct omap_hwmod *
  1157. * @name: name of the reset line in the context of this hwmod
  1158. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1159. *
  1160. * Return the bit position of the reset line that match the
  1161. * input name. Return -ENOENT if not found.
  1162. */
  1163. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1164. struct omap_hwmod_rst_info *ohri)
  1165. {
  1166. int i;
  1167. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1168. const char *rst_line = oh->rst_lines[i].name;
  1169. if (!strcmp(rst_line, name)) {
  1170. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1171. ohri->st_shift = oh->rst_lines[i].st_shift;
  1172. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1173. oh->name, __func__, rst_line, ohri->rst_shift,
  1174. ohri->st_shift);
  1175. return 0;
  1176. }
  1177. }
  1178. return -ENOENT;
  1179. }
  1180. /**
  1181. * _assert_hardreset - assert the HW reset line of submodules
  1182. * contained in the hwmod module.
  1183. * @oh: struct omap_hwmod *
  1184. * @name: name of the reset line to lookup and assert
  1185. *
  1186. * Some IP like dsp, ipu or iva contain processor that require
  1187. * an HW reset line to be assert / deassert in order to enable fully
  1188. * the IP.
  1189. */
  1190. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1191. {
  1192. struct omap_hwmod_rst_info ohri;
  1193. u8 ret;
  1194. if (!oh)
  1195. return -EINVAL;
  1196. ret = _lookup_hardreset(oh, name, &ohri);
  1197. if (IS_ERR_VALUE(ret))
  1198. return ret;
  1199. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1200. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1201. ohri.rst_shift);
  1202. else if (cpu_is_omap44xx())
  1203. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1204. oh->clkdm->pwrdm.ptr->prcm_partition,
  1205. oh->clkdm->pwrdm.ptr->prcm_offs,
  1206. oh->prcm.omap4.rstctrl_offs);
  1207. else
  1208. return -EINVAL;
  1209. }
  1210. /**
  1211. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1212. * in the hwmod module.
  1213. * @oh: struct omap_hwmod *
  1214. * @name: name of the reset line to look up and deassert
  1215. *
  1216. * Some IP like dsp, ipu or iva contain processor that require
  1217. * an HW reset line to be assert / deassert in order to enable fully
  1218. * the IP.
  1219. */
  1220. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1221. {
  1222. struct omap_hwmod_rst_info ohri;
  1223. int ret;
  1224. if (!oh)
  1225. return -EINVAL;
  1226. ret = _lookup_hardreset(oh, name, &ohri);
  1227. if (IS_ERR_VALUE(ret))
  1228. return ret;
  1229. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1230. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1231. ohri.rst_shift,
  1232. ohri.st_shift);
  1233. } else if (cpu_is_omap44xx()) {
  1234. if (ohri.st_shift)
  1235. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1236. oh->name, name);
  1237. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1238. oh->clkdm->pwrdm.ptr->prcm_partition,
  1239. oh->clkdm->pwrdm.ptr->prcm_offs,
  1240. oh->prcm.omap4.rstctrl_offs);
  1241. } else {
  1242. return -EINVAL;
  1243. }
  1244. if (ret == -EBUSY)
  1245. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1246. return ret;
  1247. }
  1248. /**
  1249. * _read_hardreset - read the HW reset line state of submodules
  1250. * contained in the hwmod module
  1251. * @oh: struct omap_hwmod *
  1252. * @name: name of the reset line to look up and read
  1253. *
  1254. * Return the state of the reset line.
  1255. */
  1256. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1257. {
  1258. struct omap_hwmod_rst_info ohri;
  1259. u8 ret;
  1260. if (!oh)
  1261. return -EINVAL;
  1262. ret = _lookup_hardreset(oh, name, &ohri);
  1263. if (IS_ERR_VALUE(ret))
  1264. return ret;
  1265. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1266. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1267. ohri.st_shift);
  1268. } else if (cpu_is_omap44xx()) {
  1269. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1270. oh->clkdm->pwrdm.ptr->prcm_partition,
  1271. oh->clkdm->pwrdm.ptr->prcm_offs,
  1272. oh->prcm.omap4.rstctrl_offs);
  1273. } else {
  1274. return -EINVAL;
  1275. }
  1276. }
  1277. /**
  1278. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1279. * @oh: struct omap_hwmod *
  1280. *
  1281. * If any hardreset line associated with @oh is asserted, then return true.
  1282. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1283. * no hardreset lines associated with @oh are asserted, then return false.
  1284. * This function is used to avoid executing some parts of the IP block
  1285. * enable/disable sequence if a hardreset line is set.
  1286. */
  1287. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1288. {
  1289. int i;
  1290. if (oh->rst_lines_cnt == 0)
  1291. return false;
  1292. for (i = 0; i < oh->rst_lines_cnt; i++)
  1293. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1294. return true;
  1295. return false;
  1296. }
  1297. /**
  1298. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1299. * @oh: struct omap_hwmod *
  1300. *
  1301. * Disable the PRCM module mode related to the hwmod @oh.
  1302. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1303. */
  1304. static int _omap4_disable_module(struct omap_hwmod *oh)
  1305. {
  1306. int v;
  1307. /* The module mode does not exist prior OMAP4 */
  1308. if (!cpu_is_omap44xx())
  1309. return -EINVAL;
  1310. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1311. return -EINVAL;
  1312. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1313. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1314. oh->clkdm->cm_inst,
  1315. oh->clkdm->clkdm_offs,
  1316. oh->prcm.omap4.clkctrl_offs);
  1317. if (_are_any_hardreset_lines_asserted(oh))
  1318. return 0;
  1319. v = _omap4_wait_target_disable(oh);
  1320. if (v)
  1321. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1322. oh->name);
  1323. return 0;
  1324. }
  1325. /**
  1326. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1327. * @oh: struct omap_hwmod *
  1328. *
  1329. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1330. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1331. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1332. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1333. *
  1334. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1335. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1336. * use the SYSCONFIG softreset bit to provide the status.
  1337. *
  1338. * Note that some IP like McBSP do have reset control but don't have
  1339. * reset status.
  1340. */
  1341. static int _ocp_softreset(struct omap_hwmod *oh)
  1342. {
  1343. u32 v, softrst_mask;
  1344. int c = 0;
  1345. int ret = 0;
  1346. if (!oh->class->sysc ||
  1347. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1348. return -ENOENT;
  1349. /* clocks must be on for this operation */
  1350. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1351. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1352. "enabled state\n", oh->name);
  1353. return -EINVAL;
  1354. }
  1355. /* For some modules, all optionnal clocks need to be enabled as well */
  1356. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1357. _enable_optional_clocks(oh);
  1358. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1359. v = oh->_sysc_cache;
  1360. ret = _set_softreset(oh, &v);
  1361. if (ret)
  1362. goto dis_opt_clks;
  1363. _write_sysconfig(v, oh);
  1364. if (oh->class->sysc->srst_udelay)
  1365. udelay(oh->class->sysc->srst_udelay);
  1366. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1367. omap_test_timeout((omap_hwmod_read(oh,
  1368. oh->class->sysc->syss_offs)
  1369. & SYSS_RESETDONE_MASK),
  1370. MAX_MODULE_SOFTRESET_WAIT, c);
  1371. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1372. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1373. omap_test_timeout(!(omap_hwmod_read(oh,
  1374. oh->class->sysc->sysc_offs)
  1375. & softrst_mask),
  1376. MAX_MODULE_SOFTRESET_WAIT, c);
  1377. }
  1378. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1379. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1380. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1381. else
  1382. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1383. /*
  1384. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1385. * _wait_target_ready() or _reset()
  1386. */
  1387. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1388. dis_opt_clks:
  1389. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1390. _disable_optional_clocks(oh);
  1391. return ret;
  1392. }
  1393. /**
  1394. * _reset - reset an omap_hwmod
  1395. * @oh: struct omap_hwmod *
  1396. *
  1397. * Resets an omap_hwmod @oh. If the module has a custom reset
  1398. * function pointer defined, then call it to reset the IP block, and
  1399. * pass along its return value to the caller. Otherwise, if the IP
  1400. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1401. * associated with it, call a function to reset the IP block via that
  1402. * method, and pass along the return value to the caller. Finally, if
  1403. * the IP block has some hardreset lines associated with it, assert
  1404. * all of those, but do _not_ deassert them. (This is because driver
  1405. * authors have expressed an apparent requirement to control the
  1406. * deassertion of the hardreset lines themselves.)
  1407. *
  1408. * The default software reset mechanism for most OMAP IP blocks is
  1409. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1410. * hwmods cannot be reset via this method. Some are not targets and
  1411. * therefore have no OCP header registers to access. Others (like the
  1412. * IVA) have idiosyncratic reset sequences. So for these relatively
  1413. * rare cases, custom reset code can be supplied in the struct
  1414. * omap_hwmod_class .reset function pointer. Passes along the return
  1415. * value from either _ocp_softreset() or the custom reset function -
  1416. * these must return -EINVAL if the hwmod cannot be reset this way or
  1417. * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
  1418. * not reset in time, or 0 upon success.
  1419. */
  1420. static int _reset(struct omap_hwmod *oh)
  1421. {
  1422. int i, r;
  1423. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1424. if (oh->class->reset) {
  1425. r = oh->class->reset(oh);
  1426. } else {
  1427. if (oh->rst_lines_cnt > 0) {
  1428. for (i = 0; i < oh->rst_lines_cnt; i++)
  1429. _assert_hardreset(oh, oh->rst_lines[i].name);
  1430. return 0;
  1431. } else {
  1432. r = _ocp_softreset(oh);
  1433. if (r == -ENOENT)
  1434. r = 0;
  1435. }
  1436. }
  1437. /*
  1438. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1439. * softreset. The _enable() function should be split to avoid
  1440. * the rewrite of the OCP_SYSCONFIG register.
  1441. */
  1442. if (oh->class->sysc) {
  1443. _update_sysc_cache(oh);
  1444. _enable_sysc(oh);
  1445. }
  1446. return r;
  1447. }
  1448. /**
  1449. * _enable - enable an omap_hwmod
  1450. * @oh: struct omap_hwmod *
  1451. *
  1452. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1453. * register target. Returns -EINVAL if the hwmod is in the wrong
  1454. * state or passes along the return value of _wait_target_ready().
  1455. */
  1456. static int _enable(struct omap_hwmod *oh)
  1457. {
  1458. int r;
  1459. int hwsup = 0;
  1460. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1461. /*
  1462. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1463. * state at init. Now that someone is really trying to enable
  1464. * them, just ensure that the hwmod mux is set.
  1465. */
  1466. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1467. /*
  1468. * If the caller has mux data populated, do the mux'ing
  1469. * which wouldn't have been done as part of the _enable()
  1470. * done during setup.
  1471. */
  1472. if (oh->mux)
  1473. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1474. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1475. return 0;
  1476. }
  1477. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1478. oh->_state != _HWMOD_STATE_IDLE &&
  1479. oh->_state != _HWMOD_STATE_DISABLED) {
  1480. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1481. oh->name);
  1482. return -EINVAL;
  1483. }
  1484. /*
  1485. * If an IP block contains HW reset lines and any of them are
  1486. * asserted, we let integration code associated with that
  1487. * block handle the enable. We've received very little
  1488. * information on what those driver authors need, and until
  1489. * detailed information is provided and the driver code is
  1490. * posted to the public lists, this is probably the best we
  1491. * can do.
  1492. */
  1493. if (_are_any_hardreset_lines_asserted(oh))
  1494. return 0;
  1495. /* Mux pins for device runtime if populated */
  1496. if (oh->mux && (!oh->mux->enabled ||
  1497. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1498. oh->mux->pads_dynamic)))
  1499. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1500. _add_initiator_dep(oh, mpu_oh);
  1501. if (oh->clkdm) {
  1502. /*
  1503. * A clockdomain must be in SW_SUP before enabling
  1504. * completely the module. The clockdomain can be set
  1505. * in HW_AUTO only when the module become ready.
  1506. */
  1507. hwsup = clkdm_in_hwsup(oh->clkdm);
  1508. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1509. if (r) {
  1510. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1511. oh->name, oh->clkdm->name, r);
  1512. return r;
  1513. }
  1514. }
  1515. _enable_clocks(oh);
  1516. _enable_module(oh);
  1517. r = _wait_target_ready(oh);
  1518. if (!r) {
  1519. /*
  1520. * Set the clockdomain to HW_AUTO only if the target is ready,
  1521. * assuming that the previous state was HW_AUTO
  1522. */
  1523. if (oh->clkdm && hwsup)
  1524. clkdm_allow_idle(oh->clkdm);
  1525. oh->_state = _HWMOD_STATE_ENABLED;
  1526. /* Access the sysconfig only if the target is ready */
  1527. if (oh->class->sysc) {
  1528. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1529. _update_sysc_cache(oh);
  1530. _enable_sysc(oh);
  1531. }
  1532. } else {
  1533. _disable_clocks(oh);
  1534. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1535. oh->name, r);
  1536. if (oh->clkdm)
  1537. clkdm_hwmod_disable(oh->clkdm, oh);
  1538. }
  1539. return r;
  1540. }
  1541. /**
  1542. * _idle - idle an omap_hwmod
  1543. * @oh: struct omap_hwmod *
  1544. *
  1545. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1546. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1547. * state or returns 0.
  1548. */
  1549. static int _idle(struct omap_hwmod *oh)
  1550. {
  1551. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1552. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1553. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1554. oh->name);
  1555. return -EINVAL;
  1556. }
  1557. if (_are_any_hardreset_lines_asserted(oh))
  1558. return 0;
  1559. if (oh->class->sysc)
  1560. _idle_sysc(oh);
  1561. _del_initiator_dep(oh, mpu_oh);
  1562. _omap4_disable_module(oh);
  1563. /*
  1564. * The module must be in idle mode before disabling any parents
  1565. * clocks. Otherwise, the parent clock might be disabled before
  1566. * the module transition is done, and thus will prevent the
  1567. * transition to complete properly.
  1568. */
  1569. _disable_clocks(oh);
  1570. if (oh->clkdm)
  1571. clkdm_hwmod_disable(oh->clkdm, oh);
  1572. /* Mux pins for device idle if populated */
  1573. if (oh->mux && oh->mux->pads_dynamic)
  1574. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1575. oh->_state = _HWMOD_STATE_IDLE;
  1576. return 0;
  1577. }
  1578. /**
  1579. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1580. * @oh: struct omap_hwmod *
  1581. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1582. *
  1583. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1584. * local copy. Intended to be used by drivers that require
  1585. * direct manipulation of the AUTOIDLE bits.
  1586. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1587. * along the return value from _set_module_autoidle().
  1588. *
  1589. * Any users of this function should be scrutinized carefully.
  1590. */
  1591. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1592. {
  1593. u32 v;
  1594. int retval = 0;
  1595. unsigned long flags;
  1596. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1597. return -EINVAL;
  1598. spin_lock_irqsave(&oh->_lock, flags);
  1599. v = oh->_sysc_cache;
  1600. retval = _set_module_autoidle(oh, autoidle, &v);
  1601. if (!retval)
  1602. _write_sysconfig(v, oh);
  1603. spin_unlock_irqrestore(&oh->_lock, flags);
  1604. return retval;
  1605. }
  1606. /**
  1607. * _shutdown - shutdown an omap_hwmod
  1608. * @oh: struct omap_hwmod *
  1609. *
  1610. * Shut down an omap_hwmod @oh. This should be called when the driver
  1611. * used for the hwmod is removed or unloaded or if the driver is not
  1612. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1613. * state or returns 0.
  1614. */
  1615. static int _shutdown(struct omap_hwmod *oh)
  1616. {
  1617. int ret, i;
  1618. u8 prev_state;
  1619. if (oh->_state != _HWMOD_STATE_IDLE &&
  1620. oh->_state != _HWMOD_STATE_ENABLED) {
  1621. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1622. oh->name);
  1623. return -EINVAL;
  1624. }
  1625. if (_are_any_hardreset_lines_asserted(oh))
  1626. return 0;
  1627. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1628. if (oh->class->pre_shutdown) {
  1629. prev_state = oh->_state;
  1630. if (oh->_state == _HWMOD_STATE_IDLE)
  1631. _enable(oh);
  1632. ret = oh->class->pre_shutdown(oh);
  1633. if (ret) {
  1634. if (prev_state == _HWMOD_STATE_IDLE)
  1635. _idle(oh);
  1636. return ret;
  1637. }
  1638. }
  1639. if (oh->class->sysc) {
  1640. if (oh->_state == _HWMOD_STATE_IDLE)
  1641. _enable(oh);
  1642. _shutdown_sysc(oh);
  1643. }
  1644. /* clocks and deps are already disabled in idle */
  1645. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1646. _del_initiator_dep(oh, mpu_oh);
  1647. /* XXX what about the other system initiators here? dma, dsp */
  1648. _omap4_disable_module(oh);
  1649. _disable_clocks(oh);
  1650. if (oh->clkdm)
  1651. clkdm_hwmod_disable(oh->clkdm, oh);
  1652. }
  1653. /* XXX Should this code also force-disable the optional clocks? */
  1654. for (i = 0; i < oh->rst_lines_cnt; i++)
  1655. _assert_hardreset(oh, oh->rst_lines[i].name);
  1656. /* Mux pins to safe mode or use populated off mode values */
  1657. if (oh->mux)
  1658. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1659. oh->_state = _HWMOD_STATE_DISABLED;
  1660. return 0;
  1661. }
  1662. /**
  1663. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1664. * @oh: struct omap_hwmod * to locate the virtual address
  1665. *
  1666. * Cache the virtual address used by the MPU to access this IP block's
  1667. * registers. This address is needed early so the OCP registers that
  1668. * are part of the device's address space can be ioremapped properly.
  1669. * No return value.
  1670. */
  1671. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1672. {
  1673. struct omap_hwmod_addr_space *mem;
  1674. void __iomem *va_start;
  1675. if (!oh)
  1676. return;
  1677. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1678. return;
  1679. mem = _find_mpu_rt_addr_space(oh);
  1680. if (!mem) {
  1681. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1682. oh->name);
  1683. return;
  1684. }
  1685. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1686. if (!va_start) {
  1687. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1688. return;
  1689. }
  1690. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1691. oh->name, va_start);
  1692. oh->_mpu_rt_va = va_start;
  1693. }
  1694. /**
  1695. * _init - initialize internal data for the hwmod @oh
  1696. * @oh: struct omap_hwmod *
  1697. * @n: (unused)
  1698. *
  1699. * Look up the clocks and the address space used by the MPU to access
  1700. * registers belonging to the hwmod @oh. @oh must already be
  1701. * registered at this point. This is the first of two phases for
  1702. * hwmod initialization. Code called here does not touch any hardware
  1703. * registers, it simply prepares internal data structures. Returns 0
  1704. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1705. * failure.
  1706. */
  1707. static int __init _init(struct omap_hwmod *oh, void *data)
  1708. {
  1709. int r;
  1710. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1711. return 0;
  1712. _init_mpu_rt_base(oh, NULL);
  1713. r = _init_clocks(oh, NULL);
  1714. if (IS_ERR_VALUE(r)) {
  1715. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1716. return -EINVAL;
  1717. }
  1718. oh->_state = _HWMOD_STATE_INITIALIZED;
  1719. return 0;
  1720. }
  1721. /**
  1722. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1723. * @oh: struct omap_hwmod *
  1724. *
  1725. * Set up the module's interface clocks. XXX This function is still mostly
  1726. * a stub; implementing this properly requires iclk autoidle usecounting in
  1727. * the clock code. No return value.
  1728. */
  1729. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1730. {
  1731. struct omap_hwmod_ocp_if *os;
  1732. int i = 0;
  1733. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1734. return;
  1735. while (i < oh->slaves_cnt) {
  1736. os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
  1737. if (!os->_clk)
  1738. continue;
  1739. if (os->flags & OCPIF_SWSUP_IDLE) {
  1740. /* XXX omap_iclk_deny_idle(c); */
  1741. } else {
  1742. /* XXX omap_iclk_allow_idle(c); */
  1743. clk_enable(os->_clk);
  1744. }
  1745. }
  1746. return;
  1747. }
  1748. /**
  1749. * _setup_reset - reset an IP block during the setup process
  1750. * @oh: struct omap_hwmod *
  1751. *
  1752. * Reset the IP block corresponding to the hwmod @oh during the setup
  1753. * process. The IP block is first enabled so it can be successfully
  1754. * reset. Returns 0 upon success or a negative error code upon
  1755. * failure.
  1756. */
  1757. static int __init _setup_reset(struct omap_hwmod *oh)
  1758. {
  1759. int r;
  1760. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1761. return -EINVAL;
  1762. if (oh->rst_lines_cnt == 0) {
  1763. r = _enable(oh);
  1764. if (r) {
  1765. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1766. oh->name, oh->_state);
  1767. return -EINVAL;
  1768. }
  1769. }
  1770. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1771. r = _reset(oh);
  1772. return r;
  1773. }
  1774. /**
  1775. * _setup_postsetup - transition to the appropriate state after _setup
  1776. * @oh: struct omap_hwmod *
  1777. *
  1778. * Place an IP block represented by @oh into a "post-setup" state --
  1779. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1780. * this function is called at the end of _setup().) The postsetup
  1781. * state for an IP block can be changed by calling
  1782. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1783. * before one of the omap_hwmod_setup*() functions are called for the
  1784. * IP block.
  1785. *
  1786. * The IP block stays in this state until a PM runtime-based driver is
  1787. * loaded for that IP block. A post-setup state of IDLE is
  1788. * appropriate for almost all IP blocks with runtime PM-enabled
  1789. * drivers, since those drivers are able to enable the IP block. A
  1790. * post-setup state of ENABLED is appropriate for kernels with PM
  1791. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1792. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1793. * included, since the WDTIMER starts running on reset and will reset
  1794. * the MPU if left active.
  1795. *
  1796. * This post-setup mechanism is deprecated. Once all of the OMAP
  1797. * drivers have been converted to use PM runtime, and all of the IP
  1798. * block data and interconnect data is available to the hwmod code, it
  1799. * should be possible to replace this mechanism with a "lazy reset"
  1800. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1801. * when the driver first probes, then all remaining IP blocks without
  1802. * drivers are either shut down or enabled after the drivers have
  1803. * loaded. However, this cannot take place until the above
  1804. * preconditions have been met, since otherwise the late reset code
  1805. * has no way of knowing which IP blocks are in use by drivers, and
  1806. * which ones are unused.
  1807. *
  1808. * No return value.
  1809. */
  1810. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1811. {
  1812. u8 postsetup_state;
  1813. if (oh->rst_lines_cnt > 0)
  1814. return;
  1815. postsetup_state = oh->_postsetup_state;
  1816. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1817. postsetup_state = _HWMOD_STATE_ENABLED;
  1818. /*
  1819. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1820. * it should be set by the core code as a runtime flag during startup
  1821. */
  1822. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1823. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1824. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1825. postsetup_state = _HWMOD_STATE_ENABLED;
  1826. }
  1827. if (postsetup_state == _HWMOD_STATE_IDLE)
  1828. _idle(oh);
  1829. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1830. _shutdown(oh);
  1831. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1832. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1833. oh->name, postsetup_state);
  1834. return;
  1835. }
  1836. /**
  1837. * _setup - prepare IP block hardware for use
  1838. * @oh: struct omap_hwmod *
  1839. * @n: (unused, pass NULL)
  1840. *
  1841. * Configure the IP block represented by @oh. This may include
  1842. * enabling the IP block, resetting it, and placing it into a
  1843. * post-setup state, depending on the type of IP block and applicable
  1844. * flags. IP blocks are reset to prevent any previous configuration
  1845. * by the bootloader or previous operating system from interfering
  1846. * with power management or other parts of the system. The reset can
  1847. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1848. * two phases for hwmod initialization. Code called here generally
  1849. * affects the IP block hardware, or system integration hardware
  1850. * associated with the IP block. Returns 0.
  1851. */
  1852. static int __init _setup(struct omap_hwmod *oh, void *data)
  1853. {
  1854. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1855. return 0;
  1856. _setup_iclk_autoidle(oh);
  1857. if (!_setup_reset(oh))
  1858. _setup_postsetup(oh);
  1859. return 0;
  1860. }
  1861. /**
  1862. * _register - register a struct omap_hwmod
  1863. * @oh: struct omap_hwmod *
  1864. *
  1865. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1866. * already has been registered by the same name; -EINVAL if the
  1867. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1868. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1869. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1870. * success.
  1871. *
  1872. * XXX The data should be copied into bootmem, so the original data
  1873. * should be marked __initdata and freed after init. This would allow
  1874. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1875. * that the copy process would be relatively complex due to the large number
  1876. * of substructures.
  1877. */
  1878. static int __init _register(struct omap_hwmod *oh)
  1879. {
  1880. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1881. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1882. return -EINVAL;
  1883. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1884. if (_lookup(oh->name))
  1885. return -EEXIST;
  1886. _save_mpu_port_index(oh);
  1887. list_add_tail(&oh->node, &omap_hwmod_list);
  1888. spin_lock_init(&oh->_lock);
  1889. oh->_state = _HWMOD_STATE_REGISTERED;
  1890. /*
  1891. * XXX Rather than doing a strcmp(), this should test a flag
  1892. * set in the hwmod data, inserted by the autogenerator code.
  1893. */
  1894. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1895. mpu_oh = oh;
  1896. return 0;
  1897. }
  1898. /* Public functions */
  1899. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1900. {
  1901. if (oh->flags & HWMOD_16BIT_REG)
  1902. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1903. else
  1904. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1905. }
  1906. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1907. {
  1908. if (oh->flags & HWMOD_16BIT_REG)
  1909. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1910. else
  1911. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1912. }
  1913. /**
  1914. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  1915. * @oh: struct omap_hwmod *
  1916. *
  1917. * This is a public function exposed to drivers. Some drivers may need to do
  1918. * some settings before and after resetting the device. Those drivers after
  1919. * doing the necessary settings could use this function to start a reset by
  1920. * setting the SYSCONFIG.SOFTRESET bit.
  1921. */
  1922. int omap_hwmod_softreset(struct omap_hwmod *oh)
  1923. {
  1924. u32 v;
  1925. int ret;
  1926. if (!oh || !(oh->_sysc_cache))
  1927. return -EINVAL;
  1928. v = oh->_sysc_cache;
  1929. ret = _set_softreset(oh, &v);
  1930. if (ret)
  1931. goto error;
  1932. _write_sysconfig(v, oh);
  1933. error:
  1934. return ret;
  1935. }
  1936. /**
  1937. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1938. * @oh: struct omap_hwmod *
  1939. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1940. *
  1941. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1942. * local copy. Intended to be used by drivers that have some erratum
  1943. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1944. * -EINVAL if @oh is null, or passes along the return value from
  1945. * _set_slave_idlemode().
  1946. *
  1947. * XXX Does this function have any current users? If not, we should
  1948. * remove it; it is better to let the rest of the hwmod code handle this.
  1949. * Any users of this function should be scrutinized carefully.
  1950. */
  1951. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1952. {
  1953. u32 v;
  1954. int retval = 0;
  1955. if (!oh)
  1956. return -EINVAL;
  1957. v = oh->_sysc_cache;
  1958. retval = _set_slave_idlemode(oh, idlemode, &v);
  1959. if (!retval)
  1960. _write_sysconfig(v, oh);
  1961. return retval;
  1962. }
  1963. /**
  1964. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1965. * @name: name of the omap_hwmod to look up
  1966. *
  1967. * Given a @name of an omap_hwmod, return a pointer to the registered
  1968. * struct omap_hwmod *, or NULL upon error.
  1969. */
  1970. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1971. {
  1972. struct omap_hwmod *oh;
  1973. if (!name)
  1974. return NULL;
  1975. oh = _lookup(name);
  1976. return oh;
  1977. }
  1978. /**
  1979. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1980. * @fn: pointer to a callback function
  1981. * @data: void * data to pass to callback function
  1982. *
  1983. * Call @fn for each registered omap_hwmod, passing @data to each
  1984. * function. @fn must return 0 for success or any other value for
  1985. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1986. * will stop and the non-zero return value will be passed to the
  1987. * caller of omap_hwmod_for_each(). @fn is called with
  1988. * omap_hwmod_for_each() held.
  1989. */
  1990. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1991. void *data)
  1992. {
  1993. struct omap_hwmod *temp_oh;
  1994. int ret = 0;
  1995. if (!fn)
  1996. return -EINVAL;
  1997. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1998. ret = (*fn)(temp_oh, data);
  1999. if (ret)
  2000. break;
  2001. }
  2002. return ret;
  2003. }
  2004. /**
  2005. * omap_hwmod_register - register an array of hwmods
  2006. * @ohs: pointer to an array of omap_hwmods to register
  2007. *
  2008. * Intended to be called early in boot before the clock framework is
  2009. * initialized. If @ohs is not null, will register all omap_hwmods
  2010. * listed in @ohs that are valid for this chip. Returns 0.
  2011. */
  2012. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  2013. {
  2014. int r, i;
  2015. if (!ohs)
  2016. return 0;
  2017. i = 0;
  2018. do {
  2019. r = _register(ohs[i]);
  2020. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  2021. r);
  2022. } while (ohs[++i]);
  2023. return 0;
  2024. }
  2025. /**
  2026. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2027. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2028. *
  2029. * If the hwmod data corresponding to the MPU subsystem IP block
  2030. * hasn't been initialized and set up yet, do so now. This must be
  2031. * done first since sleep dependencies may be added from other hwmods
  2032. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2033. * return value.
  2034. */
  2035. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2036. {
  2037. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2038. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2039. __func__, MPU_INITIATOR_NAME);
  2040. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2041. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2042. }
  2043. /**
  2044. * omap_hwmod_setup_one - set up a single hwmod
  2045. * @oh_name: const char * name of the already-registered hwmod to set up
  2046. *
  2047. * Initialize and set up a single hwmod. Intended to be used for a
  2048. * small number of early devices, such as the timer IP blocks used for
  2049. * the scheduler clock. Must be called after omap2_clk_init().
  2050. * Resolves the struct clk names to struct clk pointers for each
  2051. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2052. * -EINVAL upon error or 0 upon success.
  2053. */
  2054. int __init omap_hwmod_setup_one(const char *oh_name)
  2055. {
  2056. struct omap_hwmod *oh;
  2057. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2058. oh = _lookup(oh_name);
  2059. if (!oh) {
  2060. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2061. return -EINVAL;
  2062. }
  2063. _ensure_mpu_hwmod_is_setup(oh);
  2064. _init(oh, NULL);
  2065. _setup(oh, NULL);
  2066. return 0;
  2067. }
  2068. /**
  2069. * omap_hwmod_setup_all - set up all registered IP blocks
  2070. *
  2071. * Initialize and set up all IP blocks registered with the hwmod code.
  2072. * Must be called after omap2_clk_init(). Resolves the struct clk
  2073. * names to struct clk pointers for each registered omap_hwmod. Also
  2074. * calls _setup() on each hwmod. Returns 0 upon success.
  2075. */
  2076. static int __init omap_hwmod_setup_all(void)
  2077. {
  2078. _ensure_mpu_hwmod_is_setup(NULL);
  2079. omap_hwmod_for_each(_init, NULL);
  2080. omap_hwmod_for_each(_setup, NULL);
  2081. return 0;
  2082. }
  2083. core_initcall(omap_hwmod_setup_all);
  2084. /**
  2085. * omap_hwmod_enable - enable an omap_hwmod
  2086. * @oh: struct omap_hwmod *
  2087. *
  2088. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2089. * Returns -EINVAL on error or passes along the return value from _enable().
  2090. */
  2091. int omap_hwmod_enable(struct omap_hwmod *oh)
  2092. {
  2093. int r;
  2094. unsigned long flags;
  2095. if (!oh)
  2096. return -EINVAL;
  2097. spin_lock_irqsave(&oh->_lock, flags);
  2098. r = _enable(oh);
  2099. spin_unlock_irqrestore(&oh->_lock, flags);
  2100. return r;
  2101. }
  2102. /**
  2103. * omap_hwmod_idle - idle an omap_hwmod
  2104. * @oh: struct omap_hwmod *
  2105. *
  2106. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2107. * Returns -EINVAL on error or passes along the return value from _idle().
  2108. */
  2109. int omap_hwmod_idle(struct omap_hwmod *oh)
  2110. {
  2111. unsigned long flags;
  2112. if (!oh)
  2113. return -EINVAL;
  2114. spin_lock_irqsave(&oh->_lock, flags);
  2115. _idle(oh);
  2116. spin_unlock_irqrestore(&oh->_lock, flags);
  2117. return 0;
  2118. }
  2119. /**
  2120. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2121. * @oh: struct omap_hwmod *
  2122. *
  2123. * Shutdown an omap_hwmod @oh. Intended to be called by
  2124. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2125. * the return value from _shutdown().
  2126. */
  2127. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2128. {
  2129. unsigned long flags;
  2130. if (!oh)
  2131. return -EINVAL;
  2132. spin_lock_irqsave(&oh->_lock, flags);
  2133. _shutdown(oh);
  2134. spin_unlock_irqrestore(&oh->_lock, flags);
  2135. return 0;
  2136. }
  2137. /**
  2138. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2139. * @oh: struct omap_hwmod *oh
  2140. *
  2141. * Intended to be called by the omap_device code.
  2142. */
  2143. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2144. {
  2145. unsigned long flags;
  2146. spin_lock_irqsave(&oh->_lock, flags);
  2147. _enable_clocks(oh);
  2148. spin_unlock_irqrestore(&oh->_lock, flags);
  2149. return 0;
  2150. }
  2151. /**
  2152. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2153. * @oh: struct omap_hwmod *oh
  2154. *
  2155. * Intended to be called by the omap_device code.
  2156. */
  2157. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2158. {
  2159. unsigned long flags;
  2160. spin_lock_irqsave(&oh->_lock, flags);
  2161. _disable_clocks(oh);
  2162. spin_unlock_irqrestore(&oh->_lock, flags);
  2163. return 0;
  2164. }
  2165. /**
  2166. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2167. * @oh: struct omap_hwmod *oh
  2168. *
  2169. * Intended to be called by drivers and core code when all posted
  2170. * writes to a device must complete before continuing further
  2171. * execution (for example, after clearing some device IRQSTATUS
  2172. * register bits)
  2173. *
  2174. * XXX what about targets with multiple OCP threads?
  2175. */
  2176. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2177. {
  2178. BUG_ON(!oh);
  2179. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2180. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2181. oh->name);
  2182. return;
  2183. }
  2184. /*
  2185. * Forces posted writes to complete on the OCP thread handling
  2186. * register writes
  2187. */
  2188. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2189. }
  2190. /**
  2191. * omap_hwmod_reset - reset the hwmod
  2192. * @oh: struct omap_hwmod *
  2193. *
  2194. * Under some conditions, a driver may wish to reset the entire device.
  2195. * Called from omap_device code. Returns -EINVAL on error or passes along
  2196. * the return value from _reset().
  2197. */
  2198. int omap_hwmod_reset(struct omap_hwmod *oh)
  2199. {
  2200. int r;
  2201. unsigned long flags;
  2202. if (!oh)
  2203. return -EINVAL;
  2204. spin_lock_irqsave(&oh->_lock, flags);
  2205. r = _reset(oh);
  2206. spin_unlock_irqrestore(&oh->_lock, flags);
  2207. return r;
  2208. }
  2209. /*
  2210. * IP block data retrieval functions
  2211. */
  2212. /**
  2213. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2214. * @oh: struct omap_hwmod *
  2215. * @res: pointer to the first element of an array of struct resource to fill
  2216. *
  2217. * Count the number of struct resource array elements necessary to
  2218. * contain omap_hwmod @oh resources. Intended to be called by code
  2219. * that registers omap_devices. Intended to be used to determine the
  2220. * size of a dynamically-allocated struct resource array, before
  2221. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2222. * resource array elements needed.
  2223. *
  2224. * XXX This code is not optimized. It could attempt to merge adjacent
  2225. * resource IDs.
  2226. *
  2227. */
  2228. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2229. {
  2230. struct omap_hwmod_ocp_if *os;
  2231. int ret;
  2232. int i = 0;
  2233. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2234. while (i < oh->slaves_cnt) {
  2235. os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
  2236. ret += _count_ocp_if_addr_spaces(os);
  2237. }
  2238. return ret;
  2239. }
  2240. /**
  2241. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2242. * @oh: struct omap_hwmod *
  2243. * @res: pointer to the first element of an array of struct resource to fill
  2244. *
  2245. * Fill the struct resource array @res with resource data from the
  2246. * omap_hwmod @oh. Intended to be called by code that registers
  2247. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2248. * number of array elements filled.
  2249. */
  2250. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2251. {
  2252. struct omap_hwmod_ocp_if *os;
  2253. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2254. int r = 0;
  2255. /* For each IRQ, DMA, memory area, fill in array.*/
  2256. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2257. for (i = 0; i < mpu_irqs_cnt; i++) {
  2258. (res + r)->name = (oh->mpu_irqs + i)->name;
  2259. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2260. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2261. (res + r)->flags = IORESOURCE_IRQ;
  2262. r++;
  2263. }
  2264. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2265. for (i = 0; i < sdma_reqs_cnt; i++) {
  2266. (res + r)->name = (oh->sdma_reqs + i)->name;
  2267. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2268. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2269. (res + r)->flags = IORESOURCE_DMA;
  2270. r++;
  2271. }
  2272. i = 0;
  2273. while (i < oh->slaves_cnt) {
  2274. os = _fetch_next_ocp_if(NULL, oh->slaves, &i);
  2275. addr_cnt = _count_ocp_if_addr_spaces(os);
  2276. for (j = 0; j < addr_cnt; j++) {
  2277. (res + r)->name = (os->addr + j)->name;
  2278. (res + r)->start = (os->addr + j)->pa_start;
  2279. (res + r)->end = (os->addr + j)->pa_end;
  2280. (res + r)->flags = IORESOURCE_MEM;
  2281. r++;
  2282. }
  2283. }
  2284. return r;
  2285. }
  2286. /**
  2287. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2288. * @oh: struct omap_hwmod * to operate on
  2289. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2290. * @name: pointer to the name of the data to fetch (optional)
  2291. * @rsrc: pointer to a struct resource, allocated by the caller
  2292. *
  2293. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2294. * data for the IP block pointed to by @oh. The data will be filled
  2295. * into a struct resource record pointed to by @rsrc. The struct
  2296. * resource must be allocated by the caller. When @name is non-null,
  2297. * the data associated with the matching entry in the IRQ/SDMA/address
  2298. * space hwmod data arrays will be returned. If @name is null, the
  2299. * first array entry will be returned. Data order is not meaningful
  2300. * in hwmod data, so callers are strongly encouraged to use a non-null
  2301. * @name whenever possible to avoid unpredictable effects if hwmod
  2302. * data is later added that causes data ordering to change. This
  2303. * function is only intended for use by OMAP core code. Device
  2304. * drivers should not call this function - the appropriate bus-related
  2305. * data accessor functions should be used instead. Returns 0 upon
  2306. * success or a negative error code upon error.
  2307. */
  2308. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2309. const char *name, struct resource *rsrc)
  2310. {
  2311. int r;
  2312. unsigned int irq, dma;
  2313. u32 pa_start, pa_end;
  2314. if (!oh || !rsrc)
  2315. return -EINVAL;
  2316. if (type == IORESOURCE_IRQ) {
  2317. r = _get_mpu_irq_by_name(oh, name, &irq);
  2318. if (r)
  2319. return r;
  2320. rsrc->start = irq;
  2321. rsrc->end = irq;
  2322. } else if (type == IORESOURCE_DMA) {
  2323. r = _get_sdma_req_by_name(oh, name, &dma);
  2324. if (r)
  2325. return r;
  2326. rsrc->start = dma;
  2327. rsrc->end = dma;
  2328. } else if (type == IORESOURCE_MEM) {
  2329. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2330. if (r)
  2331. return r;
  2332. rsrc->start = pa_start;
  2333. rsrc->end = pa_end;
  2334. } else {
  2335. return -EINVAL;
  2336. }
  2337. rsrc->flags = type;
  2338. rsrc->name = name;
  2339. return 0;
  2340. }
  2341. /**
  2342. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2343. * @oh: struct omap_hwmod *
  2344. *
  2345. * Return the powerdomain pointer associated with the OMAP module
  2346. * @oh's main clock. If @oh does not have a main clk, return the
  2347. * powerdomain associated with the interface clock associated with the
  2348. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2349. * instead?) Returns NULL on error, or a struct powerdomain * on
  2350. * success.
  2351. */
  2352. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2353. {
  2354. struct clk *c;
  2355. struct omap_hwmod_ocp_if *oi;
  2356. if (!oh)
  2357. return NULL;
  2358. if (oh->_clk) {
  2359. c = oh->_clk;
  2360. } else {
  2361. oi = _find_mpu_rt_port(oh);
  2362. if (!oi)
  2363. return NULL;
  2364. c = oi->_clk;
  2365. }
  2366. if (!c->clkdm)
  2367. return NULL;
  2368. return c->clkdm->pwrdm.ptr;
  2369. }
  2370. /**
  2371. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2372. * @oh: struct omap_hwmod *
  2373. *
  2374. * Returns the virtual address corresponding to the beginning of the
  2375. * module's register target, in the address range that is intended to
  2376. * be used by the MPU. Returns the virtual address upon success or NULL
  2377. * upon error.
  2378. */
  2379. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2380. {
  2381. if (!oh)
  2382. return NULL;
  2383. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2384. return NULL;
  2385. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2386. return NULL;
  2387. return oh->_mpu_rt_va;
  2388. }
  2389. /**
  2390. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2391. * @oh: struct omap_hwmod *
  2392. * @init_oh: struct omap_hwmod * (initiator)
  2393. *
  2394. * Add a sleep dependency between the initiator @init_oh and @oh.
  2395. * Intended to be called by DSP/Bridge code via platform_data for the
  2396. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2397. * code needs to add/del initiator dependencies dynamically
  2398. * before/after accessing a device. Returns the return value from
  2399. * _add_initiator_dep().
  2400. *
  2401. * XXX Keep a usecount in the clockdomain code
  2402. */
  2403. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2404. struct omap_hwmod *init_oh)
  2405. {
  2406. return _add_initiator_dep(oh, init_oh);
  2407. }
  2408. /*
  2409. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2410. * for context save/restore operations?
  2411. */
  2412. /**
  2413. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2414. * @oh: struct omap_hwmod *
  2415. * @init_oh: struct omap_hwmod * (initiator)
  2416. *
  2417. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2418. * Intended to be called by DSP/Bridge code via platform_data for the
  2419. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2420. * code needs to add/del initiator dependencies dynamically
  2421. * before/after accessing a device. Returns the return value from
  2422. * _del_initiator_dep().
  2423. *
  2424. * XXX Keep a usecount in the clockdomain code
  2425. */
  2426. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2427. struct omap_hwmod *init_oh)
  2428. {
  2429. return _del_initiator_dep(oh, init_oh);
  2430. }
  2431. /**
  2432. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2433. * @oh: struct omap_hwmod *
  2434. *
  2435. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2436. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2437. * this IP block if it has dynamic mux entries. Eventually this
  2438. * should set PRCM wakeup registers to cause the PRCM to receive
  2439. * wakeup events from the module. Does not set any wakeup routing
  2440. * registers beyond this point - if the module is to wake up any other
  2441. * module or subsystem, that must be set separately. Called by
  2442. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2443. */
  2444. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2445. {
  2446. unsigned long flags;
  2447. u32 v;
  2448. spin_lock_irqsave(&oh->_lock, flags);
  2449. if (oh->class->sysc &&
  2450. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2451. v = oh->_sysc_cache;
  2452. _enable_wakeup(oh, &v);
  2453. _write_sysconfig(v, oh);
  2454. }
  2455. _set_idle_ioring_wakeup(oh, true);
  2456. spin_unlock_irqrestore(&oh->_lock, flags);
  2457. return 0;
  2458. }
  2459. /**
  2460. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2461. * @oh: struct omap_hwmod *
  2462. *
  2463. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2464. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2465. * events for this IP block if it has dynamic mux entries. Eventually
  2466. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2467. * wakeup events from the module. Does not set any wakeup routing
  2468. * registers beyond this point - if the module is to wake up any other
  2469. * module or subsystem, that must be set separately. Called by
  2470. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2471. */
  2472. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2473. {
  2474. unsigned long flags;
  2475. u32 v;
  2476. spin_lock_irqsave(&oh->_lock, flags);
  2477. if (oh->class->sysc &&
  2478. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2479. v = oh->_sysc_cache;
  2480. _disable_wakeup(oh, &v);
  2481. _write_sysconfig(v, oh);
  2482. }
  2483. _set_idle_ioring_wakeup(oh, false);
  2484. spin_unlock_irqrestore(&oh->_lock, flags);
  2485. return 0;
  2486. }
  2487. /**
  2488. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2489. * contained in the hwmod module.
  2490. * @oh: struct omap_hwmod *
  2491. * @name: name of the reset line to lookup and assert
  2492. *
  2493. * Some IP like dsp, ipu or iva contain processor that require
  2494. * an HW reset line to be assert / deassert in order to enable fully
  2495. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2496. * yet supported on this OMAP; otherwise, passes along the return value
  2497. * from _assert_hardreset().
  2498. */
  2499. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2500. {
  2501. int ret;
  2502. unsigned long flags;
  2503. if (!oh)
  2504. return -EINVAL;
  2505. spin_lock_irqsave(&oh->_lock, flags);
  2506. ret = _assert_hardreset(oh, name);
  2507. spin_unlock_irqrestore(&oh->_lock, flags);
  2508. return ret;
  2509. }
  2510. /**
  2511. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2512. * contained in the hwmod module.
  2513. * @oh: struct omap_hwmod *
  2514. * @name: name of the reset line to look up and deassert
  2515. *
  2516. * Some IP like dsp, ipu or iva contain processor that require
  2517. * an HW reset line to be assert / deassert in order to enable fully
  2518. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2519. * yet supported on this OMAP; otherwise, passes along the return value
  2520. * from _deassert_hardreset().
  2521. */
  2522. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2523. {
  2524. int ret;
  2525. unsigned long flags;
  2526. if (!oh)
  2527. return -EINVAL;
  2528. spin_lock_irqsave(&oh->_lock, flags);
  2529. ret = _deassert_hardreset(oh, name);
  2530. spin_unlock_irqrestore(&oh->_lock, flags);
  2531. return ret;
  2532. }
  2533. /**
  2534. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2535. * contained in the hwmod module
  2536. * @oh: struct omap_hwmod *
  2537. * @name: name of the reset line to look up and read
  2538. *
  2539. * Return the current state of the hwmod @oh's reset line named @name:
  2540. * returns -EINVAL upon parameter error or if this operation
  2541. * is unsupported on the current OMAP; otherwise, passes along the return
  2542. * value from _read_hardreset().
  2543. */
  2544. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2545. {
  2546. int ret;
  2547. unsigned long flags;
  2548. if (!oh)
  2549. return -EINVAL;
  2550. spin_lock_irqsave(&oh->_lock, flags);
  2551. ret = _read_hardreset(oh, name);
  2552. spin_unlock_irqrestore(&oh->_lock, flags);
  2553. return ret;
  2554. }
  2555. /**
  2556. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2557. * @classname: struct omap_hwmod_class name to search for
  2558. * @fn: callback function pointer to call for each hwmod in class @classname
  2559. * @user: arbitrary context data to pass to the callback function
  2560. *
  2561. * For each omap_hwmod of class @classname, call @fn.
  2562. * If the callback function returns something other than
  2563. * zero, the iterator is terminated, and the callback function's return
  2564. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2565. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2566. */
  2567. int omap_hwmod_for_each_by_class(const char *classname,
  2568. int (*fn)(struct omap_hwmod *oh,
  2569. void *user),
  2570. void *user)
  2571. {
  2572. struct omap_hwmod *temp_oh;
  2573. int ret = 0;
  2574. if (!classname || !fn)
  2575. return -EINVAL;
  2576. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2577. __func__, classname);
  2578. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2579. if (!strcmp(temp_oh->class->name, classname)) {
  2580. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2581. __func__, temp_oh->name);
  2582. ret = (*fn)(temp_oh, user);
  2583. if (ret)
  2584. break;
  2585. }
  2586. }
  2587. if (ret)
  2588. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2589. __func__, ret);
  2590. return ret;
  2591. }
  2592. /**
  2593. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2594. * @oh: struct omap_hwmod *
  2595. * @state: state that _setup() should leave the hwmod in
  2596. *
  2597. * Sets the hwmod state that @oh will enter at the end of _setup()
  2598. * (called by omap_hwmod_setup_*()). See also the documentation
  2599. * for _setup_postsetup(), above. Returns 0 upon success or
  2600. * -EINVAL if there is a problem with the arguments or if the hwmod is
  2601. * in the wrong state.
  2602. */
  2603. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2604. {
  2605. int ret;
  2606. unsigned long flags;
  2607. if (!oh)
  2608. return -EINVAL;
  2609. if (state != _HWMOD_STATE_DISABLED &&
  2610. state != _HWMOD_STATE_ENABLED &&
  2611. state != _HWMOD_STATE_IDLE)
  2612. return -EINVAL;
  2613. spin_lock_irqsave(&oh->_lock, flags);
  2614. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2615. ret = -EINVAL;
  2616. goto ohsps_unlock;
  2617. }
  2618. oh->_postsetup_state = state;
  2619. ret = 0;
  2620. ohsps_unlock:
  2621. spin_unlock_irqrestore(&oh->_lock, flags);
  2622. return ret;
  2623. }
  2624. /**
  2625. * omap_hwmod_get_context_loss_count - get lost context count
  2626. * @oh: struct omap_hwmod *
  2627. *
  2628. * Query the powerdomain of of @oh to get the context loss
  2629. * count for this device.
  2630. *
  2631. * Returns the context loss count of the powerdomain assocated with @oh
  2632. * upon success, or zero if no powerdomain exists for @oh.
  2633. */
  2634. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2635. {
  2636. struct powerdomain *pwrdm;
  2637. int ret = 0;
  2638. pwrdm = omap_hwmod_get_pwrdm(oh);
  2639. if (pwrdm)
  2640. ret = pwrdm_get_context_loss_count(pwrdm);
  2641. return ret;
  2642. }
  2643. /**
  2644. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2645. * @oh: struct omap_hwmod *
  2646. *
  2647. * Prevent the hwmod @oh from being reset during the setup process.
  2648. * Intended for use by board-*.c files on boards with devices that
  2649. * cannot tolerate being reset. Must be called before the hwmod has
  2650. * been set up. Returns 0 upon success or negative error code upon
  2651. * failure.
  2652. */
  2653. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2654. {
  2655. if (!oh)
  2656. return -EINVAL;
  2657. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2658. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2659. oh->name);
  2660. return -EINVAL;
  2661. }
  2662. oh->flags |= HWMOD_INIT_NO_RESET;
  2663. return 0;
  2664. }
  2665. /**
  2666. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2667. * @oh: struct omap_hwmod * containing hwmod mux entries
  2668. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2669. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2670. *
  2671. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2672. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2673. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2674. * this function is not called for a given pad_idx, then the ISR
  2675. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2676. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2677. * the _dynamic or wakeup_ entry: if there are other entries not
  2678. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2679. * entries are NOT COUNTED in the dynamic pad index. This function
  2680. * must be called separately for each pad that requires its interrupt
  2681. * to be re-routed this way. Returns -EINVAL if there is an argument
  2682. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2683. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2684. *
  2685. * XXX This function interface is fragile. Rather than using array
  2686. * indexes, which are subject to unpredictable change, it should be
  2687. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2688. * pad records.
  2689. */
  2690. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2691. {
  2692. int nr_irqs;
  2693. might_sleep();
  2694. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2695. pad_idx >= oh->mux->nr_pads_dynamic)
  2696. return -EINVAL;
  2697. /* Check the number of available mpu_irqs */
  2698. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  2699. ;
  2700. if (irq_idx >= nr_irqs)
  2701. return -EINVAL;
  2702. if (!oh->mux->irqs) {
  2703. /* XXX What frees this? */
  2704. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  2705. GFP_KERNEL);
  2706. if (!oh->mux->irqs)
  2707. return -ENOMEM;
  2708. }
  2709. oh->mux->irqs[pad_idx] = irq_idx;
  2710. return 0;
  2711. }