nouveau_drm.c 18 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include "nouveau_drm.h"
  34. #include "nouveau_irq.h"
  35. #include "nouveau_dma.h"
  36. #include "nouveau_ttm.h"
  37. #include "nouveau_gem.h"
  38. #include "nouveau_agp.h"
  39. #include "nouveau_vga.h"
  40. #include "nouveau_pm.h"
  41. #include "nouveau_acpi.h"
  42. #include "nouveau_bios.h"
  43. #include "nouveau_ioctl.h"
  44. #include "nouveau_abi16.h"
  45. #include "nouveau_fbcon.h"
  46. #include "nouveau_fence.h"
  47. MODULE_PARM_DESC(config, "option string to pass to driver core");
  48. static char *nouveau_config;
  49. module_param_named(config, nouveau_config, charp, 0400);
  50. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  51. static char *nouveau_debug;
  52. module_param_named(debug, nouveau_debug, charp, 0400);
  53. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  54. static int nouveau_noaccel = 0;
  55. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  56. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  57. "0 = disabled, 1 = enabled, 2 = headless)");
  58. int nouveau_modeset = -1;
  59. module_param_named(modeset, nouveau_modeset, int, 0400);
  60. static struct drm_driver driver;
  61. static u64
  62. nouveau_name(struct pci_dev *pdev)
  63. {
  64. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  65. name |= pdev->bus->number << 16;
  66. name |= PCI_SLOT(pdev->devfn) << 8;
  67. return name | PCI_FUNC(pdev->devfn);
  68. }
  69. static int
  70. nouveau_cli_create(struct pci_dev *pdev, const char *name,
  71. int size, void **pcli)
  72. {
  73. struct nouveau_cli *cli;
  74. int ret;
  75. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  76. nouveau_debug, size, pcli);
  77. cli = *pcli;
  78. if (ret)
  79. return ret;
  80. mutex_init(&cli->mutex);
  81. return 0;
  82. }
  83. static void
  84. nouveau_cli_destroy(struct nouveau_cli *cli)
  85. {
  86. struct nouveau_object *client = nv_object(cli);
  87. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  88. nouveau_client_fini(&cli->base, false);
  89. atomic_set(&client->refcount, 1);
  90. nouveau_object_ref(NULL, &client);
  91. }
  92. static void
  93. nouveau_accel_fini(struct nouveau_drm *drm)
  94. {
  95. nouveau_gpuobj_ref(NULL, &drm->notify);
  96. nouveau_channel_del(&drm->channel);
  97. nouveau_channel_del(&drm->cechan);
  98. if (drm->fence)
  99. nouveau_fence(drm)->dtor(drm);
  100. }
  101. static void
  102. nouveau_accel_init(struct nouveau_drm *drm)
  103. {
  104. struct nouveau_device *device = nv_device(drm->device);
  105. struct nouveau_object *object;
  106. u32 arg0, arg1;
  107. int ret;
  108. if (nouveau_noaccel)
  109. return;
  110. /* initialise synchronisation routines */
  111. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  112. else if (device->chipset < 0x84) ret = nv10_fence_create(drm);
  113. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  114. else ret = nvc0_fence_create(drm);
  115. if (ret) {
  116. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  117. nouveau_accel_fini(drm);
  118. return;
  119. }
  120. if (device->card_type >= NV_E0) {
  121. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  122. NVDRM_CHAN + 1,
  123. NVE0_CHANNEL_IND_ENGINE_CE0 |
  124. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  125. &drm->cechan);
  126. if (ret)
  127. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  128. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  129. arg1 = 1;
  130. } else {
  131. arg0 = NvDmaFB;
  132. arg1 = NvDmaTT;
  133. }
  134. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  135. arg0, arg1, &drm->channel);
  136. if (ret) {
  137. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  138. nouveau_accel_fini(drm);
  139. return;
  140. }
  141. if (device->card_type < NV_C0) {
  142. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  143. &drm->notify);
  144. if (ret) {
  145. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  146. nouveau_accel_fini(drm);
  147. return;
  148. }
  149. ret = nouveau_object_new(nv_object(drm),
  150. drm->channel->handle, NvNotify0,
  151. 0x003d, &(struct nv_dma_class) {
  152. .flags = NV_DMA_TARGET_VRAM |
  153. NV_DMA_ACCESS_RDWR,
  154. .start = drm->notify->addr,
  155. .limit = drm->notify->addr + 31
  156. }, sizeof(struct nv_dma_class),
  157. &object);
  158. if (ret) {
  159. nouveau_accel_fini(drm);
  160. return;
  161. }
  162. }
  163. nouveau_bo_move_init(drm);
  164. }
  165. static int __devinit
  166. nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent)
  167. {
  168. struct nouveau_device *device;
  169. struct apertures_struct *aper;
  170. bool boot = false;
  171. int ret;
  172. /* remove conflicting drivers (vesafb, efifb etc) */
  173. aper = alloc_apertures(3);
  174. if (!aper)
  175. return -ENOMEM;
  176. aper->ranges[0].base = pci_resource_start(pdev, 1);
  177. aper->ranges[0].size = pci_resource_len(pdev, 1);
  178. aper->count = 1;
  179. if (pci_resource_len(pdev, 2)) {
  180. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  181. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  182. aper->count++;
  183. }
  184. if (pci_resource_len(pdev, 3)) {
  185. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  186. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  187. aper->count++;
  188. }
  189. #ifdef CONFIG_X86
  190. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  191. #endif
  192. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  193. kfree(aper);
  194. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  195. nouveau_config, nouveau_debug, &device);
  196. if (ret)
  197. return ret;
  198. pci_set_master(pdev);
  199. ret = drm_get_pci_dev(pdev, pent, &driver);
  200. if (ret) {
  201. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  202. return ret;
  203. }
  204. return 0;
  205. }
  206. static int
  207. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  208. {
  209. struct pci_dev *pdev = dev->pdev;
  210. struct nouveau_device *device;
  211. struct nouveau_drm *drm;
  212. int ret;
  213. ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm);
  214. if (ret)
  215. return ret;
  216. dev->dev_private = drm;
  217. drm->dev = dev;
  218. INIT_LIST_HEAD(&drm->clients);
  219. spin_lock_init(&drm->tile.lock);
  220. /* make sure AGP controller is in a consistent state before we
  221. * (possibly) execute vbios init tables (see nouveau_agp.h)
  222. */
  223. if (drm_pci_device_is_agp(dev) && dev->agp) {
  224. /* dummy device object, doesn't init anything, but allows
  225. * agp code access to registers
  226. */
  227. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  228. NVDRM_DEVICE, 0x0080,
  229. &(struct nv_device_class) {
  230. .device = ~0,
  231. .disable =
  232. ~(NV_DEVICE_DISABLE_MMIO |
  233. NV_DEVICE_DISABLE_IDENTIFY),
  234. .debug0 = ~0,
  235. }, sizeof(struct nv_device_class),
  236. &drm->device);
  237. if (ret)
  238. goto fail_device;
  239. nouveau_agp_reset(drm);
  240. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  241. }
  242. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  243. 0x0080, &(struct nv_device_class) {
  244. .device = ~0,
  245. .disable = 0,
  246. .debug0 = 0,
  247. }, sizeof(struct nv_device_class),
  248. &drm->device);
  249. if (ret)
  250. goto fail_device;
  251. /* workaround an odd issue on nvc1 by disabling the device's
  252. * nosnoop capability. hopefully won't cause issues until a
  253. * better fix is found - assuming there is one...
  254. */
  255. device = nv_device(drm->device);
  256. if (nv_device(drm->device)->chipset == 0xc1)
  257. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  258. nouveau_vga_init(drm);
  259. nouveau_agp_init(drm);
  260. if (device->card_type >= NV_50) {
  261. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  262. 0x1000, &drm->client.base.vm);
  263. if (ret)
  264. goto fail_device;
  265. }
  266. ret = nouveau_ttm_init(drm);
  267. if (ret)
  268. goto fail_ttm;
  269. ret = nouveau_bios_init(dev);
  270. if (ret)
  271. goto fail_bios;
  272. ret = nouveau_irq_init(dev);
  273. if (ret)
  274. goto fail_irq;
  275. ret = nouveau_display_create(dev);
  276. if (ret)
  277. goto fail_dispctor;
  278. if (dev->mode_config.num_crtc) {
  279. ret = nouveau_display_init(dev);
  280. if (ret)
  281. goto fail_dispinit;
  282. }
  283. nouveau_pm_init(dev);
  284. nouveau_accel_init(drm);
  285. nouveau_fbcon_init(dev);
  286. return 0;
  287. fail_dispinit:
  288. nouveau_display_destroy(dev);
  289. fail_dispctor:
  290. nouveau_irq_fini(dev);
  291. fail_irq:
  292. nouveau_bios_takedown(dev);
  293. fail_bios:
  294. nouveau_ttm_fini(drm);
  295. fail_ttm:
  296. nouveau_agp_fini(drm);
  297. nouveau_vga_fini(drm);
  298. fail_device:
  299. nouveau_cli_destroy(&drm->client);
  300. return ret;
  301. }
  302. static int
  303. nouveau_drm_unload(struct drm_device *dev)
  304. {
  305. struct nouveau_drm *drm = nouveau_drm(dev);
  306. nouveau_fbcon_fini(dev);
  307. nouveau_accel_fini(drm);
  308. nouveau_pm_fini(dev);
  309. if (dev->mode_config.num_crtc)
  310. nouveau_display_fini(dev);
  311. nouveau_display_destroy(dev);
  312. nouveau_irq_fini(dev);
  313. nouveau_bios_takedown(dev);
  314. nouveau_ttm_fini(drm);
  315. nouveau_agp_fini(drm);
  316. nouveau_vga_fini(drm);
  317. nouveau_cli_destroy(&drm->client);
  318. return 0;
  319. }
  320. static void
  321. nouveau_drm_remove(struct pci_dev *pdev)
  322. {
  323. struct drm_device *dev = pci_get_drvdata(pdev);
  324. struct nouveau_drm *drm = nouveau_drm(dev);
  325. struct nouveau_object *device;
  326. device = drm->client.base.device;
  327. drm_put_dev(dev);
  328. nouveau_object_ref(NULL, &device);
  329. nouveau_object_debug();
  330. }
  331. int
  332. nouveau_do_suspend(struct drm_device *dev)
  333. {
  334. struct nouveau_drm *drm = nouveau_drm(dev);
  335. struct nouveau_cli *cli;
  336. int ret;
  337. if (dev->mode_config.num_crtc) {
  338. NV_INFO(drm, "suspending fbcon...\n");
  339. nouveau_fbcon_set_suspend(dev, 1);
  340. NV_INFO(drm, "suspending display...\n");
  341. ret = nouveau_display_suspend(dev);
  342. if (ret)
  343. return ret;
  344. }
  345. NV_INFO(drm, "evicting buffers...\n");
  346. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  347. if (drm->fence && nouveau_fence(drm)->suspend) {
  348. if (!nouveau_fence(drm)->suspend(drm))
  349. return -ENOMEM;
  350. }
  351. NV_INFO(drm, "suspending client object trees...\n");
  352. list_for_each_entry(cli, &drm->clients, head) {
  353. ret = nouveau_client_fini(&cli->base, true);
  354. if (ret)
  355. goto fail_client;
  356. }
  357. ret = nouveau_client_fini(&drm->client.base, true);
  358. if (ret)
  359. goto fail_client;
  360. nouveau_agp_fini(drm);
  361. return 0;
  362. fail_client:
  363. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  364. nouveau_client_init(&cli->base);
  365. }
  366. if (dev->mode_config.num_crtc) {
  367. NV_INFO(drm, "resuming display...\n");
  368. nouveau_display_resume(dev);
  369. }
  370. return ret;
  371. }
  372. int nouveau_pmops_suspend(struct device *dev)
  373. {
  374. struct pci_dev *pdev = to_pci_dev(dev);
  375. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  376. int ret;
  377. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  378. return 0;
  379. ret = nouveau_do_suspend(drm_dev);
  380. if (ret)
  381. return ret;
  382. pci_save_state(pdev);
  383. pci_disable_device(pdev);
  384. pci_set_power_state(pdev, PCI_D3hot);
  385. return 0;
  386. }
  387. int
  388. nouveau_do_resume(struct drm_device *dev)
  389. {
  390. struct nouveau_drm *drm = nouveau_drm(dev);
  391. struct nouveau_cli *cli;
  392. NV_INFO(drm, "re-enabling device...\n");
  393. nouveau_agp_reset(drm);
  394. NV_INFO(drm, "resuming client object trees...\n");
  395. nouveau_client_init(&drm->client.base);
  396. nouveau_agp_init(drm);
  397. list_for_each_entry(cli, &drm->clients, head) {
  398. nouveau_client_init(&cli->base);
  399. }
  400. if (drm->fence && nouveau_fence(drm)->resume)
  401. nouveau_fence(drm)->resume(drm);
  402. nouveau_run_vbios_init(dev);
  403. nouveau_irq_postinstall(dev);
  404. nouveau_pm_resume(dev);
  405. if (dev->mode_config.num_crtc) {
  406. NV_INFO(drm, "resuming display...\n");
  407. nouveau_display_resume(dev);
  408. }
  409. return 0;
  410. }
  411. int nouveau_pmops_resume(struct device *dev)
  412. {
  413. struct pci_dev *pdev = to_pci_dev(dev);
  414. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  415. int ret;
  416. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  417. return 0;
  418. pci_set_power_state(pdev, PCI_D0);
  419. pci_restore_state(pdev);
  420. ret = pci_enable_device(pdev);
  421. if (ret)
  422. return ret;
  423. pci_set_master(pdev);
  424. return nouveau_do_resume(drm_dev);
  425. }
  426. static int nouveau_pmops_freeze(struct device *dev)
  427. {
  428. struct pci_dev *pdev = to_pci_dev(dev);
  429. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  430. return nouveau_do_suspend(drm_dev);
  431. }
  432. static int nouveau_pmops_thaw(struct device *dev)
  433. {
  434. struct pci_dev *pdev = to_pci_dev(dev);
  435. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  436. return nouveau_do_resume(drm_dev);
  437. }
  438. static int
  439. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  440. {
  441. struct pci_dev *pdev = dev->pdev;
  442. struct nouveau_drm *drm = nouveau_drm(dev);
  443. struct nouveau_cli *cli;
  444. char name[16];
  445. int ret;
  446. snprintf(name, sizeof(name), "%d", pid_nr(fpriv->pid));
  447. ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli);
  448. if (ret)
  449. return ret;
  450. if (nv_device(drm->device)->card_type >= NV_50) {
  451. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  452. 0x1000, &cli->base.vm);
  453. if (ret) {
  454. nouveau_cli_destroy(cli);
  455. return ret;
  456. }
  457. }
  458. fpriv->driver_priv = cli;
  459. mutex_lock(&drm->client.mutex);
  460. list_add(&cli->head, &drm->clients);
  461. mutex_unlock(&drm->client.mutex);
  462. return 0;
  463. }
  464. static void
  465. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  466. {
  467. struct nouveau_cli *cli = nouveau_cli(fpriv);
  468. struct nouveau_drm *drm = nouveau_drm(dev);
  469. if (cli->abi16)
  470. nouveau_abi16_fini(cli->abi16);
  471. mutex_lock(&drm->client.mutex);
  472. list_del(&cli->head);
  473. mutex_unlock(&drm->client.mutex);
  474. }
  475. static void
  476. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  477. {
  478. struct nouveau_cli *cli = nouveau_cli(fpriv);
  479. nouveau_cli_destroy(cli);
  480. }
  481. static struct drm_ioctl_desc
  482. nouveau_ioctls[] = {
  483. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  484. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  485. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  486. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  487. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  488. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  489. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  490. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  491. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  492. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  493. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  494. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  495. };
  496. static const struct file_operations
  497. nouveau_driver_fops = {
  498. .owner = THIS_MODULE,
  499. .open = drm_open,
  500. .release = drm_release,
  501. .unlocked_ioctl = drm_ioctl,
  502. .mmap = nouveau_ttm_mmap,
  503. .poll = drm_poll,
  504. .fasync = drm_fasync,
  505. .read = drm_read,
  506. #if defined(CONFIG_COMPAT)
  507. .compat_ioctl = nouveau_compat_ioctl,
  508. #endif
  509. .llseek = noop_llseek,
  510. };
  511. static struct drm_driver
  512. driver = {
  513. .driver_features =
  514. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  515. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  516. DRIVER_MODESET | DRIVER_PRIME,
  517. .load = nouveau_drm_load,
  518. .unload = nouveau_drm_unload,
  519. .open = nouveau_drm_open,
  520. .preclose = nouveau_drm_preclose,
  521. .postclose = nouveau_drm_postclose,
  522. .lastclose = nouveau_vga_lastclose,
  523. .irq_preinstall = nouveau_irq_preinstall,
  524. .irq_postinstall = nouveau_irq_postinstall,
  525. .irq_uninstall = nouveau_irq_uninstall,
  526. .irq_handler = nouveau_irq_handler,
  527. .get_vblank_counter = drm_vblank_count,
  528. .enable_vblank = nouveau_vblank_enable,
  529. .disable_vblank = nouveau_vblank_disable,
  530. .ioctls = nouveau_ioctls,
  531. .fops = &nouveau_driver_fops,
  532. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  533. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  534. .gem_prime_export = nouveau_gem_prime_export,
  535. .gem_prime_import = nouveau_gem_prime_import,
  536. .gem_init_object = nouveau_gem_object_new,
  537. .gem_free_object = nouveau_gem_object_del,
  538. .gem_open_object = nouveau_gem_object_open,
  539. .gem_close_object = nouveau_gem_object_close,
  540. .dumb_create = nouveau_display_dumb_create,
  541. .dumb_map_offset = nouveau_display_dumb_map_offset,
  542. .dumb_destroy = nouveau_display_dumb_destroy,
  543. .name = DRIVER_NAME,
  544. .desc = DRIVER_DESC,
  545. #ifdef GIT_REVISION
  546. .date = GIT_REVISION,
  547. #else
  548. .date = DRIVER_DATE,
  549. #endif
  550. .major = DRIVER_MAJOR,
  551. .minor = DRIVER_MINOR,
  552. .patchlevel = DRIVER_PATCHLEVEL,
  553. };
  554. static struct pci_device_id
  555. nouveau_drm_pci_table[] = {
  556. {
  557. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  558. .class = PCI_BASE_CLASS_DISPLAY << 16,
  559. .class_mask = 0xff << 16,
  560. },
  561. {
  562. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  563. .class = PCI_BASE_CLASS_DISPLAY << 16,
  564. .class_mask = 0xff << 16,
  565. },
  566. {}
  567. };
  568. static const struct dev_pm_ops nouveau_pm_ops = {
  569. .suspend = nouveau_pmops_suspend,
  570. .resume = nouveau_pmops_resume,
  571. .freeze = nouveau_pmops_freeze,
  572. .thaw = nouveau_pmops_thaw,
  573. .poweroff = nouveau_pmops_freeze,
  574. .restore = nouveau_pmops_resume,
  575. };
  576. static struct pci_driver
  577. nouveau_drm_pci_driver = {
  578. .name = "nouveau",
  579. .id_table = nouveau_drm_pci_table,
  580. .probe = nouveau_drm_probe,
  581. .remove = nouveau_drm_remove,
  582. .driver.pm = &nouveau_pm_ops,
  583. };
  584. static int __init
  585. nouveau_drm_init(void)
  586. {
  587. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  588. if (nouveau_modeset == -1) {
  589. #ifdef CONFIG_VGA_CONSOLE
  590. if (vgacon_text_force())
  591. nouveau_modeset = 0;
  592. #endif
  593. }
  594. if (!nouveau_modeset)
  595. return 0;
  596. nouveau_register_dsm_handler();
  597. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  598. }
  599. static void __exit
  600. nouveau_drm_exit(void)
  601. {
  602. if (!nouveau_modeset)
  603. return;
  604. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  605. nouveau_unregister_dsm_handler();
  606. }
  607. module_init(nouveau_drm_init);
  608. module_exit(nouveau_drm_exit);
  609. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  610. MODULE_AUTHOR(DRIVER_AUTHOR);
  611. MODULE_DESCRIPTION(DRIVER_DESC);
  612. MODULE_LICENSE("GPL and additional rights");