ns87415.c 8.2 KB

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  1. /*
  2. * Copyright (C) 1997-1998 Mark Lord <mlord@pobox.com>
  3. * Copyright (C) 1998 Eddie C. Dost <ecd@skynet.be>
  4. * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
  5. * Copyright (C) 2004 Grant Grundler <grundler at parisc-linux.org>
  6. *
  7. * Inspired by an earlier effort from David S. Miller <davem@redhat.com>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/types.h>
  11. #include <linux/kernel.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/hdreg.h>
  14. #include <linux/pci.h>
  15. #include <linux/delay.h>
  16. #include <linux/ide.h>
  17. #include <linux/init.h>
  18. #include <asm/io.h>
  19. #ifdef CONFIG_SUPERIO
  20. /* SUPERIO 87560 is a PoS chip that NatSem denies exists.
  21. * Unfortunately, it's built-in on all Astro-based PA-RISC workstations
  22. * which use the integrated NS87514 cell for CD-ROM support.
  23. * i.e we have to support for CD-ROM installs.
  24. * See drivers/parisc/superio.c for more gory details.
  25. */
  26. #include <asm/superio.h>
  27. static unsigned long superio_ide_status[2];
  28. static unsigned long superio_ide_select[2];
  29. static unsigned long superio_ide_dma_status[2];
  30. #define SUPERIO_IDE_MAX_RETRIES 25
  31. /* Because of a defect in Super I/O, all reads of the PCI DMA status
  32. * registers, IDE status register and the IDE select register need to be
  33. * retried
  34. */
  35. static u8 superio_ide_inb (unsigned long port)
  36. {
  37. if (port == superio_ide_status[0] ||
  38. port == superio_ide_status[1] ||
  39. port == superio_ide_select[0] ||
  40. port == superio_ide_select[1] ||
  41. port == superio_ide_dma_status[0] ||
  42. port == superio_ide_dma_status[1]) {
  43. u8 tmp;
  44. int retries = SUPERIO_IDE_MAX_RETRIES;
  45. /* printk(" [ reading port 0x%x with retry ] ", port); */
  46. do {
  47. tmp = inb(port);
  48. if (tmp == 0)
  49. udelay(50);
  50. } while (tmp == 0 && retries-- > 0);
  51. return tmp;
  52. }
  53. return inb(port);
  54. }
  55. static void __devinit superio_ide_init_iops (struct hwif_s *hwif)
  56. {
  57. struct pci_dev *pdev = to_pci_dev(hwif->dev);
  58. u32 base, dmabase;
  59. u8 port = hwif->channel, tmp;
  60. base = pci_resource_start(pdev, port * 2) & ~3;
  61. dmabase = pci_resource_start(pdev, 4) & ~3;
  62. superio_ide_status[port] = base + 7;
  63. superio_ide_select[port] = base + 6;
  64. superio_ide_dma_status[port] = dmabase + (!port ? 2 : 0xa);
  65. /* Clear error/interrupt, enable dma */
  66. tmp = superio_ide_inb(superio_ide_dma_status[port]);
  67. outb(tmp | 0x66, superio_ide_dma_status[port]);
  68. /* We need to override inb to workaround a SuperIO errata */
  69. hwif->INB = superio_ide_inb;
  70. }
  71. static void __devinit init_iops_ns87415(ide_hwif_t *hwif)
  72. {
  73. struct pci_dev *dev = to_pci_dev(hwif->dev);
  74. if (PCI_SLOT(dev->devfn) == 0xE)
  75. /* Built-in - assume it's under superio. */
  76. superio_ide_init_iops(hwif);
  77. }
  78. #endif
  79. static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 };
  80. /*
  81. * This routine either enables/disables (according to drive->present)
  82. * the IRQ associated with the port (HWIF(drive)),
  83. * and selects either PIO or DMA handshaking for the next I/O operation.
  84. */
  85. static void ns87415_prepare_drive (ide_drive_t *drive, unsigned int use_dma)
  86. {
  87. ide_hwif_t *hwif = HWIF(drive);
  88. struct pci_dev *dev = to_pci_dev(hwif->dev);
  89. unsigned int bit, other, new, *old = (unsigned int *) hwif->select_data;
  90. unsigned long flags;
  91. local_irq_save(flags);
  92. new = *old;
  93. /* Adjust IRQ enable bit */
  94. bit = 1 << (8 + hwif->channel);
  95. new = drive->present ? (new & ~bit) : (new | bit);
  96. /* Select PIO or DMA, DMA may only be selected for one drive/channel. */
  97. bit = 1 << (20 + drive->select.b.unit + (hwif->channel << 1));
  98. other = 1 << (20 + (1 - drive->select.b.unit) + (hwif->channel << 1));
  99. new = use_dma ? ((new & ~other) | bit) : (new & ~bit);
  100. if (new != *old) {
  101. unsigned char stat;
  102. /*
  103. * Don't change DMA engine settings while Write Buffers
  104. * are busy.
  105. */
  106. (void) pci_read_config_byte(dev, 0x43, &stat);
  107. while (stat & 0x03) {
  108. udelay(1);
  109. (void) pci_read_config_byte(dev, 0x43, &stat);
  110. }
  111. *old = new;
  112. (void) pci_write_config_dword(dev, 0x40, new);
  113. /*
  114. * And let things settle...
  115. */
  116. udelay(10);
  117. }
  118. local_irq_restore(flags);
  119. }
  120. static void ns87415_selectproc (ide_drive_t *drive)
  121. {
  122. ns87415_prepare_drive (drive, drive->using_dma);
  123. }
  124. static int ns87415_dma_end(ide_drive_t *drive)
  125. {
  126. ide_hwif_t *hwif = HWIF(drive);
  127. u8 dma_stat = 0, dma_cmd = 0;
  128. drive->waiting_for_dma = 0;
  129. dma_stat = hwif->INB(hwif->dma_status);
  130. /* get dma command mode */
  131. dma_cmd = hwif->INB(hwif->dma_command);
  132. /* stop DMA */
  133. outb(dma_cmd & ~1, hwif->dma_command);
  134. /* from ERRATA: clear the INTR & ERROR bits */
  135. dma_cmd = hwif->INB(hwif->dma_command);
  136. outb(dma_cmd | 6, hwif->dma_command);
  137. /* and free any DMA resources */
  138. ide_destroy_dmatable(drive);
  139. /* verify good DMA status */
  140. return (dma_stat & 7) != 4;
  141. }
  142. static int ns87415_dma_setup(ide_drive_t *drive)
  143. {
  144. /* select DMA xfer */
  145. ns87415_prepare_drive(drive, 1);
  146. if (!ide_dma_setup(drive))
  147. return 0;
  148. /* DMA failed: select PIO xfer */
  149. ns87415_prepare_drive(drive, 0);
  150. return 1;
  151. }
  152. #ifndef ide_default_irq
  153. #define ide_default_irq(irq) 0
  154. #endif
  155. static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
  156. {
  157. struct pci_dev *dev = to_pci_dev(hwif->dev);
  158. unsigned int ctrl, using_inta;
  159. u8 progif;
  160. #ifdef __sparc_v9__
  161. int timeout;
  162. u8 stat;
  163. #endif
  164. /*
  165. * We cannot probe for IRQ: both ports share common IRQ on INTA.
  166. * Also, leave IRQ masked during drive probing, to prevent infinite
  167. * interrupts from a potentially floating INTA..
  168. *
  169. * IRQs get unmasked in selectproc when drive is first used.
  170. */
  171. (void) pci_read_config_dword(dev, 0x40, &ctrl);
  172. (void) pci_read_config_byte(dev, 0x09, &progif);
  173. /* is irq in "native" mode? */
  174. using_inta = progif & (1 << (hwif->channel << 1));
  175. if (!using_inta)
  176. using_inta = ctrl & (1 << (4 + hwif->channel));
  177. if (hwif->mate) {
  178. hwif->select_data = hwif->mate->select_data;
  179. } else {
  180. hwif->select_data = (unsigned long)
  181. &ns87415_control[ns87415_count++];
  182. ctrl |= (1 << 8) | (1 << 9); /* mask both IRQs */
  183. if (using_inta)
  184. ctrl &= ~(1 << 6); /* unmask INTA */
  185. *((unsigned int *)hwif->select_data) = ctrl;
  186. (void) pci_write_config_dword(dev, 0x40, ctrl);
  187. /*
  188. * Set prefetch size to 512 bytes for both ports,
  189. * but don't turn on/off prefetching here.
  190. */
  191. pci_write_config_byte(dev, 0x55, 0xee);
  192. #ifdef __sparc_v9__
  193. /*
  194. * XXX: Reset the device, if we don't it will not respond to
  195. * SELECT_DRIVE() properly during first ide_probe_port().
  196. */
  197. timeout = 10000;
  198. outb(12, hwif->io_ports.ctl_addr);
  199. udelay(10);
  200. outb(8, hwif->io_ports.ctl_addr);
  201. do {
  202. udelay(50);
  203. stat = hwif->INB(hwif->io_ports.status_addr);
  204. if (stat == 0xff)
  205. break;
  206. } while ((stat & BUSY_STAT) && --timeout);
  207. #endif
  208. }
  209. if (!using_inta)
  210. hwif->irq = ide_default_irq(hwif->io_ports.data_addr);
  211. else if (!hwif->irq && hwif->mate && hwif->mate->irq)
  212. hwif->irq = hwif->mate->irq; /* share IRQ with mate */
  213. if (!hwif->dma_base)
  214. return;
  215. outb(0x60, hwif->dma_status);
  216. }
  217. static const struct ide_port_ops ns87415_port_ops = {
  218. .selectproc = ns87415_selectproc,
  219. };
  220. static const struct ide_dma_ops ns87415_dma_ops = {
  221. .dma_host_set = ide_dma_host_set,
  222. .dma_setup = ns87415_dma_setup,
  223. .dma_exec_cmd = ide_dma_exec_cmd,
  224. .dma_start = ide_dma_start,
  225. .dma_end = ns87415_dma_end,
  226. .dma_test_irq = ide_dma_test_irq,
  227. .dma_lost_irq = ide_dma_lost_irq,
  228. .dma_timeout = ide_dma_timeout,
  229. };
  230. static const struct ide_port_info ns87415_chipset __devinitdata = {
  231. .name = "NS87415",
  232. #ifdef CONFIG_SUPERIO
  233. .init_iops = init_iops_ns87415,
  234. #endif
  235. .init_hwif = init_hwif_ns87415,
  236. .port_ops = &ns87415_port_ops,
  237. .dma_ops = &ns87415_dma_ops,
  238. .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA |
  239. IDE_HFLAG_NO_ATAPI_DMA,
  240. };
  241. static int __devinit ns87415_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  242. {
  243. return ide_setup_pci_device(dev, &ns87415_chipset);
  244. }
  245. static const struct pci_device_id ns87415_pci_tbl[] = {
  246. { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_87415), 0 },
  247. { 0, },
  248. };
  249. MODULE_DEVICE_TABLE(pci, ns87415_pci_tbl);
  250. static struct pci_driver driver = {
  251. .name = "NS87415_IDE",
  252. .id_table = ns87415_pci_tbl,
  253. .probe = ns87415_init_one,
  254. };
  255. static int __init ns87415_ide_init(void)
  256. {
  257. return ide_pci_register_driver(&driver);
  258. }
  259. module_init(ns87415_ide_init);
  260. MODULE_AUTHOR("Mark Lord, Eddie Dost, Andre Hedrick");
  261. MODULE_DESCRIPTION("PCI driver module for NS87415 IDE");
  262. MODULE_LICENSE("GPL");