saa7134-dvb.c 27 KB

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  1. /*
  2. *
  3. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  4. *
  5. * Extended 3 / 2005 by Hartmut Hackmann to support various
  6. * cards with the tda10046 DVB-T channel decoder
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/kthread.h>
  29. #include <linux/suspend.h>
  30. #include "saa7134-reg.h"
  31. #include "saa7134.h"
  32. #ifdef HAVE_MT352
  33. # include "mt352.h"
  34. # include "mt352_priv.h" /* FIXME */
  35. #endif
  36. #ifdef HAVE_TDA1004X
  37. # include "tda1004x.h"
  38. #endif
  39. #ifdef HAVE_NXT200X
  40. # include "nxt200x.h"
  41. # include "dvb-pll.h"
  42. #endif
  43. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  44. MODULE_LICENSE("GPL");
  45. static unsigned int antenna_pwr = 0;
  46. module_param(antenna_pwr, int, 0444);
  47. MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
  48. /* ------------------------------------------------------------------ */
  49. #ifdef HAVE_MT352
  50. static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
  51. {
  52. u32 ok;
  53. if (!on) {
  54. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  55. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  56. return 0;
  57. }
  58. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  59. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  60. udelay(10);
  61. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
  62. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  63. udelay(10);
  64. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  65. udelay(10);
  66. ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
  67. printk("%s: %s %s\n", dev->name, __FUNCTION__,
  68. ok ? "on" : "off");
  69. if (!ok)
  70. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  71. return ok;
  72. }
  73. static int mt352_pinnacle_init(struct dvb_frontend* fe)
  74. {
  75. static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
  76. static u8 reset [] = { RESET, 0x80 };
  77. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  78. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  79. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
  80. static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
  81. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
  82. static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
  83. static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
  84. struct saa7134_dev *dev= fe->dvb->priv;
  85. printk("%s: %s called\n",dev->name,__FUNCTION__);
  86. mt352_write(fe, clock_config, sizeof(clock_config));
  87. udelay(200);
  88. mt352_write(fe, reset, sizeof(reset));
  89. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  90. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  91. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  92. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  93. mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
  94. mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
  95. mt352_write(fe, irq_cfg, sizeof(irq_cfg));
  96. return 0;
  97. }
  98. static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
  99. struct dvb_frontend_parameters* params,
  100. u8* pllbuf)
  101. {
  102. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  103. static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE;
  104. struct saa7134_dev *dev = fe->dvb->priv;
  105. struct v4l2_frequency f;
  106. /* set frequency (mt2050) */
  107. f.tuner = 0;
  108. f.type = V4L2_TUNER_DIGITAL_TV;
  109. f.frequency = params->frequency / 1000 * 16 / 1000;
  110. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  111. saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
  112. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off);
  113. pinnacle_antenna_pwr(dev, antenna_pwr);
  114. /* mt352 setup */
  115. mt352_pinnacle_init(fe);
  116. pllbuf[0] = 0xc2;
  117. pllbuf[1] = 0x00;
  118. pllbuf[2] = 0x00;
  119. pllbuf[3] = 0x80;
  120. pllbuf[4] = 0x00;
  121. return 0;
  122. }
  123. static struct mt352_config pinnacle_300i = {
  124. .demod_address = 0x3c >> 1,
  125. .adc_clock = 20333,
  126. .if2 = 36150,
  127. .no_tuner = 1,
  128. .demod_init = mt352_pinnacle_init,
  129. .pll_set = mt352_pinnacle_pll_set,
  130. };
  131. #endif
  132. /* ------------------------------------------------------------------ */
  133. #ifdef HAVE_TDA1004X
  134. static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  135. {
  136. struct saa7134_dev *dev = fe->dvb->priv;
  137. u8 tuner_buf[4];
  138. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
  139. sizeof(tuner_buf) };
  140. int tuner_frequency = 0;
  141. u8 band, cp, filter;
  142. /* determine charge pump */
  143. tuner_frequency = params->frequency + 36166000;
  144. if (tuner_frequency < 87000000)
  145. return -EINVAL;
  146. else if (tuner_frequency < 130000000)
  147. cp = 3;
  148. else if (tuner_frequency < 160000000)
  149. cp = 5;
  150. else if (tuner_frequency < 200000000)
  151. cp = 6;
  152. else if (tuner_frequency < 290000000)
  153. cp = 3;
  154. else if (tuner_frequency < 420000000)
  155. cp = 5;
  156. else if (tuner_frequency < 480000000)
  157. cp = 6;
  158. else if (tuner_frequency < 620000000)
  159. cp = 3;
  160. else if (tuner_frequency < 830000000)
  161. cp = 5;
  162. else if (tuner_frequency < 895000000)
  163. cp = 7;
  164. else
  165. return -EINVAL;
  166. /* determine band */
  167. if (params->frequency < 49000000)
  168. return -EINVAL;
  169. else if (params->frequency < 161000000)
  170. band = 1;
  171. else if (params->frequency < 444000000)
  172. band = 2;
  173. else if (params->frequency < 861000000)
  174. band = 4;
  175. else
  176. return -EINVAL;
  177. /* setup PLL filter */
  178. switch (params->u.ofdm.bandwidth) {
  179. case BANDWIDTH_6_MHZ:
  180. filter = 0;
  181. break;
  182. case BANDWIDTH_7_MHZ:
  183. filter = 0;
  184. break;
  185. case BANDWIDTH_8_MHZ:
  186. filter = 1;
  187. break;
  188. default:
  189. return -EINVAL;
  190. }
  191. /* calculate divisor
  192. * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
  193. */
  194. tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
  195. /* setup tuner buffer */
  196. tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
  197. tuner_buf[1] = tuner_frequency & 0xff;
  198. tuner_buf[2] = 0xca;
  199. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  200. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  201. return -EIO;
  202. msleep(1);
  203. return 0;
  204. }
  205. static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
  206. {
  207. struct saa7134_dev *dev = fe->dvb->priv;
  208. static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  209. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
  210. /* setup PLL configuration */
  211. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  212. return -EIO;
  213. msleep(1);
  214. return 0;
  215. }
  216. /* ------------------------------------------------------------------ */
  217. static int philips_tu1216_pll_60_init(struct dvb_frontend *fe)
  218. {
  219. return philips_tda6651_pll_init(0x60, fe);
  220. }
  221. static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  222. {
  223. return philips_tda6651_pll_set(0x60, fe, params);
  224. }
  225. static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
  226. const struct firmware **fw, char *name)
  227. {
  228. struct saa7134_dev *dev = fe->dvb->priv;
  229. return request_firmware(fw, name, &dev->pci->dev);
  230. }
  231. static struct tda1004x_config philips_tu1216_60_config = {
  232. .demod_address = 0x8,
  233. .invert = 1,
  234. .invert_oclk = 0,
  235. .xtal_freq = TDA10046_XTAL_4M,
  236. .agc_config = TDA10046_AGC_DEFAULT,
  237. .if_freq = TDA10046_FREQ_3617,
  238. .pll_init = philips_tu1216_pll_60_init,
  239. .pll_set = philips_tu1216_pll_60_set,
  240. .pll_sleep = NULL,
  241. .request_firmware = philips_tu1216_request_firmware,
  242. };
  243. /* ------------------------------------------------------------------ */
  244. static int philips_tu1216_pll_61_init(struct dvb_frontend *fe)
  245. {
  246. return philips_tda6651_pll_init(0x61, fe);
  247. }
  248. static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  249. {
  250. return philips_tda6651_pll_set(0x61, fe, params);
  251. }
  252. static struct tda1004x_config philips_tu1216_61_config = {
  253. .demod_address = 0x8,
  254. .invert = 1,
  255. .invert_oclk = 0,
  256. .xtal_freq = TDA10046_XTAL_4M,
  257. .agc_config = TDA10046_AGC_DEFAULT,
  258. .if_freq = TDA10046_FREQ_3617,
  259. .pll_init = philips_tu1216_pll_61_init,
  260. .pll_set = philips_tu1216_pll_61_set,
  261. .pll_sleep = NULL,
  262. .request_firmware = philips_tu1216_request_firmware,
  263. };
  264. /* ------------------------------------------------------------------ */
  265. static int philips_europa_pll_init(struct dvb_frontend *fe)
  266. {
  267. struct saa7134_dev *dev = fe->dvb->priv;
  268. static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
  269. struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  270. /* setup PLL configuration */
  271. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  272. return -EIO;
  273. msleep(1);
  274. /* switch the board to dvb mode */
  275. init_msg.addr = 0x43;
  276. init_msg.len = 0x02;
  277. msg[0] = 0x00;
  278. msg[1] = 0x40;
  279. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  280. return -EIO;
  281. return 0;
  282. }
  283. static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  284. {
  285. return philips_tda6651_pll_set(0x61, fe, params);
  286. }
  287. static void philips_europa_analog(struct dvb_frontend *fe)
  288. {
  289. struct saa7134_dev *dev = fe->dvb->priv;
  290. /* this message actually turns the tuner back to analog mode */
  291. static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
  292. struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  293. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  294. msleep(1);
  295. /* switch the board to analog mode */
  296. analog_msg.addr = 0x43;
  297. analog_msg.len = 0x02;
  298. msg[0] = 0x00;
  299. msg[1] = 0x14;
  300. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  301. }
  302. static struct tda1004x_config philips_europa_config = {
  303. .demod_address = 0x8,
  304. .invert = 0,
  305. .invert_oclk = 0,
  306. .xtal_freq = TDA10046_XTAL_4M,
  307. .agc_config = TDA10046_AGC_IFO_AUTO_POS,
  308. .if_freq = TDA10046_FREQ_052,
  309. .pll_init = philips_europa_pll_init,
  310. .pll_set = philips_td1316_pll_set,
  311. .pll_sleep = philips_europa_analog,
  312. .request_firmware = NULL,
  313. };
  314. /* ------------------------------------------------------------------ */
  315. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  316. {
  317. struct saa7134_dev *dev = fe->dvb->priv;
  318. /* this message is to set up ATC and ALC */
  319. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  320. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  321. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  322. return -EIO;
  323. msleep(1);
  324. return 0;
  325. }
  326. static void philips_fmd1216_analog(struct dvb_frontend *fe)
  327. {
  328. struct saa7134_dev *dev = fe->dvb->priv;
  329. /* this message actually turns the tuner back to analog mode */
  330. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
  331. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  332. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  333. msleep(1);
  334. fmd1216_init[2] = 0x86;
  335. fmd1216_init[3] = 0x54;
  336. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  337. msleep(1);
  338. }
  339. static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  340. {
  341. struct saa7134_dev *dev = fe->dvb->priv;
  342. u8 tuner_buf[4];
  343. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
  344. sizeof(tuner_buf) };
  345. int tuner_frequency = 0;
  346. int divider = 0;
  347. u8 band, mode, cp;
  348. /* determine charge pump */
  349. tuner_frequency = params->frequency + 36130000;
  350. if (tuner_frequency < 87000000)
  351. return -EINVAL;
  352. /* low band */
  353. else if (tuner_frequency < 180000000) {
  354. band = 1;
  355. mode = 7;
  356. cp = 0;
  357. } else if (tuner_frequency < 195000000) {
  358. band = 1;
  359. mode = 6;
  360. cp = 1;
  361. /* mid band */
  362. } else if (tuner_frequency < 366000000) {
  363. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  364. band = 10;
  365. } else {
  366. band = 2;
  367. }
  368. mode = 7;
  369. cp = 0;
  370. } else if (tuner_frequency < 478000000) {
  371. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  372. band = 10;
  373. } else {
  374. band = 2;
  375. }
  376. mode = 6;
  377. cp = 1;
  378. /* high band */
  379. } else if (tuner_frequency < 662000000) {
  380. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  381. band = 12;
  382. } else {
  383. band = 4;
  384. }
  385. mode = 7;
  386. cp = 0;
  387. } else if (tuner_frequency < 840000000) {
  388. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  389. band = 12;
  390. } else {
  391. band = 4;
  392. }
  393. mode = 6;
  394. cp = 1;
  395. } else {
  396. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  397. band = 12;
  398. } else {
  399. band = 4;
  400. }
  401. mode = 7;
  402. cp = 1;
  403. }
  404. /* calculate divisor */
  405. /* ((36166000 + Finput) / 166666) rounded! */
  406. divider = (tuner_frequency + 83333) / 166667;
  407. /* setup tuner buffer */
  408. tuner_buf[0] = (divider >> 8) & 0x7f;
  409. tuner_buf[1] = divider & 0xff;
  410. tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
  411. tuner_buf[3] = 0x40 | band;
  412. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  413. return -EIO;
  414. return 0;
  415. }
  416. static struct tda1004x_config medion_cardbus = {
  417. .demod_address = 0x08,
  418. .invert = 1,
  419. .invert_oclk = 0,
  420. .xtal_freq = TDA10046_XTAL_16M,
  421. .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
  422. .if_freq = TDA10046_FREQ_3613,
  423. .pll_init = philips_fmd1216_pll_init,
  424. .pll_set = philips_fmd1216_pll_set,
  425. .pll_sleep = philips_fmd1216_analog,
  426. .request_firmware = NULL,
  427. };
  428. /* ------------------------------------------------------------------ */
  429. struct tda827x_data {
  430. u32 lomax;
  431. u8 spd;
  432. u8 bs;
  433. u8 bp;
  434. u8 cp;
  435. u8 gc3;
  436. u8 div1p5;
  437. };
  438. static struct tda827x_data tda827x_dvbt[] = {
  439. { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  440. { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  441. { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  442. { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  443. { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  444. { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  445. { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  446. { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  447. { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  448. { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  449. { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  450. { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
  451. { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  452. { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  453. { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  454. { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  455. { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  456. { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  457. { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  458. { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  459. { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  460. { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  461. { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  462. { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  463. { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  464. { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  465. { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  466. { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  467. { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
  468. };
  469. static int philips_tda827x_pll_init(struct dvb_frontend *fe)
  470. {
  471. return 0;
  472. }
  473. static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  474. {
  475. struct saa7134_dev *dev = fe->dvb->priv;
  476. u8 tuner_buf[14];
  477. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
  478. .len = sizeof(tuner_buf) };
  479. int i, tuner_freq, if_freq;
  480. u32 N;
  481. switch (params->u.ofdm.bandwidth) {
  482. case BANDWIDTH_6_MHZ:
  483. if_freq = 4000000;
  484. break;
  485. case BANDWIDTH_7_MHZ:
  486. if_freq = 4500000;
  487. break;
  488. default: /* 8 MHz or Auto */
  489. if_freq = 5000000;
  490. break;
  491. }
  492. tuner_freq = params->frequency + if_freq;
  493. i = 0;
  494. while (tda827x_dvbt[i].lomax < tuner_freq) {
  495. if(tda827x_dvbt[i + 1].lomax == 0)
  496. break;
  497. i++;
  498. }
  499. N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
  500. tuner_buf[0] = 0;
  501. tuner_buf[1] = (N>>8) | 0x40;
  502. tuner_buf[2] = N & 0xff;
  503. tuner_buf[3] = 0;
  504. tuner_buf[4] = 0x52;
  505. tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
  506. (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
  507. tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
  508. tuner_buf[7] = 0xbf;
  509. tuner_buf[8] = 0x2a;
  510. tuner_buf[9] = 0x05;
  511. tuner_buf[10] = 0xff;
  512. tuner_buf[11] = 0x00;
  513. tuner_buf[12] = 0x00;
  514. tuner_buf[13] = 0x40;
  515. tuner_msg.len = 14;
  516. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  517. return -EIO;
  518. msleep(500);
  519. /* correct CP value */
  520. tuner_buf[0] = 0x30;
  521. tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
  522. tuner_msg.len = 2;
  523. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  524. return 0;
  525. }
  526. static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
  527. {
  528. struct saa7134_dev *dev = fe->dvb->priv;
  529. static u8 tda827x_sleep[] = { 0x30, 0xd0};
  530. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
  531. .len = sizeof(tda827x_sleep) };
  532. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  533. }
  534. static struct tda1004x_config tda827x_lifeview_config = {
  535. .demod_address = 0x08,
  536. .invert = 1,
  537. .invert_oclk = 0,
  538. .xtal_freq = TDA10046_XTAL_16M,
  539. .agc_config = TDA10046_AGC_TDA827X,
  540. .if_freq = TDA10046_FREQ_045,
  541. .pll_init = philips_tda827x_pll_init,
  542. .pll_set = philips_tda827x_pll_set,
  543. .pll_sleep = philips_tda827x_pll_sleep,
  544. .request_firmware = NULL,
  545. };
  546. /* ------------------------------------------------------------------ */
  547. struct tda827xa_data {
  548. u32 lomax;
  549. u8 svco;
  550. u8 spd;
  551. u8 scr;
  552. u8 sbs;
  553. u8 gc3;
  554. };
  555. static struct tda827xa_data tda827xa_dvbt[] = {
  556. { .lomax = 56875000, .svco = 3, .spd = 4, .scr = 0, .sbs = 0, .gc3 = 1},
  557. { .lomax = 67250000, .svco = 0, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  558. { .lomax = 81250000, .svco = 1, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  559. { .lomax = 97500000, .svco = 2, .spd = 3, .scr = 0, .sbs = 0, .gc3 = 1},
  560. { .lomax = 113750000, .svco = 3, .spd = 3, .scr = 0, .sbs = 1, .gc3 = 1},
  561. { .lomax = 134500000, .svco = 0, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  562. { .lomax = 154000000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  563. { .lomax = 162500000, .svco = 1, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  564. { .lomax = 183000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 1, .gc3 = 1},
  565. { .lomax = 195000000, .svco = 2, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  566. { .lomax = 227500000, .svco = 3, .spd = 2, .scr = 0, .sbs = 2, .gc3 = 1},
  567. { .lomax = 269000000, .svco = 0, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  568. { .lomax = 290000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 2, .gc3 = 1},
  569. { .lomax = 325000000, .svco = 1, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  570. { .lomax = 390000000, .svco = 2, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  571. { .lomax = 455000000, .svco = 3, .spd = 1, .scr = 0, .sbs = 3, .gc3 = 1},
  572. { .lomax = 520000000, .svco = 0, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  573. { .lomax = 538000000, .svco = 0, .spd = 0, .scr = 1, .sbs = 3, .gc3 = 1},
  574. { .lomax = 550000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 3, .gc3 = 1},
  575. { .lomax = 620000000, .svco = 1, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  576. { .lomax = 650000000, .svco = 1, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  577. { .lomax = 700000000, .svco = 2, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  578. { .lomax = 780000000, .svco = 2, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  579. { .lomax = 820000000, .svco = 3, .spd = 0, .scr = 0, .sbs = 4, .gc3 = 0},
  580. { .lomax = 870000000, .svco = 3, .spd = 0, .scr = 1, .sbs = 4, .gc3 = 0},
  581. { .lomax = 911000000, .svco = 3, .spd = 0, .scr = 2, .sbs = 4, .gc3 = 0},
  582. { .lomax = 0, .svco = 0, .spd = 0, .scr = 0, .sbs = 0, .gc3 = 0}};
  583. static int philips_tda827xa_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  584. {
  585. struct saa7134_dev *dev = fe->dvb->priv;
  586. u8 tuner_buf[14];
  587. unsigned char reg2[2];
  588. struct i2c_msg msg = {.addr = addr,.flags = 0,.buf = tuner_buf};
  589. int i, tuner_freq, if_freq;
  590. u32 N;
  591. switch (params->u.ofdm.bandwidth) {
  592. case BANDWIDTH_6_MHZ:
  593. if_freq = 4000000;
  594. break;
  595. case BANDWIDTH_7_MHZ:
  596. if_freq = 4500000;
  597. break;
  598. default: /* 8 MHz or Auto */
  599. if_freq = 5000000;
  600. break;
  601. }
  602. tuner_freq = params->frequency + if_freq;
  603. i = 0;
  604. while (tda827xa_dvbt[i].lomax < tuner_freq) {
  605. if(tda827xa_dvbt[i + 1].lomax == 0)
  606. break;
  607. i++;
  608. }
  609. N = ((tuner_freq + 31250) / 62500) << tda827xa_dvbt[i].spd;
  610. tuner_buf[0] = 0; // subaddress
  611. tuner_buf[1] = N >> 8;
  612. tuner_buf[2] = N & 0xff;
  613. tuner_buf[3] = 0;
  614. tuner_buf[4] = 0x16;
  615. tuner_buf[5] = (tda827xa_dvbt[i].spd << 5) + (tda827xa_dvbt[i].svco << 3) +
  616. tda827xa_dvbt[i].sbs;
  617. tuner_buf[6] = 0x4b + (tda827xa_dvbt[i].gc3 << 4);
  618. tuner_buf[7] = 0x0c;
  619. tuner_buf[8] = 0x06;
  620. tuner_buf[9] = 0x24;
  621. tuner_buf[10] = 0xff;
  622. tuner_buf[11] = 0x60;
  623. tuner_buf[12] = 0x00;
  624. tuner_buf[13] = 0x39; // lpsel
  625. msg.len = 14;
  626. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  627. return -EIO;
  628. msg.buf= reg2;
  629. msg.len = 2;
  630. reg2[0] = 0x60;
  631. reg2[1] = 0x3c;
  632. i2c_transfer(&dev->i2c_adap, &msg, 1);
  633. reg2[0] = 0xa0;
  634. reg2[1] = 0x40;
  635. i2c_transfer(&dev->i2c_adap, &msg, 1);
  636. msleep(2);
  637. /* correct CP value */
  638. reg2[0] = 0x30;
  639. reg2[1] = 0x10 + tda827xa_dvbt[i].scr;
  640. msg.len = 2;
  641. i2c_transfer(&dev->i2c_adap, &msg, 1);
  642. msleep(550);
  643. reg2[0] = 0x50;
  644. reg2[1] = 0x4f + (tda827xa_dvbt[i].gc3 << 4);
  645. i2c_transfer(&dev->i2c_adap, &msg, 1);
  646. return 0;
  647. }
  648. static void philips_tda827xa_pll_sleep(u8 addr, struct dvb_frontend *fe)
  649. {
  650. struct saa7134_dev *dev = fe->dvb->priv;
  651. static u8 tda827xa_sleep[] = { 0x30, 0x90};
  652. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tda827xa_sleep,
  653. .len = sizeof(tda827xa_sleep) };
  654. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  655. }
  656. /* ------------------------------------------------------------------ */
  657. static int philips_tiger_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  658. {
  659. int ret;
  660. struct saa7134_dev *dev = fe->dvb->priv;
  661. static u8 tda8290_close[] = { 0x21, 0xc0};
  662. static u8 tda8290_open[] = { 0x21, 0x80};
  663. struct i2c_msg tda8290_msg = {.addr = 0x4b,.flags = 0, .len = 2};
  664. /* close tda8290 i2c bridge */
  665. tda8290_msg.buf = tda8290_close;
  666. ret = i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  667. if (ret != 1)
  668. return -EIO;
  669. msleep(20);
  670. ret = philips_tda827xa_pll_set(0x61, fe, params);
  671. if (ret != 0)
  672. return ret;
  673. /* open tda8290 i2c bridge */
  674. tda8290_msg.buf = tda8290_open;
  675. i2c_transfer(&dev->i2c_adap, &tda8290_msg, 1);
  676. return ret;
  677. };
  678. static int philips_tiger_dvb_mode(struct dvb_frontend *fe)
  679. {
  680. struct saa7134_dev *dev = fe->dvb->priv;
  681. static u8 data[] = { 0x3c, 0x33, 0x6a};
  682. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  683. if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
  684. return -EIO;
  685. return 0;
  686. }
  687. static void philips_tiger_analog_mode(struct dvb_frontend *fe)
  688. {
  689. struct saa7134_dev *dev = fe->dvb->priv;
  690. static u8 data[] = { 0x3c, 0x33, 0x68};
  691. struct i2c_msg msg = {.addr=0x08, .flags=0, .buf=data, .len = sizeof(data)};
  692. i2c_transfer(&dev->i2c_adap, &msg, 1);
  693. philips_tda827xa_pll_sleep( 0x61, fe);
  694. }
  695. static struct tda1004x_config philips_tiger_config = {
  696. .demod_address = 0x08,
  697. .invert = 1,
  698. .invert_oclk = 0,
  699. .xtal_freq = TDA10046_XTAL_16M,
  700. .agc_config = TDA10046_AGC_TDA827X,
  701. .if_freq = TDA10046_FREQ_045,
  702. .pll_init = philips_tiger_dvb_mode,
  703. .pll_set = philips_tiger_pll_set,
  704. .pll_sleep = philips_tiger_analog_mode,
  705. .request_firmware = NULL,
  706. };
  707. #endif
  708. /* ------------------------------------------------------------------ */
  709. #ifdef HAVE_NXT200X
  710. static struct nxt200x_config avertvhda180 = {
  711. .demod_address = 0x0a,
  712. .pll_address = 0x61,
  713. .pll_desc = &dvb_pll_tdhu2,
  714. };
  715. #endif
  716. /* ------------------------------------------------------------------ */
  717. static int dvb_init(struct saa7134_dev *dev)
  718. {
  719. /* init struct videobuf_dvb */
  720. dev->ts.nr_bufs = 32;
  721. dev->ts.nr_packets = 32*4;
  722. dev->dvb.name = dev->name;
  723. videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
  724. dev->pci, &dev->slock,
  725. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  726. V4L2_FIELD_ALTERNATE,
  727. sizeof(struct saa7134_buf),
  728. dev);
  729. switch (dev->board) {
  730. #ifdef HAVE_MT352
  731. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  732. printk("%s: pinnacle 300i dvb setup\n",dev->name);
  733. dev->dvb.frontend = mt352_attach(&pinnacle_300i,
  734. &dev->i2c_adap);
  735. break;
  736. #endif
  737. #ifdef HAVE_TDA1004X
  738. case SAA7134_BOARD_MD7134:
  739. dev->dvb.frontend = tda10046_attach(&medion_cardbus,
  740. &dev->i2c_adap);
  741. break;
  742. case SAA7134_BOARD_PHILIPS_TOUGH:
  743. dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config,
  744. &dev->i2c_adap);
  745. break;
  746. case SAA7134_BOARD_FLYDVBTDUO:
  747. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  748. &dev->i2c_adap);
  749. break;
  750. case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS:
  751. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  752. &dev->i2c_adap);
  753. break;
  754. case SAA7134_BOARD_PHILIPS_EUROPA:
  755. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  756. &dev->i2c_adap);
  757. break;
  758. case SAA7134_BOARD_VIDEOMATE_DVBT_300:
  759. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  760. &dev->i2c_adap);
  761. break;
  762. case SAA7134_BOARD_VIDEOMATE_DVBT_200:
  763. dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config,
  764. &dev->i2c_adap);
  765. break;
  766. case SAA7134_BOARD_PHILIPS_TIGER:
  767. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  768. &dev->i2c_adap);
  769. break;
  770. case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
  771. dev->dvb.frontend = tda10046_attach(&philips_tiger_config,
  772. &dev->i2c_adap);
  773. break;
  774. #endif
  775. #ifdef HAVE_NXT200X
  776. case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
  777. dev->dvb.frontend = nxt200x_attach(&avertvhda180, &dev->i2c_adap);
  778. break;
  779. #endif
  780. default:
  781. printk("%s: Huh? unknown DVB card?\n",dev->name);
  782. break;
  783. }
  784. if (NULL == dev->dvb.frontend) {
  785. printk("%s: frontend initialization failed\n",dev->name);
  786. return -1;
  787. }
  788. /* register everything else */
  789. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
  790. }
  791. static int dvb_fini(struct saa7134_dev *dev)
  792. {
  793. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  794. switch (dev->board) {
  795. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  796. /* otherwise we don't detect the tuner on next insmod */
  797. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  798. break;
  799. };
  800. videobuf_dvb_unregister(&dev->dvb);
  801. return 0;
  802. }
  803. static struct saa7134_mpeg_ops dvb_ops = {
  804. .type = SAA7134_MPEG_DVB,
  805. .init = dvb_init,
  806. .fini = dvb_fini,
  807. };
  808. static int __init dvb_register(void)
  809. {
  810. return saa7134_ts_register(&dvb_ops);
  811. }
  812. static void __exit dvb_unregister(void)
  813. {
  814. saa7134_ts_unregister(&dvb_ops);
  815. }
  816. module_init(dvb_register);
  817. module_exit(dvb_unregister);
  818. /* ------------------------------------------------------------------ */
  819. /*
  820. * Local variables:
  821. * c-basic-offset: 8
  822. * End:
  823. */