mthca_provider.c 31 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
  37. */
  38. #include <rdma/ib_smi.h>
  39. #include <rdma/ib_user_verbs.h>
  40. #include <linux/mm.h>
  41. #include "mthca_dev.h"
  42. #include "mthca_cmd.h"
  43. #include "mthca_user.h"
  44. #include "mthca_memfree.h"
  45. static int mthca_query_device(struct ib_device *ibdev,
  46. struct ib_device_attr *props)
  47. {
  48. struct ib_smp *in_mad = NULL;
  49. struct ib_smp *out_mad = NULL;
  50. int err = -ENOMEM;
  51. struct mthca_dev* mdev = to_mdev(ibdev);
  52. u8 status;
  53. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  54. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  55. if (!in_mad || !out_mad)
  56. goto out;
  57. memset(props, 0, sizeof *props);
  58. props->fw_ver = mdev->fw_ver;
  59. memset(in_mad, 0, sizeof *in_mad);
  60. in_mad->base_version = 1;
  61. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  62. in_mad->class_version = 1;
  63. in_mad->method = IB_MGMT_METHOD_GET;
  64. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  65. err = mthca_MAD_IFC(mdev, 1, 1,
  66. 1, NULL, NULL, in_mad, out_mad,
  67. &status);
  68. if (err)
  69. goto out;
  70. if (status) {
  71. err = -EINVAL;
  72. goto out;
  73. }
  74. props->device_cap_flags = mdev->device_cap_flags;
  75. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  76. 0xffffff;
  77. props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
  78. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  79. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  80. memcpy(&props->node_guid, out_mad->data + 12, 8);
  81. props->max_mr_size = ~0ull;
  82. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  83. props->max_qp_wr = mdev->limits.max_wqes;
  84. props->max_sge = mdev->limits.max_sg;
  85. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  86. props->max_cqe = mdev->limits.max_cqes;
  87. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  88. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  89. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  90. props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
  91. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  92. props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
  93. props->max_srq_wr = mdev->limits.max_srq_wqes;
  94. props->max_srq_sge = mdev->limits.max_sg;
  95. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  96. props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
  97. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  98. props->max_pkeys = mdev->limits.pkey_table_len;
  99. props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
  100. props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
  101. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  102. props->max_mcast_grp;
  103. err = 0;
  104. out:
  105. kfree(in_mad);
  106. kfree(out_mad);
  107. return err;
  108. }
  109. static int mthca_query_port(struct ib_device *ibdev,
  110. u8 port, struct ib_port_attr *props)
  111. {
  112. struct ib_smp *in_mad = NULL;
  113. struct ib_smp *out_mad = NULL;
  114. int err = -ENOMEM;
  115. u8 status;
  116. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  117. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  118. if (!in_mad || !out_mad)
  119. goto out;
  120. memset(props, 0, sizeof *props);
  121. memset(in_mad, 0, sizeof *in_mad);
  122. in_mad->base_version = 1;
  123. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  124. in_mad->class_version = 1;
  125. in_mad->method = IB_MGMT_METHOD_GET;
  126. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  127. in_mad->attr_mod = cpu_to_be32(port);
  128. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  129. port, NULL, NULL, in_mad, out_mad,
  130. &status);
  131. if (err)
  132. goto out;
  133. if (status) {
  134. err = -EINVAL;
  135. goto out;
  136. }
  137. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  138. props->lmc = out_mad->data[34] & 0x7;
  139. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  140. props->sm_sl = out_mad->data[36] & 0xf;
  141. props->state = out_mad->data[32] & 0xf;
  142. props->phys_state = out_mad->data[33] >> 4;
  143. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  144. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  145. props->max_msg_sz = 0x80000000;
  146. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  147. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  148. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  149. props->active_width = out_mad->data[31] & 0xf;
  150. props->active_speed = out_mad->data[35] >> 4;
  151. props->max_mtu = out_mad->data[41] & 0xf;
  152. props->active_mtu = out_mad->data[36] >> 4;
  153. props->subnet_timeout = out_mad->data[51] & 0x1f;
  154. out:
  155. kfree(in_mad);
  156. kfree(out_mad);
  157. return err;
  158. }
  159. static int mthca_modify_port(struct ib_device *ibdev,
  160. u8 port, int port_modify_mask,
  161. struct ib_port_modify *props)
  162. {
  163. struct mthca_set_ib_param set_ib;
  164. struct ib_port_attr attr;
  165. int err;
  166. u8 status;
  167. if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  168. return -ERESTARTSYS;
  169. err = mthca_query_port(ibdev, port, &attr);
  170. if (err)
  171. goto out;
  172. set_ib.set_si_guid = 0;
  173. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  174. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  175. ~props->clr_port_cap_mask;
  176. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  177. if (err)
  178. goto out;
  179. if (status) {
  180. err = -EINVAL;
  181. goto out;
  182. }
  183. out:
  184. up(&to_mdev(ibdev)->cap_mask_mutex);
  185. return err;
  186. }
  187. static int mthca_query_pkey(struct ib_device *ibdev,
  188. u8 port, u16 index, u16 *pkey)
  189. {
  190. struct ib_smp *in_mad = NULL;
  191. struct ib_smp *out_mad = NULL;
  192. int err = -ENOMEM;
  193. u8 status;
  194. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  195. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  196. if (!in_mad || !out_mad)
  197. goto out;
  198. memset(in_mad, 0, sizeof *in_mad);
  199. in_mad->base_version = 1;
  200. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  201. in_mad->class_version = 1;
  202. in_mad->method = IB_MGMT_METHOD_GET;
  203. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  204. in_mad->attr_mod = cpu_to_be32(index / 32);
  205. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  206. port, NULL, NULL, in_mad, out_mad,
  207. &status);
  208. if (err)
  209. goto out;
  210. if (status) {
  211. err = -EINVAL;
  212. goto out;
  213. }
  214. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  215. out:
  216. kfree(in_mad);
  217. kfree(out_mad);
  218. return err;
  219. }
  220. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  221. int index, union ib_gid *gid)
  222. {
  223. struct ib_smp *in_mad = NULL;
  224. struct ib_smp *out_mad = NULL;
  225. int err = -ENOMEM;
  226. u8 status;
  227. in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
  228. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  229. if (!in_mad || !out_mad)
  230. goto out;
  231. memset(in_mad, 0, sizeof *in_mad);
  232. in_mad->base_version = 1;
  233. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  234. in_mad->class_version = 1;
  235. in_mad->method = IB_MGMT_METHOD_GET;
  236. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  237. in_mad->attr_mod = cpu_to_be32(port);
  238. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  239. port, NULL, NULL, in_mad, out_mad,
  240. &status);
  241. if (err)
  242. goto out;
  243. if (status) {
  244. err = -EINVAL;
  245. goto out;
  246. }
  247. memcpy(gid->raw, out_mad->data + 8, 8);
  248. memset(in_mad, 0, sizeof *in_mad);
  249. in_mad->base_version = 1;
  250. in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  251. in_mad->class_version = 1;
  252. in_mad->method = IB_MGMT_METHOD_GET;
  253. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  254. in_mad->attr_mod = cpu_to_be32(index / 8);
  255. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  256. port, NULL, NULL, in_mad, out_mad,
  257. &status);
  258. if (err)
  259. goto out;
  260. if (status) {
  261. err = -EINVAL;
  262. goto out;
  263. }
  264. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  265. out:
  266. kfree(in_mad);
  267. kfree(out_mad);
  268. return err;
  269. }
  270. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  271. struct ib_udata *udata)
  272. {
  273. struct mthca_alloc_ucontext_resp uresp;
  274. struct mthca_ucontext *context;
  275. int err;
  276. memset(&uresp, 0, sizeof uresp);
  277. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  278. if (mthca_is_memfree(to_mdev(ibdev)))
  279. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  280. else
  281. uresp.uarc_size = 0;
  282. context = kmalloc(sizeof *context, GFP_KERNEL);
  283. if (!context)
  284. return ERR_PTR(-ENOMEM);
  285. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  286. if (err) {
  287. kfree(context);
  288. return ERR_PTR(err);
  289. }
  290. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  291. if (IS_ERR(context->db_tab)) {
  292. err = PTR_ERR(context->db_tab);
  293. mthca_uar_free(to_mdev(ibdev), &context->uar);
  294. kfree(context);
  295. return ERR_PTR(err);
  296. }
  297. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  298. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  299. mthca_uar_free(to_mdev(ibdev), &context->uar);
  300. kfree(context);
  301. return ERR_PTR(-EFAULT);
  302. }
  303. return &context->ibucontext;
  304. }
  305. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  306. {
  307. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  308. to_mucontext(context)->db_tab);
  309. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  310. kfree(to_mucontext(context));
  311. return 0;
  312. }
  313. static int mthca_mmap_uar(struct ib_ucontext *context,
  314. struct vm_area_struct *vma)
  315. {
  316. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  317. return -EINVAL;
  318. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  319. if (io_remap_pfn_range(vma, vma->vm_start,
  320. to_mucontext(context)->uar.pfn,
  321. PAGE_SIZE, vma->vm_page_prot))
  322. return -EAGAIN;
  323. return 0;
  324. }
  325. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  326. struct ib_ucontext *context,
  327. struct ib_udata *udata)
  328. {
  329. struct mthca_pd *pd;
  330. int err;
  331. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  332. if (!pd)
  333. return ERR_PTR(-ENOMEM);
  334. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  335. if (err) {
  336. kfree(pd);
  337. return ERR_PTR(err);
  338. }
  339. if (context) {
  340. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  341. mthca_pd_free(to_mdev(ibdev), pd);
  342. kfree(pd);
  343. return ERR_PTR(-EFAULT);
  344. }
  345. }
  346. return &pd->ibpd;
  347. }
  348. static int mthca_dealloc_pd(struct ib_pd *pd)
  349. {
  350. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  351. kfree(pd);
  352. return 0;
  353. }
  354. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  355. struct ib_ah_attr *ah_attr)
  356. {
  357. int err;
  358. struct mthca_ah *ah;
  359. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  360. if (!ah)
  361. return ERR_PTR(-ENOMEM);
  362. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  363. if (err) {
  364. kfree(ah);
  365. return ERR_PTR(err);
  366. }
  367. return &ah->ibah;
  368. }
  369. static int mthca_ah_destroy(struct ib_ah *ah)
  370. {
  371. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  372. kfree(ah);
  373. return 0;
  374. }
  375. static struct ib_srq *mthca_create_srq(struct ib_pd *pd,
  376. struct ib_srq_init_attr *init_attr,
  377. struct ib_udata *udata)
  378. {
  379. struct mthca_create_srq ucmd;
  380. struct mthca_ucontext *context = NULL;
  381. struct mthca_srq *srq;
  382. int err;
  383. srq = kmalloc(sizeof *srq, GFP_KERNEL);
  384. if (!srq)
  385. return ERR_PTR(-ENOMEM);
  386. if (pd->uobject) {
  387. context = to_mucontext(pd->uobject->context);
  388. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  389. return ERR_PTR(-EFAULT);
  390. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  391. context->db_tab, ucmd.db_index,
  392. ucmd.db_page);
  393. if (err)
  394. goto err_free;
  395. srq->mr.ibmr.lkey = ucmd.lkey;
  396. srq->db_index = ucmd.db_index;
  397. }
  398. err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd),
  399. &init_attr->attr, srq);
  400. if (err && pd->uobject)
  401. mthca_unmap_user_db(to_mdev(pd->device), &context->uar,
  402. context->db_tab, ucmd.db_index);
  403. if (err)
  404. goto err_free;
  405. if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) {
  406. mthca_free_srq(to_mdev(pd->device), srq);
  407. err = -EFAULT;
  408. goto err_free;
  409. }
  410. return &srq->ibsrq;
  411. err_free:
  412. kfree(srq);
  413. return ERR_PTR(err);
  414. }
  415. static int mthca_destroy_srq(struct ib_srq *srq)
  416. {
  417. struct mthca_ucontext *context;
  418. if (srq->uobject) {
  419. context = to_mucontext(srq->uobject->context);
  420. mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
  421. context->db_tab, to_msrq(srq)->db_index);
  422. }
  423. mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
  424. kfree(srq);
  425. return 0;
  426. }
  427. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  428. struct ib_qp_init_attr *init_attr,
  429. struct ib_udata *udata)
  430. {
  431. struct mthca_create_qp ucmd;
  432. struct mthca_qp *qp;
  433. int err;
  434. switch (init_attr->qp_type) {
  435. case IB_QPT_RC:
  436. case IB_QPT_UC:
  437. case IB_QPT_UD:
  438. {
  439. struct mthca_ucontext *context;
  440. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  441. if (!qp)
  442. return ERR_PTR(-ENOMEM);
  443. if (pd->uobject) {
  444. context = to_mucontext(pd->uobject->context);
  445. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  446. return ERR_PTR(-EFAULT);
  447. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  448. context->db_tab,
  449. ucmd.sq_db_index, ucmd.sq_db_page);
  450. if (err) {
  451. kfree(qp);
  452. return ERR_PTR(err);
  453. }
  454. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  455. context->db_tab,
  456. ucmd.rq_db_index, ucmd.rq_db_page);
  457. if (err) {
  458. mthca_unmap_user_db(to_mdev(pd->device),
  459. &context->uar,
  460. context->db_tab,
  461. ucmd.sq_db_index);
  462. kfree(qp);
  463. return ERR_PTR(err);
  464. }
  465. qp->mr.ibmr.lkey = ucmd.lkey;
  466. qp->sq.db_index = ucmd.sq_db_index;
  467. qp->rq.db_index = ucmd.rq_db_index;
  468. }
  469. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  470. to_mcq(init_attr->send_cq),
  471. to_mcq(init_attr->recv_cq),
  472. init_attr->qp_type, init_attr->sq_sig_type,
  473. &init_attr->cap, qp);
  474. if (err && pd->uobject) {
  475. context = to_mucontext(pd->uobject->context);
  476. mthca_unmap_user_db(to_mdev(pd->device),
  477. &context->uar,
  478. context->db_tab,
  479. ucmd.sq_db_index);
  480. mthca_unmap_user_db(to_mdev(pd->device),
  481. &context->uar,
  482. context->db_tab,
  483. ucmd.rq_db_index);
  484. }
  485. qp->ibqp.qp_num = qp->qpn;
  486. break;
  487. }
  488. case IB_QPT_SMI:
  489. case IB_QPT_GSI:
  490. {
  491. /* Don't allow userspace to create special QPs */
  492. if (pd->uobject)
  493. return ERR_PTR(-EINVAL);
  494. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  495. if (!qp)
  496. return ERR_PTR(-ENOMEM);
  497. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  498. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  499. to_mcq(init_attr->send_cq),
  500. to_mcq(init_attr->recv_cq),
  501. init_attr->sq_sig_type, &init_attr->cap,
  502. qp->ibqp.qp_num, init_attr->port_num,
  503. to_msqp(qp));
  504. break;
  505. }
  506. default:
  507. /* Don't support raw QPs */
  508. return ERR_PTR(-ENOSYS);
  509. }
  510. if (err) {
  511. kfree(qp);
  512. return ERR_PTR(err);
  513. }
  514. init_attr->cap.max_inline_data = 0;
  515. init_attr->cap.max_send_wr = qp->sq.max;
  516. init_attr->cap.max_recv_wr = qp->rq.max;
  517. init_attr->cap.max_send_sge = qp->sq.max_gs;
  518. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  519. return &qp->ibqp;
  520. }
  521. static int mthca_destroy_qp(struct ib_qp *qp)
  522. {
  523. if (qp->uobject) {
  524. mthca_unmap_user_db(to_mdev(qp->device),
  525. &to_mucontext(qp->uobject->context)->uar,
  526. to_mucontext(qp->uobject->context)->db_tab,
  527. to_mqp(qp)->sq.db_index);
  528. mthca_unmap_user_db(to_mdev(qp->device),
  529. &to_mucontext(qp->uobject->context)->uar,
  530. to_mucontext(qp->uobject->context)->db_tab,
  531. to_mqp(qp)->rq.db_index);
  532. }
  533. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  534. kfree(qp);
  535. return 0;
  536. }
  537. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  538. struct ib_ucontext *context,
  539. struct ib_udata *udata)
  540. {
  541. struct mthca_create_cq ucmd;
  542. struct mthca_cq *cq;
  543. int nent;
  544. int err;
  545. if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
  546. return ERR_PTR(-EINVAL);
  547. if (context) {
  548. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  549. return ERR_PTR(-EFAULT);
  550. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  551. to_mucontext(context)->db_tab,
  552. ucmd.set_db_index, ucmd.set_db_page);
  553. if (err)
  554. return ERR_PTR(err);
  555. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  556. to_mucontext(context)->db_tab,
  557. ucmd.arm_db_index, ucmd.arm_db_page);
  558. if (err)
  559. goto err_unmap_set;
  560. }
  561. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  562. if (!cq) {
  563. err = -ENOMEM;
  564. goto err_unmap_arm;
  565. }
  566. if (context) {
  567. cq->mr.ibmr.lkey = ucmd.lkey;
  568. cq->set_ci_db_index = ucmd.set_db_index;
  569. cq->arm_db_index = ucmd.arm_db_index;
  570. }
  571. for (nent = 1; nent <= entries; nent <<= 1)
  572. ; /* nothing */
  573. err = mthca_init_cq(to_mdev(ibdev), nent,
  574. context ? to_mucontext(context) : NULL,
  575. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  576. cq);
  577. if (err)
  578. goto err_free;
  579. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  580. mthca_free_cq(to_mdev(ibdev), cq);
  581. goto err_free;
  582. }
  583. return &cq->ibcq;
  584. err_free:
  585. kfree(cq);
  586. err_unmap_arm:
  587. if (context)
  588. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  589. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  590. err_unmap_set:
  591. if (context)
  592. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  593. to_mucontext(context)->db_tab, ucmd.set_db_index);
  594. return ERR_PTR(err);
  595. }
  596. static int mthca_destroy_cq(struct ib_cq *cq)
  597. {
  598. if (cq->uobject) {
  599. mthca_unmap_user_db(to_mdev(cq->device),
  600. &to_mucontext(cq->uobject->context)->uar,
  601. to_mucontext(cq->uobject->context)->db_tab,
  602. to_mcq(cq)->arm_db_index);
  603. mthca_unmap_user_db(to_mdev(cq->device),
  604. &to_mucontext(cq->uobject->context)->uar,
  605. to_mucontext(cq->uobject->context)->db_tab,
  606. to_mcq(cq)->set_ci_db_index);
  607. }
  608. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  609. kfree(cq);
  610. return 0;
  611. }
  612. static inline u32 convert_access(int acc)
  613. {
  614. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  615. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  616. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  617. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  618. MTHCA_MPT_FLAG_LOCAL_READ;
  619. }
  620. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  621. {
  622. struct mthca_mr *mr;
  623. int err;
  624. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  625. if (!mr)
  626. return ERR_PTR(-ENOMEM);
  627. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  628. to_mpd(pd)->pd_num,
  629. convert_access(acc), mr);
  630. if (err) {
  631. kfree(mr);
  632. return ERR_PTR(err);
  633. }
  634. return &mr->ibmr;
  635. }
  636. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  637. struct ib_phys_buf *buffer_list,
  638. int num_phys_buf,
  639. int acc,
  640. u64 *iova_start)
  641. {
  642. struct mthca_mr *mr;
  643. u64 *page_list;
  644. u64 total_size;
  645. u64 mask;
  646. int shift;
  647. int npages;
  648. int err;
  649. int i, j, n;
  650. /* First check that we have enough alignment */
  651. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  652. return ERR_PTR(-EINVAL);
  653. if (num_phys_buf > 1 &&
  654. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
  655. return ERR_PTR(-EINVAL);
  656. mask = 0;
  657. total_size = 0;
  658. for (i = 0; i < num_phys_buf; ++i) {
  659. if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
  660. return ERR_PTR(-EINVAL);
  661. if (i != 0 && i != num_phys_buf - 1 &&
  662. (buffer_list[i].size & ~PAGE_MASK))
  663. return ERR_PTR(-EINVAL);
  664. total_size += buffer_list[i].size;
  665. if (i > 0)
  666. mask |= buffer_list[i].addr;
  667. }
  668. /* Find largest page shift we can use to cover buffers */
  669. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  670. if (num_phys_buf > 1) {
  671. if ((1ULL << shift) & mask)
  672. break;
  673. } else {
  674. if (1ULL << shift >=
  675. buffer_list[0].size +
  676. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  677. break;
  678. }
  679. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  680. buffer_list[0].addr &= ~0ull << shift;
  681. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  682. if (!mr)
  683. return ERR_PTR(-ENOMEM);
  684. npages = 0;
  685. for (i = 0; i < num_phys_buf; ++i)
  686. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  687. if (!npages)
  688. return &mr->ibmr;
  689. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  690. if (!page_list) {
  691. kfree(mr);
  692. return ERR_PTR(-ENOMEM);
  693. }
  694. n = 0;
  695. for (i = 0; i < num_phys_buf; ++i)
  696. for (j = 0;
  697. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  698. ++j)
  699. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  700. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  701. "in PD %x; shift %d, npages %d.\n",
  702. (unsigned long long) buffer_list[0].addr,
  703. (unsigned long long) *iova_start,
  704. to_mpd(pd)->pd_num,
  705. shift, npages);
  706. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  707. to_mpd(pd)->pd_num,
  708. page_list, shift, npages,
  709. *iova_start, total_size,
  710. convert_access(acc), mr);
  711. if (err) {
  712. kfree(page_list);
  713. kfree(mr);
  714. return ERR_PTR(err);
  715. }
  716. kfree(page_list);
  717. return &mr->ibmr;
  718. }
  719. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  720. int acc, struct ib_udata *udata)
  721. {
  722. struct mthca_dev *dev = to_mdev(pd->device);
  723. struct ib_umem_chunk *chunk;
  724. struct mthca_mr *mr;
  725. u64 *pages;
  726. int shift, n, len;
  727. int i, j, k;
  728. int err = 0;
  729. shift = ffs(region->page_size) - 1;
  730. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  731. if (!mr)
  732. return ERR_PTR(-ENOMEM);
  733. n = 0;
  734. list_for_each_entry(chunk, &region->chunk_list, list)
  735. n += chunk->nents;
  736. mr->mtt = mthca_alloc_mtt(dev, n);
  737. if (IS_ERR(mr->mtt)) {
  738. err = PTR_ERR(mr->mtt);
  739. goto err;
  740. }
  741. pages = (u64 *) __get_free_page(GFP_KERNEL);
  742. if (!pages) {
  743. err = -ENOMEM;
  744. goto err_mtt;
  745. }
  746. i = n = 0;
  747. list_for_each_entry(chunk, &region->chunk_list, list)
  748. for (j = 0; j < chunk->nmap; ++j) {
  749. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  750. for (k = 0; k < len; ++k) {
  751. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  752. region->page_size * k;
  753. /*
  754. * Be friendly to WRITE_MTT command
  755. * and leave two empty slots for the
  756. * index and reserved fields of the
  757. * mailbox.
  758. */
  759. if (i == PAGE_SIZE / sizeof (u64) - 2) {
  760. err = mthca_write_mtt(dev, mr->mtt,
  761. n, pages, i);
  762. if (err)
  763. goto mtt_done;
  764. n += i;
  765. i = 0;
  766. }
  767. }
  768. }
  769. if (i)
  770. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  771. mtt_done:
  772. free_page((unsigned long) pages);
  773. if (err)
  774. goto err_mtt;
  775. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
  776. region->length, convert_access(acc), mr);
  777. if (err)
  778. goto err_mtt;
  779. return &mr->ibmr;
  780. err_mtt:
  781. mthca_free_mtt(dev, mr->mtt);
  782. err:
  783. kfree(mr);
  784. return ERR_PTR(err);
  785. }
  786. static int mthca_dereg_mr(struct ib_mr *mr)
  787. {
  788. struct mthca_mr *mmr = to_mmr(mr);
  789. mthca_free_mr(to_mdev(mr->device), mmr);
  790. kfree(mmr);
  791. return 0;
  792. }
  793. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  794. struct ib_fmr_attr *fmr_attr)
  795. {
  796. struct mthca_fmr *fmr;
  797. int err;
  798. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  799. if (!fmr)
  800. return ERR_PTR(-ENOMEM);
  801. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  802. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  803. convert_access(mr_access_flags), fmr);
  804. if (err) {
  805. kfree(fmr);
  806. return ERR_PTR(err);
  807. }
  808. return &fmr->ibmr;
  809. }
  810. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  811. {
  812. struct mthca_fmr *mfmr = to_mfmr(fmr);
  813. int err;
  814. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  815. if (err)
  816. return err;
  817. kfree(mfmr);
  818. return 0;
  819. }
  820. static int mthca_unmap_fmr(struct list_head *fmr_list)
  821. {
  822. struct ib_fmr *fmr;
  823. int err;
  824. u8 status;
  825. struct mthca_dev *mdev = NULL;
  826. list_for_each_entry(fmr, fmr_list, list) {
  827. if (mdev && to_mdev(fmr->device) != mdev)
  828. return -EINVAL;
  829. mdev = to_mdev(fmr->device);
  830. }
  831. if (!mdev)
  832. return 0;
  833. if (mthca_is_memfree(mdev)) {
  834. list_for_each_entry(fmr, fmr_list, list)
  835. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  836. wmb();
  837. } else
  838. list_for_each_entry(fmr, fmr_list, list)
  839. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  840. err = mthca_SYNC_TPT(mdev, &status);
  841. if (err)
  842. return err;
  843. if (status)
  844. return -EINVAL;
  845. return 0;
  846. }
  847. static ssize_t show_rev(struct class_device *cdev, char *buf)
  848. {
  849. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  850. return sprintf(buf, "%x\n", dev->rev_id);
  851. }
  852. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  853. {
  854. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  855. return sprintf(buf, "%d.%d.%d\n", (int) (dev->fw_ver >> 32),
  856. (int) (dev->fw_ver >> 16) & 0xffff,
  857. (int) dev->fw_ver & 0xffff);
  858. }
  859. static ssize_t show_hca(struct class_device *cdev, char *buf)
  860. {
  861. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  862. switch (dev->pdev->device) {
  863. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  864. return sprintf(buf, "MT23108\n");
  865. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  866. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  867. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  868. return sprintf(buf, "MT25208\n");
  869. case PCI_DEVICE_ID_MELLANOX_SINAI:
  870. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  871. return sprintf(buf, "MT25204\n");
  872. default:
  873. return sprintf(buf, "unknown\n");
  874. }
  875. }
  876. static ssize_t show_board(struct class_device *cdev, char *buf)
  877. {
  878. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  879. return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
  880. }
  881. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  882. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  883. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  884. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  885. static struct class_device_attribute *mthca_class_attributes[] = {
  886. &class_device_attr_hw_rev,
  887. &class_device_attr_fw_ver,
  888. &class_device_attr_hca_type,
  889. &class_device_attr_board_id
  890. };
  891. int mthca_register_device(struct mthca_dev *dev)
  892. {
  893. int ret;
  894. int i;
  895. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  896. dev->ib_dev.owner = THIS_MODULE;
  897. dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
  898. dev->ib_dev.uverbs_cmd_mask =
  899. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  900. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  901. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  902. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  903. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  904. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  905. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  906. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  907. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  908. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  909. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  910. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  911. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  912. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  913. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  914. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  915. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  916. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
  917. dev->ib_dev.node_type = IB_NODE_CA;
  918. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  919. dev->ib_dev.dma_device = &dev->pdev->dev;
  920. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  921. dev->ib_dev.query_device = mthca_query_device;
  922. dev->ib_dev.query_port = mthca_query_port;
  923. dev->ib_dev.modify_port = mthca_modify_port;
  924. dev->ib_dev.query_pkey = mthca_query_pkey;
  925. dev->ib_dev.query_gid = mthca_query_gid;
  926. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  927. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  928. dev->ib_dev.mmap = mthca_mmap_uar;
  929. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  930. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  931. dev->ib_dev.create_ah = mthca_ah_create;
  932. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  933. if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
  934. dev->ib_dev.create_srq = mthca_create_srq;
  935. dev->ib_dev.modify_srq = mthca_modify_srq;
  936. dev->ib_dev.destroy_srq = mthca_destroy_srq;
  937. if (mthca_is_memfree(dev))
  938. dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
  939. else
  940. dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv;
  941. }
  942. dev->ib_dev.create_qp = mthca_create_qp;
  943. dev->ib_dev.modify_qp = mthca_modify_qp;
  944. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  945. dev->ib_dev.create_cq = mthca_create_cq;
  946. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  947. dev->ib_dev.poll_cq = mthca_poll_cq;
  948. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  949. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  950. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  951. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  952. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  953. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  954. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  955. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  956. if (mthca_is_memfree(dev))
  957. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  958. else
  959. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  960. }
  961. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  962. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  963. dev->ib_dev.process_mad = mthca_process_mad;
  964. if (mthca_is_memfree(dev)) {
  965. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  966. dev->ib_dev.post_send = mthca_arbel_post_send;
  967. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  968. } else {
  969. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  970. dev->ib_dev.post_send = mthca_tavor_post_send;
  971. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  972. }
  973. init_MUTEX(&dev->cap_mask_mutex);
  974. ret = ib_register_device(&dev->ib_dev);
  975. if (ret)
  976. return ret;
  977. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  978. ret = class_device_create_file(&dev->ib_dev.class_dev,
  979. mthca_class_attributes[i]);
  980. if (ret) {
  981. ib_unregister_device(&dev->ib_dev);
  982. return ret;
  983. }
  984. }
  985. mthca_start_catas_poll(dev);
  986. return 0;
  987. }
  988. void mthca_unregister_device(struct mthca_dev *dev)
  989. {
  990. mthca_stop_catas_poll(dev);
  991. ib_unregister_device(&dev->ib_dev);
  992. }