hpwdt.c 19 KB

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  1. /*
  2. * HP WatchDog Driver
  3. * based on
  4. *
  5. * SoftDog 0.05: A Software Watchdog Device
  6. *
  7. * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
  8. * Thomas Mingarelli <thomas.mingarelli@hp.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation
  13. *
  14. */
  15. #include <linux/device.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/io.h>
  19. #include <linux/bitops.h>
  20. #include <linux/kernel.h>
  21. #include <linux/miscdevice.h>
  22. #include <linux/module.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci_ids.h>
  26. #include <linux/types.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/watchdog.h>
  29. #include <linux/dmi.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/nmi.h>
  32. #include <linux/kdebug.h>
  33. #include <linux/notifier.h>
  34. #include <asm/cacheflush.h>
  35. #define HPWDT_VERSION "1.1.1"
  36. #define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
  37. #define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
  38. #define HPWDT_MAX_TIMER TICKS_TO_SECS(65535)
  39. #define DEFAULT_MARGIN 30
  40. static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
  41. static unsigned int reload; /* the computed soft_margin */
  42. static int nowayout = WATCHDOG_NOWAYOUT;
  43. static char expect_release;
  44. static unsigned long hpwdt_is_open;
  45. static void __iomem *pci_mem_addr; /* the PCI-memory address */
  46. static unsigned long __iomem *hpwdt_timer_reg;
  47. static unsigned long __iomem *hpwdt_timer_con;
  48. static struct pci_device_id hpwdt_devices[] = {
  49. { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) }, /* iLO2 */
  50. { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) }, /* iLO3 */
  51. {0}, /* terminate list */
  52. };
  53. MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  54. #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
  55. #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
  56. #define PCI_BIOS32_PARAGRAPH_LEN 16
  57. #define PCI_ROM_BASE1 0x000F0000
  58. #define ROM_SIZE 0x10000
  59. struct bios32_service_dir {
  60. u32 signature;
  61. u32 entry_point;
  62. u8 revision;
  63. u8 length;
  64. u8 checksum;
  65. u8 reserved[5];
  66. };
  67. /* type 212 */
  68. struct smbios_cru64_info {
  69. u8 type;
  70. u8 byte_length;
  71. u16 handle;
  72. u32 signature;
  73. u64 physical_address;
  74. u32 double_length;
  75. u32 double_offset;
  76. };
  77. #define SMBIOS_CRU64_INFORMATION 212
  78. struct cmn_registers {
  79. union {
  80. struct {
  81. u8 ral;
  82. u8 rah;
  83. u16 rea2;
  84. };
  85. u32 reax;
  86. } u1;
  87. union {
  88. struct {
  89. u8 rbl;
  90. u8 rbh;
  91. u8 reb2l;
  92. u8 reb2h;
  93. };
  94. u32 rebx;
  95. } u2;
  96. union {
  97. struct {
  98. u8 rcl;
  99. u8 rch;
  100. u16 rec2;
  101. };
  102. u32 recx;
  103. } u3;
  104. union {
  105. struct {
  106. u8 rdl;
  107. u8 rdh;
  108. u16 red2;
  109. };
  110. u32 redx;
  111. } u4;
  112. u32 resi;
  113. u32 redi;
  114. u16 rds;
  115. u16 res;
  116. u32 reflags;
  117. } __attribute__((packed));
  118. static unsigned int hpwdt_nmi_sourcing;
  119. static unsigned int allow_kdump;
  120. static unsigned int priority; /* hpwdt at end of die_notify list */
  121. static DEFINE_SPINLOCK(rom_lock);
  122. static void *cru_rom_addr;
  123. static struct cmn_registers cmn_regs;
  124. extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
  125. unsigned long *pRomEntry);
  126. #ifdef CONFIG_X86_32
  127. /* --32 Bit Bios------------------------------------------------------------ */
  128. #define HPWDT_ARCH 32
  129. asm(".text \n\t"
  130. ".align 4 \n"
  131. "asminline_call: \n\t"
  132. "pushl %ebp \n\t"
  133. "movl %esp, %ebp \n\t"
  134. "pusha \n\t"
  135. "pushf \n\t"
  136. "push %es \n\t"
  137. "push %ds \n\t"
  138. "pop %es \n\t"
  139. "movl 8(%ebp),%eax \n\t"
  140. "movl 4(%eax),%ebx \n\t"
  141. "movl 8(%eax),%ecx \n\t"
  142. "movl 12(%eax),%edx \n\t"
  143. "movl 16(%eax),%esi \n\t"
  144. "movl 20(%eax),%edi \n\t"
  145. "movl (%eax),%eax \n\t"
  146. "push %cs \n\t"
  147. "call *12(%ebp) \n\t"
  148. "pushf \n\t"
  149. "pushl %eax \n\t"
  150. "movl 8(%ebp),%eax \n\t"
  151. "movl %ebx,4(%eax) \n\t"
  152. "movl %ecx,8(%eax) \n\t"
  153. "movl %edx,12(%eax) \n\t"
  154. "movl %esi,16(%eax) \n\t"
  155. "movl %edi,20(%eax) \n\t"
  156. "movw %ds,24(%eax) \n\t"
  157. "movw %es,26(%eax) \n\t"
  158. "popl %ebx \n\t"
  159. "movl %ebx,(%eax) \n\t"
  160. "popl %ebx \n\t"
  161. "movl %ebx,28(%eax) \n\t"
  162. "pop %es \n\t"
  163. "popf \n\t"
  164. "popa \n\t"
  165. "leave \n\t"
  166. "ret \n\t"
  167. ".previous");
  168. /*
  169. * cru_detect
  170. *
  171. * Routine Description:
  172. * This function uses the 32-bit BIOS Service Directory record to
  173. * search for a $CRU record.
  174. *
  175. * Return Value:
  176. * 0 : SUCCESS
  177. * <0 : FAILURE
  178. */
  179. static int __devinit cru_detect(unsigned long map_entry,
  180. unsigned long map_offset)
  181. {
  182. void *bios32_map;
  183. unsigned long *bios32_entrypoint;
  184. unsigned long cru_physical_address;
  185. unsigned long cru_length;
  186. unsigned long physical_bios_base = 0;
  187. unsigned long physical_bios_offset = 0;
  188. int retval = -ENODEV;
  189. bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
  190. if (bios32_map == NULL)
  191. return -ENODEV;
  192. bios32_entrypoint = bios32_map + map_offset;
  193. cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
  194. asminline_call(&cmn_regs, bios32_entrypoint);
  195. if (cmn_regs.u1.ral != 0) {
  196. printk(KERN_WARNING
  197. "hpwdt: Call succeeded but with an error: 0x%x\n",
  198. cmn_regs.u1.ral);
  199. } else {
  200. physical_bios_base = cmn_regs.u2.rebx;
  201. physical_bios_offset = cmn_regs.u4.redx;
  202. cru_length = cmn_regs.u3.recx;
  203. cru_physical_address =
  204. physical_bios_base + physical_bios_offset;
  205. /* If the values look OK, then map it in. */
  206. if ((physical_bios_base + physical_bios_offset)) {
  207. cru_rom_addr =
  208. ioremap(cru_physical_address, cru_length);
  209. if (cru_rom_addr)
  210. retval = 0;
  211. }
  212. printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
  213. physical_bios_base);
  214. printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
  215. physical_bios_offset);
  216. printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
  217. cru_length);
  218. printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
  219. &cru_rom_addr);
  220. }
  221. iounmap(bios32_map);
  222. return retval;
  223. }
  224. /*
  225. * bios_checksum
  226. */
  227. static int __devinit bios_checksum(const char __iomem *ptr, int len)
  228. {
  229. char sum = 0;
  230. int i;
  231. /*
  232. * calculate checksum of size bytes. This should add up
  233. * to zero if we have a valid header.
  234. */
  235. for (i = 0; i < len; i++)
  236. sum += ptr[i];
  237. return ((sum == 0) && (len > 0));
  238. }
  239. /*
  240. * bios32_present
  241. *
  242. * Routine Description:
  243. * This function finds the 32-bit BIOS Service Directory
  244. *
  245. * Return Value:
  246. * 0 : SUCCESS
  247. * <0 : FAILURE
  248. */
  249. static int __devinit bios32_present(const char __iomem *p)
  250. {
  251. struct bios32_service_dir *bios_32_ptr;
  252. int length;
  253. unsigned long map_entry, map_offset;
  254. bios_32_ptr = (struct bios32_service_dir *) p;
  255. /*
  256. * Search for signature by checking equal to the swizzled value
  257. * instead of calling another routine to perform a strcmp.
  258. */
  259. if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
  260. length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
  261. if (bios_checksum(p, length)) {
  262. /*
  263. * According to the spec, we're looking for the
  264. * first 4KB-aligned address below the entrypoint
  265. * listed in the header. The Service Directory code
  266. * is guaranteed to occupy no more than 2 4KB pages.
  267. */
  268. map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
  269. map_offset = bios_32_ptr->entry_point - map_entry;
  270. return cru_detect(map_entry, map_offset);
  271. }
  272. }
  273. return -ENODEV;
  274. }
  275. static int __devinit detect_cru_service(void)
  276. {
  277. char __iomem *p, *q;
  278. int rc = -1;
  279. /*
  280. * Search from 0x0f0000 through 0x0fffff, inclusive.
  281. */
  282. p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
  283. if (p == NULL)
  284. return -ENOMEM;
  285. for (q = p; q < p + ROM_SIZE; q += 16) {
  286. rc = bios32_present(q);
  287. if (!rc)
  288. break;
  289. }
  290. iounmap(p);
  291. return rc;
  292. }
  293. /* ------------------------------------------------------------------------- */
  294. #endif /* CONFIG_X86_32 */
  295. #ifdef CONFIG_X86_64
  296. /* --64 Bit Bios------------------------------------------------------------ */
  297. #define HPWDT_ARCH 64
  298. asm(".text \n\t"
  299. ".align 4 \n"
  300. "asminline_call: \n\t"
  301. "pushq %rbp \n\t"
  302. "movq %rsp, %rbp \n\t"
  303. "pushq %rax \n\t"
  304. "pushq %rbx \n\t"
  305. "pushq %rdx \n\t"
  306. "pushq %r12 \n\t"
  307. "pushq %r9 \n\t"
  308. "movq %rsi, %r12 \n\t"
  309. "movq %rdi, %r9 \n\t"
  310. "movl 4(%r9),%ebx \n\t"
  311. "movl 8(%r9),%ecx \n\t"
  312. "movl 12(%r9),%edx \n\t"
  313. "movl 16(%r9),%esi \n\t"
  314. "movl 20(%r9),%edi \n\t"
  315. "movl (%r9),%eax \n\t"
  316. "call *%r12 \n\t"
  317. "pushfq \n\t"
  318. "popq %r12 \n\t"
  319. "movl %eax, (%r9) \n\t"
  320. "movl %ebx, 4(%r9) \n\t"
  321. "movl %ecx, 8(%r9) \n\t"
  322. "movl %edx, 12(%r9) \n\t"
  323. "movl %esi, 16(%r9) \n\t"
  324. "movl %edi, 20(%r9) \n\t"
  325. "movq %r12, %rax \n\t"
  326. "movl %eax, 28(%r9) \n\t"
  327. "popq %r9 \n\t"
  328. "popq %r12 \n\t"
  329. "popq %rdx \n\t"
  330. "popq %rbx \n\t"
  331. "popq %rax \n\t"
  332. "leave \n\t"
  333. "ret \n\t"
  334. ".previous");
  335. /*
  336. * dmi_find_cru
  337. *
  338. * Routine Description:
  339. * This function checks whether or not a SMBIOS/DMI record is
  340. * the 64bit CRU info or not
  341. */
  342. static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
  343. {
  344. struct smbios_cru64_info *smbios_cru64_ptr;
  345. unsigned long cru_physical_address;
  346. if (dm->type == SMBIOS_CRU64_INFORMATION) {
  347. smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
  348. if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
  349. cru_physical_address =
  350. smbios_cru64_ptr->physical_address +
  351. smbios_cru64_ptr->double_offset;
  352. cru_rom_addr = ioremap(cru_physical_address,
  353. smbios_cru64_ptr->double_length);
  354. set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
  355. smbios_cru64_ptr->double_length >> PAGE_SHIFT);
  356. }
  357. }
  358. }
  359. static int __devinit detect_cru_service(void)
  360. {
  361. cru_rom_addr = NULL;
  362. dmi_walk(dmi_find_cru, NULL);
  363. /* if cru_rom_addr has been set then we found a CRU service */
  364. return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
  365. }
  366. /* ------------------------------------------------------------------------- */
  367. #endif /* CONFIG_X86_64 */
  368. /*
  369. * Watchdog operations
  370. */
  371. static void hpwdt_start(void)
  372. {
  373. reload = SECS_TO_TICKS(soft_margin);
  374. iowrite16(reload, hpwdt_timer_reg);
  375. iowrite16(0x85, hpwdt_timer_con);
  376. }
  377. static void hpwdt_stop(void)
  378. {
  379. unsigned long data;
  380. data = ioread16(hpwdt_timer_con);
  381. data &= 0xFE;
  382. iowrite16(data, hpwdt_timer_con);
  383. }
  384. static void hpwdt_ping(void)
  385. {
  386. iowrite16(reload, hpwdt_timer_reg);
  387. }
  388. static int hpwdt_change_timer(int new_margin)
  389. {
  390. if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
  391. printk(KERN_WARNING
  392. "hpwdt: New value passed in is invalid: %d seconds.\n",
  393. new_margin);
  394. return -EINVAL;
  395. }
  396. soft_margin = new_margin;
  397. printk(KERN_DEBUG
  398. "hpwdt: New timer passed in is %d seconds.\n",
  399. new_margin);
  400. reload = SECS_TO_TICKS(soft_margin);
  401. return 0;
  402. }
  403. static int hpwdt_time_left(void)
  404. {
  405. return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
  406. }
  407. /*
  408. * NMI Handler
  409. */
  410. static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
  411. void *data)
  412. {
  413. unsigned long rom_pl;
  414. static int die_nmi_called;
  415. if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
  416. goto out;
  417. if (!hpwdt_nmi_sourcing)
  418. goto out;
  419. spin_lock_irqsave(&rom_lock, rom_pl);
  420. if (!die_nmi_called)
  421. asminline_call(&cmn_regs, cru_rom_addr);
  422. die_nmi_called = 1;
  423. spin_unlock_irqrestore(&rom_lock, rom_pl);
  424. if (cmn_regs.u1.ral == 0) {
  425. printk(KERN_WARNING "hpwdt: An NMI occurred, "
  426. "but unable to determine source.\n");
  427. } else {
  428. if (allow_kdump)
  429. hpwdt_stop();
  430. panic("An NMI occurred, please see the Integrated "
  431. "Management Log for details.\n");
  432. }
  433. out:
  434. return NOTIFY_OK;
  435. }
  436. /*
  437. * /dev/watchdog handling
  438. */
  439. static int hpwdt_open(struct inode *inode, struct file *file)
  440. {
  441. /* /dev/watchdog can only be opened once */
  442. if (test_and_set_bit(0, &hpwdt_is_open))
  443. return -EBUSY;
  444. /* Start the watchdog */
  445. hpwdt_start();
  446. hpwdt_ping();
  447. return nonseekable_open(inode, file);
  448. }
  449. static int hpwdt_release(struct inode *inode, struct file *file)
  450. {
  451. /* Stop the watchdog */
  452. if (expect_release == 42) {
  453. hpwdt_stop();
  454. } else {
  455. printk(KERN_CRIT
  456. "hpwdt: Unexpected close, not stopping watchdog!\n");
  457. hpwdt_ping();
  458. }
  459. expect_release = 0;
  460. /* /dev/watchdog is being closed, make sure it can be re-opened */
  461. clear_bit(0, &hpwdt_is_open);
  462. return 0;
  463. }
  464. static ssize_t hpwdt_write(struct file *file, const char __user *data,
  465. size_t len, loff_t *ppos)
  466. {
  467. /* See if we got the magic character 'V' and reload the timer */
  468. if (len) {
  469. if (!nowayout) {
  470. size_t i;
  471. /* note: just in case someone wrote the magic character
  472. * five months ago... */
  473. expect_release = 0;
  474. /* scan to see whether or not we got the magic char. */
  475. for (i = 0; i != len; i++) {
  476. char c;
  477. if (get_user(c, data + i))
  478. return -EFAULT;
  479. if (c == 'V')
  480. expect_release = 42;
  481. }
  482. }
  483. /* someone wrote to us, we should reload the timer */
  484. hpwdt_ping();
  485. }
  486. return len;
  487. }
  488. static const struct watchdog_info ident = {
  489. .options = WDIOF_SETTIMEOUT |
  490. WDIOF_KEEPALIVEPING |
  491. WDIOF_MAGICCLOSE,
  492. .identity = "HP iLO2+ HW Watchdog Timer",
  493. };
  494. static long hpwdt_ioctl(struct file *file, unsigned int cmd,
  495. unsigned long arg)
  496. {
  497. void __user *argp = (void __user *)arg;
  498. int __user *p = argp;
  499. int new_margin;
  500. int ret = -ENOTTY;
  501. switch (cmd) {
  502. case WDIOC_GETSUPPORT:
  503. ret = 0;
  504. if (copy_to_user(argp, &ident, sizeof(ident)))
  505. ret = -EFAULT;
  506. break;
  507. case WDIOC_GETSTATUS:
  508. case WDIOC_GETBOOTSTATUS:
  509. ret = put_user(0, p);
  510. break;
  511. case WDIOC_KEEPALIVE:
  512. hpwdt_ping();
  513. ret = 0;
  514. break;
  515. case WDIOC_SETTIMEOUT:
  516. ret = get_user(new_margin, p);
  517. if (ret)
  518. break;
  519. ret = hpwdt_change_timer(new_margin);
  520. if (ret)
  521. break;
  522. hpwdt_ping();
  523. /* Fall */
  524. case WDIOC_GETTIMEOUT:
  525. ret = put_user(soft_margin, p);
  526. break;
  527. case WDIOC_GETTIMELEFT:
  528. ret = put_user(hpwdt_time_left(), p);
  529. break;
  530. }
  531. return ret;
  532. }
  533. /*
  534. * Kernel interfaces
  535. */
  536. static const struct file_operations hpwdt_fops = {
  537. .owner = THIS_MODULE,
  538. .llseek = no_llseek,
  539. .write = hpwdt_write,
  540. .unlocked_ioctl = hpwdt_ioctl,
  541. .open = hpwdt_open,
  542. .release = hpwdt_release,
  543. };
  544. static struct miscdevice hpwdt_miscdev = {
  545. .minor = WATCHDOG_MINOR,
  546. .name = "watchdog",
  547. .fops = &hpwdt_fops,
  548. };
  549. static struct notifier_block die_notifier = {
  550. .notifier_call = hpwdt_pretimeout,
  551. .priority = 0,
  552. };
  553. /*
  554. * Init & Exit
  555. */
  556. #ifdef ARCH_HAS_NMI_WATCHDOG
  557. static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
  558. {
  559. /*
  560. * If nmi_watchdog is turned off then we can turn on
  561. * our nmi sourcing capability.
  562. */
  563. if (!nmi_watchdog_active())
  564. hpwdt_nmi_sourcing = 1;
  565. else
  566. dev_warn(&dev->dev, "NMI sourcing is disabled. To enable this "
  567. "functionality you must reboot with nmi_watchdog=0 "
  568. "and load the hpwdt driver with priority=1.\n");
  569. }
  570. #else
  571. static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
  572. {
  573. dev_warn(&dev->dev, "NMI sourcing is disabled. "
  574. "Your kernel does not support a NMI Watchdog.\n");
  575. }
  576. #endif
  577. static int __devinit hpwdt_init_one(struct pci_dev *dev,
  578. const struct pci_device_id *ent)
  579. {
  580. int retval;
  581. /*
  582. * Check if we can do NMI sourcing or not
  583. */
  584. hpwdt_check_nmi_sourcing(dev);
  585. /*
  586. * First let's find out if we are on an iLO2+ server. We will
  587. * not run on a legacy ASM box.
  588. * So we only support the G5 ProLiant servers and higher.
  589. */
  590. if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
  591. dev_warn(&dev->dev,
  592. "This server does not have an iLO2+ ASIC.\n");
  593. return -ENODEV;
  594. }
  595. if (pci_enable_device(dev)) {
  596. dev_warn(&dev->dev,
  597. "Not possible to enable PCI Device: 0x%x:0x%x.\n",
  598. ent->vendor, ent->device);
  599. return -ENODEV;
  600. }
  601. pci_mem_addr = pci_iomap(dev, 1, 0x80);
  602. if (!pci_mem_addr) {
  603. dev_warn(&dev->dev,
  604. "Unable to detect the iLO2+ server memory.\n");
  605. retval = -ENOMEM;
  606. goto error_pci_iomap;
  607. }
  608. hpwdt_timer_reg = pci_mem_addr + 0x70;
  609. hpwdt_timer_con = pci_mem_addr + 0x72;
  610. /* Make sure that we have a valid soft_margin */
  611. if (hpwdt_change_timer(soft_margin))
  612. hpwdt_change_timer(DEFAULT_MARGIN);
  613. /*
  614. * We need to map the ROM to get the CRU service.
  615. * For 32 bit Operating Systems we need to go through the 32 Bit
  616. * BIOS Service Directory
  617. * For 64 bit Operating Systems we get that service through SMBIOS.
  618. */
  619. retval = detect_cru_service();
  620. if (retval < 0) {
  621. dev_warn(&dev->dev,
  622. "Unable to detect the %d Bit CRU Service.\n",
  623. HPWDT_ARCH);
  624. goto error_get_cru;
  625. }
  626. /*
  627. * We know this is the only CRU call we need to make so lets keep as
  628. * few instructions as possible once the NMI comes in.
  629. */
  630. cmn_regs.u1.rah = 0x0D;
  631. cmn_regs.u1.ral = 0x02;
  632. /*
  633. * If the priority is set to 1, then we will be put first on the
  634. * die notify list to handle a critical NMI. The default is to
  635. * be last so other users of the NMI signal can function.
  636. */
  637. if (priority)
  638. die_notifier.priority = 0x7FFFFFFF;
  639. retval = register_die_notifier(&die_notifier);
  640. if (retval != 0) {
  641. dev_warn(&dev->dev,
  642. "Unable to register a die notifier (err=%d).\n",
  643. retval);
  644. goto error_die_notifier;
  645. }
  646. retval = misc_register(&hpwdt_miscdev);
  647. if (retval < 0) {
  648. dev_warn(&dev->dev,
  649. "Unable to register miscdev on minor=%d (err=%d).\n",
  650. WATCHDOG_MINOR, retval);
  651. goto error_misc_register;
  652. }
  653. printk(KERN_INFO
  654. "hp Watchdog Timer Driver: %s"
  655. ", timer margin: %d seconds (nowayout=%d)"
  656. ", allow kernel dump: %s (default = 0/OFF)"
  657. ", priority: %s (default = 0/LAST).\n",
  658. HPWDT_VERSION, soft_margin, nowayout,
  659. (allow_kdump == 0) ? "OFF" : "ON",
  660. (priority == 0) ? "LAST" : "FIRST");
  661. return 0;
  662. error_misc_register:
  663. unregister_die_notifier(&die_notifier);
  664. error_die_notifier:
  665. if (cru_rom_addr)
  666. iounmap(cru_rom_addr);
  667. error_get_cru:
  668. pci_iounmap(dev, pci_mem_addr);
  669. error_pci_iomap:
  670. pci_disable_device(dev);
  671. return retval;
  672. }
  673. static void __devexit hpwdt_exit(struct pci_dev *dev)
  674. {
  675. if (!nowayout)
  676. hpwdt_stop();
  677. misc_deregister(&hpwdt_miscdev);
  678. unregister_die_notifier(&die_notifier);
  679. if (cru_rom_addr)
  680. iounmap(cru_rom_addr);
  681. pci_iounmap(dev, pci_mem_addr);
  682. pci_disable_device(dev);
  683. }
  684. static struct pci_driver hpwdt_driver = {
  685. .name = "hpwdt",
  686. .id_table = hpwdt_devices,
  687. .probe = hpwdt_init_one,
  688. .remove = __devexit_p(hpwdt_exit),
  689. };
  690. static void __exit hpwdt_cleanup(void)
  691. {
  692. pci_unregister_driver(&hpwdt_driver);
  693. }
  694. static int __init hpwdt_init(void)
  695. {
  696. return pci_register_driver(&hpwdt_driver);
  697. }
  698. MODULE_AUTHOR("Tom Mingarelli");
  699. MODULE_DESCRIPTION("hp watchdog driver");
  700. MODULE_LICENSE("GPL");
  701. MODULE_VERSION(HPWDT_VERSION);
  702. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  703. module_param(soft_margin, int, 0);
  704. MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
  705. module_param(nowayout, int, 0);
  706. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  707. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  708. module_param(allow_kdump, int, 0);
  709. MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
  710. module_param(priority, int, 0);
  711. MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
  712. " (default = 0/Last)\n");
  713. module_init(hpwdt_init);
  714. module_exit(hpwdt_cleanup);