e1000_main.c 119 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.0.58 4/20/05
  23. * o Accepted ethtool cleanup patch from Stephen Hemminger
  24. * 6.0.44+ 2/15/05
  25. * o applied Anton's patch to resolve tx hang in hardware
  26. * o Applied Andrew Mortons patch - e1000 stops working after resume
  27. */
  28. char e1000_driver_name[] = "e1000";
  29. char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #ifndef CONFIG_E1000_NAPI
  31. #define DRIVERNAPI
  32. #else
  33. #define DRIVERNAPI "-NAPI"
  34. #endif
  35. #define DRV_VERSION "6.0.60-k2"DRIVERNAPI
  36. char e1000_driver_version[] = DRV_VERSION;
  37. char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  38. /* e1000_pci_tbl - PCI Device ID Table
  39. *
  40. * Last entry must be all 0s
  41. *
  42. * Macro expands to...
  43. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  44. */
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  76. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  79. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  83. /* required last entry */
  84. {0,}
  85. };
  86. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  87. int e1000_up(struct e1000_adapter *adapter);
  88. void e1000_down(struct e1000_adapter *adapter);
  89. void e1000_reset(struct e1000_adapter *adapter);
  90. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  91. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  92. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  93. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  94. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  95. int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  96. struct e1000_tx_ring *txdr);
  97. int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  98. struct e1000_rx_ring *rxdr);
  99. void e1000_free_tx_resources(struct e1000_adapter *adapter,
  100. struct e1000_tx_ring *tx_ring);
  101. void e1000_free_rx_resources(struct e1000_adapter *adapter,
  102. struct e1000_rx_ring *rx_ring);
  103. void e1000_update_stats(struct e1000_adapter *adapter);
  104. /* Local Function Prototypes */
  105. static int e1000_init_module(void);
  106. static void e1000_exit_module(void);
  107. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  108. static void __devexit e1000_remove(struct pci_dev *pdev);
  109. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  110. #ifdef CONFIG_E1000_MQ
  111. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  112. #endif
  113. static int e1000_sw_init(struct e1000_adapter *adapter);
  114. static int e1000_open(struct net_device *netdev);
  115. static int e1000_close(struct net_device *netdev);
  116. static void e1000_configure_tx(struct e1000_adapter *adapter);
  117. static void e1000_configure_rx(struct e1000_adapter *adapter);
  118. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  119. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  120. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  121. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  122. struct e1000_tx_ring *tx_ring);
  123. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  124. struct e1000_rx_ring *rx_ring);
  125. static void e1000_set_multi(struct net_device *netdev);
  126. static void e1000_update_phy_info(unsigned long data);
  127. static void e1000_watchdog(unsigned long data);
  128. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  129. static void e1000_82547_tx_fifo_stall(unsigned long data);
  130. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  131. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  132. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  133. static int e1000_set_mac(struct net_device *netdev, void *p);
  134. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  135. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  136. struct e1000_tx_ring *tx_ring);
  137. #ifdef CONFIG_E1000_NAPI
  138. static int e1000_clean(struct net_device *poll_dev, int *budget);
  139. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  140. struct e1000_rx_ring *rx_ring,
  141. int *work_done, int work_to_do);
  142. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  143. struct e1000_rx_ring *rx_ring,
  144. int *work_done, int work_to_do);
  145. #else
  146. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring);
  148. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  149. struct e1000_rx_ring *rx_ring);
  150. #endif
  151. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  152. struct e1000_rx_ring *rx_ring);
  153. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  154. struct e1000_rx_ring *rx_ring);
  155. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  156. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  157. int cmd);
  158. void e1000_set_ethtool_ops(struct net_device *netdev);
  159. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  160. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  161. static void e1000_tx_timeout(struct net_device *dev);
  162. static void e1000_tx_timeout_task(struct net_device *dev);
  163. static void e1000_smartspeed(struct e1000_adapter *adapter);
  164. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  165. struct sk_buff *skb);
  166. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  167. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  168. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  169. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  170. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  171. #ifdef CONFIG_PM
  172. static int e1000_resume(struct pci_dev *pdev);
  173. #endif
  174. #ifdef CONFIG_NET_POLL_CONTROLLER
  175. /* for netdump / net console */
  176. static void e1000_netpoll (struct net_device *netdev);
  177. #endif
  178. #ifdef CONFIG_E1000_MQ
  179. /* for multiple Rx queues */
  180. void e1000_rx_schedule(void *data);
  181. #endif
  182. /* Exported from other modules */
  183. extern void e1000_check_options(struct e1000_adapter *adapter);
  184. static struct pci_driver e1000_driver = {
  185. .name = e1000_driver_name,
  186. .id_table = e1000_pci_tbl,
  187. .probe = e1000_probe,
  188. .remove = __devexit_p(e1000_remove),
  189. /* Power Managment Hooks */
  190. #ifdef CONFIG_PM
  191. .suspend = e1000_suspend,
  192. .resume = e1000_resume
  193. #endif
  194. };
  195. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  196. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  197. MODULE_LICENSE("GPL");
  198. MODULE_VERSION(DRV_VERSION);
  199. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  200. module_param(debug, int, 0);
  201. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  202. /**
  203. * e1000_init_module - Driver Registration Routine
  204. *
  205. * e1000_init_module is the first routine called when the driver is
  206. * loaded. All it does is register with the PCI subsystem.
  207. **/
  208. static int __init
  209. e1000_init_module(void)
  210. {
  211. int ret;
  212. printk(KERN_INFO "%s - version %s\n",
  213. e1000_driver_string, e1000_driver_version);
  214. printk(KERN_INFO "%s\n", e1000_copyright);
  215. ret = pci_module_init(&e1000_driver);
  216. return ret;
  217. }
  218. module_init(e1000_init_module);
  219. /**
  220. * e1000_exit_module - Driver Exit Cleanup Routine
  221. *
  222. * e1000_exit_module is called just before the driver is removed
  223. * from memory.
  224. **/
  225. static void __exit
  226. e1000_exit_module(void)
  227. {
  228. pci_unregister_driver(&e1000_driver);
  229. }
  230. module_exit(e1000_exit_module);
  231. /**
  232. * e1000_irq_disable - Mask off interrupt generation on the NIC
  233. * @adapter: board private structure
  234. **/
  235. static inline void
  236. e1000_irq_disable(struct e1000_adapter *adapter)
  237. {
  238. atomic_inc(&adapter->irq_sem);
  239. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  240. E1000_WRITE_FLUSH(&adapter->hw);
  241. synchronize_irq(adapter->pdev->irq);
  242. }
  243. /**
  244. * e1000_irq_enable - Enable default interrupt generation settings
  245. * @adapter: board private structure
  246. **/
  247. static inline void
  248. e1000_irq_enable(struct e1000_adapter *adapter)
  249. {
  250. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  251. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  252. E1000_WRITE_FLUSH(&adapter->hw);
  253. }
  254. }
  255. void
  256. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  257. {
  258. struct net_device *netdev = adapter->netdev;
  259. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  260. uint16_t old_vid = adapter->mng_vlan_id;
  261. if(adapter->vlgrp) {
  262. if(!adapter->vlgrp->vlan_devices[vid]) {
  263. if(adapter->hw.mng_cookie.status &
  264. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  265. e1000_vlan_rx_add_vid(netdev, vid);
  266. adapter->mng_vlan_id = vid;
  267. } else
  268. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  269. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  270. (vid != old_vid) &&
  271. !adapter->vlgrp->vlan_devices[old_vid])
  272. e1000_vlan_rx_kill_vid(netdev, old_vid);
  273. }
  274. }
  275. }
  276. int
  277. e1000_up(struct e1000_adapter *adapter)
  278. {
  279. struct net_device *netdev = adapter->netdev;
  280. int i, err;
  281. /* hardware has been reset, we need to reload some things */
  282. /* Reset the PHY if it was previously powered down */
  283. if(adapter->hw.media_type == e1000_media_type_copper) {
  284. uint16_t mii_reg;
  285. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  286. if(mii_reg & MII_CR_POWER_DOWN)
  287. e1000_phy_reset(&adapter->hw);
  288. }
  289. e1000_set_multi(netdev);
  290. e1000_restore_vlan(adapter);
  291. e1000_configure_tx(adapter);
  292. e1000_setup_rctl(adapter);
  293. e1000_configure_rx(adapter);
  294. for (i = 0; i < adapter->num_queues; i++)
  295. adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
  296. #ifdef CONFIG_PCI_MSI
  297. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  298. adapter->have_msi = TRUE;
  299. if((err = pci_enable_msi(adapter->pdev))) {
  300. DPRINTK(PROBE, ERR,
  301. "Unable to allocate MSI interrupt Error: %d\n", err);
  302. adapter->have_msi = FALSE;
  303. }
  304. }
  305. #endif
  306. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  307. SA_SHIRQ | SA_SAMPLE_RANDOM,
  308. netdev->name, netdev))) {
  309. DPRINTK(PROBE, ERR,
  310. "Unable to allocate interrupt Error: %d\n", err);
  311. return err;
  312. }
  313. mod_timer(&adapter->watchdog_timer, jiffies);
  314. #ifdef CONFIG_E1000_NAPI
  315. netif_poll_enable(netdev);
  316. #endif
  317. e1000_irq_enable(adapter);
  318. return 0;
  319. }
  320. void
  321. e1000_down(struct e1000_adapter *adapter)
  322. {
  323. struct net_device *netdev = adapter->netdev;
  324. e1000_irq_disable(adapter);
  325. #ifdef CONFIG_E1000_MQ
  326. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  327. #endif
  328. free_irq(adapter->pdev->irq, netdev);
  329. #ifdef CONFIG_PCI_MSI
  330. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  331. adapter->have_msi == TRUE)
  332. pci_disable_msi(adapter->pdev);
  333. #endif
  334. del_timer_sync(&adapter->tx_fifo_stall_timer);
  335. del_timer_sync(&adapter->watchdog_timer);
  336. del_timer_sync(&adapter->phy_info_timer);
  337. #ifdef CONFIG_E1000_NAPI
  338. netif_poll_disable(netdev);
  339. #endif
  340. adapter->link_speed = 0;
  341. adapter->link_duplex = 0;
  342. netif_carrier_off(netdev);
  343. netif_stop_queue(netdev);
  344. e1000_reset(adapter);
  345. e1000_clean_all_tx_rings(adapter);
  346. e1000_clean_all_rx_rings(adapter);
  347. /* If WoL is not enabled
  348. * and management mode is not IAMT
  349. * Power down the PHY so no link is implied when interface is down */
  350. if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  351. adapter->hw.media_type == e1000_media_type_copper &&
  352. !e1000_check_mng_mode(&adapter->hw) &&
  353. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
  354. uint16_t mii_reg;
  355. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  356. mii_reg |= MII_CR_POWER_DOWN;
  357. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  358. mdelay(1);
  359. }
  360. }
  361. void
  362. e1000_reset(struct e1000_adapter *adapter)
  363. {
  364. struct net_device *netdev = adapter->netdev;
  365. uint32_t pba, manc;
  366. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  367. uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
  368. /* Repartition Pba for greater than 9k mtu
  369. * To take effect CTRL.RST is required.
  370. */
  371. switch (adapter->hw.mac_type) {
  372. case e1000_82547:
  373. case e1000_82547_rev_2:
  374. pba = E1000_PBA_30K;
  375. break;
  376. case e1000_82571:
  377. case e1000_82572:
  378. pba = E1000_PBA_38K;
  379. break;
  380. case e1000_82573:
  381. pba = E1000_PBA_12K;
  382. break;
  383. default:
  384. pba = E1000_PBA_48K;
  385. break;
  386. }
  387. if((adapter->hw.mac_type != e1000_82573) &&
  388. (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) {
  389. pba -= 8; /* allocate more FIFO for Tx */
  390. /* send an XOFF when there is enough space in the
  391. * Rx FIFO to hold one extra full size Rx packet
  392. */
  393. fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
  394. ETHERNET_FCS_SIZE + 1;
  395. fc_low_water_mark = fc_high_water_mark + 8;
  396. }
  397. if(adapter->hw.mac_type == e1000_82547) {
  398. adapter->tx_fifo_head = 0;
  399. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  400. adapter->tx_fifo_size =
  401. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  402. atomic_set(&adapter->tx_fifo_stall, 0);
  403. }
  404. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  405. /* flow control settings */
  406. adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
  407. fc_high_water_mark;
  408. adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
  409. fc_low_water_mark;
  410. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  411. adapter->hw.fc_send_xon = 1;
  412. adapter->hw.fc = adapter->hw.original_fc;
  413. /* Allow time for pending master requests to run */
  414. e1000_reset_hw(&adapter->hw);
  415. if(adapter->hw.mac_type >= e1000_82544)
  416. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  417. if(e1000_init_hw(&adapter->hw))
  418. DPRINTK(PROBE, ERR, "Hardware Error\n");
  419. e1000_update_mng_vlan(adapter);
  420. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  421. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  422. e1000_reset_adaptive(&adapter->hw);
  423. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  424. if (adapter->en_mng_pt) {
  425. manc = E1000_READ_REG(&adapter->hw, MANC);
  426. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  427. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  428. }
  429. }
  430. /**
  431. * e1000_probe - Device Initialization Routine
  432. * @pdev: PCI device information struct
  433. * @ent: entry in e1000_pci_tbl
  434. *
  435. * Returns 0 on success, negative on failure
  436. *
  437. * e1000_probe initializes an adapter identified by a pci_dev structure.
  438. * The OS initialization, configuring of the adapter private structure,
  439. * and a hardware reset occur.
  440. **/
  441. static int __devinit
  442. e1000_probe(struct pci_dev *pdev,
  443. const struct pci_device_id *ent)
  444. {
  445. struct net_device *netdev;
  446. struct e1000_adapter *adapter;
  447. unsigned long mmio_start, mmio_len;
  448. uint32_t ctrl_ext;
  449. uint32_t swsm;
  450. static int cards_found = 0;
  451. int i, err, pci_using_dac;
  452. uint16_t eeprom_data;
  453. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  454. if((err = pci_enable_device(pdev)))
  455. return err;
  456. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  457. pci_using_dac = 1;
  458. } else {
  459. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  460. E1000_ERR("No usable DMA configuration, aborting\n");
  461. return err;
  462. }
  463. pci_using_dac = 0;
  464. }
  465. if((err = pci_request_regions(pdev, e1000_driver_name)))
  466. return err;
  467. pci_set_master(pdev);
  468. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  469. if(!netdev) {
  470. err = -ENOMEM;
  471. goto err_alloc_etherdev;
  472. }
  473. SET_MODULE_OWNER(netdev);
  474. SET_NETDEV_DEV(netdev, &pdev->dev);
  475. pci_set_drvdata(pdev, netdev);
  476. adapter = netdev_priv(netdev);
  477. adapter->netdev = netdev;
  478. adapter->pdev = pdev;
  479. adapter->hw.back = adapter;
  480. adapter->msg_enable = (1 << debug) - 1;
  481. mmio_start = pci_resource_start(pdev, BAR_0);
  482. mmio_len = pci_resource_len(pdev, BAR_0);
  483. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  484. if(!adapter->hw.hw_addr) {
  485. err = -EIO;
  486. goto err_ioremap;
  487. }
  488. for(i = BAR_1; i <= BAR_5; i++) {
  489. if(pci_resource_len(pdev, i) == 0)
  490. continue;
  491. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  492. adapter->hw.io_base = pci_resource_start(pdev, i);
  493. break;
  494. }
  495. }
  496. netdev->open = &e1000_open;
  497. netdev->stop = &e1000_close;
  498. netdev->hard_start_xmit = &e1000_xmit_frame;
  499. netdev->get_stats = &e1000_get_stats;
  500. netdev->set_multicast_list = &e1000_set_multi;
  501. netdev->set_mac_address = &e1000_set_mac;
  502. netdev->change_mtu = &e1000_change_mtu;
  503. netdev->do_ioctl = &e1000_ioctl;
  504. e1000_set_ethtool_ops(netdev);
  505. netdev->tx_timeout = &e1000_tx_timeout;
  506. netdev->watchdog_timeo = 5 * HZ;
  507. #ifdef CONFIG_E1000_NAPI
  508. netdev->poll = &e1000_clean;
  509. netdev->weight = 64;
  510. #endif
  511. netdev->vlan_rx_register = e1000_vlan_rx_register;
  512. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  513. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  514. #ifdef CONFIG_NET_POLL_CONTROLLER
  515. netdev->poll_controller = e1000_netpoll;
  516. #endif
  517. strcpy(netdev->name, pci_name(pdev));
  518. netdev->mem_start = mmio_start;
  519. netdev->mem_end = mmio_start + mmio_len;
  520. netdev->base_addr = adapter->hw.io_base;
  521. adapter->bd_number = cards_found;
  522. /* setup the private structure */
  523. if((err = e1000_sw_init(adapter)))
  524. goto err_sw_init;
  525. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  526. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  527. if(adapter->hw.mac_type >= e1000_82543) {
  528. netdev->features = NETIF_F_SG |
  529. NETIF_F_HW_CSUM |
  530. NETIF_F_HW_VLAN_TX |
  531. NETIF_F_HW_VLAN_RX |
  532. NETIF_F_HW_VLAN_FILTER;
  533. }
  534. #ifdef NETIF_F_TSO
  535. if((adapter->hw.mac_type >= e1000_82544) &&
  536. (adapter->hw.mac_type != e1000_82547))
  537. netdev->features |= NETIF_F_TSO;
  538. #ifdef NETIF_F_TSO_IPV6
  539. if(adapter->hw.mac_type > e1000_82547_rev_2)
  540. netdev->features |= NETIF_F_TSO_IPV6;
  541. #endif
  542. #endif
  543. if(pci_using_dac)
  544. netdev->features |= NETIF_F_HIGHDMA;
  545. /* hard_start_xmit is safe against parallel locking */
  546. netdev->features |= NETIF_F_LLTX;
  547. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  548. /* before reading the EEPROM, reset the controller to
  549. * put the device in a known good starting state */
  550. e1000_reset_hw(&adapter->hw);
  551. /* make sure the EEPROM is good */
  552. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  553. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  554. err = -EIO;
  555. goto err_eeprom;
  556. }
  557. /* copy the MAC address out of the EEPROM */
  558. if(e1000_read_mac_addr(&adapter->hw))
  559. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  560. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  561. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  562. if(!is_valid_ether_addr(netdev->perm_addr)) {
  563. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  564. err = -EIO;
  565. goto err_eeprom;
  566. }
  567. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  568. e1000_get_bus_info(&adapter->hw);
  569. init_timer(&adapter->tx_fifo_stall_timer);
  570. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  571. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  572. init_timer(&adapter->watchdog_timer);
  573. adapter->watchdog_timer.function = &e1000_watchdog;
  574. adapter->watchdog_timer.data = (unsigned long) adapter;
  575. INIT_WORK(&adapter->watchdog_task,
  576. (void (*)(void *))e1000_watchdog_task, adapter);
  577. init_timer(&adapter->phy_info_timer);
  578. adapter->phy_info_timer.function = &e1000_update_phy_info;
  579. adapter->phy_info_timer.data = (unsigned long) adapter;
  580. INIT_WORK(&adapter->tx_timeout_task,
  581. (void (*)(void *))e1000_tx_timeout_task, netdev);
  582. /* we're going to reset, so assume we have no link for now */
  583. netif_carrier_off(netdev);
  584. netif_stop_queue(netdev);
  585. e1000_check_options(adapter);
  586. /* Initial Wake on LAN setting
  587. * If APM wake is enabled in the EEPROM,
  588. * enable the ACPI Magic Packet filter
  589. */
  590. switch(adapter->hw.mac_type) {
  591. case e1000_82542_rev2_0:
  592. case e1000_82542_rev2_1:
  593. case e1000_82543:
  594. break;
  595. case e1000_82544:
  596. e1000_read_eeprom(&adapter->hw,
  597. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  598. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  599. break;
  600. case e1000_82546:
  601. case e1000_82546_rev_3:
  602. if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
  603. && (adapter->hw.media_type == e1000_media_type_copper)) {
  604. e1000_read_eeprom(&adapter->hw,
  605. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  606. break;
  607. }
  608. /* Fall Through */
  609. default:
  610. e1000_read_eeprom(&adapter->hw,
  611. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  612. break;
  613. }
  614. if(eeprom_data & eeprom_apme_mask)
  615. adapter->wol |= E1000_WUFC_MAG;
  616. /* reset the hardware with the new settings */
  617. e1000_reset(adapter);
  618. /* Let firmware know the driver has taken over */
  619. switch(adapter->hw.mac_type) {
  620. case e1000_82571:
  621. case e1000_82572:
  622. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  623. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  624. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  625. break;
  626. case e1000_82573:
  627. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  628. E1000_WRITE_REG(&adapter->hw, SWSM,
  629. swsm | E1000_SWSM_DRV_LOAD);
  630. break;
  631. default:
  632. break;
  633. }
  634. strcpy(netdev->name, "eth%d");
  635. if((err = register_netdev(netdev)))
  636. goto err_register;
  637. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  638. cards_found++;
  639. return 0;
  640. err_register:
  641. err_sw_init:
  642. err_eeprom:
  643. iounmap(adapter->hw.hw_addr);
  644. err_ioremap:
  645. free_netdev(netdev);
  646. err_alloc_etherdev:
  647. pci_release_regions(pdev);
  648. return err;
  649. }
  650. /**
  651. * e1000_remove - Device Removal Routine
  652. * @pdev: PCI device information struct
  653. *
  654. * e1000_remove is called by the PCI subsystem to alert the driver
  655. * that it should release a PCI device. The could be caused by a
  656. * Hot-Plug event, or because the driver is going to be removed from
  657. * memory.
  658. **/
  659. static void __devexit
  660. e1000_remove(struct pci_dev *pdev)
  661. {
  662. struct net_device *netdev = pci_get_drvdata(pdev);
  663. struct e1000_adapter *adapter = netdev_priv(netdev);
  664. uint32_t ctrl_ext;
  665. uint32_t manc, swsm;
  666. flush_scheduled_work();
  667. #ifdef CONFIG_E1000_NAPI
  668. int i;
  669. #endif
  670. if(adapter->hw.mac_type >= e1000_82540 &&
  671. adapter->hw.media_type == e1000_media_type_copper) {
  672. manc = E1000_READ_REG(&adapter->hw, MANC);
  673. if(manc & E1000_MANC_SMBUS_EN) {
  674. manc |= E1000_MANC_ARP_EN;
  675. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  676. }
  677. }
  678. switch(adapter->hw.mac_type) {
  679. case e1000_82571:
  680. case e1000_82572:
  681. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  682. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  683. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  684. break;
  685. case e1000_82573:
  686. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  687. E1000_WRITE_REG(&adapter->hw, SWSM,
  688. swsm & ~E1000_SWSM_DRV_LOAD);
  689. break;
  690. default:
  691. break;
  692. }
  693. unregister_netdev(netdev);
  694. #ifdef CONFIG_E1000_NAPI
  695. for (i = 0; i < adapter->num_queues; i++)
  696. __dev_put(&adapter->polling_netdev[i]);
  697. #endif
  698. if(!e1000_check_phy_reset_block(&adapter->hw))
  699. e1000_phy_hw_reset(&adapter->hw);
  700. kfree(adapter->tx_ring);
  701. kfree(adapter->rx_ring);
  702. #ifdef CONFIG_E1000_NAPI
  703. kfree(adapter->polling_netdev);
  704. #endif
  705. iounmap(adapter->hw.hw_addr);
  706. pci_release_regions(pdev);
  707. #ifdef CONFIG_E1000_MQ
  708. free_percpu(adapter->cpu_netdev);
  709. free_percpu(adapter->cpu_tx_ring);
  710. #endif
  711. free_netdev(netdev);
  712. pci_disable_device(pdev);
  713. }
  714. /**
  715. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  716. * @adapter: board private structure to initialize
  717. *
  718. * e1000_sw_init initializes the Adapter private data structure.
  719. * Fields are initialized based on PCI device information and
  720. * OS network device settings (MTU size).
  721. **/
  722. static int __devinit
  723. e1000_sw_init(struct e1000_adapter *adapter)
  724. {
  725. struct e1000_hw *hw = &adapter->hw;
  726. struct net_device *netdev = adapter->netdev;
  727. struct pci_dev *pdev = adapter->pdev;
  728. #ifdef CONFIG_E1000_NAPI
  729. int i;
  730. #endif
  731. /* PCI config space info */
  732. hw->vendor_id = pdev->vendor;
  733. hw->device_id = pdev->device;
  734. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  735. hw->subsystem_id = pdev->subsystem_device;
  736. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  737. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  738. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  739. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  740. hw->max_frame_size = netdev->mtu +
  741. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  742. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  743. /* identify the MAC */
  744. if(e1000_set_mac_type(hw)) {
  745. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  746. return -EIO;
  747. }
  748. /* initialize eeprom parameters */
  749. if(e1000_init_eeprom_params(hw)) {
  750. E1000_ERR("EEPROM initialization failed\n");
  751. return -EIO;
  752. }
  753. switch(hw->mac_type) {
  754. default:
  755. break;
  756. case e1000_82541:
  757. case e1000_82547:
  758. case e1000_82541_rev_2:
  759. case e1000_82547_rev_2:
  760. hw->phy_init_script = 1;
  761. break;
  762. }
  763. e1000_set_media_type(hw);
  764. hw->wait_autoneg_complete = FALSE;
  765. hw->tbi_compatibility_en = TRUE;
  766. hw->adaptive_ifs = TRUE;
  767. /* Copper options */
  768. if(hw->media_type == e1000_media_type_copper) {
  769. hw->mdix = AUTO_ALL_MODES;
  770. hw->disable_polarity_correction = FALSE;
  771. hw->master_slave = E1000_MASTER_SLAVE;
  772. }
  773. #ifdef CONFIG_E1000_MQ
  774. /* Number of supported queues */
  775. switch (hw->mac_type) {
  776. case e1000_82571:
  777. case e1000_82572:
  778. adapter->num_queues = 2;
  779. break;
  780. default:
  781. adapter->num_queues = 1;
  782. break;
  783. }
  784. adapter->num_queues = min(adapter->num_queues, num_online_cpus());
  785. #else
  786. adapter->num_queues = 1;
  787. #endif
  788. if (e1000_alloc_queues(adapter)) {
  789. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  790. return -ENOMEM;
  791. }
  792. #ifdef CONFIG_E1000_NAPI
  793. for (i = 0; i < adapter->num_queues; i++) {
  794. adapter->polling_netdev[i].priv = adapter;
  795. adapter->polling_netdev[i].poll = &e1000_clean;
  796. adapter->polling_netdev[i].weight = 64;
  797. dev_hold(&adapter->polling_netdev[i]);
  798. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  799. }
  800. #endif
  801. #ifdef CONFIG_E1000_MQ
  802. e1000_setup_queue_mapping(adapter);
  803. #endif
  804. atomic_set(&adapter->irq_sem, 1);
  805. spin_lock_init(&adapter->stats_lock);
  806. return 0;
  807. }
  808. /**
  809. * e1000_alloc_queues - Allocate memory for all rings
  810. * @adapter: board private structure to initialize
  811. *
  812. * We allocate one ring per queue at run-time since we don't know the
  813. * number of queues at compile-time. The polling_netdev array is
  814. * intended for Multiqueue, but should work fine with a single queue.
  815. **/
  816. static int __devinit
  817. e1000_alloc_queues(struct e1000_adapter *adapter)
  818. {
  819. int size;
  820. size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
  821. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  822. if (!adapter->tx_ring)
  823. return -ENOMEM;
  824. memset(adapter->tx_ring, 0, size);
  825. size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
  826. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  827. if (!adapter->rx_ring) {
  828. kfree(adapter->tx_ring);
  829. return -ENOMEM;
  830. }
  831. memset(adapter->rx_ring, 0, size);
  832. #ifdef CONFIG_E1000_NAPI
  833. size = sizeof(struct net_device) * adapter->num_queues;
  834. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  835. if (!adapter->polling_netdev) {
  836. kfree(adapter->tx_ring);
  837. kfree(adapter->rx_ring);
  838. return -ENOMEM;
  839. }
  840. memset(adapter->polling_netdev, 0, size);
  841. #endif
  842. return E1000_SUCCESS;
  843. }
  844. #ifdef CONFIG_E1000_MQ
  845. static void __devinit
  846. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  847. {
  848. int i, cpu;
  849. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  850. adapter->rx_sched_call_data.info = adapter->netdev;
  851. cpus_clear(adapter->rx_sched_call_data.cpumask);
  852. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  853. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  854. lock_cpu_hotplug();
  855. i = 0;
  856. for_each_online_cpu(cpu) {
  857. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_queues];
  858. /* This is incomplete because we'd like to assign separate
  859. * physical cpus to these netdev polling structures and
  860. * avoid saturating a subset of cpus.
  861. */
  862. if (i < adapter->num_queues) {
  863. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  864. adapter->cpu_for_queue[i] = cpu;
  865. } else
  866. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  867. i++;
  868. }
  869. unlock_cpu_hotplug();
  870. }
  871. #endif
  872. /**
  873. * e1000_open - Called when a network interface is made active
  874. * @netdev: network interface device structure
  875. *
  876. * Returns 0 on success, negative value on failure
  877. *
  878. * The open entry point is called when a network interface is made
  879. * active by the system (IFF_UP). At this point all resources needed
  880. * for transmit and receive operations are allocated, the interrupt
  881. * handler is registered with the OS, the watchdog timer is started,
  882. * and the stack is notified that the interface is ready.
  883. **/
  884. static int
  885. e1000_open(struct net_device *netdev)
  886. {
  887. struct e1000_adapter *adapter = netdev_priv(netdev);
  888. int err;
  889. /* allocate transmit descriptors */
  890. if ((err = e1000_setup_all_tx_resources(adapter)))
  891. goto err_setup_tx;
  892. /* allocate receive descriptors */
  893. if ((err = e1000_setup_all_rx_resources(adapter)))
  894. goto err_setup_rx;
  895. if((err = e1000_up(adapter)))
  896. goto err_up;
  897. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  898. if((adapter->hw.mng_cookie.status &
  899. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  900. e1000_update_mng_vlan(adapter);
  901. }
  902. return E1000_SUCCESS;
  903. err_up:
  904. e1000_free_all_rx_resources(adapter);
  905. err_setup_rx:
  906. e1000_free_all_tx_resources(adapter);
  907. err_setup_tx:
  908. e1000_reset(adapter);
  909. return err;
  910. }
  911. /**
  912. * e1000_close - Disables a network interface
  913. * @netdev: network interface device structure
  914. *
  915. * Returns 0, this is not allowed to fail
  916. *
  917. * The close entry point is called when an interface is de-activated
  918. * by the OS. The hardware is still under the drivers control, but
  919. * needs to be disabled. A global MAC reset is issued to stop the
  920. * hardware, and all transmit and receive resources are freed.
  921. **/
  922. static int
  923. e1000_close(struct net_device *netdev)
  924. {
  925. struct e1000_adapter *adapter = netdev_priv(netdev);
  926. e1000_down(adapter);
  927. e1000_free_all_tx_resources(adapter);
  928. e1000_free_all_rx_resources(adapter);
  929. if((adapter->hw.mng_cookie.status &
  930. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  931. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  932. }
  933. return 0;
  934. }
  935. /**
  936. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  937. * @adapter: address of board private structure
  938. * @start: address of beginning of memory
  939. * @len: length of memory
  940. **/
  941. static inline boolean_t
  942. e1000_check_64k_bound(struct e1000_adapter *adapter,
  943. void *start, unsigned long len)
  944. {
  945. unsigned long begin = (unsigned long) start;
  946. unsigned long end = begin + len;
  947. /* First rev 82545 and 82546 need to not allow any memory
  948. * write location to cross 64k boundary due to errata 23 */
  949. if (adapter->hw.mac_type == e1000_82545 ||
  950. adapter->hw.mac_type == e1000_82546) {
  951. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  952. }
  953. return TRUE;
  954. }
  955. /**
  956. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  957. * @adapter: board private structure
  958. * @txdr: tx descriptor ring (for a specific queue) to setup
  959. *
  960. * Return 0 on success, negative on failure
  961. **/
  962. int
  963. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  964. struct e1000_tx_ring *txdr)
  965. {
  966. struct pci_dev *pdev = adapter->pdev;
  967. int size;
  968. size = sizeof(struct e1000_buffer) * txdr->count;
  969. txdr->buffer_info = vmalloc(size);
  970. if(!txdr->buffer_info) {
  971. DPRINTK(PROBE, ERR,
  972. "Unable to allocate memory for the transmit descriptor ring\n");
  973. return -ENOMEM;
  974. }
  975. memset(txdr->buffer_info, 0, size);
  976. /* round up to nearest 4K */
  977. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  978. E1000_ROUNDUP(txdr->size, 4096);
  979. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  980. if(!txdr->desc) {
  981. setup_tx_desc_die:
  982. vfree(txdr->buffer_info);
  983. DPRINTK(PROBE, ERR,
  984. "Unable to allocate memory for the transmit descriptor ring\n");
  985. return -ENOMEM;
  986. }
  987. /* Fix for errata 23, can't cross 64kB boundary */
  988. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  989. void *olddesc = txdr->desc;
  990. dma_addr_t olddma = txdr->dma;
  991. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  992. "at %p\n", txdr->size, txdr->desc);
  993. /* Try again, without freeing the previous */
  994. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  995. if(!txdr->desc) {
  996. /* Failed allocation, critical failure */
  997. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  998. goto setup_tx_desc_die;
  999. }
  1000. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1001. /* give up */
  1002. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1003. txdr->dma);
  1004. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1005. DPRINTK(PROBE, ERR,
  1006. "Unable to allocate aligned memory "
  1007. "for the transmit descriptor ring\n");
  1008. vfree(txdr->buffer_info);
  1009. return -ENOMEM;
  1010. } else {
  1011. /* Free old allocation, new allocation was successful */
  1012. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1013. }
  1014. }
  1015. memset(txdr->desc, 0, txdr->size);
  1016. txdr->next_to_use = 0;
  1017. txdr->next_to_clean = 0;
  1018. return 0;
  1019. }
  1020. /**
  1021. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1022. * (Descriptors) for all queues
  1023. * @adapter: board private structure
  1024. *
  1025. * If this function returns with an error, then it's possible one or
  1026. * more of the rings is populated (while the rest are not). It is the
  1027. * callers duty to clean those orphaned rings.
  1028. *
  1029. * Return 0 on success, negative on failure
  1030. **/
  1031. int
  1032. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1033. {
  1034. int i, err = 0;
  1035. for (i = 0; i < adapter->num_queues; i++) {
  1036. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1037. if (err) {
  1038. DPRINTK(PROBE, ERR,
  1039. "Allocation for Tx Queue %u failed\n", i);
  1040. break;
  1041. }
  1042. }
  1043. return err;
  1044. }
  1045. /**
  1046. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1047. * @adapter: board private structure
  1048. *
  1049. * Configure the Tx unit of the MAC after a reset.
  1050. **/
  1051. static void
  1052. e1000_configure_tx(struct e1000_adapter *adapter)
  1053. {
  1054. uint64_t tdba;
  1055. struct e1000_hw *hw = &adapter->hw;
  1056. uint32_t tdlen, tctl, tipg, tarc;
  1057. /* Setup the HW Tx Head and Tail descriptor pointers */
  1058. switch (adapter->num_queues) {
  1059. case 2:
  1060. tdba = adapter->tx_ring[1].dma;
  1061. tdlen = adapter->tx_ring[1].count *
  1062. sizeof(struct e1000_tx_desc);
  1063. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1064. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1065. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1066. E1000_WRITE_REG(hw, TDH1, 0);
  1067. E1000_WRITE_REG(hw, TDT1, 0);
  1068. adapter->tx_ring[1].tdh = E1000_TDH1;
  1069. adapter->tx_ring[1].tdt = E1000_TDT1;
  1070. /* Fall Through */
  1071. case 1:
  1072. default:
  1073. tdba = adapter->tx_ring[0].dma;
  1074. tdlen = adapter->tx_ring[0].count *
  1075. sizeof(struct e1000_tx_desc);
  1076. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1077. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1078. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1079. E1000_WRITE_REG(hw, TDH, 0);
  1080. E1000_WRITE_REG(hw, TDT, 0);
  1081. adapter->tx_ring[0].tdh = E1000_TDH;
  1082. adapter->tx_ring[0].tdt = E1000_TDT;
  1083. break;
  1084. }
  1085. /* Set the default values for the Tx Inter Packet Gap timer */
  1086. switch (hw->mac_type) {
  1087. case e1000_82542_rev2_0:
  1088. case e1000_82542_rev2_1:
  1089. tipg = DEFAULT_82542_TIPG_IPGT;
  1090. tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  1091. tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  1092. break;
  1093. default:
  1094. if (hw->media_type == e1000_media_type_fiber ||
  1095. hw->media_type == e1000_media_type_internal_serdes)
  1096. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1097. else
  1098. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1099. tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
  1100. tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
  1101. }
  1102. E1000_WRITE_REG(hw, TIPG, tipg);
  1103. /* Set the Tx Interrupt Delay register */
  1104. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1105. if (hw->mac_type >= e1000_82540)
  1106. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1107. /* Program the Transmit Control Register */
  1108. tctl = E1000_READ_REG(hw, TCTL);
  1109. tctl &= ~E1000_TCTL_CT;
  1110. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1111. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1112. E1000_WRITE_REG(hw, TCTL, tctl);
  1113. e1000_config_collision_dist(hw);
  1114. /* Setup Transmit Descriptor Settings for eop descriptor */
  1115. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1116. E1000_TXD_CMD_IFCS;
  1117. if (hw->mac_type < e1000_82543)
  1118. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1119. else
  1120. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1121. /* Cache if we're 82544 running in PCI-X because we'll
  1122. * need this to apply a workaround later in the send path. */
  1123. if (hw->mac_type == e1000_82544 &&
  1124. hw->bus_type == e1000_bus_type_pcix)
  1125. adapter->pcix_82544 = 1;
  1126. }
  1127. /**
  1128. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1129. * @adapter: board private structure
  1130. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1131. *
  1132. * Returns 0 on success, negative on failure
  1133. **/
  1134. int
  1135. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1136. struct e1000_rx_ring *rxdr)
  1137. {
  1138. struct pci_dev *pdev = adapter->pdev;
  1139. int size, desc_len;
  1140. size = sizeof(struct e1000_buffer) * rxdr->count;
  1141. rxdr->buffer_info = vmalloc(size);
  1142. if (!rxdr->buffer_info) {
  1143. DPRINTK(PROBE, ERR,
  1144. "Unable to allocate memory for the receive descriptor ring\n");
  1145. return -ENOMEM;
  1146. }
  1147. memset(rxdr->buffer_info, 0, size);
  1148. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1149. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1150. if(!rxdr->ps_page) {
  1151. vfree(rxdr->buffer_info);
  1152. DPRINTK(PROBE, ERR,
  1153. "Unable to allocate memory for the receive descriptor ring\n");
  1154. return -ENOMEM;
  1155. }
  1156. memset(rxdr->ps_page, 0, size);
  1157. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1158. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1159. if(!rxdr->ps_page_dma) {
  1160. vfree(rxdr->buffer_info);
  1161. kfree(rxdr->ps_page);
  1162. DPRINTK(PROBE, ERR,
  1163. "Unable to allocate memory for the receive descriptor ring\n");
  1164. return -ENOMEM;
  1165. }
  1166. memset(rxdr->ps_page_dma, 0, size);
  1167. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  1168. desc_len = sizeof(struct e1000_rx_desc);
  1169. else
  1170. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1171. /* Round up to nearest 4K */
  1172. rxdr->size = rxdr->count * desc_len;
  1173. E1000_ROUNDUP(rxdr->size, 4096);
  1174. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1175. if (!rxdr->desc) {
  1176. DPRINTK(PROBE, ERR,
  1177. "Unable to allocate memory for the receive descriptor ring\n");
  1178. setup_rx_desc_die:
  1179. vfree(rxdr->buffer_info);
  1180. kfree(rxdr->ps_page);
  1181. kfree(rxdr->ps_page_dma);
  1182. return -ENOMEM;
  1183. }
  1184. /* Fix for errata 23, can't cross 64kB boundary */
  1185. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1186. void *olddesc = rxdr->desc;
  1187. dma_addr_t olddma = rxdr->dma;
  1188. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1189. "at %p\n", rxdr->size, rxdr->desc);
  1190. /* Try again, without freeing the previous */
  1191. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1192. /* Failed allocation, critical failure */
  1193. if (!rxdr->desc) {
  1194. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1195. DPRINTK(PROBE, ERR,
  1196. "Unable to allocate memory "
  1197. "for the receive descriptor ring\n");
  1198. goto setup_rx_desc_die;
  1199. }
  1200. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1201. /* give up */
  1202. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1203. rxdr->dma);
  1204. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1205. DPRINTK(PROBE, ERR,
  1206. "Unable to allocate aligned memory "
  1207. "for the receive descriptor ring\n");
  1208. goto setup_rx_desc_die;
  1209. } else {
  1210. /* Free old allocation, new allocation was successful */
  1211. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1212. }
  1213. }
  1214. memset(rxdr->desc, 0, rxdr->size);
  1215. rxdr->next_to_clean = 0;
  1216. rxdr->next_to_use = 0;
  1217. return 0;
  1218. }
  1219. /**
  1220. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1221. * (Descriptors) for all queues
  1222. * @adapter: board private structure
  1223. *
  1224. * If this function returns with an error, then it's possible one or
  1225. * more of the rings is populated (while the rest are not). It is the
  1226. * callers duty to clean those orphaned rings.
  1227. *
  1228. * Return 0 on success, negative on failure
  1229. **/
  1230. int
  1231. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1232. {
  1233. int i, err = 0;
  1234. for (i = 0; i < adapter->num_queues; i++) {
  1235. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1236. if (err) {
  1237. DPRINTK(PROBE, ERR,
  1238. "Allocation for Rx Queue %u failed\n", i);
  1239. break;
  1240. }
  1241. }
  1242. return err;
  1243. }
  1244. /**
  1245. * e1000_setup_rctl - configure the receive control registers
  1246. * @adapter: Board private structure
  1247. **/
  1248. static void
  1249. e1000_setup_rctl(struct e1000_adapter *adapter)
  1250. {
  1251. uint32_t rctl, rfctl;
  1252. uint32_t psrctl = 0;
  1253. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1254. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1255. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1256. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1257. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1258. if(adapter->hw.tbi_compatibility_on == 1)
  1259. rctl |= E1000_RCTL_SBP;
  1260. else
  1261. rctl &= ~E1000_RCTL_SBP;
  1262. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1263. rctl &= ~E1000_RCTL_LPE;
  1264. else
  1265. rctl |= E1000_RCTL_LPE;
  1266. /* Setup buffer sizes */
  1267. if(adapter->hw.mac_type >= e1000_82571) {
  1268. /* We can now specify buffers in 1K increments.
  1269. * BSIZE and BSEX are ignored in this case. */
  1270. rctl |= adapter->rx_buffer_len << 0x11;
  1271. } else {
  1272. rctl &= ~E1000_RCTL_SZ_4096;
  1273. rctl |= E1000_RCTL_BSEX;
  1274. switch (adapter->rx_buffer_len) {
  1275. case E1000_RXBUFFER_2048:
  1276. default:
  1277. rctl |= E1000_RCTL_SZ_2048;
  1278. rctl &= ~E1000_RCTL_BSEX;
  1279. break;
  1280. case E1000_RXBUFFER_4096:
  1281. rctl |= E1000_RCTL_SZ_4096;
  1282. break;
  1283. case E1000_RXBUFFER_8192:
  1284. rctl |= E1000_RCTL_SZ_8192;
  1285. break;
  1286. case E1000_RXBUFFER_16384:
  1287. rctl |= E1000_RCTL_SZ_16384;
  1288. break;
  1289. }
  1290. }
  1291. #ifdef CONFIG_E1000_PACKET_SPLIT
  1292. /* 82571 and greater support packet-split where the protocol
  1293. * header is placed in skb->data and the packet data is
  1294. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1295. * In the case of a non-split, skb->data is linearly filled,
  1296. * followed by the page buffers. Therefore, skb->data is
  1297. * sized to hold the largest protocol header.
  1298. */
  1299. adapter->rx_ps = (adapter->hw.mac_type > e1000_82547_rev_2)
  1300. && (adapter->netdev->mtu
  1301. < ((3 * PAGE_SIZE) + adapter->rx_ps_bsize0));
  1302. #endif
  1303. if(adapter->rx_ps) {
  1304. /* Configure extra packet-split registers */
  1305. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1306. rfctl |= E1000_RFCTL_EXTEN;
  1307. /* disable IPv6 packet split support */
  1308. rfctl |= E1000_RFCTL_IPV6_DIS;
  1309. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1310. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1311. psrctl |= adapter->rx_ps_bsize0 >>
  1312. E1000_PSRCTL_BSIZE0_SHIFT;
  1313. psrctl |= PAGE_SIZE >>
  1314. E1000_PSRCTL_BSIZE1_SHIFT;
  1315. psrctl |= PAGE_SIZE <<
  1316. E1000_PSRCTL_BSIZE2_SHIFT;
  1317. psrctl |= PAGE_SIZE <<
  1318. E1000_PSRCTL_BSIZE3_SHIFT;
  1319. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1320. }
  1321. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1322. }
  1323. /**
  1324. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1325. * @adapter: board private structure
  1326. *
  1327. * Configure the Rx unit of the MAC after a reset.
  1328. **/
  1329. static void
  1330. e1000_configure_rx(struct e1000_adapter *adapter)
  1331. {
  1332. uint64_t rdba;
  1333. struct e1000_hw *hw = &adapter->hw;
  1334. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1335. #ifdef CONFIG_E1000_MQ
  1336. uint32_t reta, mrqc;
  1337. int i;
  1338. #endif
  1339. if(adapter->rx_ps) {
  1340. rdlen = adapter->rx_ring[0].count *
  1341. sizeof(union e1000_rx_desc_packet_split);
  1342. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1343. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1344. } else {
  1345. rdlen = adapter->rx_ring[0].count *
  1346. sizeof(struct e1000_rx_desc);
  1347. adapter->clean_rx = e1000_clean_rx_irq;
  1348. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1349. }
  1350. /* disable receives while setting up the descriptors */
  1351. rctl = E1000_READ_REG(hw, RCTL);
  1352. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1353. /* set the Receive Delay Timer Register */
  1354. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1355. if (hw->mac_type >= e1000_82540) {
  1356. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1357. if(adapter->itr > 1)
  1358. E1000_WRITE_REG(hw, ITR,
  1359. 1000000000 / (adapter->itr * 256));
  1360. }
  1361. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1362. * the Base and Length of the Rx Descriptor Ring */
  1363. switch (adapter->num_queues) {
  1364. #ifdef CONFIG_E1000_MQ
  1365. case 2:
  1366. rdba = adapter->rx_ring[1].dma;
  1367. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1368. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1369. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1370. E1000_WRITE_REG(hw, RDH1, 0);
  1371. E1000_WRITE_REG(hw, RDT1, 0);
  1372. adapter->rx_ring[1].rdh = E1000_RDH1;
  1373. adapter->rx_ring[1].rdt = E1000_RDT1;
  1374. /* Fall Through */
  1375. #endif
  1376. case 1:
  1377. default:
  1378. rdba = adapter->rx_ring[0].dma;
  1379. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1380. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1381. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1382. E1000_WRITE_REG(hw, RDH, 0);
  1383. E1000_WRITE_REG(hw, RDT, 0);
  1384. adapter->rx_ring[0].rdh = E1000_RDH;
  1385. adapter->rx_ring[0].rdt = E1000_RDT;
  1386. break;
  1387. }
  1388. #ifdef CONFIG_E1000_MQ
  1389. if (adapter->num_queues > 1) {
  1390. uint32_t random[10];
  1391. get_random_bytes(&random[0], 40);
  1392. if (hw->mac_type <= e1000_82572) {
  1393. E1000_WRITE_REG(hw, RSSIR, 0);
  1394. E1000_WRITE_REG(hw, RSSIM, 0);
  1395. }
  1396. switch (adapter->num_queues) {
  1397. case 2:
  1398. default:
  1399. reta = 0x00800080;
  1400. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1401. break;
  1402. }
  1403. /* Fill out redirection table */
  1404. for (i = 0; i < 32; i++)
  1405. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1406. /* Fill out hash function seeds */
  1407. for (i = 0; i < 10; i++)
  1408. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1409. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1410. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1411. E1000_WRITE_REG(hw, MRQC, mrqc);
  1412. }
  1413. /* Multiqueue and packet checksumming are mutually exclusive. */
  1414. if (hw->mac_type >= e1000_82571) {
  1415. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1416. rxcsum |= E1000_RXCSUM_PCSD;
  1417. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1418. }
  1419. #else
  1420. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1421. if (hw->mac_type >= e1000_82543) {
  1422. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1423. if(adapter->rx_csum == TRUE) {
  1424. rxcsum |= E1000_RXCSUM_TUOFL;
  1425. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1426. * Must be used in conjunction with packet-split. */
  1427. if((adapter->hw.mac_type > e1000_82547_rev_2) &&
  1428. (adapter->rx_ps)) {
  1429. rxcsum |= E1000_RXCSUM_IPPCSE;
  1430. }
  1431. } else {
  1432. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1433. /* don't need to clear IPPCSE as it defaults to 0 */
  1434. }
  1435. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1436. }
  1437. #endif /* CONFIG_E1000_MQ */
  1438. if (hw->mac_type == e1000_82573)
  1439. E1000_WRITE_REG(hw, ERT, 0x0100);
  1440. /* Enable Receives */
  1441. E1000_WRITE_REG(hw, RCTL, rctl);
  1442. }
  1443. /**
  1444. * e1000_free_tx_resources - Free Tx Resources per Queue
  1445. * @adapter: board private structure
  1446. * @tx_ring: Tx descriptor ring for a specific queue
  1447. *
  1448. * Free all transmit software resources
  1449. **/
  1450. void
  1451. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1452. struct e1000_tx_ring *tx_ring)
  1453. {
  1454. struct pci_dev *pdev = adapter->pdev;
  1455. e1000_clean_tx_ring(adapter, tx_ring);
  1456. vfree(tx_ring->buffer_info);
  1457. tx_ring->buffer_info = NULL;
  1458. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1459. tx_ring->desc = NULL;
  1460. }
  1461. /**
  1462. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1463. * @adapter: board private structure
  1464. *
  1465. * Free all transmit software resources
  1466. **/
  1467. void
  1468. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1469. {
  1470. int i;
  1471. for (i = 0; i < adapter->num_queues; i++)
  1472. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1473. }
  1474. static inline void
  1475. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1476. struct e1000_buffer *buffer_info)
  1477. {
  1478. if(buffer_info->dma) {
  1479. pci_unmap_page(adapter->pdev,
  1480. buffer_info->dma,
  1481. buffer_info->length,
  1482. PCI_DMA_TODEVICE);
  1483. buffer_info->dma = 0;
  1484. }
  1485. if(buffer_info->skb) {
  1486. dev_kfree_skb_any(buffer_info->skb);
  1487. buffer_info->skb = NULL;
  1488. }
  1489. }
  1490. /**
  1491. * e1000_clean_tx_ring - Free Tx Buffers
  1492. * @adapter: board private structure
  1493. * @tx_ring: ring to be cleaned
  1494. **/
  1495. static void
  1496. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1497. struct e1000_tx_ring *tx_ring)
  1498. {
  1499. struct e1000_buffer *buffer_info;
  1500. unsigned long size;
  1501. unsigned int i;
  1502. /* Free all the Tx ring sk_buffs */
  1503. if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
  1504. e1000_unmap_and_free_tx_resource(adapter,
  1505. &tx_ring->previous_buffer_info);
  1506. }
  1507. for(i = 0; i < tx_ring->count; i++) {
  1508. buffer_info = &tx_ring->buffer_info[i];
  1509. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1510. }
  1511. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1512. memset(tx_ring->buffer_info, 0, size);
  1513. /* Zero out the descriptor ring */
  1514. memset(tx_ring->desc, 0, tx_ring->size);
  1515. tx_ring->next_to_use = 0;
  1516. tx_ring->next_to_clean = 0;
  1517. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1518. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1519. }
  1520. /**
  1521. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1522. * @adapter: board private structure
  1523. **/
  1524. static void
  1525. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1526. {
  1527. int i;
  1528. for (i = 0; i < adapter->num_queues; i++)
  1529. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1530. }
  1531. /**
  1532. * e1000_free_rx_resources - Free Rx Resources
  1533. * @adapter: board private structure
  1534. * @rx_ring: ring to clean the resources from
  1535. *
  1536. * Free all receive software resources
  1537. **/
  1538. void
  1539. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1540. struct e1000_rx_ring *rx_ring)
  1541. {
  1542. struct pci_dev *pdev = adapter->pdev;
  1543. e1000_clean_rx_ring(adapter, rx_ring);
  1544. vfree(rx_ring->buffer_info);
  1545. rx_ring->buffer_info = NULL;
  1546. kfree(rx_ring->ps_page);
  1547. rx_ring->ps_page = NULL;
  1548. kfree(rx_ring->ps_page_dma);
  1549. rx_ring->ps_page_dma = NULL;
  1550. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1551. rx_ring->desc = NULL;
  1552. }
  1553. /**
  1554. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1555. * @adapter: board private structure
  1556. *
  1557. * Free all receive software resources
  1558. **/
  1559. void
  1560. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1561. {
  1562. int i;
  1563. for (i = 0; i < adapter->num_queues; i++)
  1564. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1565. }
  1566. /**
  1567. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1568. * @adapter: board private structure
  1569. * @rx_ring: ring to free buffers from
  1570. **/
  1571. static void
  1572. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1573. struct e1000_rx_ring *rx_ring)
  1574. {
  1575. struct e1000_buffer *buffer_info;
  1576. struct e1000_ps_page *ps_page;
  1577. struct e1000_ps_page_dma *ps_page_dma;
  1578. struct pci_dev *pdev = adapter->pdev;
  1579. unsigned long size;
  1580. unsigned int i, j;
  1581. /* Free all the Rx ring sk_buffs */
  1582. for(i = 0; i < rx_ring->count; i++) {
  1583. buffer_info = &rx_ring->buffer_info[i];
  1584. if(buffer_info->skb) {
  1585. ps_page = &rx_ring->ps_page[i];
  1586. ps_page_dma = &rx_ring->ps_page_dma[i];
  1587. pci_unmap_single(pdev,
  1588. buffer_info->dma,
  1589. buffer_info->length,
  1590. PCI_DMA_FROMDEVICE);
  1591. dev_kfree_skb(buffer_info->skb);
  1592. buffer_info->skb = NULL;
  1593. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  1594. if(!ps_page->ps_page[j]) break;
  1595. pci_unmap_single(pdev,
  1596. ps_page_dma->ps_page_dma[j],
  1597. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1598. ps_page_dma->ps_page_dma[j] = 0;
  1599. put_page(ps_page->ps_page[j]);
  1600. ps_page->ps_page[j] = NULL;
  1601. }
  1602. }
  1603. }
  1604. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1605. memset(rx_ring->buffer_info, 0, size);
  1606. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1607. memset(rx_ring->ps_page, 0, size);
  1608. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1609. memset(rx_ring->ps_page_dma, 0, size);
  1610. /* Zero out the descriptor ring */
  1611. memset(rx_ring->desc, 0, rx_ring->size);
  1612. rx_ring->next_to_clean = 0;
  1613. rx_ring->next_to_use = 0;
  1614. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1615. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1616. }
  1617. /**
  1618. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1619. * @adapter: board private structure
  1620. **/
  1621. static void
  1622. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1623. {
  1624. int i;
  1625. for (i = 0; i < adapter->num_queues; i++)
  1626. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1627. }
  1628. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1629. * and memory write and invalidate disabled for certain operations
  1630. */
  1631. static void
  1632. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1633. {
  1634. struct net_device *netdev = adapter->netdev;
  1635. uint32_t rctl;
  1636. e1000_pci_clear_mwi(&adapter->hw);
  1637. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1638. rctl |= E1000_RCTL_RST;
  1639. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1640. E1000_WRITE_FLUSH(&adapter->hw);
  1641. mdelay(5);
  1642. if(netif_running(netdev))
  1643. e1000_clean_all_rx_rings(adapter);
  1644. }
  1645. static void
  1646. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1647. {
  1648. struct net_device *netdev = adapter->netdev;
  1649. uint32_t rctl;
  1650. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1651. rctl &= ~E1000_RCTL_RST;
  1652. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1653. E1000_WRITE_FLUSH(&adapter->hw);
  1654. mdelay(5);
  1655. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1656. e1000_pci_set_mwi(&adapter->hw);
  1657. if(netif_running(netdev)) {
  1658. e1000_configure_rx(adapter);
  1659. e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
  1660. }
  1661. }
  1662. /**
  1663. * e1000_set_mac - Change the Ethernet Address of the NIC
  1664. * @netdev: network interface device structure
  1665. * @p: pointer to an address structure
  1666. *
  1667. * Returns 0 on success, negative on failure
  1668. **/
  1669. static int
  1670. e1000_set_mac(struct net_device *netdev, void *p)
  1671. {
  1672. struct e1000_adapter *adapter = netdev_priv(netdev);
  1673. struct sockaddr *addr = p;
  1674. if(!is_valid_ether_addr(addr->sa_data))
  1675. return -EADDRNOTAVAIL;
  1676. /* 82542 2.0 needs to be in reset to write receive address registers */
  1677. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1678. e1000_enter_82542_rst(adapter);
  1679. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1680. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1681. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1682. /* With 82571 controllers, LAA may be overwritten (with the default)
  1683. * due to controller reset from the other port. */
  1684. if (adapter->hw.mac_type == e1000_82571) {
  1685. /* activate the work around */
  1686. adapter->hw.laa_is_present = 1;
  1687. /* Hold a copy of the LAA in RAR[14] This is done so that
  1688. * between the time RAR[0] gets clobbered and the time it
  1689. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1690. * of the RARs and no incoming packets directed to this port
  1691. * are dropped. Eventaully the LAA will be in RAR[0] and
  1692. * RAR[14] */
  1693. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1694. E1000_RAR_ENTRIES - 1);
  1695. }
  1696. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1697. e1000_leave_82542_rst(adapter);
  1698. return 0;
  1699. }
  1700. /**
  1701. * e1000_set_multi - Multicast and Promiscuous mode set
  1702. * @netdev: network interface device structure
  1703. *
  1704. * The set_multi entry point is called whenever the multicast address
  1705. * list or the network interface flags are updated. This routine is
  1706. * responsible for configuring the hardware for proper multicast,
  1707. * promiscuous mode, and all-multi behavior.
  1708. **/
  1709. static void
  1710. e1000_set_multi(struct net_device *netdev)
  1711. {
  1712. struct e1000_adapter *adapter = netdev_priv(netdev);
  1713. struct e1000_hw *hw = &adapter->hw;
  1714. struct dev_mc_list *mc_ptr;
  1715. uint32_t rctl;
  1716. uint32_t hash_value;
  1717. int i, rar_entries = E1000_RAR_ENTRIES;
  1718. /* reserve RAR[14] for LAA over-write work-around */
  1719. if (adapter->hw.mac_type == e1000_82571)
  1720. rar_entries--;
  1721. /* Check for Promiscuous and All Multicast modes */
  1722. rctl = E1000_READ_REG(hw, RCTL);
  1723. if(netdev->flags & IFF_PROMISC) {
  1724. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1725. } else if(netdev->flags & IFF_ALLMULTI) {
  1726. rctl |= E1000_RCTL_MPE;
  1727. rctl &= ~E1000_RCTL_UPE;
  1728. } else {
  1729. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1730. }
  1731. E1000_WRITE_REG(hw, RCTL, rctl);
  1732. /* 82542 2.0 needs to be in reset to write receive address registers */
  1733. if(hw->mac_type == e1000_82542_rev2_0)
  1734. e1000_enter_82542_rst(adapter);
  1735. /* load the first 14 multicast address into the exact filters 1-14
  1736. * RAR 0 is used for the station MAC adddress
  1737. * if there are not 14 addresses, go ahead and clear the filters
  1738. * -- with 82571 controllers only 0-13 entries are filled here
  1739. */
  1740. mc_ptr = netdev->mc_list;
  1741. for(i = 1; i < rar_entries; i++) {
  1742. if (mc_ptr) {
  1743. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1744. mc_ptr = mc_ptr->next;
  1745. } else {
  1746. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1747. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1748. }
  1749. }
  1750. /* clear the old settings from the multicast hash table */
  1751. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1752. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1753. /* load any remaining addresses into the hash table */
  1754. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1755. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1756. e1000_mta_set(hw, hash_value);
  1757. }
  1758. if(hw->mac_type == e1000_82542_rev2_0)
  1759. e1000_leave_82542_rst(adapter);
  1760. }
  1761. /* Need to wait a few seconds after link up to get diagnostic information from
  1762. * the phy */
  1763. static void
  1764. e1000_update_phy_info(unsigned long data)
  1765. {
  1766. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1767. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1768. }
  1769. /**
  1770. * e1000_82547_tx_fifo_stall - Timer Call-back
  1771. * @data: pointer to adapter cast into an unsigned long
  1772. **/
  1773. static void
  1774. e1000_82547_tx_fifo_stall(unsigned long data)
  1775. {
  1776. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1777. struct net_device *netdev = adapter->netdev;
  1778. uint32_t tctl;
  1779. if(atomic_read(&adapter->tx_fifo_stall)) {
  1780. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1781. E1000_READ_REG(&adapter->hw, TDH)) &&
  1782. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1783. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1784. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1785. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1786. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1787. E1000_WRITE_REG(&adapter->hw, TCTL,
  1788. tctl & ~E1000_TCTL_EN);
  1789. E1000_WRITE_REG(&adapter->hw, TDFT,
  1790. adapter->tx_head_addr);
  1791. E1000_WRITE_REG(&adapter->hw, TDFH,
  1792. adapter->tx_head_addr);
  1793. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1794. adapter->tx_head_addr);
  1795. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1796. adapter->tx_head_addr);
  1797. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1798. E1000_WRITE_FLUSH(&adapter->hw);
  1799. adapter->tx_fifo_head = 0;
  1800. atomic_set(&adapter->tx_fifo_stall, 0);
  1801. netif_wake_queue(netdev);
  1802. } else {
  1803. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1804. }
  1805. }
  1806. }
  1807. /**
  1808. * e1000_watchdog - Timer Call-back
  1809. * @data: pointer to adapter cast into an unsigned long
  1810. **/
  1811. static void
  1812. e1000_watchdog(unsigned long data)
  1813. {
  1814. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1815. /* Do the rest outside of interrupt context */
  1816. schedule_work(&adapter->watchdog_task);
  1817. }
  1818. static void
  1819. e1000_watchdog_task(struct e1000_adapter *adapter)
  1820. {
  1821. struct net_device *netdev = adapter->netdev;
  1822. struct e1000_tx_ring *txdr = &adapter->tx_ring[0];
  1823. uint32_t link;
  1824. e1000_check_for_link(&adapter->hw);
  1825. if (adapter->hw.mac_type == e1000_82573) {
  1826. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1827. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1828. e1000_update_mng_vlan(adapter);
  1829. }
  1830. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1831. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1832. link = !adapter->hw.serdes_link_down;
  1833. else
  1834. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1835. if(link) {
  1836. if(!netif_carrier_ok(netdev)) {
  1837. e1000_get_speed_and_duplex(&adapter->hw,
  1838. &adapter->link_speed,
  1839. &adapter->link_duplex);
  1840. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1841. adapter->link_speed,
  1842. adapter->link_duplex == FULL_DUPLEX ?
  1843. "Full Duplex" : "Half Duplex");
  1844. netif_carrier_on(netdev);
  1845. netif_wake_queue(netdev);
  1846. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1847. adapter->smartspeed = 0;
  1848. }
  1849. } else {
  1850. if(netif_carrier_ok(netdev)) {
  1851. adapter->link_speed = 0;
  1852. adapter->link_duplex = 0;
  1853. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1854. netif_carrier_off(netdev);
  1855. netif_stop_queue(netdev);
  1856. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1857. }
  1858. e1000_smartspeed(adapter);
  1859. }
  1860. e1000_update_stats(adapter);
  1861. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1862. adapter->tpt_old = adapter->stats.tpt;
  1863. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1864. adapter->colc_old = adapter->stats.colc;
  1865. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1866. adapter->gorcl_old = adapter->stats.gorcl;
  1867. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1868. adapter->gotcl_old = adapter->stats.gotcl;
  1869. e1000_update_adaptive(&adapter->hw);
  1870. if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) {
  1871. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1872. /* We've lost link, so the controller stops DMA,
  1873. * but we've got queued Tx work that's never going
  1874. * to get done, so reset controller to flush Tx.
  1875. * (Do the reset outside of interrupt context). */
  1876. schedule_work(&adapter->tx_timeout_task);
  1877. }
  1878. }
  1879. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  1880. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  1881. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  1882. * asymmetrical Tx or Rx gets ITR=8000; everyone
  1883. * else is between 2000-8000. */
  1884. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  1885. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  1886. adapter->gotcl - adapter->gorcl :
  1887. adapter->gorcl - adapter->gotcl) / 10000;
  1888. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  1889. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  1890. }
  1891. /* Cause software interrupt to ensure rx ring is cleaned */
  1892. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  1893. /* Force detection of hung controller every watchdog period */
  1894. adapter->detect_tx_hung = TRUE;
  1895. /* With 82571 controllers, LAA may be overwritten due to controller
  1896. * reset from the other port. Set the appropriate LAA in RAR[0] */
  1897. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  1898. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1899. /* Reset the timer */
  1900. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1901. }
  1902. #define E1000_TX_FLAGS_CSUM 0x00000001
  1903. #define E1000_TX_FLAGS_VLAN 0x00000002
  1904. #define E1000_TX_FLAGS_TSO 0x00000004
  1905. #define E1000_TX_FLAGS_IPV4 0x00000008
  1906. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  1907. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  1908. static inline int
  1909. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  1910. struct sk_buff *skb)
  1911. {
  1912. #ifdef NETIF_F_TSO
  1913. struct e1000_context_desc *context_desc;
  1914. unsigned int i;
  1915. uint32_t cmd_length = 0;
  1916. uint16_t ipcse = 0, tucse, mss;
  1917. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  1918. int err;
  1919. if(skb_shinfo(skb)->tso_size) {
  1920. if (skb_header_cloned(skb)) {
  1921. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1922. if (err)
  1923. return err;
  1924. }
  1925. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  1926. mss = skb_shinfo(skb)->tso_size;
  1927. if(skb->protocol == ntohs(ETH_P_IP)) {
  1928. skb->nh.iph->tot_len = 0;
  1929. skb->nh.iph->check = 0;
  1930. skb->h.th->check =
  1931. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  1932. skb->nh.iph->daddr,
  1933. 0,
  1934. IPPROTO_TCP,
  1935. 0);
  1936. cmd_length = E1000_TXD_CMD_IP;
  1937. ipcse = skb->h.raw - skb->data - 1;
  1938. #ifdef NETIF_F_TSO_IPV6
  1939. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  1940. skb->nh.ipv6h->payload_len = 0;
  1941. skb->h.th->check =
  1942. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  1943. &skb->nh.ipv6h->daddr,
  1944. 0,
  1945. IPPROTO_TCP,
  1946. 0);
  1947. ipcse = 0;
  1948. #endif
  1949. }
  1950. ipcss = skb->nh.raw - skb->data;
  1951. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  1952. tucss = skb->h.raw - skb->data;
  1953. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  1954. tucse = 0;
  1955. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  1956. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  1957. i = tx_ring->next_to_use;
  1958. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  1959. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  1960. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  1961. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  1962. context_desc->upper_setup.tcp_fields.tucss = tucss;
  1963. context_desc->upper_setup.tcp_fields.tucso = tucso;
  1964. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  1965. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  1966. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  1967. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  1968. if (++i == tx_ring->count) i = 0;
  1969. tx_ring->next_to_use = i;
  1970. return 1;
  1971. }
  1972. #endif
  1973. return 0;
  1974. }
  1975. static inline boolean_t
  1976. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  1977. struct sk_buff *skb)
  1978. {
  1979. struct e1000_context_desc *context_desc;
  1980. unsigned int i;
  1981. uint8_t css;
  1982. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  1983. css = skb->h.raw - skb->data;
  1984. i = tx_ring->next_to_use;
  1985. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  1986. context_desc->upper_setup.tcp_fields.tucss = css;
  1987. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  1988. context_desc->upper_setup.tcp_fields.tucse = 0;
  1989. context_desc->tcp_seg_setup.data = 0;
  1990. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  1991. if (unlikely(++i == tx_ring->count)) i = 0;
  1992. tx_ring->next_to_use = i;
  1993. return TRUE;
  1994. }
  1995. return FALSE;
  1996. }
  1997. #define E1000_MAX_TXD_PWR 12
  1998. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  1999. static inline int
  2000. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2001. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2002. unsigned int nr_frags, unsigned int mss)
  2003. {
  2004. struct e1000_buffer *buffer_info;
  2005. unsigned int len = skb->len;
  2006. unsigned int offset = 0, size, count = 0, i;
  2007. unsigned int f;
  2008. len -= skb->data_len;
  2009. i = tx_ring->next_to_use;
  2010. while(len) {
  2011. buffer_info = &tx_ring->buffer_info[i];
  2012. size = min(len, max_per_txd);
  2013. #ifdef NETIF_F_TSO
  2014. /* Workaround for premature desc write-backs
  2015. * in TSO mode. Append 4-byte sentinel desc */
  2016. if(unlikely(mss && !nr_frags && size == len && size > 8))
  2017. size -= 4;
  2018. #endif
  2019. /* work-around for errata 10 and it applies
  2020. * to all controllers in PCI-X mode
  2021. * The fix is to make sure that the first descriptor of a
  2022. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2023. */
  2024. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2025. (size > 2015) && count == 0))
  2026. size = 2015;
  2027. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2028. * terminating buffers within evenly-aligned dwords. */
  2029. if(unlikely(adapter->pcix_82544 &&
  2030. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2031. size > 4))
  2032. size -= 4;
  2033. buffer_info->length = size;
  2034. buffer_info->dma =
  2035. pci_map_single(adapter->pdev,
  2036. skb->data + offset,
  2037. size,
  2038. PCI_DMA_TODEVICE);
  2039. buffer_info->time_stamp = jiffies;
  2040. len -= size;
  2041. offset += size;
  2042. count++;
  2043. if(unlikely(++i == tx_ring->count)) i = 0;
  2044. }
  2045. for(f = 0; f < nr_frags; f++) {
  2046. struct skb_frag_struct *frag;
  2047. frag = &skb_shinfo(skb)->frags[f];
  2048. len = frag->size;
  2049. offset = frag->page_offset;
  2050. while(len) {
  2051. buffer_info = &tx_ring->buffer_info[i];
  2052. size = min(len, max_per_txd);
  2053. #ifdef NETIF_F_TSO
  2054. /* Workaround for premature desc write-backs
  2055. * in TSO mode. Append 4-byte sentinel desc */
  2056. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2057. size -= 4;
  2058. #endif
  2059. /* Workaround for potential 82544 hang in PCI-X.
  2060. * Avoid terminating buffers within evenly-aligned
  2061. * dwords. */
  2062. if(unlikely(adapter->pcix_82544 &&
  2063. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2064. size > 4))
  2065. size -= 4;
  2066. buffer_info->length = size;
  2067. buffer_info->dma =
  2068. pci_map_page(adapter->pdev,
  2069. frag->page,
  2070. offset,
  2071. size,
  2072. PCI_DMA_TODEVICE);
  2073. buffer_info->time_stamp = jiffies;
  2074. len -= size;
  2075. offset += size;
  2076. count++;
  2077. if(unlikely(++i == tx_ring->count)) i = 0;
  2078. }
  2079. }
  2080. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2081. tx_ring->buffer_info[i].skb = skb;
  2082. tx_ring->buffer_info[first].next_to_watch = i;
  2083. return count;
  2084. }
  2085. static inline void
  2086. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2087. int tx_flags, int count)
  2088. {
  2089. struct e1000_tx_desc *tx_desc = NULL;
  2090. struct e1000_buffer *buffer_info;
  2091. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2092. unsigned int i;
  2093. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2094. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2095. E1000_TXD_CMD_TSE;
  2096. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2097. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2098. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2099. }
  2100. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2101. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2102. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2103. }
  2104. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2105. txd_lower |= E1000_TXD_CMD_VLE;
  2106. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2107. }
  2108. i = tx_ring->next_to_use;
  2109. while(count--) {
  2110. buffer_info = &tx_ring->buffer_info[i];
  2111. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2112. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2113. tx_desc->lower.data =
  2114. cpu_to_le32(txd_lower | buffer_info->length);
  2115. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2116. if(unlikely(++i == tx_ring->count)) i = 0;
  2117. }
  2118. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2119. /* Force memory writes to complete before letting h/w
  2120. * know there are new descriptors to fetch. (Only
  2121. * applicable for weak-ordered memory model archs,
  2122. * such as IA-64). */
  2123. wmb();
  2124. tx_ring->next_to_use = i;
  2125. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2126. }
  2127. /**
  2128. * 82547 workaround to avoid controller hang in half-duplex environment.
  2129. * The workaround is to avoid queuing a large packet that would span
  2130. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2131. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2132. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2133. * to the beginning of the Tx FIFO.
  2134. **/
  2135. #define E1000_FIFO_HDR 0x10
  2136. #define E1000_82547_PAD_LEN 0x3E0
  2137. static inline int
  2138. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2139. {
  2140. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2141. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2142. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2143. if(adapter->link_duplex != HALF_DUPLEX)
  2144. goto no_fifo_stall_required;
  2145. if(atomic_read(&adapter->tx_fifo_stall))
  2146. return 1;
  2147. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2148. atomic_set(&adapter->tx_fifo_stall, 1);
  2149. return 1;
  2150. }
  2151. no_fifo_stall_required:
  2152. adapter->tx_fifo_head += skb_fifo_len;
  2153. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2154. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2155. return 0;
  2156. }
  2157. #define MINIMUM_DHCP_PACKET_SIZE 282
  2158. static inline int
  2159. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2160. {
  2161. struct e1000_hw *hw = &adapter->hw;
  2162. uint16_t length, offset;
  2163. if(vlan_tx_tag_present(skb)) {
  2164. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2165. ( adapter->hw.mng_cookie.status &
  2166. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2167. return 0;
  2168. }
  2169. if(htons(ETH_P_IP) == skb->protocol) {
  2170. const struct iphdr *ip = skb->nh.iph;
  2171. if(IPPROTO_UDP == ip->protocol) {
  2172. struct udphdr *udp = (struct udphdr *)(skb->h.uh);
  2173. if(ntohs(udp->dest) == 67) {
  2174. offset = (uint8_t *)udp + 8 - skb->data;
  2175. length = skb->len - offset;
  2176. return e1000_mng_write_dhcp_info(hw,
  2177. (uint8_t *)udp + 8, length);
  2178. }
  2179. }
  2180. } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2181. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2182. if((htons(ETH_P_IP) == eth->h_proto)) {
  2183. const struct iphdr *ip =
  2184. (struct iphdr *)((uint8_t *)skb->data+14);
  2185. if(IPPROTO_UDP == ip->protocol) {
  2186. struct udphdr *udp =
  2187. (struct udphdr *)((uint8_t *)ip +
  2188. (ip->ihl << 2));
  2189. if(ntohs(udp->dest) == 67) {
  2190. offset = (uint8_t *)udp + 8 - skb->data;
  2191. length = skb->len - offset;
  2192. return e1000_mng_write_dhcp_info(hw,
  2193. (uint8_t *)udp + 8,
  2194. length);
  2195. }
  2196. }
  2197. }
  2198. }
  2199. return 0;
  2200. }
  2201. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2202. static int
  2203. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2204. {
  2205. struct e1000_adapter *adapter = netdev_priv(netdev);
  2206. struct e1000_tx_ring *tx_ring;
  2207. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2208. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2209. unsigned int tx_flags = 0;
  2210. unsigned int len = skb->len;
  2211. unsigned long flags;
  2212. unsigned int nr_frags = 0;
  2213. unsigned int mss = 0;
  2214. int count = 0;
  2215. int tso;
  2216. unsigned int f;
  2217. len -= skb->data_len;
  2218. #ifdef CONFIG_E1000_MQ
  2219. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2220. #else
  2221. tx_ring = adapter->tx_ring;
  2222. #endif
  2223. if (unlikely(skb->len <= 0)) {
  2224. dev_kfree_skb_any(skb);
  2225. return NETDEV_TX_OK;
  2226. }
  2227. #ifdef NETIF_F_TSO
  2228. mss = skb_shinfo(skb)->tso_size;
  2229. /* The controller does a simple calculation to
  2230. * make sure there is enough room in the FIFO before
  2231. * initiating the DMA for each buffer. The calc is:
  2232. * 4 = ceil(buffer len/mss). To make sure we don't
  2233. * overrun the FIFO, adjust the max buffer len if mss
  2234. * drops. */
  2235. if(mss) {
  2236. max_per_txd = min(mss << 2, max_per_txd);
  2237. max_txd_pwr = fls(max_per_txd) - 1;
  2238. }
  2239. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  2240. count++;
  2241. count++;
  2242. #else
  2243. if(skb->ip_summed == CHECKSUM_HW)
  2244. count++;
  2245. #endif
  2246. count += TXD_USE_COUNT(len, max_txd_pwr);
  2247. if(adapter->pcix_82544)
  2248. count++;
  2249. /* work-around for errata 10 and it applies to all controllers
  2250. * in PCI-X mode, so add one more descriptor to the count
  2251. */
  2252. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2253. (len > 2015)))
  2254. count++;
  2255. nr_frags = skb_shinfo(skb)->nr_frags;
  2256. for(f = 0; f < nr_frags; f++)
  2257. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2258. max_txd_pwr);
  2259. if(adapter->pcix_82544)
  2260. count += nr_frags;
  2261. #ifdef NETIF_F_TSO
  2262. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2263. * points to just header, pull a few bytes of payload from
  2264. * frags into skb->data */
  2265. if (skb_shinfo(skb)->tso_size) {
  2266. uint8_t hdr_len;
  2267. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2268. if (skb->data_len && (hdr_len < (skb->len - skb->data_len)) &&
  2269. (adapter->hw.mac_type == e1000_82571 ||
  2270. adapter->hw.mac_type == e1000_82572)) {
  2271. unsigned int pull_size;
  2272. pull_size = min((unsigned int)4, skb->data_len);
  2273. if (!__pskb_pull_tail(skb, pull_size)) {
  2274. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2275. dev_kfree_skb_any(skb);
  2276. return -EFAULT;
  2277. }
  2278. }
  2279. }
  2280. #endif
  2281. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2282. e1000_transfer_dhcp_info(adapter, skb);
  2283. local_irq_save(flags);
  2284. if (!spin_trylock(&tx_ring->tx_lock)) {
  2285. /* Collision - tell upper layer to requeue */
  2286. local_irq_restore(flags);
  2287. return NETDEV_TX_LOCKED;
  2288. }
  2289. /* need: count + 2 desc gap to keep tail from touching
  2290. * head, otherwise try next time */
  2291. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2292. netif_stop_queue(netdev);
  2293. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2294. return NETDEV_TX_BUSY;
  2295. }
  2296. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  2297. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2298. netif_stop_queue(netdev);
  2299. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2300. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2301. return NETDEV_TX_BUSY;
  2302. }
  2303. }
  2304. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2305. tx_flags |= E1000_TX_FLAGS_VLAN;
  2306. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2307. }
  2308. first = tx_ring->next_to_use;
  2309. tso = e1000_tso(adapter, tx_ring, skb);
  2310. if (tso < 0) {
  2311. dev_kfree_skb_any(skb);
  2312. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2313. return NETDEV_TX_OK;
  2314. }
  2315. if (likely(tso))
  2316. tx_flags |= E1000_TX_FLAGS_TSO;
  2317. else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2318. tx_flags |= E1000_TX_FLAGS_CSUM;
  2319. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2320. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2321. * no longer assume, we must. */
  2322. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2323. tx_flags |= E1000_TX_FLAGS_IPV4;
  2324. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2325. e1000_tx_map(adapter, tx_ring, skb, first,
  2326. max_per_txd, nr_frags, mss));
  2327. netdev->trans_start = jiffies;
  2328. /* Make sure there is space in the ring for the next send. */
  2329. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2330. netif_stop_queue(netdev);
  2331. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2332. return NETDEV_TX_OK;
  2333. }
  2334. /**
  2335. * e1000_tx_timeout - Respond to a Tx Hang
  2336. * @netdev: network interface device structure
  2337. **/
  2338. static void
  2339. e1000_tx_timeout(struct net_device *netdev)
  2340. {
  2341. struct e1000_adapter *adapter = netdev_priv(netdev);
  2342. /* Do the reset outside of interrupt context */
  2343. schedule_work(&adapter->tx_timeout_task);
  2344. }
  2345. static void
  2346. e1000_tx_timeout_task(struct net_device *netdev)
  2347. {
  2348. struct e1000_adapter *adapter = netdev_priv(netdev);
  2349. e1000_down(adapter);
  2350. e1000_up(adapter);
  2351. }
  2352. /**
  2353. * e1000_get_stats - Get System Network Statistics
  2354. * @netdev: network interface device structure
  2355. *
  2356. * Returns the address of the device statistics structure.
  2357. * The statistics are actually updated from the timer callback.
  2358. **/
  2359. static struct net_device_stats *
  2360. e1000_get_stats(struct net_device *netdev)
  2361. {
  2362. struct e1000_adapter *adapter = netdev_priv(netdev);
  2363. e1000_update_stats(adapter);
  2364. return &adapter->net_stats;
  2365. }
  2366. /**
  2367. * e1000_change_mtu - Change the Maximum Transfer Unit
  2368. * @netdev: network interface device structure
  2369. * @new_mtu: new value for maximum frame size
  2370. *
  2371. * Returns 0 on success, negative on failure
  2372. **/
  2373. static int
  2374. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2375. {
  2376. struct e1000_adapter *adapter = netdev_priv(netdev);
  2377. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2378. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2379. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2380. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2381. return -EINVAL;
  2382. }
  2383. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2384. /* might want this to be bigger enum check... */
  2385. /* 82571 controllers limit jumbo frame size to 10500 bytes */
  2386. if ((adapter->hw.mac_type == e1000_82571 ||
  2387. adapter->hw.mac_type == e1000_82572) &&
  2388. max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2389. DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
  2390. "on 82571 and 82572 controllers.\n");
  2391. return -EINVAL;
  2392. }
  2393. if(adapter->hw.mac_type == e1000_82573 &&
  2394. max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2395. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2396. "on 82573\n");
  2397. return -EINVAL;
  2398. }
  2399. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  2400. adapter->rx_buffer_len = max_frame;
  2401. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2402. } else {
  2403. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2404. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2405. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2406. "on 82542\n");
  2407. return -EINVAL;
  2408. } else {
  2409. if(max_frame <= E1000_RXBUFFER_2048) {
  2410. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2411. } else if(max_frame <= E1000_RXBUFFER_4096) {
  2412. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2413. } else if(max_frame <= E1000_RXBUFFER_8192) {
  2414. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2415. } else if(max_frame <= E1000_RXBUFFER_16384) {
  2416. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2417. }
  2418. }
  2419. }
  2420. netdev->mtu = new_mtu;
  2421. if(netif_running(netdev)) {
  2422. e1000_down(adapter);
  2423. e1000_up(adapter);
  2424. }
  2425. adapter->hw.max_frame_size = max_frame;
  2426. return 0;
  2427. }
  2428. /**
  2429. * e1000_update_stats - Update the board statistics counters
  2430. * @adapter: board private structure
  2431. **/
  2432. void
  2433. e1000_update_stats(struct e1000_adapter *adapter)
  2434. {
  2435. struct e1000_hw *hw = &adapter->hw;
  2436. unsigned long flags;
  2437. uint16_t phy_tmp;
  2438. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2439. spin_lock_irqsave(&adapter->stats_lock, flags);
  2440. /* these counters are modified from e1000_adjust_tbi_stats,
  2441. * called from the interrupt context, so they must only
  2442. * be written while holding adapter->stats_lock
  2443. */
  2444. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2445. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2446. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2447. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2448. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2449. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2450. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2451. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2452. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2453. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2454. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2455. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2456. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2457. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2458. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2459. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2460. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2461. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2462. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2463. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2464. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2465. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2466. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2467. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2468. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2469. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2470. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2471. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2472. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2473. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2474. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2475. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2476. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2477. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2478. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2479. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2480. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2481. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2482. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2483. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2484. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2485. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2486. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2487. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2488. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2489. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2490. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2491. /* used for adaptive IFS */
  2492. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2493. adapter->stats.tpt += hw->tx_packet_delta;
  2494. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2495. adapter->stats.colc += hw->collision_delta;
  2496. if(hw->mac_type >= e1000_82543) {
  2497. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2498. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2499. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2500. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2501. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2502. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2503. }
  2504. if(hw->mac_type > e1000_82547_rev_2) {
  2505. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2506. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2507. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2508. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2509. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2510. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2511. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2512. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2513. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2514. }
  2515. /* Fill out the OS statistics structure */
  2516. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2517. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2518. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2519. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2520. adapter->net_stats.multicast = adapter->stats.mprc;
  2521. adapter->net_stats.collisions = adapter->stats.colc;
  2522. /* Rx Errors */
  2523. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2524. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2525. adapter->stats.rlec + adapter->stats.mpc +
  2526. adapter->stats.cexterr;
  2527. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2528. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2529. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2530. adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
  2531. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2532. /* Tx Errors */
  2533. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2534. adapter->stats.latecol;
  2535. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2536. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2537. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2538. /* Tx Dropped needs to be maintained elsewhere */
  2539. /* Phy Stats */
  2540. if(hw->media_type == e1000_media_type_copper) {
  2541. if((adapter->link_speed == SPEED_1000) &&
  2542. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2543. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2544. adapter->phy_stats.idle_errors += phy_tmp;
  2545. }
  2546. if((hw->mac_type <= e1000_82546) &&
  2547. (hw->phy_type == e1000_phy_m88) &&
  2548. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2549. adapter->phy_stats.receive_errors += phy_tmp;
  2550. }
  2551. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2552. }
  2553. #ifdef CONFIG_E1000_MQ
  2554. void
  2555. e1000_rx_schedule(void *data)
  2556. {
  2557. struct net_device *poll_dev, *netdev = data;
  2558. struct e1000_adapter *adapter = netdev->priv;
  2559. int this_cpu = get_cpu();
  2560. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2561. if (poll_dev == NULL) {
  2562. put_cpu();
  2563. return;
  2564. }
  2565. if (likely(netif_rx_schedule_prep(poll_dev)))
  2566. __netif_rx_schedule(poll_dev);
  2567. else
  2568. e1000_irq_enable(adapter);
  2569. put_cpu();
  2570. }
  2571. #endif
  2572. /**
  2573. * e1000_intr - Interrupt Handler
  2574. * @irq: interrupt number
  2575. * @data: pointer to a network interface device structure
  2576. * @pt_regs: CPU registers structure
  2577. **/
  2578. static irqreturn_t
  2579. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2580. {
  2581. struct net_device *netdev = data;
  2582. struct e1000_adapter *adapter = netdev_priv(netdev);
  2583. struct e1000_hw *hw = &adapter->hw;
  2584. uint32_t icr = E1000_READ_REG(hw, ICR);
  2585. int i;
  2586. if(unlikely(!icr))
  2587. return IRQ_NONE; /* Not our interrupt */
  2588. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2589. hw->get_link_status = 1;
  2590. mod_timer(&adapter->watchdog_timer, jiffies);
  2591. }
  2592. #ifdef CONFIG_E1000_NAPI
  2593. atomic_inc(&adapter->irq_sem);
  2594. E1000_WRITE_REG(hw, IMC, ~0);
  2595. E1000_WRITE_FLUSH(hw);
  2596. #ifdef CONFIG_E1000_MQ
  2597. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2598. cpu_set(adapter->cpu_for_queue[0],
  2599. adapter->rx_sched_call_data.cpumask);
  2600. for (i = 1; i < adapter->num_queues; i++) {
  2601. cpu_set(adapter->cpu_for_queue[i],
  2602. adapter->rx_sched_call_data.cpumask);
  2603. atomic_inc(&adapter->irq_sem);
  2604. }
  2605. atomic_set(&adapter->rx_sched_call_data.count, i);
  2606. smp_call_async_mask(&adapter->rx_sched_call_data);
  2607. } else {
  2608. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2609. }
  2610. #else
  2611. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2612. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2613. else
  2614. e1000_irq_enable(adapter);
  2615. #endif
  2616. #else
  2617. /* Writing IMC and IMS is needed for 82547.
  2618. Due to Hub Link bus being occupied, an interrupt
  2619. de-assertion message is not able to be sent.
  2620. When an interrupt assertion message is generated later,
  2621. two messages are re-ordered and sent out.
  2622. That causes APIC to think 82547 is in de-assertion
  2623. state, while 82547 is in assertion state, resulting
  2624. in dead lock. Writing IMC forces 82547 into
  2625. de-assertion state.
  2626. */
  2627. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2628. atomic_inc(&adapter->irq_sem);
  2629. E1000_WRITE_REG(hw, IMC, ~0);
  2630. }
  2631. for(i = 0; i < E1000_MAX_INTR; i++)
  2632. if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2633. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2634. break;
  2635. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2636. e1000_irq_enable(adapter);
  2637. #endif
  2638. return IRQ_HANDLED;
  2639. }
  2640. #ifdef CONFIG_E1000_NAPI
  2641. /**
  2642. * e1000_clean - NAPI Rx polling callback
  2643. * @adapter: board private structure
  2644. **/
  2645. static int
  2646. e1000_clean(struct net_device *poll_dev, int *budget)
  2647. {
  2648. struct e1000_adapter *adapter;
  2649. int work_to_do = min(*budget, poll_dev->quota);
  2650. int tx_cleaned, i = 0, work_done = 0;
  2651. /* Must NOT use netdev_priv macro here. */
  2652. adapter = poll_dev->priv;
  2653. /* Keep link state information with original netdev */
  2654. if (!netif_carrier_ok(adapter->netdev))
  2655. goto quit_polling;
  2656. while (poll_dev != &adapter->polling_netdev[i]) {
  2657. i++;
  2658. if (unlikely(i == adapter->num_queues))
  2659. BUG();
  2660. }
  2661. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2662. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2663. &work_done, work_to_do);
  2664. *budget -= work_done;
  2665. poll_dev->quota -= work_done;
  2666. /* If no Tx and not enough Rx work done, exit the polling mode */
  2667. if((!tx_cleaned && (work_done == 0)) ||
  2668. !netif_running(adapter->netdev)) {
  2669. quit_polling:
  2670. netif_rx_complete(poll_dev);
  2671. e1000_irq_enable(adapter);
  2672. return 0;
  2673. }
  2674. return 1;
  2675. }
  2676. #endif
  2677. /**
  2678. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2679. * @adapter: board private structure
  2680. **/
  2681. static boolean_t
  2682. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2683. struct e1000_tx_ring *tx_ring)
  2684. {
  2685. struct net_device *netdev = adapter->netdev;
  2686. struct e1000_tx_desc *tx_desc, *eop_desc;
  2687. struct e1000_buffer *buffer_info;
  2688. unsigned int i, eop;
  2689. boolean_t cleaned = FALSE;
  2690. i = tx_ring->next_to_clean;
  2691. eop = tx_ring->buffer_info[i].next_to_watch;
  2692. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2693. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2694. /* Premature writeback of Tx descriptors clear (free buffers
  2695. * and unmap pci_mapping) previous_buffer_info */
  2696. if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
  2697. e1000_unmap_and_free_tx_resource(adapter,
  2698. &tx_ring->previous_buffer_info);
  2699. }
  2700. for(cleaned = FALSE; !cleaned; ) {
  2701. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2702. buffer_info = &tx_ring->buffer_info[i];
  2703. cleaned = (i == eop);
  2704. #ifdef NETIF_F_TSO
  2705. if (!(netdev->features & NETIF_F_TSO)) {
  2706. #endif
  2707. e1000_unmap_and_free_tx_resource(adapter,
  2708. buffer_info);
  2709. #ifdef NETIF_F_TSO
  2710. } else {
  2711. if (cleaned) {
  2712. memcpy(&tx_ring->previous_buffer_info,
  2713. buffer_info,
  2714. sizeof(struct e1000_buffer));
  2715. memset(buffer_info, 0,
  2716. sizeof(struct e1000_buffer));
  2717. } else {
  2718. e1000_unmap_and_free_tx_resource(
  2719. adapter, buffer_info);
  2720. }
  2721. }
  2722. #endif
  2723. tx_desc->buffer_addr = 0;
  2724. tx_desc->lower.data = 0;
  2725. tx_desc->upper.data = 0;
  2726. if(unlikely(++i == tx_ring->count)) i = 0;
  2727. }
  2728. tx_ring->pkt++;
  2729. eop = tx_ring->buffer_info[i].next_to_watch;
  2730. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2731. }
  2732. tx_ring->next_to_clean = i;
  2733. spin_lock(&tx_ring->tx_lock);
  2734. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2735. netif_carrier_ok(netdev)))
  2736. netif_wake_queue(netdev);
  2737. spin_unlock(&tx_ring->tx_lock);
  2738. if (adapter->detect_tx_hung) {
  2739. /* Detect a transmit hang in hardware, this serializes the
  2740. * check with the clearing of time_stamp and movement of i */
  2741. adapter->detect_tx_hung = FALSE;
  2742. if (tx_ring->buffer_info[i].dma &&
  2743. time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
  2744. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2745. E1000_STATUS_TXOFF)) {
  2746. /* detected Tx unit hang */
  2747. i = tx_ring->next_to_clean;
  2748. eop = tx_ring->buffer_info[i].next_to_watch;
  2749. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2750. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2751. " TDH <%x>\n"
  2752. " TDT <%x>\n"
  2753. " next_to_use <%x>\n"
  2754. " next_to_clean <%x>\n"
  2755. "buffer_info[next_to_clean]\n"
  2756. " dma <%llx>\n"
  2757. " time_stamp <%lx>\n"
  2758. " next_to_watch <%x>\n"
  2759. " jiffies <%lx>\n"
  2760. " next_to_watch.status <%x>\n",
  2761. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2762. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2763. tx_ring->next_to_use,
  2764. i,
  2765. (unsigned long long)tx_ring->buffer_info[i].dma,
  2766. tx_ring->buffer_info[i].time_stamp,
  2767. eop,
  2768. jiffies,
  2769. eop_desc->upper.fields.status);
  2770. netif_stop_queue(netdev);
  2771. }
  2772. }
  2773. #ifdef NETIF_F_TSO
  2774. if (unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
  2775. time_after(jiffies, tx_ring->previous_buffer_info.time_stamp + HZ)))
  2776. e1000_unmap_and_free_tx_resource(
  2777. adapter, &tx_ring->previous_buffer_info);
  2778. #endif
  2779. return cleaned;
  2780. }
  2781. /**
  2782. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2783. * @adapter: board private structure
  2784. * @status_err: receive descriptor status and error fields
  2785. * @csum: receive descriptor csum field
  2786. * @sk_buff: socket buffer with received data
  2787. **/
  2788. static inline void
  2789. e1000_rx_checksum(struct e1000_adapter *adapter,
  2790. uint32_t status_err, uint32_t csum,
  2791. struct sk_buff *skb)
  2792. {
  2793. uint16_t status = (uint16_t)status_err;
  2794. uint8_t errors = (uint8_t)(status_err >> 24);
  2795. skb->ip_summed = CHECKSUM_NONE;
  2796. /* 82543 or newer only */
  2797. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2798. /* Ignore Checksum bit is set */
  2799. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2800. /* TCP/UDP checksum error bit is set */
  2801. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2802. /* let the stack verify checksum errors */
  2803. adapter->hw_csum_err++;
  2804. return;
  2805. }
  2806. /* TCP/UDP Checksum has not been calculated */
  2807. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2808. if(!(status & E1000_RXD_STAT_TCPCS))
  2809. return;
  2810. } else {
  2811. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2812. return;
  2813. }
  2814. /* It must be a TCP or UDP packet with a valid checksum */
  2815. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2816. /* TCP checksum is good */
  2817. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2818. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2819. /* IP fragment with UDP payload */
  2820. /* Hardware complements the payload checksum, so we undo it
  2821. * and then put the value in host order for further stack use.
  2822. */
  2823. csum = ntohl(csum ^ 0xFFFF);
  2824. skb->csum = csum;
  2825. skb->ip_summed = CHECKSUM_HW;
  2826. }
  2827. adapter->hw_csum_good++;
  2828. }
  2829. /**
  2830. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2831. * @adapter: board private structure
  2832. **/
  2833. static boolean_t
  2834. #ifdef CONFIG_E1000_NAPI
  2835. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2836. struct e1000_rx_ring *rx_ring,
  2837. int *work_done, int work_to_do)
  2838. #else
  2839. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2840. struct e1000_rx_ring *rx_ring)
  2841. #endif
  2842. {
  2843. struct net_device *netdev = adapter->netdev;
  2844. struct pci_dev *pdev = adapter->pdev;
  2845. struct e1000_rx_desc *rx_desc;
  2846. struct e1000_buffer *buffer_info;
  2847. struct sk_buff *skb;
  2848. unsigned long flags;
  2849. uint32_t length;
  2850. uint8_t last_byte;
  2851. unsigned int i;
  2852. boolean_t cleaned = FALSE;
  2853. i = rx_ring->next_to_clean;
  2854. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2855. while(rx_desc->status & E1000_RXD_STAT_DD) {
  2856. buffer_info = &rx_ring->buffer_info[i];
  2857. #ifdef CONFIG_E1000_NAPI
  2858. if(*work_done >= work_to_do)
  2859. break;
  2860. (*work_done)++;
  2861. #endif
  2862. cleaned = TRUE;
  2863. pci_unmap_single(pdev,
  2864. buffer_info->dma,
  2865. buffer_info->length,
  2866. PCI_DMA_FROMDEVICE);
  2867. skb = buffer_info->skb;
  2868. length = le16_to_cpu(rx_desc->length);
  2869. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  2870. /* All receives must fit into a single buffer */
  2871. E1000_DBG("%s: Receive packet consumed multiple"
  2872. " buffers\n", netdev->name);
  2873. dev_kfree_skb_irq(skb);
  2874. goto next_desc;
  2875. }
  2876. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  2877. last_byte = *(skb->data + length - 1);
  2878. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  2879. rx_desc->errors, length, last_byte)) {
  2880. spin_lock_irqsave(&adapter->stats_lock, flags);
  2881. e1000_tbi_adjust_stats(&adapter->hw,
  2882. &adapter->stats,
  2883. length, skb->data);
  2884. spin_unlock_irqrestore(&adapter->stats_lock,
  2885. flags);
  2886. length--;
  2887. } else {
  2888. dev_kfree_skb_irq(skb);
  2889. goto next_desc;
  2890. }
  2891. }
  2892. /* Good Receive */
  2893. skb_put(skb, length - ETHERNET_FCS_SIZE);
  2894. /* Receive Checksum Offload */
  2895. e1000_rx_checksum(adapter,
  2896. (uint32_t)(rx_desc->status) |
  2897. ((uint32_t)(rx_desc->errors) << 24),
  2898. rx_desc->csum, skb);
  2899. skb->protocol = eth_type_trans(skb, netdev);
  2900. #ifdef CONFIG_E1000_NAPI
  2901. if(unlikely(adapter->vlgrp &&
  2902. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2903. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2904. le16_to_cpu(rx_desc->special) &
  2905. E1000_RXD_SPC_VLAN_MASK);
  2906. } else {
  2907. netif_receive_skb(skb);
  2908. }
  2909. #else /* CONFIG_E1000_NAPI */
  2910. if(unlikely(adapter->vlgrp &&
  2911. (rx_desc->status & E1000_RXD_STAT_VP))) {
  2912. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2913. le16_to_cpu(rx_desc->special) &
  2914. E1000_RXD_SPC_VLAN_MASK);
  2915. } else {
  2916. netif_rx(skb);
  2917. }
  2918. #endif /* CONFIG_E1000_NAPI */
  2919. netdev->last_rx = jiffies;
  2920. rx_ring->pkt++;
  2921. next_desc:
  2922. rx_desc->status = 0;
  2923. buffer_info->skb = NULL;
  2924. if(unlikely(++i == rx_ring->count)) i = 0;
  2925. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2926. }
  2927. rx_ring->next_to_clean = i;
  2928. adapter->alloc_rx_buf(adapter, rx_ring);
  2929. return cleaned;
  2930. }
  2931. /**
  2932. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  2933. * @adapter: board private structure
  2934. **/
  2935. static boolean_t
  2936. #ifdef CONFIG_E1000_NAPI
  2937. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  2938. struct e1000_rx_ring *rx_ring,
  2939. int *work_done, int work_to_do)
  2940. #else
  2941. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  2942. struct e1000_rx_ring *rx_ring)
  2943. #endif
  2944. {
  2945. union e1000_rx_desc_packet_split *rx_desc;
  2946. struct net_device *netdev = adapter->netdev;
  2947. struct pci_dev *pdev = adapter->pdev;
  2948. struct e1000_buffer *buffer_info;
  2949. struct e1000_ps_page *ps_page;
  2950. struct e1000_ps_page_dma *ps_page_dma;
  2951. struct sk_buff *skb;
  2952. unsigned int i, j;
  2953. uint32_t length, staterr;
  2954. boolean_t cleaned = FALSE;
  2955. i = rx_ring->next_to_clean;
  2956. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  2957. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  2958. while(staterr & E1000_RXD_STAT_DD) {
  2959. buffer_info = &rx_ring->buffer_info[i];
  2960. ps_page = &rx_ring->ps_page[i];
  2961. ps_page_dma = &rx_ring->ps_page_dma[i];
  2962. #ifdef CONFIG_E1000_NAPI
  2963. if(unlikely(*work_done >= work_to_do))
  2964. break;
  2965. (*work_done)++;
  2966. #endif
  2967. cleaned = TRUE;
  2968. pci_unmap_single(pdev, buffer_info->dma,
  2969. buffer_info->length,
  2970. PCI_DMA_FROMDEVICE);
  2971. skb = buffer_info->skb;
  2972. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  2973. E1000_DBG("%s: Packet Split buffers didn't pick up"
  2974. " the full packet\n", netdev->name);
  2975. dev_kfree_skb_irq(skb);
  2976. goto next_desc;
  2977. }
  2978. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  2979. dev_kfree_skb_irq(skb);
  2980. goto next_desc;
  2981. }
  2982. length = le16_to_cpu(rx_desc->wb.middle.length0);
  2983. if(unlikely(!length)) {
  2984. E1000_DBG("%s: Last part of the packet spanning"
  2985. " multiple descriptors\n", netdev->name);
  2986. dev_kfree_skb_irq(skb);
  2987. goto next_desc;
  2988. }
  2989. /* Good Receive */
  2990. skb_put(skb, length);
  2991. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  2992. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  2993. break;
  2994. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  2995. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  2996. ps_page_dma->ps_page_dma[j] = 0;
  2997. skb_shinfo(skb)->frags[j].page =
  2998. ps_page->ps_page[j];
  2999. ps_page->ps_page[j] = NULL;
  3000. skb_shinfo(skb)->frags[j].page_offset = 0;
  3001. skb_shinfo(skb)->frags[j].size = length;
  3002. skb_shinfo(skb)->nr_frags++;
  3003. skb->len += length;
  3004. skb->data_len += length;
  3005. }
  3006. e1000_rx_checksum(adapter, staterr,
  3007. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3008. skb->protocol = eth_type_trans(skb, netdev);
  3009. #ifdef HAVE_RX_ZERO_COPY
  3010. if(likely(rx_desc->wb.upper.header_status &
  3011. E1000_RXDPS_HDRSTAT_HDRSP))
  3012. skb_shinfo(skb)->zero_copy = TRUE;
  3013. #endif
  3014. #ifdef CONFIG_E1000_NAPI
  3015. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3016. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3017. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3018. E1000_RXD_SPC_VLAN_MASK);
  3019. } else {
  3020. netif_receive_skb(skb);
  3021. }
  3022. #else /* CONFIG_E1000_NAPI */
  3023. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3024. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3025. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3026. E1000_RXD_SPC_VLAN_MASK);
  3027. } else {
  3028. netif_rx(skb);
  3029. }
  3030. #endif /* CONFIG_E1000_NAPI */
  3031. netdev->last_rx = jiffies;
  3032. rx_ring->pkt++;
  3033. next_desc:
  3034. rx_desc->wb.middle.status_error &= ~0xFF;
  3035. buffer_info->skb = NULL;
  3036. if(unlikely(++i == rx_ring->count)) i = 0;
  3037. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3038. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3039. }
  3040. rx_ring->next_to_clean = i;
  3041. adapter->alloc_rx_buf(adapter, rx_ring);
  3042. return cleaned;
  3043. }
  3044. /**
  3045. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3046. * @adapter: address of board private structure
  3047. **/
  3048. static void
  3049. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3050. struct e1000_rx_ring *rx_ring)
  3051. {
  3052. struct net_device *netdev = adapter->netdev;
  3053. struct pci_dev *pdev = adapter->pdev;
  3054. struct e1000_rx_desc *rx_desc;
  3055. struct e1000_buffer *buffer_info;
  3056. struct sk_buff *skb;
  3057. unsigned int i;
  3058. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3059. i = rx_ring->next_to_use;
  3060. buffer_info = &rx_ring->buffer_info[i];
  3061. while(!buffer_info->skb) {
  3062. skb = dev_alloc_skb(bufsz);
  3063. if(unlikely(!skb)) {
  3064. /* Better luck next round */
  3065. break;
  3066. }
  3067. /* Fix for errata 23, can't cross 64kB boundary */
  3068. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3069. struct sk_buff *oldskb = skb;
  3070. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3071. "at %p\n", bufsz, skb->data);
  3072. /* Try again, without freeing the previous */
  3073. skb = dev_alloc_skb(bufsz);
  3074. /* Failed allocation, critical failure */
  3075. if (!skb) {
  3076. dev_kfree_skb(oldskb);
  3077. break;
  3078. }
  3079. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3080. /* give up */
  3081. dev_kfree_skb(skb);
  3082. dev_kfree_skb(oldskb);
  3083. break; /* while !buffer_info->skb */
  3084. } else {
  3085. /* Use new allocation */
  3086. dev_kfree_skb(oldskb);
  3087. }
  3088. }
  3089. /* Make buffer alignment 2 beyond a 16 byte boundary
  3090. * this will result in a 16 byte aligned IP header after
  3091. * the 14 byte MAC header is removed
  3092. */
  3093. skb_reserve(skb, NET_IP_ALIGN);
  3094. skb->dev = netdev;
  3095. buffer_info->skb = skb;
  3096. buffer_info->length = adapter->rx_buffer_len;
  3097. buffer_info->dma = pci_map_single(pdev,
  3098. skb->data,
  3099. adapter->rx_buffer_len,
  3100. PCI_DMA_FROMDEVICE);
  3101. /* Fix for errata 23, can't cross 64kB boundary */
  3102. if (!e1000_check_64k_bound(adapter,
  3103. (void *)(unsigned long)buffer_info->dma,
  3104. adapter->rx_buffer_len)) {
  3105. DPRINTK(RX_ERR, ERR,
  3106. "dma align check failed: %u bytes at %p\n",
  3107. adapter->rx_buffer_len,
  3108. (void *)(unsigned long)buffer_info->dma);
  3109. dev_kfree_skb(skb);
  3110. buffer_info->skb = NULL;
  3111. pci_unmap_single(pdev, buffer_info->dma,
  3112. adapter->rx_buffer_len,
  3113. PCI_DMA_FROMDEVICE);
  3114. break; /* while !buffer_info->skb */
  3115. }
  3116. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3117. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3118. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3119. /* Force memory writes to complete before letting h/w
  3120. * know there are new descriptors to fetch. (Only
  3121. * applicable for weak-ordered memory model archs,
  3122. * such as IA-64). */
  3123. wmb();
  3124. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3125. }
  3126. if(unlikely(++i == rx_ring->count)) i = 0;
  3127. buffer_info = &rx_ring->buffer_info[i];
  3128. }
  3129. rx_ring->next_to_use = i;
  3130. }
  3131. /**
  3132. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3133. * @adapter: address of board private structure
  3134. **/
  3135. static void
  3136. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3137. struct e1000_rx_ring *rx_ring)
  3138. {
  3139. struct net_device *netdev = adapter->netdev;
  3140. struct pci_dev *pdev = adapter->pdev;
  3141. union e1000_rx_desc_packet_split *rx_desc;
  3142. struct e1000_buffer *buffer_info;
  3143. struct e1000_ps_page *ps_page;
  3144. struct e1000_ps_page_dma *ps_page_dma;
  3145. struct sk_buff *skb;
  3146. unsigned int i, j;
  3147. i = rx_ring->next_to_use;
  3148. buffer_info = &rx_ring->buffer_info[i];
  3149. ps_page = &rx_ring->ps_page[i];
  3150. ps_page_dma = &rx_ring->ps_page_dma[i];
  3151. while(!buffer_info->skb) {
  3152. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3153. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  3154. if(unlikely(!ps_page->ps_page[j])) {
  3155. ps_page->ps_page[j] =
  3156. alloc_page(GFP_ATOMIC);
  3157. if(unlikely(!ps_page->ps_page[j]))
  3158. goto no_buffers;
  3159. ps_page_dma->ps_page_dma[j] =
  3160. pci_map_page(pdev,
  3161. ps_page->ps_page[j],
  3162. 0, PAGE_SIZE,
  3163. PCI_DMA_FROMDEVICE);
  3164. }
  3165. /* Refresh the desc even if buffer_addrs didn't
  3166. * change because each write-back erases this info.
  3167. */
  3168. rx_desc->read.buffer_addr[j+1] =
  3169. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3170. }
  3171. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3172. if(unlikely(!skb))
  3173. break;
  3174. /* Make buffer alignment 2 beyond a 16 byte boundary
  3175. * this will result in a 16 byte aligned IP header after
  3176. * the 14 byte MAC header is removed
  3177. */
  3178. skb_reserve(skb, NET_IP_ALIGN);
  3179. skb->dev = netdev;
  3180. buffer_info->skb = skb;
  3181. buffer_info->length = adapter->rx_ps_bsize0;
  3182. buffer_info->dma = pci_map_single(pdev, skb->data,
  3183. adapter->rx_ps_bsize0,
  3184. PCI_DMA_FROMDEVICE);
  3185. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3186. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3187. /* Force memory writes to complete before letting h/w
  3188. * know there are new descriptors to fetch. (Only
  3189. * applicable for weak-ordered memory model archs,
  3190. * such as IA-64). */
  3191. wmb();
  3192. /* Hardware increments by 16 bytes, but packet split
  3193. * descriptors are 32 bytes...so we increment tail
  3194. * twice as much.
  3195. */
  3196. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3197. }
  3198. if(unlikely(++i == rx_ring->count)) i = 0;
  3199. buffer_info = &rx_ring->buffer_info[i];
  3200. ps_page = &rx_ring->ps_page[i];
  3201. ps_page_dma = &rx_ring->ps_page_dma[i];
  3202. }
  3203. no_buffers:
  3204. rx_ring->next_to_use = i;
  3205. }
  3206. /**
  3207. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3208. * @adapter:
  3209. **/
  3210. static void
  3211. e1000_smartspeed(struct e1000_adapter *adapter)
  3212. {
  3213. uint16_t phy_status;
  3214. uint16_t phy_ctrl;
  3215. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3216. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3217. return;
  3218. if(adapter->smartspeed == 0) {
  3219. /* If Master/Slave config fault is asserted twice,
  3220. * we assume back-to-back */
  3221. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3222. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3223. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3224. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3225. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3226. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  3227. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3228. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3229. phy_ctrl);
  3230. adapter->smartspeed++;
  3231. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3232. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3233. &phy_ctrl)) {
  3234. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3235. MII_CR_RESTART_AUTO_NEG);
  3236. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3237. phy_ctrl);
  3238. }
  3239. }
  3240. return;
  3241. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3242. /* If still no link, perhaps using 2/3 pair cable */
  3243. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3244. phy_ctrl |= CR_1000T_MS_ENABLE;
  3245. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3246. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3247. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3248. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3249. MII_CR_RESTART_AUTO_NEG);
  3250. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3251. }
  3252. }
  3253. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3254. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3255. adapter->smartspeed = 0;
  3256. }
  3257. /**
  3258. * e1000_ioctl -
  3259. * @netdev:
  3260. * @ifreq:
  3261. * @cmd:
  3262. **/
  3263. static int
  3264. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3265. {
  3266. switch (cmd) {
  3267. case SIOCGMIIPHY:
  3268. case SIOCGMIIREG:
  3269. case SIOCSMIIREG:
  3270. return e1000_mii_ioctl(netdev, ifr, cmd);
  3271. default:
  3272. return -EOPNOTSUPP;
  3273. }
  3274. }
  3275. /**
  3276. * e1000_mii_ioctl -
  3277. * @netdev:
  3278. * @ifreq:
  3279. * @cmd:
  3280. **/
  3281. static int
  3282. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3283. {
  3284. struct e1000_adapter *adapter = netdev_priv(netdev);
  3285. struct mii_ioctl_data *data = if_mii(ifr);
  3286. int retval;
  3287. uint16_t mii_reg;
  3288. uint16_t spddplx;
  3289. unsigned long flags;
  3290. if(adapter->hw.media_type != e1000_media_type_copper)
  3291. return -EOPNOTSUPP;
  3292. switch (cmd) {
  3293. case SIOCGMIIPHY:
  3294. data->phy_id = adapter->hw.phy_addr;
  3295. break;
  3296. case SIOCGMIIREG:
  3297. if(!capable(CAP_NET_ADMIN))
  3298. return -EPERM;
  3299. spin_lock_irqsave(&adapter->stats_lock, flags);
  3300. if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3301. &data->val_out)) {
  3302. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3303. return -EIO;
  3304. }
  3305. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3306. break;
  3307. case SIOCSMIIREG:
  3308. if(!capable(CAP_NET_ADMIN))
  3309. return -EPERM;
  3310. if(data->reg_num & ~(0x1F))
  3311. return -EFAULT;
  3312. mii_reg = data->val_in;
  3313. spin_lock_irqsave(&adapter->stats_lock, flags);
  3314. if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3315. mii_reg)) {
  3316. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3317. return -EIO;
  3318. }
  3319. if(adapter->hw.phy_type == e1000_phy_m88) {
  3320. switch (data->reg_num) {
  3321. case PHY_CTRL:
  3322. if(mii_reg & MII_CR_POWER_DOWN)
  3323. break;
  3324. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  3325. adapter->hw.autoneg = 1;
  3326. adapter->hw.autoneg_advertised = 0x2F;
  3327. } else {
  3328. if (mii_reg & 0x40)
  3329. spddplx = SPEED_1000;
  3330. else if (mii_reg & 0x2000)
  3331. spddplx = SPEED_100;
  3332. else
  3333. spddplx = SPEED_10;
  3334. spddplx += (mii_reg & 0x100)
  3335. ? FULL_DUPLEX :
  3336. HALF_DUPLEX;
  3337. retval = e1000_set_spd_dplx(adapter,
  3338. spddplx);
  3339. if(retval) {
  3340. spin_unlock_irqrestore(
  3341. &adapter->stats_lock,
  3342. flags);
  3343. return retval;
  3344. }
  3345. }
  3346. if(netif_running(adapter->netdev)) {
  3347. e1000_down(adapter);
  3348. e1000_up(adapter);
  3349. } else
  3350. e1000_reset(adapter);
  3351. break;
  3352. case M88E1000_PHY_SPEC_CTRL:
  3353. case M88E1000_EXT_PHY_SPEC_CTRL:
  3354. if(e1000_phy_reset(&adapter->hw)) {
  3355. spin_unlock_irqrestore(
  3356. &adapter->stats_lock, flags);
  3357. return -EIO;
  3358. }
  3359. break;
  3360. }
  3361. } else {
  3362. switch (data->reg_num) {
  3363. case PHY_CTRL:
  3364. if(mii_reg & MII_CR_POWER_DOWN)
  3365. break;
  3366. if(netif_running(adapter->netdev)) {
  3367. e1000_down(adapter);
  3368. e1000_up(adapter);
  3369. } else
  3370. e1000_reset(adapter);
  3371. break;
  3372. }
  3373. }
  3374. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3375. break;
  3376. default:
  3377. return -EOPNOTSUPP;
  3378. }
  3379. return E1000_SUCCESS;
  3380. }
  3381. void
  3382. e1000_pci_set_mwi(struct e1000_hw *hw)
  3383. {
  3384. struct e1000_adapter *adapter = hw->back;
  3385. int ret_val = pci_set_mwi(adapter->pdev);
  3386. if(ret_val)
  3387. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3388. }
  3389. void
  3390. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3391. {
  3392. struct e1000_adapter *adapter = hw->back;
  3393. pci_clear_mwi(adapter->pdev);
  3394. }
  3395. void
  3396. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3397. {
  3398. struct e1000_adapter *adapter = hw->back;
  3399. pci_read_config_word(adapter->pdev, reg, value);
  3400. }
  3401. void
  3402. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3403. {
  3404. struct e1000_adapter *adapter = hw->back;
  3405. pci_write_config_word(adapter->pdev, reg, *value);
  3406. }
  3407. uint32_t
  3408. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3409. {
  3410. return inl(port);
  3411. }
  3412. void
  3413. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3414. {
  3415. outl(value, port);
  3416. }
  3417. static void
  3418. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3419. {
  3420. struct e1000_adapter *adapter = netdev_priv(netdev);
  3421. uint32_t ctrl, rctl;
  3422. e1000_irq_disable(adapter);
  3423. adapter->vlgrp = grp;
  3424. if(grp) {
  3425. /* enable VLAN tag insert/strip */
  3426. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3427. ctrl |= E1000_CTRL_VME;
  3428. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3429. /* enable VLAN receive filtering */
  3430. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3431. rctl |= E1000_RCTL_VFE;
  3432. rctl &= ~E1000_RCTL_CFIEN;
  3433. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3434. e1000_update_mng_vlan(adapter);
  3435. } else {
  3436. /* disable VLAN tag insert/strip */
  3437. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3438. ctrl &= ~E1000_CTRL_VME;
  3439. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3440. /* disable VLAN filtering */
  3441. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3442. rctl &= ~E1000_RCTL_VFE;
  3443. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3444. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3445. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3446. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3447. }
  3448. }
  3449. e1000_irq_enable(adapter);
  3450. }
  3451. static void
  3452. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3453. {
  3454. struct e1000_adapter *adapter = netdev_priv(netdev);
  3455. uint32_t vfta, index;
  3456. if((adapter->hw.mng_cookie.status &
  3457. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3458. (vid == adapter->mng_vlan_id))
  3459. return;
  3460. /* add VID to filter table */
  3461. index = (vid >> 5) & 0x7F;
  3462. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3463. vfta |= (1 << (vid & 0x1F));
  3464. e1000_write_vfta(&adapter->hw, index, vfta);
  3465. }
  3466. static void
  3467. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3468. {
  3469. struct e1000_adapter *adapter = netdev_priv(netdev);
  3470. uint32_t vfta, index;
  3471. e1000_irq_disable(adapter);
  3472. if(adapter->vlgrp)
  3473. adapter->vlgrp->vlan_devices[vid] = NULL;
  3474. e1000_irq_enable(adapter);
  3475. if((adapter->hw.mng_cookie.status &
  3476. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3477. (vid == adapter->mng_vlan_id))
  3478. return;
  3479. /* remove VID from filter table */
  3480. index = (vid >> 5) & 0x7F;
  3481. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3482. vfta &= ~(1 << (vid & 0x1F));
  3483. e1000_write_vfta(&adapter->hw, index, vfta);
  3484. }
  3485. static void
  3486. e1000_restore_vlan(struct e1000_adapter *adapter)
  3487. {
  3488. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3489. if(adapter->vlgrp) {
  3490. uint16_t vid;
  3491. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3492. if(!adapter->vlgrp->vlan_devices[vid])
  3493. continue;
  3494. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3495. }
  3496. }
  3497. }
  3498. int
  3499. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3500. {
  3501. adapter->hw.autoneg = 0;
  3502. /* Fiber NICs only allow 1000 gbps Full duplex */
  3503. if((adapter->hw.media_type == e1000_media_type_fiber) &&
  3504. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3505. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3506. return -EINVAL;
  3507. }
  3508. switch(spddplx) {
  3509. case SPEED_10 + DUPLEX_HALF:
  3510. adapter->hw.forced_speed_duplex = e1000_10_half;
  3511. break;
  3512. case SPEED_10 + DUPLEX_FULL:
  3513. adapter->hw.forced_speed_duplex = e1000_10_full;
  3514. break;
  3515. case SPEED_100 + DUPLEX_HALF:
  3516. adapter->hw.forced_speed_duplex = e1000_100_half;
  3517. break;
  3518. case SPEED_100 + DUPLEX_FULL:
  3519. adapter->hw.forced_speed_duplex = e1000_100_full;
  3520. break;
  3521. case SPEED_1000 + DUPLEX_FULL:
  3522. adapter->hw.autoneg = 1;
  3523. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3524. break;
  3525. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3526. default:
  3527. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3528. return -EINVAL;
  3529. }
  3530. return 0;
  3531. }
  3532. static int
  3533. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3534. {
  3535. struct net_device *netdev = pci_get_drvdata(pdev);
  3536. struct e1000_adapter *adapter = netdev_priv(netdev);
  3537. uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
  3538. uint32_t wufc = adapter->wol;
  3539. netif_device_detach(netdev);
  3540. if(netif_running(netdev))
  3541. e1000_down(adapter);
  3542. status = E1000_READ_REG(&adapter->hw, STATUS);
  3543. if(status & E1000_STATUS_LU)
  3544. wufc &= ~E1000_WUFC_LNKC;
  3545. if(wufc) {
  3546. e1000_setup_rctl(adapter);
  3547. e1000_set_multi(netdev);
  3548. /* turn on all-multi mode if wake on multicast is enabled */
  3549. if(adapter->wol & E1000_WUFC_MC) {
  3550. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3551. rctl |= E1000_RCTL_MPE;
  3552. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3553. }
  3554. if(adapter->hw.mac_type >= e1000_82540) {
  3555. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3556. /* advertise wake from D3Cold */
  3557. #define E1000_CTRL_ADVD3WUC 0x00100000
  3558. /* phy power management enable */
  3559. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3560. ctrl |= E1000_CTRL_ADVD3WUC |
  3561. E1000_CTRL_EN_PHY_PWR_MGMT;
  3562. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3563. }
  3564. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3565. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3566. /* keep the laser running in D3 */
  3567. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3568. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3569. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3570. }
  3571. /* Allow time for pending master requests to run */
  3572. e1000_disable_pciex_master(&adapter->hw);
  3573. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3574. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3575. pci_enable_wake(pdev, 3, 1);
  3576. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3577. } else {
  3578. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3579. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3580. pci_enable_wake(pdev, 3, 0);
  3581. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3582. }
  3583. pci_save_state(pdev);
  3584. if(adapter->hw.mac_type >= e1000_82540 &&
  3585. adapter->hw.media_type == e1000_media_type_copper) {
  3586. manc = E1000_READ_REG(&adapter->hw, MANC);
  3587. if(manc & E1000_MANC_SMBUS_EN) {
  3588. manc |= E1000_MANC_ARP_EN;
  3589. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3590. pci_enable_wake(pdev, 3, 1);
  3591. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3592. }
  3593. }
  3594. switch(adapter->hw.mac_type) {
  3595. case e1000_82571:
  3596. case e1000_82572:
  3597. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3598. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  3599. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  3600. break;
  3601. case e1000_82573:
  3602. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3603. E1000_WRITE_REG(&adapter->hw, SWSM,
  3604. swsm & ~E1000_SWSM_DRV_LOAD);
  3605. break;
  3606. default:
  3607. break;
  3608. }
  3609. pci_disable_device(pdev);
  3610. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3611. return 0;
  3612. }
  3613. #ifdef CONFIG_PM
  3614. static int
  3615. e1000_resume(struct pci_dev *pdev)
  3616. {
  3617. struct net_device *netdev = pci_get_drvdata(pdev);
  3618. struct e1000_adapter *adapter = netdev_priv(netdev);
  3619. uint32_t manc, ret_val, swsm;
  3620. uint32_t ctrl_ext;
  3621. pci_set_power_state(pdev, PCI_D0);
  3622. pci_restore_state(pdev);
  3623. ret_val = pci_enable_device(pdev);
  3624. pci_set_master(pdev);
  3625. pci_enable_wake(pdev, PCI_D3hot, 0);
  3626. pci_enable_wake(pdev, PCI_D3cold, 0);
  3627. e1000_reset(adapter);
  3628. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3629. if(netif_running(netdev))
  3630. e1000_up(adapter);
  3631. netif_device_attach(netdev);
  3632. if(adapter->hw.mac_type >= e1000_82540 &&
  3633. adapter->hw.media_type == e1000_media_type_copper) {
  3634. manc = E1000_READ_REG(&adapter->hw, MANC);
  3635. manc &= ~(E1000_MANC_ARP_EN);
  3636. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3637. }
  3638. switch(adapter->hw.mac_type) {
  3639. case e1000_82571:
  3640. case e1000_82572:
  3641. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3642. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  3643. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  3644. break;
  3645. case e1000_82573:
  3646. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  3647. E1000_WRITE_REG(&adapter->hw, SWSM,
  3648. swsm | E1000_SWSM_DRV_LOAD);
  3649. break;
  3650. default:
  3651. break;
  3652. }
  3653. return 0;
  3654. }
  3655. #endif
  3656. #ifdef CONFIG_NET_POLL_CONTROLLER
  3657. /*
  3658. * Polling 'interrupt' - used by things like netconsole to send skbs
  3659. * without having to re-enable interrupts. It's not called while
  3660. * the interrupt routine is executing.
  3661. */
  3662. static void
  3663. e1000_netpoll(struct net_device *netdev)
  3664. {
  3665. struct e1000_adapter *adapter = netdev_priv(netdev);
  3666. disable_irq(adapter->pdev->irq);
  3667. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3668. e1000_clean_tx_irq(adapter);
  3669. enable_irq(adapter->pdev->irq);
  3670. }
  3671. #endif
  3672. /* e1000_main.c */