xhci-hcd.c 39 KB

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  1. /*
  2. * xHCI host controller driver
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/irq.h>
  23. #include <linux/module.h>
  24. #include "xhci.h"
  25. #define DRIVER_AUTHOR "Sarah Sharp"
  26. #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
  27. /* TODO: copied from ehci-hcd.c - can this be refactored? */
  28. /*
  29. * handshake - spin reading hc until handshake completes or fails
  30. * @ptr: address of hc register to be read
  31. * @mask: bits to look at in result of read
  32. * @done: value of those bits when handshake succeeds
  33. * @usec: timeout in microseconds
  34. *
  35. * Returns negative errno, or zero on success
  36. *
  37. * Success happens when the "mask" bits have the specified value (hardware
  38. * handshake done). There are two failure modes: "usec" have passed (major
  39. * hardware flakeout), or the register reads as all-ones (hardware removed).
  40. */
  41. static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
  42. u32 mask, u32 done, int usec)
  43. {
  44. u32 result;
  45. do {
  46. result = xhci_readl(xhci, ptr);
  47. if (result == ~(u32)0) /* card removed */
  48. return -ENODEV;
  49. result &= mask;
  50. if (result == done)
  51. return 0;
  52. udelay(1);
  53. usec--;
  54. } while (usec > 0);
  55. return -ETIMEDOUT;
  56. }
  57. /*
  58. * Force HC into halt state.
  59. *
  60. * Disable any IRQs and clear the run/stop bit.
  61. * HC will complete any current and actively pipelined transactions, and
  62. * should halt within 16 microframes of the run/stop bit being cleared.
  63. * Read HC Halted bit in the status register to see when the HC is finished.
  64. * XXX: shouldn't we set HC_STATE_HALT here somewhere?
  65. */
  66. int xhci_halt(struct xhci_hcd *xhci)
  67. {
  68. u32 halted;
  69. u32 cmd;
  70. u32 mask;
  71. xhci_dbg(xhci, "// Halt the HC\n");
  72. /* Disable all interrupts from the host controller */
  73. mask = ~(XHCI_IRQS);
  74. halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
  75. if (!halted)
  76. mask &= ~CMD_RUN;
  77. cmd = xhci_readl(xhci, &xhci->op_regs->command);
  78. cmd &= mask;
  79. xhci_writel(xhci, cmd, &xhci->op_regs->command);
  80. return handshake(xhci, &xhci->op_regs->status,
  81. STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
  82. }
  83. /*
  84. * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
  85. *
  86. * This resets pipelines, timers, counters, state machines, etc.
  87. * Transactions will be terminated immediately, and operational registers
  88. * will be set to their defaults.
  89. */
  90. int xhci_reset(struct xhci_hcd *xhci)
  91. {
  92. u32 command;
  93. u32 state;
  94. state = xhci_readl(xhci, &xhci->op_regs->status);
  95. BUG_ON((state & STS_HALT) == 0);
  96. xhci_dbg(xhci, "// Reset the HC\n");
  97. command = xhci_readl(xhci, &xhci->op_regs->command);
  98. command |= CMD_RESET;
  99. xhci_writel(xhci, command, &xhci->op_regs->command);
  100. /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
  101. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  102. return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
  103. }
  104. /*
  105. * Stop the HC from processing the endpoint queues.
  106. */
  107. static void xhci_quiesce(struct xhci_hcd *xhci)
  108. {
  109. /*
  110. * Queues are per endpoint, so we need to disable an endpoint or slot.
  111. *
  112. * To disable a slot, we need to insert a disable slot command on the
  113. * command ring and ring the doorbell. This will also free any internal
  114. * resources associated with the slot (which might not be what we want).
  115. *
  116. * A Release Endpoint command sounds better - doesn't free internal HC
  117. * memory, but removes the endpoints from the schedule and releases the
  118. * bandwidth, disables the doorbells, and clears the endpoint enable
  119. * flag. Usually used prior to a set interface command.
  120. *
  121. * TODO: Implement after command ring code is done.
  122. */
  123. BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state));
  124. xhci_dbg(xhci, "Finished quiescing -- code not written yet\n");
  125. }
  126. #if 0
  127. /* Set up MSI-X table for entry 0 (may claim other entries later) */
  128. static int xhci_setup_msix(struct xhci_hcd *xhci)
  129. {
  130. int ret;
  131. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  132. xhci->msix_count = 0;
  133. /* XXX: did I do this right? ixgbe does kcalloc for more than one */
  134. xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
  135. if (!xhci->msix_entries) {
  136. xhci_err(xhci, "Failed to allocate MSI-X entries\n");
  137. return -ENOMEM;
  138. }
  139. xhci->msix_entries[0].entry = 0;
  140. ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
  141. if (ret) {
  142. xhci_err(xhci, "Failed to enable MSI-X\n");
  143. goto free_entries;
  144. }
  145. /*
  146. * Pass the xhci pointer value as the request_irq "cookie".
  147. * If more irqs are added, this will need to be unique for each one.
  148. */
  149. ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
  150. "xHCI", xhci_to_hcd(xhci));
  151. if (ret) {
  152. xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
  153. goto disable_msix;
  154. }
  155. xhci_dbg(xhci, "Finished setting up MSI-X\n");
  156. return 0;
  157. disable_msix:
  158. pci_disable_msix(pdev);
  159. free_entries:
  160. kfree(xhci->msix_entries);
  161. xhci->msix_entries = NULL;
  162. return ret;
  163. }
  164. /* XXX: code duplication; can xhci_setup_msix call this? */
  165. /* Free any IRQs and disable MSI-X */
  166. static void xhci_cleanup_msix(struct xhci_hcd *xhci)
  167. {
  168. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  169. if (!xhci->msix_entries)
  170. return;
  171. free_irq(xhci->msix_entries[0].vector, xhci);
  172. pci_disable_msix(pdev);
  173. kfree(xhci->msix_entries);
  174. xhci->msix_entries = NULL;
  175. xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
  176. }
  177. #endif
  178. /*
  179. * Initialize memory for HCD and xHC (one-time init).
  180. *
  181. * Program the PAGESIZE register, initialize the device context array, create
  182. * device contexts (?), set up a command ring segment (or two?), create event
  183. * ring (one for now).
  184. */
  185. int xhci_init(struct usb_hcd *hcd)
  186. {
  187. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  188. int retval = 0;
  189. xhci_dbg(xhci, "xhci_init\n");
  190. spin_lock_init(&xhci->lock);
  191. retval = xhci_mem_init(xhci, GFP_KERNEL);
  192. xhci_dbg(xhci, "Finished xhci_init\n");
  193. return retval;
  194. }
  195. /*
  196. * Called in interrupt context when there might be work
  197. * queued on the event ring
  198. *
  199. * xhci->lock must be held by caller.
  200. */
  201. static void xhci_work(struct xhci_hcd *xhci)
  202. {
  203. u32 temp;
  204. /*
  205. * Clear the op reg interrupt status first,
  206. * so we can receive interrupts from other MSI-X interrupters.
  207. * Write 1 to clear the interrupt status.
  208. */
  209. temp = xhci_readl(xhci, &xhci->op_regs->status);
  210. temp |= STS_EINT;
  211. xhci_writel(xhci, temp, &xhci->op_regs->status);
  212. /* FIXME when MSI-X is supported and there are multiple vectors */
  213. /* Clear the MSI-X event interrupt status */
  214. /* Acknowledge the interrupt */
  215. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  216. temp |= 0x3;
  217. xhci_writel(xhci, temp, &xhci->ir_set->irq_pending);
  218. /* Flush posted writes */
  219. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  220. /* FIXME this should be a delayed service routine that clears the EHB */
  221. xhci_handle_event(xhci);
  222. /* Clear the event handler busy flag; the event ring should be empty. */
  223. temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
  224. xhci_writel(xhci, temp & ~ERST_EHB, &xhci->ir_set->erst_dequeue[0]);
  225. /* Flush posted writes -- FIXME is this necessary? */
  226. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  227. }
  228. /*-------------------------------------------------------------------------*/
  229. /*
  230. * xHCI spec says we can get an interrupt, and if the HC has an error condition,
  231. * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
  232. * indicators of an event TRB error, but we check the status *first* to be safe.
  233. */
  234. irqreturn_t xhci_irq(struct usb_hcd *hcd)
  235. {
  236. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  237. u32 temp, temp2;
  238. spin_lock(&xhci->lock);
  239. /* Check if the xHC generated the interrupt, or the irq is shared */
  240. temp = xhci_readl(xhci, &xhci->op_regs->status);
  241. temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  242. if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
  243. spin_unlock(&xhci->lock);
  244. return IRQ_NONE;
  245. }
  246. temp = xhci_readl(xhci, &xhci->op_regs->status);
  247. if (temp & STS_FATAL) {
  248. xhci_warn(xhci, "WARNING: Host System Error\n");
  249. xhci_halt(xhci);
  250. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  251. return -ESHUTDOWN;
  252. }
  253. xhci_work(xhci);
  254. spin_unlock(&xhci->lock);
  255. return IRQ_HANDLED;
  256. }
  257. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  258. void xhci_event_ring_work(unsigned long arg)
  259. {
  260. unsigned long flags;
  261. int temp;
  262. struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
  263. int i, j;
  264. xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
  265. spin_lock_irqsave(&xhci->lock, flags);
  266. temp = xhci_readl(xhci, &xhci->op_regs->status);
  267. xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
  268. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  269. xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
  270. xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
  271. xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
  272. xhci->error_bitmask = 0;
  273. xhci_dbg(xhci, "Event ring:\n");
  274. xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
  275. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  276. temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
  277. temp &= ERST_PTR_MASK;
  278. xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
  279. xhci_dbg(xhci, "Command ring:\n");
  280. xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
  281. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  282. xhci_dbg_cmd_ptrs(xhci);
  283. for (i = 0; i < MAX_HC_SLOTS; ++i) {
  284. if (xhci->devs[i]) {
  285. for (j = 0; j < 31; ++j) {
  286. if (xhci->devs[i]->ep_rings[j]) {
  287. xhci_dbg(xhci, "Dev %d endpoint ring %d:\n", i, j);
  288. xhci_debug_segment(xhci, xhci->devs[i]->ep_rings[j]->deq_seg);
  289. }
  290. }
  291. }
  292. }
  293. if (xhci->noops_submitted != NUM_TEST_NOOPS)
  294. if (xhci_setup_one_noop(xhci))
  295. xhci_ring_cmd_db(xhci);
  296. spin_unlock_irqrestore(&xhci->lock, flags);
  297. if (!xhci->zombie)
  298. mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
  299. else
  300. xhci_dbg(xhci, "Quit polling the event ring.\n");
  301. }
  302. #endif
  303. /*
  304. * Start the HC after it was halted.
  305. *
  306. * This function is called by the USB core when the HC driver is added.
  307. * Its opposite is xhci_stop().
  308. *
  309. * xhci_init() must be called once before this function can be called.
  310. * Reset the HC, enable device slot contexts, program DCBAAP, and
  311. * set command ring pointer and event ring pointer.
  312. *
  313. * Setup MSI-X vectors and enable interrupts.
  314. */
  315. int xhci_run(struct usb_hcd *hcd)
  316. {
  317. u32 temp;
  318. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  319. void (*doorbell)(struct xhci_hcd *) = NULL;
  320. hcd->uses_new_polling = 1;
  321. hcd->poll_rh = 0;
  322. xhci_dbg(xhci, "xhci_run\n");
  323. #if 0 /* FIXME: MSI not setup yet */
  324. /* Do this at the very last minute */
  325. ret = xhci_setup_msix(xhci);
  326. if (!ret)
  327. return ret;
  328. return -ENOSYS;
  329. #endif
  330. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  331. init_timer(&xhci->event_ring_timer);
  332. xhci->event_ring_timer.data = (unsigned long) xhci;
  333. xhci->event_ring_timer.function = xhci_event_ring_work;
  334. /* Poll the event ring */
  335. xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
  336. xhci->zombie = 0;
  337. xhci_dbg(xhci, "Setting event ring polling timer\n");
  338. add_timer(&xhci->event_ring_timer);
  339. #endif
  340. xhci_dbg(xhci, "// Set the interrupt modulation register\n");
  341. temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
  342. temp &= 0xffff;
  343. temp |= (u32) 160;
  344. xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
  345. /* Set the HCD state before we enable the irqs */
  346. hcd->state = HC_STATE_RUNNING;
  347. temp = xhci_readl(xhci, &xhci->op_regs->command);
  348. temp |= (CMD_EIE);
  349. xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
  350. temp);
  351. xhci_writel(xhci, temp, &xhci->op_regs->command);
  352. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  353. xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
  354. xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
  355. xhci_writel(xhci, ER_IRQ_ENABLE(temp),
  356. &xhci->ir_set->irq_pending);
  357. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  358. if (NUM_TEST_NOOPS > 0)
  359. doorbell = xhci_setup_one_noop(xhci);
  360. xhci_dbg(xhci, "Command ring memory map follows:\n");
  361. xhci_debug_ring(xhci, xhci->cmd_ring);
  362. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  363. xhci_dbg_cmd_ptrs(xhci);
  364. xhci_dbg(xhci, "ERST memory map follows:\n");
  365. xhci_dbg_erst(xhci, &xhci->erst);
  366. xhci_dbg(xhci, "Event ring:\n");
  367. xhci_debug_ring(xhci, xhci->event_ring);
  368. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  369. temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
  370. temp &= ERST_PTR_MASK;
  371. xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
  372. temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[1]);
  373. xhci_dbg(xhci, "ERST deq upper = 0x%x\n", temp);
  374. temp = xhci_readl(xhci, &xhci->op_regs->command);
  375. temp |= (CMD_RUN);
  376. xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
  377. temp);
  378. xhci_writel(xhci, temp, &xhci->op_regs->command);
  379. /* Flush PCI posted writes */
  380. temp = xhci_readl(xhci, &xhci->op_regs->command);
  381. xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
  382. if (doorbell)
  383. (*doorbell)(xhci);
  384. xhci_dbg(xhci, "Finished xhci_run\n");
  385. return 0;
  386. }
  387. /*
  388. * Stop xHCI driver.
  389. *
  390. * This function is called by the USB core when the HC driver is removed.
  391. * Its opposite is xhci_run().
  392. *
  393. * Disable device contexts, disable IRQs, and quiesce the HC.
  394. * Reset the HC, finish any completed transactions, and cleanup memory.
  395. */
  396. void xhci_stop(struct usb_hcd *hcd)
  397. {
  398. u32 temp;
  399. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  400. spin_lock_irq(&xhci->lock);
  401. if (HC_IS_RUNNING(hcd->state))
  402. xhci_quiesce(xhci);
  403. xhci_halt(xhci);
  404. xhci_reset(xhci);
  405. spin_unlock_irq(&xhci->lock);
  406. #if 0 /* No MSI yet */
  407. xhci_cleanup_msix(xhci);
  408. #endif
  409. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  410. /* Tell the event ring poll function not to reschedule */
  411. xhci->zombie = 1;
  412. del_timer_sync(&xhci->event_ring_timer);
  413. #endif
  414. xhci_dbg(xhci, "// Disabling event ring interrupts\n");
  415. temp = xhci_readl(xhci, &xhci->op_regs->status);
  416. xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
  417. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  418. xhci_writel(xhci, ER_IRQ_DISABLE(temp),
  419. &xhci->ir_set->irq_pending);
  420. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  421. xhci_dbg(xhci, "cleaning up memory\n");
  422. xhci_mem_cleanup(xhci);
  423. xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
  424. xhci_readl(xhci, &xhci->op_regs->status));
  425. }
  426. /*
  427. * Shutdown HC (not bus-specific)
  428. *
  429. * This is called when the machine is rebooting or halting. We assume that the
  430. * machine will be powered off, and the HC's internal state will be reset.
  431. * Don't bother to free memory.
  432. */
  433. void xhci_shutdown(struct usb_hcd *hcd)
  434. {
  435. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  436. spin_lock_irq(&xhci->lock);
  437. xhci_halt(xhci);
  438. spin_unlock_irq(&xhci->lock);
  439. #if 0
  440. xhci_cleanup_msix(xhci);
  441. #endif
  442. xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
  443. xhci_readl(xhci, &xhci->op_regs->status));
  444. }
  445. /*-------------------------------------------------------------------------*/
  446. /**
  447. * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
  448. * HCDs. Find the index for an endpoint given its descriptor. Use the return
  449. * value to right shift 1 for the bitmask.
  450. *
  451. * Index = (epnum * 2) + direction - 1,
  452. * where direction = 0 for OUT, 1 for IN.
  453. * For control endpoints, the IN index is used (OUT index is unused), so
  454. * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
  455. */
  456. unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
  457. {
  458. unsigned int index;
  459. if (usb_endpoint_xfer_control(desc))
  460. index = (unsigned int) (usb_endpoint_num(desc)*2);
  461. else
  462. index = (unsigned int) (usb_endpoint_num(desc)*2) +
  463. (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
  464. return index;
  465. }
  466. /* Find the flag for this endpoint (for use in the control context). Use the
  467. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  468. * bit 1, etc.
  469. */
  470. unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
  471. {
  472. return 1 << (xhci_get_endpoint_index(desc) + 1);
  473. }
  474. /* Compute the last valid endpoint context index. Basically, this is the
  475. * endpoint index plus one. For slot contexts with more than valid endpoint,
  476. * we find the most significant bit set in the added contexts flags.
  477. * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
  478. * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
  479. */
  480. static inline unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
  481. {
  482. return fls(added_ctxs) - 1;
  483. }
  484. /* Returns 1 if the arguments are OK;
  485. * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
  486. */
  487. int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
  488. struct usb_host_endpoint *ep, int check_ep, const char *func) {
  489. if (!hcd || (check_ep && !ep) || !udev) {
  490. printk(KERN_DEBUG "xHCI %s called with invalid args\n",
  491. func);
  492. return -EINVAL;
  493. }
  494. if (!udev->parent) {
  495. printk(KERN_DEBUG "xHCI %s called for root hub\n",
  496. func);
  497. return 0;
  498. }
  499. if (!udev->slot_id) {
  500. printk(KERN_DEBUG "xHCI %s called with unaddressed device\n",
  501. func);
  502. return -EINVAL;
  503. }
  504. return 1;
  505. }
  506. /*
  507. * non-error returns are a promise to giveback() the urb later
  508. * we drop ownership so next owner (or urb unlink) can get it
  509. */
  510. int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  511. {
  512. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  513. unsigned long flags;
  514. int ret = 0;
  515. unsigned int slot_id, ep_index;
  516. if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0)
  517. return -EINVAL;
  518. slot_id = urb->dev->slot_id;
  519. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  520. spin_lock_irqsave(&xhci->lock, flags);
  521. if (!xhci->devs || !xhci->devs[slot_id]) {
  522. if (!in_interrupt())
  523. dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n");
  524. return -EINVAL;
  525. }
  526. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  527. if (!in_interrupt())
  528. xhci_dbg(xhci, "urb submitted during PCI suspend\n");
  529. ret = -ESHUTDOWN;
  530. goto exit;
  531. }
  532. if (usb_endpoint_xfer_control(&urb->ep->desc))
  533. ret = xhci_queue_ctrl_tx(xhci, mem_flags, urb,
  534. slot_id, ep_index);
  535. else if (usb_endpoint_xfer_bulk(&urb->ep->desc))
  536. ret = xhci_queue_bulk_tx(xhci, mem_flags, urb,
  537. slot_id, ep_index);
  538. else
  539. ret = -EINVAL;
  540. exit:
  541. spin_unlock_irqrestore(&xhci->lock, flags);
  542. return ret;
  543. }
  544. /*
  545. * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
  546. * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
  547. * should pick up where it left off in the TD, unless a Set Transfer Ring
  548. * Dequeue Pointer is issued.
  549. *
  550. * The TRBs that make up the buffers for the canceled URB will be "removed" from
  551. * the ring. Since the ring is a contiguous structure, they can't be physically
  552. * removed. Instead, there are two options:
  553. *
  554. * 1) If the HC is in the middle of processing the URB to be canceled, we
  555. * simply move the ring's dequeue pointer past those TRBs using the Set
  556. * Transfer Ring Dequeue Pointer command. This will be the common case,
  557. * when drivers timeout on the last submitted URB and attempt to cancel.
  558. *
  559. * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
  560. * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
  561. * HC will need to invalidate the any TRBs it has cached after the stop
  562. * endpoint command, as noted in the xHCI 0.95 errata.
  563. *
  564. * 3) The TD may have completed by the time the Stop Endpoint Command
  565. * completes, so software needs to handle that case too.
  566. *
  567. * This function should protect against the TD enqueueing code ringing the
  568. * doorbell while this code is waiting for a Stop Endpoint command to complete.
  569. * It also needs to account for multiple cancellations on happening at the same
  570. * time for the same endpoint.
  571. *
  572. * Note that this function can be called in any context, or so says
  573. * usb_hcd_unlink_urb()
  574. */
  575. int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  576. {
  577. unsigned long flags;
  578. int ret;
  579. struct xhci_hcd *xhci;
  580. struct xhci_td *td;
  581. unsigned int ep_index;
  582. struct xhci_ring *ep_ring;
  583. xhci = hcd_to_xhci(hcd);
  584. spin_lock_irqsave(&xhci->lock, flags);
  585. /* Make sure the URB hasn't completed or been unlinked already */
  586. ret = usb_hcd_check_unlink_urb(hcd, urb, status);
  587. if (ret || !urb->hcpriv)
  588. goto done;
  589. xhci_dbg(xhci, "Cancel URB %p\n", urb);
  590. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  591. ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index];
  592. td = (struct xhci_td *) urb->hcpriv;
  593. ep_ring->cancels_pending++;
  594. list_add_tail(&td->cancelled_td_list, &ep_ring->cancelled_td_list);
  595. /* Queue a stop endpoint command, but only if this is
  596. * the first cancellation to be handled.
  597. */
  598. if (ep_ring->cancels_pending == 1) {
  599. xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index);
  600. xhci_ring_cmd_db(xhci);
  601. }
  602. done:
  603. spin_unlock_irqrestore(&xhci->lock, flags);
  604. return ret;
  605. }
  606. /* Drop an endpoint from a new bandwidth configuration for this device.
  607. * Only one call to this function is allowed per endpoint before
  608. * check_bandwidth() or reset_bandwidth() must be called.
  609. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  610. * add the endpoint to the schedule with possibly new parameters denoted by a
  611. * different endpoint descriptor in usb_host_endpoint.
  612. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  613. * not allowed.
  614. */
  615. int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  616. struct usb_host_endpoint *ep)
  617. {
  618. unsigned long flags;
  619. struct xhci_hcd *xhci;
  620. struct xhci_device_control *in_ctx;
  621. unsigned int last_ctx;
  622. unsigned int ep_index;
  623. struct xhci_ep_ctx *ep_ctx;
  624. u32 drop_flag;
  625. u32 new_add_flags, new_drop_flags, new_slot_info;
  626. int ret;
  627. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  628. if (ret <= 0)
  629. return ret;
  630. xhci = hcd_to_xhci(hcd);
  631. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  632. drop_flag = xhci_get_endpoint_flag(&ep->desc);
  633. if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
  634. xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
  635. __func__, drop_flag);
  636. return 0;
  637. }
  638. spin_lock_irqsave(&xhci->lock, flags);
  639. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  640. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  641. __func__);
  642. spin_unlock_irqrestore(&xhci->lock, flags);
  643. return -EINVAL;
  644. }
  645. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  646. ep_index = xhci_get_endpoint_index(&ep->desc);
  647. ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index];
  648. /* If the HC already knows the endpoint is disabled,
  649. * or the HCD has noted it is disabled, ignore this request
  650. */
  651. if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
  652. in_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
  653. xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
  654. __func__, ep);
  655. spin_unlock_irqrestore(&xhci->lock, flags);
  656. return 0;
  657. }
  658. in_ctx->drop_flags |= drop_flag;
  659. new_drop_flags = in_ctx->drop_flags;
  660. in_ctx->add_flags = ~drop_flag;
  661. new_add_flags = in_ctx->add_flags;
  662. last_ctx = xhci_last_valid_endpoint(in_ctx->add_flags);
  663. /* Update the last valid endpoint context, if we deleted the last one */
  664. if ((in_ctx->slot.dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
  665. in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  666. in_ctx->slot.dev_info |= LAST_CTX(last_ctx);
  667. }
  668. new_slot_info = in_ctx->slot.dev_info;
  669. xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
  670. spin_unlock_irqrestore(&xhci->lock, flags);
  671. xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  672. (unsigned int) ep->desc.bEndpointAddress,
  673. udev->slot_id,
  674. (unsigned int) new_drop_flags,
  675. (unsigned int) new_add_flags,
  676. (unsigned int) new_slot_info);
  677. return 0;
  678. }
  679. /* Add an endpoint to a new possible bandwidth configuration for this device.
  680. * Only one call to this function is allowed per endpoint before
  681. * check_bandwidth() or reset_bandwidth() must be called.
  682. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  683. * add the endpoint to the schedule with possibly new parameters denoted by a
  684. * different endpoint descriptor in usb_host_endpoint.
  685. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  686. * not allowed.
  687. */
  688. int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  689. struct usb_host_endpoint *ep)
  690. {
  691. unsigned long flags;
  692. struct xhci_hcd *xhci;
  693. struct xhci_device_control *in_ctx;
  694. unsigned int ep_index;
  695. struct xhci_ep_ctx *ep_ctx;
  696. u32 added_ctxs;
  697. unsigned int last_ctx;
  698. u32 new_add_flags, new_drop_flags, new_slot_info;
  699. int ret = 0;
  700. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  701. if (ret <= 0)
  702. return ret;
  703. xhci = hcd_to_xhci(hcd);
  704. added_ctxs = xhci_get_endpoint_flag(&ep->desc);
  705. last_ctx = xhci_last_valid_endpoint(added_ctxs);
  706. if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
  707. /* FIXME when we have to issue an evaluate endpoint command to
  708. * deal with ep0 max packet size changing once we get the
  709. * descriptors
  710. */
  711. xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
  712. __func__, added_ctxs);
  713. return 0;
  714. }
  715. spin_lock_irqsave(&xhci->lock, flags);
  716. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  717. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  718. __func__);
  719. spin_unlock_irqrestore(&xhci->lock, flags);
  720. return -EINVAL;
  721. }
  722. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  723. ep_index = xhci_get_endpoint_index(&ep->desc);
  724. ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index];
  725. /* If the HCD has already noted the endpoint is enabled,
  726. * ignore this request.
  727. */
  728. if (in_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
  729. xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
  730. __func__, ep);
  731. spin_unlock_irqrestore(&xhci->lock, flags);
  732. return 0;
  733. }
  734. if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id], udev, ep) < 0) {
  735. dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
  736. __func__, ep->desc.bEndpointAddress);
  737. spin_unlock_irqrestore(&xhci->lock, flags);
  738. return -ENOMEM;
  739. }
  740. in_ctx->add_flags |= added_ctxs;
  741. new_add_flags = in_ctx->add_flags;
  742. /* If xhci_endpoint_disable() was called for this endpoint, but the
  743. * xHC hasn't been notified yet through the check_bandwidth() call,
  744. * this re-adds a new state for the endpoint from the new endpoint
  745. * descriptors. We must drop and re-add this endpoint, so we leave the
  746. * drop flags alone.
  747. */
  748. new_drop_flags = in_ctx->drop_flags;
  749. /* Update the last valid endpoint context, if we just added one past */
  750. if ((in_ctx->slot.dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
  751. in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  752. in_ctx->slot.dev_info |= LAST_CTX(last_ctx);
  753. }
  754. new_slot_info = in_ctx->slot.dev_info;
  755. spin_unlock_irqrestore(&xhci->lock, flags);
  756. xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  757. (unsigned int) ep->desc.bEndpointAddress,
  758. udev->slot_id,
  759. (unsigned int) new_drop_flags,
  760. (unsigned int) new_add_flags,
  761. (unsigned int) new_slot_info);
  762. return 0;
  763. }
  764. static void xhci_zero_in_ctx(struct xhci_virt_device *virt_dev)
  765. {
  766. struct xhci_ep_ctx *ep_ctx;
  767. int i;
  768. /* When a device's add flag and drop flag are zero, any subsequent
  769. * configure endpoint command will leave that endpoint's state
  770. * untouched. Make sure we don't leave any old state in the input
  771. * endpoint contexts.
  772. */
  773. virt_dev->in_ctx->drop_flags = 0;
  774. virt_dev->in_ctx->add_flags = 0;
  775. virt_dev->in_ctx->slot.dev_info &= ~LAST_CTX_MASK;
  776. /* Endpoint 0 is always valid */
  777. virt_dev->in_ctx->slot.dev_info |= LAST_CTX(1);
  778. for (i = 1; i < 31; ++i) {
  779. ep_ctx = &virt_dev->in_ctx->ep[i];
  780. ep_ctx->ep_info = 0;
  781. ep_ctx->ep_info2 = 0;
  782. ep_ctx->deq[0] = 0;
  783. ep_ctx->deq[1] = 0;
  784. ep_ctx->tx_info = 0;
  785. }
  786. }
  787. int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  788. {
  789. int i;
  790. int ret = 0;
  791. int timeleft;
  792. unsigned long flags;
  793. struct xhci_hcd *xhci;
  794. struct xhci_virt_device *virt_dev;
  795. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  796. if (ret <= 0)
  797. return ret;
  798. xhci = hcd_to_xhci(hcd);
  799. spin_lock_irqsave(&xhci->lock, flags);
  800. if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) {
  801. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  802. __func__);
  803. spin_unlock_irqrestore(&xhci->lock, flags);
  804. return -EINVAL;
  805. }
  806. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  807. virt_dev = xhci->devs[udev->slot_id];
  808. /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
  809. virt_dev->in_ctx->add_flags |= SLOT_FLAG;
  810. virt_dev->in_ctx->add_flags &= ~EP0_FLAG;
  811. virt_dev->in_ctx->drop_flags &= ~SLOT_FLAG;
  812. virt_dev->in_ctx->drop_flags &= ~EP0_FLAG;
  813. xhci_dbg(xhci, "New Input Control Context:\n");
  814. xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma,
  815. LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info));
  816. ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx_dma,
  817. udev->slot_id);
  818. if (ret < 0) {
  819. xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
  820. spin_unlock_irqrestore(&xhci->lock, flags);
  821. return -ENOMEM;
  822. }
  823. xhci_ring_cmd_db(xhci);
  824. spin_unlock_irqrestore(&xhci->lock, flags);
  825. /* Wait for the configure endpoint command to complete */
  826. timeleft = wait_for_completion_interruptible_timeout(
  827. &virt_dev->cmd_completion,
  828. USB_CTRL_SET_TIMEOUT);
  829. if (timeleft <= 0) {
  830. xhci_warn(xhci, "%s while waiting for configure endpoint command\n",
  831. timeleft == 0 ? "Timeout" : "Signal");
  832. /* FIXME cancel the configure endpoint command */
  833. return -ETIME;
  834. }
  835. spin_lock_irqsave(&xhci->lock, flags);
  836. switch (virt_dev->cmd_status) {
  837. case COMP_ENOMEM:
  838. dev_warn(&udev->dev, "Not enough host controller resources "
  839. "for new device state.\n");
  840. ret = -ENOMEM;
  841. /* FIXME: can we allocate more resources for the HC? */
  842. break;
  843. case COMP_BW_ERR:
  844. dev_warn(&udev->dev, "Not enough bandwidth "
  845. "for new device state.\n");
  846. ret = -ENOSPC;
  847. /* FIXME: can we go back to the old state? */
  848. break;
  849. case COMP_TRB_ERR:
  850. /* the HCD set up something wrong */
  851. dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, add flag = 1, "
  852. "and endpoint is not disabled.\n");
  853. ret = -EINVAL;
  854. break;
  855. case COMP_SUCCESS:
  856. dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
  857. break;
  858. default:
  859. xhci_err(xhci, "ERROR: unexpected command completion "
  860. "code 0x%x.\n", virt_dev->cmd_status);
  861. ret = -EINVAL;
  862. break;
  863. }
  864. if (ret) {
  865. /* Callee should call reset_bandwidth() */
  866. spin_unlock_irqrestore(&xhci->lock, flags);
  867. return ret;
  868. }
  869. xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
  870. xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma,
  871. LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info));
  872. xhci_zero_in_ctx(virt_dev);
  873. /* Free any old rings */
  874. for (i = 1; i < 31; ++i) {
  875. if (virt_dev->new_ep_rings[i]) {
  876. xhci_ring_free(xhci, virt_dev->ep_rings[i]);
  877. virt_dev->ep_rings[i] = virt_dev->new_ep_rings[i];
  878. virt_dev->new_ep_rings[i] = NULL;
  879. }
  880. }
  881. spin_unlock_irqrestore(&xhci->lock, flags);
  882. return ret;
  883. }
  884. void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  885. {
  886. unsigned long flags;
  887. struct xhci_hcd *xhci;
  888. struct xhci_virt_device *virt_dev;
  889. int i, ret;
  890. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  891. if (ret <= 0)
  892. return;
  893. xhci = hcd_to_xhci(hcd);
  894. spin_lock_irqsave(&xhci->lock, flags);
  895. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  896. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  897. __func__);
  898. spin_unlock_irqrestore(&xhci->lock, flags);
  899. return;
  900. }
  901. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  902. virt_dev = xhci->devs[udev->slot_id];
  903. /* Free any rings allocated for added endpoints */
  904. for (i = 0; i < 31; ++i) {
  905. if (virt_dev->new_ep_rings[i]) {
  906. xhci_ring_free(xhci, virt_dev->new_ep_rings[i]);
  907. virt_dev->new_ep_rings[i] = NULL;
  908. }
  909. }
  910. xhci_zero_in_ctx(virt_dev);
  911. spin_unlock_irqrestore(&xhci->lock, flags);
  912. }
  913. /*
  914. * At this point, the struct usb_device is about to go away, the device has
  915. * disconnected, and all traffic has been stopped and the endpoints have been
  916. * disabled. Free any HC data structures associated with that device.
  917. */
  918. void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
  919. {
  920. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  921. unsigned long flags;
  922. if (udev->slot_id == 0)
  923. return;
  924. spin_lock_irqsave(&xhci->lock, flags);
  925. if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
  926. spin_unlock_irqrestore(&xhci->lock, flags);
  927. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  928. return;
  929. }
  930. xhci_ring_cmd_db(xhci);
  931. spin_unlock_irqrestore(&xhci->lock, flags);
  932. /*
  933. * Event command completion handler will free any data structures
  934. * associated with the slot
  935. */
  936. }
  937. /*
  938. * Returns 0 if the xHC ran out of device slots, the Enable Slot command
  939. * timed out, or allocating memory failed. Returns 1 on success.
  940. */
  941. int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
  942. {
  943. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  944. unsigned long flags;
  945. int timeleft;
  946. int ret;
  947. spin_lock_irqsave(&xhci->lock, flags);
  948. ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
  949. if (ret) {
  950. spin_unlock_irqrestore(&xhci->lock, flags);
  951. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  952. return 0;
  953. }
  954. xhci_ring_cmd_db(xhci);
  955. spin_unlock_irqrestore(&xhci->lock, flags);
  956. /* XXX: how much time for xHC slot assignment? */
  957. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  958. USB_CTRL_SET_TIMEOUT);
  959. if (timeleft <= 0) {
  960. xhci_warn(xhci, "%s while waiting for a slot\n",
  961. timeleft == 0 ? "Timeout" : "Signal");
  962. /* FIXME cancel the enable slot request */
  963. return 0;
  964. }
  965. spin_lock_irqsave(&xhci->lock, flags);
  966. if (!xhci->slot_id) {
  967. xhci_err(xhci, "Error while assigning device slot ID\n");
  968. spin_unlock_irqrestore(&xhci->lock, flags);
  969. return 0;
  970. }
  971. if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
  972. /* Disable slot, if we can do it without mem alloc */
  973. xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
  974. if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
  975. xhci_ring_cmd_db(xhci);
  976. spin_unlock_irqrestore(&xhci->lock, flags);
  977. return 0;
  978. }
  979. udev->slot_id = xhci->slot_id;
  980. /* Is this a LS or FS device under a HS hub? */
  981. /* Hub or peripherial? */
  982. spin_unlock_irqrestore(&xhci->lock, flags);
  983. return 1;
  984. }
  985. /*
  986. * Issue an Address Device command (which will issue a SetAddress request to
  987. * the device).
  988. * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
  989. * we should only issue and wait on one address command at the same time.
  990. *
  991. * We add one to the device address issued by the hardware because the USB core
  992. * uses address 1 for the root hubs (even though they're not really devices).
  993. */
  994. int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
  995. {
  996. unsigned long flags;
  997. int timeleft;
  998. struct xhci_virt_device *virt_dev;
  999. int ret = 0;
  1000. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1001. u32 temp;
  1002. if (!udev->slot_id) {
  1003. xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
  1004. return -EINVAL;
  1005. }
  1006. spin_lock_irqsave(&xhci->lock, flags);
  1007. virt_dev = xhci->devs[udev->slot_id];
  1008. /* If this is a Set Address to an unconfigured device, setup ep 0 */
  1009. if (!udev->config)
  1010. xhci_setup_addressable_virt_dev(xhci, udev);
  1011. /* Otherwise, assume the core has the device configured how it wants */
  1012. ret = xhci_queue_address_device(xhci, virt_dev->in_ctx_dma,
  1013. udev->slot_id);
  1014. if (ret) {
  1015. spin_unlock_irqrestore(&xhci->lock, flags);
  1016. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1017. return ret;
  1018. }
  1019. xhci_ring_cmd_db(xhci);
  1020. spin_unlock_irqrestore(&xhci->lock, flags);
  1021. /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
  1022. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1023. USB_CTRL_SET_TIMEOUT);
  1024. /* FIXME: From section 4.3.4: "Software shall be responsible for timing
  1025. * the SetAddress() "recovery interval" required by USB and aborting the
  1026. * command on a timeout.
  1027. */
  1028. if (timeleft <= 0) {
  1029. xhci_warn(xhci, "%s while waiting for a slot\n",
  1030. timeleft == 0 ? "Timeout" : "Signal");
  1031. /* FIXME cancel the address device command */
  1032. return -ETIME;
  1033. }
  1034. spin_lock_irqsave(&xhci->lock, flags);
  1035. switch (virt_dev->cmd_status) {
  1036. case COMP_CTX_STATE:
  1037. case COMP_EBADSLT:
  1038. xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
  1039. udev->slot_id);
  1040. ret = -EINVAL;
  1041. break;
  1042. case COMP_TX_ERR:
  1043. dev_warn(&udev->dev, "Device not responding to set address.\n");
  1044. ret = -EPROTO;
  1045. break;
  1046. case COMP_SUCCESS:
  1047. xhci_dbg(xhci, "Successful Address Device command\n");
  1048. break;
  1049. default:
  1050. xhci_err(xhci, "ERROR: unexpected command completion "
  1051. "code 0x%x.\n", virt_dev->cmd_status);
  1052. ret = -EINVAL;
  1053. break;
  1054. }
  1055. if (ret) {
  1056. spin_unlock_irqrestore(&xhci->lock, flags);
  1057. return ret;
  1058. }
  1059. temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[0]);
  1060. xhci_dbg(xhci, "Op regs DCBAA ptr[0] = %#08x\n", temp);
  1061. temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[1]);
  1062. xhci_dbg(xhci, "Op regs DCBAA ptr[1] = %#08x\n", temp);
  1063. xhci_dbg(xhci, "Slot ID %d dcbaa entry[0] @%p = %#08x\n",
  1064. udev->slot_id,
  1065. &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id],
  1066. xhci->dcbaa->dev_context_ptrs[2*udev->slot_id]);
  1067. xhci_dbg(xhci, "Slot ID %d dcbaa entry[1] @%p = %#08x\n",
  1068. udev->slot_id,
  1069. &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1],
  1070. xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1]);
  1071. xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
  1072. (unsigned long long)virt_dev->out_ctx_dma);
  1073. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1074. xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, 2);
  1075. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1076. xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma, 2);
  1077. /*
  1078. * USB core uses address 1 for the roothubs, so we add one to the
  1079. * address given back to us by the HC.
  1080. */
  1081. udev->devnum = (virt_dev->out_ctx->slot.dev_state & DEV_ADDR_MASK) + 1;
  1082. /* Zero the input context control for later use */
  1083. virt_dev->in_ctx->add_flags = 0;
  1084. virt_dev->in_ctx->drop_flags = 0;
  1085. /* Mirror flags in the output context for future ep enable/disable */
  1086. virt_dev->out_ctx->add_flags = SLOT_FLAG | EP0_FLAG;
  1087. virt_dev->out_ctx->drop_flags = 0;
  1088. spin_unlock_irqrestore(&xhci->lock, flags);
  1089. xhci_dbg(xhci, "Device address = %d\n", udev->devnum);
  1090. /* XXX Meh, not sure if anyone else but choose_address uses this. */
  1091. set_bit(udev->devnum, udev->bus->devmap.devicemap);
  1092. return 0;
  1093. }
  1094. int xhci_get_frame(struct usb_hcd *hcd)
  1095. {
  1096. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1097. /* EHCI mods by the periodic size. Why? */
  1098. return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
  1099. }
  1100. MODULE_DESCRIPTION(DRIVER_DESC);
  1101. MODULE_AUTHOR(DRIVER_AUTHOR);
  1102. MODULE_LICENSE("GPL");
  1103. static int __init xhci_hcd_init(void)
  1104. {
  1105. #ifdef CONFIG_PCI
  1106. int retval = 0;
  1107. retval = xhci_register_pci();
  1108. if (retval < 0) {
  1109. printk(KERN_DEBUG "Problem registering PCI driver.");
  1110. return retval;
  1111. }
  1112. #endif
  1113. return 0;
  1114. }
  1115. module_init(xhci_hcd_init);
  1116. static void __exit xhci_hcd_cleanup(void)
  1117. {
  1118. #ifdef CONFIG_PCI
  1119. xhci_unregister_pci();
  1120. #endif
  1121. }
  1122. module_exit(xhci_hcd_cleanup);