synclink_cs.c 111 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/tty.h>
  43. #include <linux/tty_flip.h>
  44. #include <linux/serial.h>
  45. #include <linux/major.h>
  46. #include <linux/string.h>
  47. #include <linux/fcntl.h>
  48. #include <linux/ptrace.h>
  49. #include <linux/ioport.h>
  50. #include <linux/mm.h>
  51. #include <linux/seq_file.h>
  52. #include <linux/slab.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/vmalloc.h>
  55. #include <linux/init.h>
  56. #include <linux/delay.h>
  57. #include <linux/ioctl.h>
  58. #include <linux/synclink.h>
  59. #include <asm/system.h>
  60. #include <asm/io.h>
  61. #include <asm/irq.h>
  62. #include <asm/dma.h>
  63. #include <linux/bitops.h>
  64. #include <asm/types.h>
  65. #include <linux/termios.h>
  66. #include <linux/workqueue.h>
  67. #include <linux/hdlc.h>
  68. #include <pcmcia/cs_types.h>
  69. #include <pcmcia/cs.h>
  70. #include <pcmcia/cistpl.h>
  71. #include <pcmcia/cisreg.h>
  72. #include <pcmcia/ds.h>
  73. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  74. #define SYNCLINK_GENERIC_HDLC 1
  75. #else
  76. #define SYNCLINK_GENERIC_HDLC 0
  77. #endif
  78. #define GET_USER(error,value,addr) error = get_user(value,addr)
  79. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  80. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  81. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  82. #include <asm/uaccess.h>
  83. static MGSL_PARAMS default_params = {
  84. MGSL_MODE_HDLC, /* unsigned long mode */
  85. 0, /* unsigned char loopback; */
  86. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  87. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  88. 0, /* unsigned long clock_speed; */
  89. 0xff, /* unsigned char addr_filter; */
  90. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  91. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  92. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  93. 9600, /* unsigned long data_rate; */
  94. 8, /* unsigned char data_bits; */
  95. 1, /* unsigned char stop_bits; */
  96. ASYNC_PARITY_NONE /* unsigned char parity; */
  97. };
  98. typedef struct
  99. {
  100. int count;
  101. unsigned char status;
  102. char data[1];
  103. } RXBUF;
  104. /* The queue of BH actions to be performed */
  105. #define BH_RECEIVE 1
  106. #define BH_TRANSMIT 2
  107. #define BH_STATUS 4
  108. #define IO_PIN_SHUTDOWN_LIMIT 100
  109. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  110. struct _input_signal_events {
  111. int ri_up;
  112. int ri_down;
  113. int dsr_up;
  114. int dsr_down;
  115. int dcd_up;
  116. int dcd_down;
  117. int cts_up;
  118. int cts_down;
  119. };
  120. /*
  121. * Device instance data structure
  122. */
  123. typedef struct _mgslpc_info {
  124. struct tty_port port;
  125. void *if_ptr; /* General purpose pointer (used by SPPP) */
  126. int magic;
  127. int line;
  128. struct mgsl_icount icount;
  129. int timeout;
  130. int x_char; /* xon/xoff character */
  131. unsigned char read_status_mask;
  132. unsigned char ignore_status_mask;
  133. unsigned char *tx_buf;
  134. int tx_put;
  135. int tx_get;
  136. int tx_count;
  137. /* circular list of fixed length rx buffers */
  138. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  139. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  140. int rx_put; /* index of next empty rx buffer */
  141. int rx_get; /* index of next full rx buffer */
  142. int rx_buf_size; /* size in bytes of single rx buffer */
  143. int rx_buf_count; /* total number of rx buffers */
  144. int rx_frame_count; /* number of full rx buffers */
  145. wait_queue_head_t status_event_wait_q;
  146. wait_queue_head_t event_wait_q;
  147. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  148. struct _mgslpc_info *next_device; /* device list link */
  149. unsigned short imra_value;
  150. unsigned short imrb_value;
  151. unsigned char pim_value;
  152. spinlock_t lock;
  153. struct work_struct task; /* task structure for scheduling bh */
  154. u32 max_frame_size;
  155. u32 pending_bh;
  156. bool bh_running;
  157. bool bh_requested;
  158. int dcd_chkcount; /* check counts to prevent */
  159. int cts_chkcount; /* too many IRQs if a signal */
  160. int dsr_chkcount; /* is floating */
  161. int ri_chkcount;
  162. bool rx_enabled;
  163. bool rx_overflow;
  164. bool tx_enabled;
  165. bool tx_active;
  166. bool tx_aborting;
  167. u32 idle_mode;
  168. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  169. char device_name[25]; /* device instance name */
  170. unsigned int io_base; /* base I/O address of adapter */
  171. unsigned int irq_level;
  172. MGSL_PARAMS params; /* communications parameters */
  173. unsigned char serial_signals; /* current serial signal states */
  174. bool irq_occurred; /* for diagnostics use */
  175. char testing_irq;
  176. unsigned int init_error; /* startup error (DIAGS) */
  177. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  178. bool drop_rts_on_tx_done;
  179. struct _input_signal_events input_signal_events;
  180. /* PCMCIA support */
  181. struct pcmcia_device *p_dev;
  182. int stop;
  183. /* SPPP/Cisco HDLC device parts */
  184. int netcount;
  185. spinlock_t netlock;
  186. #if SYNCLINK_GENERIC_HDLC
  187. struct net_device *netdev;
  188. #endif
  189. } MGSLPC_INFO;
  190. #define MGSLPC_MAGIC 0x5402
  191. /*
  192. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  193. */
  194. #define TXBUFSIZE 4096
  195. #define CHA 0x00 /* channel A offset */
  196. #define CHB 0x40 /* channel B offset */
  197. /*
  198. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  199. */
  200. #undef PVR
  201. #define RXFIFO 0
  202. #define TXFIFO 0
  203. #define STAR 0x20
  204. #define CMDR 0x20
  205. #define RSTA 0x21
  206. #define PRE 0x21
  207. #define MODE 0x22
  208. #define TIMR 0x23
  209. #define XAD1 0x24
  210. #define XAD2 0x25
  211. #define RAH1 0x26
  212. #define RAH2 0x27
  213. #define DAFO 0x27
  214. #define RAL1 0x28
  215. #define RFC 0x28
  216. #define RHCR 0x29
  217. #define RAL2 0x29
  218. #define RBCL 0x2a
  219. #define XBCL 0x2a
  220. #define RBCH 0x2b
  221. #define XBCH 0x2b
  222. #define CCR0 0x2c
  223. #define CCR1 0x2d
  224. #define CCR2 0x2e
  225. #define CCR3 0x2f
  226. #define VSTR 0x34
  227. #define BGR 0x34
  228. #define RLCR 0x35
  229. #define AML 0x36
  230. #define AMH 0x37
  231. #define GIS 0x38
  232. #define IVA 0x38
  233. #define IPC 0x39
  234. #define ISR 0x3a
  235. #define IMR 0x3a
  236. #define PVR 0x3c
  237. #define PIS 0x3d
  238. #define PIM 0x3d
  239. #define PCR 0x3e
  240. #define CCR4 0x3f
  241. // IMR/ISR
  242. #define IRQ_BREAK_ON BIT15 // rx break detected
  243. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  244. #define IRQ_ALLSENT BIT13 // all sent
  245. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  246. #define IRQ_TIMER BIT11 // timer interrupt
  247. #define IRQ_CTS BIT10 // CTS status change
  248. #define IRQ_TXREPEAT BIT9 // tx message repeat
  249. #define IRQ_TXFIFO BIT8 // transmit pool ready
  250. #define IRQ_RXEOM BIT7 // receive message end
  251. #define IRQ_EXITHUNT BIT6 // receive frame start
  252. #define IRQ_RXTIME BIT6 // rx char timeout
  253. #define IRQ_DCD BIT2 // carrier detect status change
  254. #define IRQ_OVERRUN BIT1 // receive frame overflow
  255. #define IRQ_RXFIFO BIT0 // receive pool full
  256. // STAR
  257. #define XFW BIT6 // transmit FIFO write enable
  258. #define CEC BIT2 // command executing
  259. #define CTS BIT1 // CTS state
  260. #define PVR_DTR BIT0
  261. #define PVR_DSR BIT1
  262. #define PVR_RI BIT2
  263. #define PVR_AUTOCTS BIT3
  264. #define PVR_RS232 0x20 /* 0010b */
  265. #define PVR_V35 0xe0 /* 1110b */
  266. #define PVR_RS422 0x40 /* 0100b */
  267. /* Register access functions */
  268. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  269. #define read_reg(info, reg) inb((info)->io_base + (reg))
  270. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  271. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  272. #define set_reg_bits(info, reg, mask) \
  273. write_reg(info, (reg), \
  274. (unsigned char) (read_reg(info, (reg)) | (mask)))
  275. #define clear_reg_bits(info, reg, mask) \
  276. write_reg(info, (reg), \
  277. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  278. /*
  279. * interrupt enable/disable routines
  280. */
  281. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  282. {
  283. if (channel == CHA) {
  284. info->imra_value |= mask;
  285. write_reg16(info, CHA + IMR, info->imra_value);
  286. } else {
  287. info->imrb_value |= mask;
  288. write_reg16(info, CHB + IMR, info->imrb_value);
  289. }
  290. }
  291. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  292. {
  293. if (channel == CHA) {
  294. info->imra_value &= ~mask;
  295. write_reg16(info, CHA + IMR, info->imra_value);
  296. } else {
  297. info->imrb_value &= ~mask;
  298. write_reg16(info, CHB + IMR, info->imrb_value);
  299. }
  300. }
  301. #define port_irq_disable(info, mask) \
  302. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  303. #define port_irq_enable(info, mask) \
  304. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  305. static void rx_start(MGSLPC_INFO *info);
  306. static void rx_stop(MGSLPC_INFO *info);
  307. static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty);
  308. static void tx_stop(MGSLPC_INFO *info);
  309. static void tx_set_idle(MGSLPC_INFO *info);
  310. static void get_signals(MGSLPC_INFO *info);
  311. static void set_signals(MGSLPC_INFO *info);
  312. static void reset_device(MGSLPC_INFO *info);
  313. static void hdlc_mode(MGSLPC_INFO *info);
  314. static void async_mode(MGSLPC_INFO *info);
  315. static void tx_timeout(unsigned long context);
  316. static int carrier_raised(struct tty_port *port);
  317. static void dtr_rts(struct tty_port *port, int onoff);
  318. #if SYNCLINK_GENERIC_HDLC
  319. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  320. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  321. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  322. static int hdlcdev_init(MGSLPC_INFO *info);
  323. static void hdlcdev_exit(MGSLPC_INFO *info);
  324. #endif
  325. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  326. static bool register_test(MGSLPC_INFO *info);
  327. static bool irq_test(MGSLPC_INFO *info);
  328. static int adapter_test(MGSLPC_INFO *info);
  329. static int claim_resources(MGSLPC_INFO *info);
  330. static void release_resources(MGSLPC_INFO *info);
  331. static void mgslpc_add_device(MGSLPC_INFO *info);
  332. static void mgslpc_remove_device(MGSLPC_INFO *info);
  333. static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty);
  334. static void rx_reset_buffers(MGSLPC_INFO *info);
  335. static int rx_alloc_buffers(MGSLPC_INFO *info);
  336. static void rx_free_buffers(MGSLPC_INFO *info);
  337. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  338. /*
  339. * Bottom half interrupt handlers
  340. */
  341. static void bh_handler(struct work_struct *work);
  342. static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty);
  343. static void bh_status(MGSLPC_INFO *info);
  344. /*
  345. * ioctl handlers
  346. */
  347. static int tiocmget(struct tty_struct *tty, struct file *file);
  348. static int tiocmset(struct tty_struct *tty, struct file *file,
  349. unsigned int set, unsigned int clear);
  350. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  351. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  352. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params, struct tty_struct *tty);
  353. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  354. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  355. static int set_txenable(MGSLPC_INFO *info, int enable, struct tty_struct *tty);
  356. static int tx_abort(MGSLPC_INFO *info);
  357. static int set_rxenable(MGSLPC_INFO *info, int enable);
  358. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  359. static MGSLPC_INFO *mgslpc_device_list = NULL;
  360. static int mgslpc_device_count = 0;
  361. /*
  362. * Set this param to non-zero to load eax with the
  363. * .text section address and breakpoint on module load.
  364. * This is useful for use with gdb and add-symbol-file command.
  365. */
  366. static int break_on_load=0;
  367. /*
  368. * Driver major number, defaults to zero to get auto
  369. * assigned major number. May be forced as module parameter.
  370. */
  371. static int ttymajor=0;
  372. static int debug_level = 0;
  373. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  374. module_param(break_on_load, bool, 0);
  375. module_param(ttymajor, int, 0);
  376. module_param(debug_level, int, 0);
  377. module_param_array(maxframe, int, NULL, 0);
  378. MODULE_LICENSE("GPL");
  379. static char *driver_name = "SyncLink PC Card driver";
  380. static char *driver_version = "$Revision: 4.34 $";
  381. static struct tty_driver *serial_driver;
  382. /* number of characters left in xmit buffer before we ask for more */
  383. #define WAKEUP_CHARS 256
  384. static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty);
  385. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  386. /* PCMCIA prototypes */
  387. static int mgslpc_config(struct pcmcia_device *link);
  388. static void mgslpc_release(u_long arg);
  389. static void mgslpc_detach(struct pcmcia_device *p_dev);
  390. /*
  391. * 1st function defined in .text section. Calling this function in
  392. * init_module() followed by a breakpoint allows a remote debugger
  393. * (gdb) to get the .text address for the add-symbol-file command.
  394. * This allows remote debugging of dynamically loadable modules.
  395. */
  396. static void* mgslpc_get_text_ptr(void)
  397. {
  398. return mgslpc_get_text_ptr;
  399. }
  400. /**
  401. * line discipline callback wrappers
  402. *
  403. * The wrappers maintain line discipline references
  404. * while calling into the line discipline.
  405. *
  406. * ldisc_receive_buf - pass receive data to line discipline
  407. */
  408. static void ldisc_receive_buf(struct tty_struct *tty,
  409. const __u8 *data, char *flags, int count)
  410. {
  411. struct tty_ldisc *ld;
  412. if (!tty)
  413. return;
  414. ld = tty_ldisc_ref(tty);
  415. if (ld) {
  416. if (ld->ops->receive_buf)
  417. ld->ops->receive_buf(tty, data, flags, count);
  418. tty_ldisc_deref(ld);
  419. }
  420. }
  421. static const struct tty_port_operations mgslpc_port_ops = {
  422. .carrier_raised = carrier_raised,
  423. .dtr_rts = dtr_rts
  424. };
  425. static int mgslpc_probe(struct pcmcia_device *link)
  426. {
  427. MGSLPC_INFO *info;
  428. int ret;
  429. if (debug_level >= DEBUG_LEVEL_INFO)
  430. printk("mgslpc_attach\n");
  431. info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  432. if (!info) {
  433. printk("Error can't allocate device instance data\n");
  434. return -ENOMEM;
  435. }
  436. info->magic = MGSLPC_MAGIC;
  437. tty_port_init(&info->port);
  438. info->port.ops = &mgslpc_port_ops;
  439. INIT_WORK(&info->task, bh_handler);
  440. info->max_frame_size = 4096;
  441. info->port.close_delay = 5*HZ/10;
  442. info->port.closing_wait = 30*HZ;
  443. init_waitqueue_head(&info->status_event_wait_q);
  444. init_waitqueue_head(&info->event_wait_q);
  445. spin_lock_init(&info->lock);
  446. spin_lock_init(&info->netlock);
  447. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  448. info->idle_mode = HDLC_TXIDLE_FLAGS;
  449. info->imra_value = 0xffff;
  450. info->imrb_value = 0xffff;
  451. info->pim_value = 0xff;
  452. info->p_dev = link;
  453. link->priv = info;
  454. /* Initialize the struct pcmcia_device structure */
  455. link->conf.Attributes = 0;
  456. link->conf.IntType = INT_MEMORY_AND_IO;
  457. ret = mgslpc_config(link);
  458. if (ret)
  459. return ret;
  460. mgslpc_add_device(info);
  461. return 0;
  462. }
  463. /* Card has been inserted.
  464. */
  465. static int mgslpc_ioprobe(struct pcmcia_device *p_dev,
  466. cistpl_cftable_entry_t *cfg,
  467. cistpl_cftable_entry_t *dflt,
  468. unsigned int vcc,
  469. void *priv_data)
  470. {
  471. if (cfg->io.nwin > 0) {
  472. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  473. if (!(cfg->io.flags & CISTPL_IO_8BIT))
  474. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  475. if (!(cfg->io.flags & CISTPL_IO_16BIT))
  476. p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  477. p_dev->io.IOAddrLines = cfg->io.flags & CISTPL_IO_LINES_MASK;
  478. p_dev->io.BasePort1 = cfg->io.win[0].base;
  479. p_dev->io.NumPorts1 = cfg->io.win[0].len;
  480. return pcmcia_request_io(p_dev, &p_dev->io);
  481. }
  482. return -ENODEV;
  483. }
  484. static int mgslpc_config(struct pcmcia_device *link)
  485. {
  486. MGSLPC_INFO *info = link->priv;
  487. int ret;
  488. if (debug_level >= DEBUG_LEVEL_INFO)
  489. printk("mgslpc_config(0x%p)\n", link);
  490. ret = pcmcia_loop_config(link, mgslpc_ioprobe, NULL);
  491. if (ret != 0)
  492. goto failed;
  493. link->conf.Attributes = CONF_ENABLE_IRQ;
  494. link->conf.IntType = INT_MEMORY_AND_IO;
  495. link->conf.ConfigIndex = 8;
  496. link->conf.Present = PRESENT_OPTION;
  497. ret = pcmcia_request_irq(link, mgslpc_isr);
  498. if (ret)
  499. goto failed;
  500. ret = pcmcia_request_configuration(link, &link->conf);
  501. if (ret)
  502. goto failed;
  503. info->io_base = link->io.BasePort1;
  504. info->irq_level = link->irq;
  505. dev_info(&link->dev, "index 0x%02x:",
  506. link->conf.ConfigIndex);
  507. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  508. printk(", irq %d", link->irq);
  509. if (link->io.NumPorts1)
  510. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  511. link->io.BasePort1+link->io.NumPorts1-1);
  512. printk("\n");
  513. return 0;
  514. failed:
  515. mgslpc_release((u_long)link);
  516. return -ENODEV;
  517. }
  518. /* Card has been removed.
  519. * Unregister device and release PCMCIA configuration.
  520. * If device is open, postpone until it is closed.
  521. */
  522. static void mgslpc_release(u_long arg)
  523. {
  524. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  525. if (debug_level >= DEBUG_LEVEL_INFO)
  526. printk("mgslpc_release(0x%p)\n", link);
  527. pcmcia_disable_device(link);
  528. }
  529. static void mgslpc_detach(struct pcmcia_device *link)
  530. {
  531. if (debug_level >= DEBUG_LEVEL_INFO)
  532. printk("mgslpc_detach(0x%p)\n", link);
  533. ((MGSLPC_INFO *)link->priv)->stop = 1;
  534. mgslpc_release((u_long)link);
  535. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  536. }
  537. static int mgslpc_suspend(struct pcmcia_device *link)
  538. {
  539. MGSLPC_INFO *info = link->priv;
  540. info->stop = 1;
  541. return 0;
  542. }
  543. static int mgslpc_resume(struct pcmcia_device *link)
  544. {
  545. MGSLPC_INFO *info = link->priv;
  546. info->stop = 0;
  547. return 0;
  548. }
  549. static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info,
  550. char *name, const char *routine)
  551. {
  552. #ifdef MGSLPC_PARANOIA_CHECK
  553. static const char *badmagic =
  554. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  555. static const char *badinfo =
  556. "Warning: null mgslpc_info for (%s) in %s\n";
  557. if (!info) {
  558. printk(badinfo, name, routine);
  559. return true;
  560. }
  561. if (info->magic != MGSLPC_MAGIC) {
  562. printk(badmagic, name, routine);
  563. return true;
  564. }
  565. #else
  566. if (!info)
  567. return true;
  568. #endif
  569. return false;
  570. }
  571. #define CMD_RXFIFO BIT7 // release current rx FIFO
  572. #define CMD_RXRESET BIT6 // receiver reset
  573. #define CMD_RXFIFO_READ BIT5
  574. #define CMD_START_TIMER BIT4
  575. #define CMD_TXFIFO BIT3 // release current tx FIFO
  576. #define CMD_TXEOM BIT1 // transmit end message
  577. #define CMD_TXRESET BIT0 // transmit reset
  578. static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  579. {
  580. int i = 0;
  581. /* wait for command completion */
  582. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  583. udelay(1);
  584. if (i++ == 1000)
  585. return false;
  586. }
  587. return true;
  588. }
  589. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  590. {
  591. wait_command_complete(info, channel);
  592. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  593. }
  594. static void tx_pause(struct tty_struct *tty)
  595. {
  596. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  597. unsigned long flags;
  598. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  599. return;
  600. if (debug_level >= DEBUG_LEVEL_INFO)
  601. printk("tx_pause(%s)\n",info->device_name);
  602. spin_lock_irqsave(&info->lock,flags);
  603. if (info->tx_enabled)
  604. tx_stop(info);
  605. spin_unlock_irqrestore(&info->lock,flags);
  606. }
  607. static void tx_release(struct tty_struct *tty)
  608. {
  609. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  610. unsigned long flags;
  611. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  612. return;
  613. if (debug_level >= DEBUG_LEVEL_INFO)
  614. printk("tx_release(%s)\n",info->device_name);
  615. spin_lock_irqsave(&info->lock,flags);
  616. if (!info->tx_enabled)
  617. tx_start(info, tty);
  618. spin_unlock_irqrestore(&info->lock,flags);
  619. }
  620. /* Return next bottom half action to perform.
  621. * or 0 if nothing to do.
  622. */
  623. static int bh_action(MGSLPC_INFO *info)
  624. {
  625. unsigned long flags;
  626. int rc = 0;
  627. spin_lock_irqsave(&info->lock,flags);
  628. if (info->pending_bh & BH_RECEIVE) {
  629. info->pending_bh &= ~BH_RECEIVE;
  630. rc = BH_RECEIVE;
  631. } else if (info->pending_bh & BH_TRANSMIT) {
  632. info->pending_bh &= ~BH_TRANSMIT;
  633. rc = BH_TRANSMIT;
  634. } else if (info->pending_bh & BH_STATUS) {
  635. info->pending_bh &= ~BH_STATUS;
  636. rc = BH_STATUS;
  637. }
  638. if (!rc) {
  639. /* Mark BH routine as complete */
  640. info->bh_running = false;
  641. info->bh_requested = false;
  642. }
  643. spin_unlock_irqrestore(&info->lock,flags);
  644. return rc;
  645. }
  646. static void bh_handler(struct work_struct *work)
  647. {
  648. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  649. struct tty_struct *tty;
  650. int action;
  651. if (!info)
  652. return;
  653. if (debug_level >= DEBUG_LEVEL_BH)
  654. printk( "%s(%d):bh_handler(%s) entry\n",
  655. __FILE__,__LINE__,info->device_name);
  656. info->bh_running = true;
  657. tty = tty_port_tty_get(&info->port);
  658. while((action = bh_action(info)) != 0) {
  659. /* Process work item */
  660. if ( debug_level >= DEBUG_LEVEL_BH )
  661. printk( "%s(%d):bh_handler() work item action=%d\n",
  662. __FILE__,__LINE__,action);
  663. switch (action) {
  664. case BH_RECEIVE:
  665. while(rx_get_frame(info, tty));
  666. break;
  667. case BH_TRANSMIT:
  668. bh_transmit(info, tty);
  669. break;
  670. case BH_STATUS:
  671. bh_status(info);
  672. break;
  673. default:
  674. /* unknown work item ID */
  675. printk("Unknown work item ID=%08X!\n", action);
  676. break;
  677. }
  678. }
  679. tty_kref_put(tty);
  680. if (debug_level >= DEBUG_LEVEL_BH)
  681. printk( "%s(%d):bh_handler(%s) exit\n",
  682. __FILE__,__LINE__,info->device_name);
  683. }
  684. static void bh_transmit(MGSLPC_INFO *info, struct tty_struct *tty)
  685. {
  686. if (debug_level >= DEBUG_LEVEL_BH)
  687. printk("bh_transmit() entry on %s\n", info->device_name);
  688. if (tty)
  689. tty_wakeup(tty);
  690. }
  691. static void bh_status(MGSLPC_INFO *info)
  692. {
  693. info->ri_chkcount = 0;
  694. info->dsr_chkcount = 0;
  695. info->dcd_chkcount = 0;
  696. info->cts_chkcount = 0;
  697. }
  698. /* eom: non-zero = end of frame */
  699. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  700. {
  701. unsigned char data[2];
  702. unsigned char fifo_count, read_count, i;
  703. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  704. if (debug_level >= DEBUG_LEVEL_ISR)
  705. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  706. if (!info->rx_enabled)
  707. return;
  708. if (info->rx_frame_count >= info->rx_buf_count) {
  709. /* no more free buffers */
  710. issue_command(info, CHA, CMD_RXRESET);
  711. info->pending_bh |= BH_RECEIVE;
  712. info->rx_overflow = true;
  713. info->icount.buf_overrun++;
  714. return;
  715. }
  716. if (eom) {
  717. /* end of frame, get FIFO count from RBCL register */
  718. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  719. fifo_count = 32;
  720. } else
  721. fifo_count = 32;
  722. do {
  723. if (fifo_count == 1) {
  724. read_count = 1;
  725. data[0] = read_reg(info, CHA + RXFIFO);
  726. } else {
  727. read_count = 2;
  728. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  729. }
  730. fifo_count -= read_count;
  731. if (!fifo_count && eom)
  732. buf->status = data[--read_count];
  733. for (i = 0; i < read_count; i++) {
  734. if (buf->count >= info->max_frame_size) {
  735. /* frame too large, reset receiver and reset current buffer */
  736. issue_command(info, CHA, CMD_RXRESET);
  737. buf->count = 0;
  738. return;
  739. }
  740. *(buf->data + buf->count) = data[i];
  741. buf->count++;
  742. }
  743. } while (fifo_count);
  744. if (eom) {
  745. info->pending_bh |= BH_RECEIVE;
  746. info->rx_frame_count++;
  747. info->rx_put++;
  748. if (info->rx_put >= info->rx_buf_count)
  749. info->rx_put = 0;
  750. }
  751. issue_command(info, CHA, CMD_RXFIFO);
  752. }
  753. static void rx_ready_async(MGSLPC_INFO *info, int tcd, struct tty_struct *tty)
  754. {
  755. unsigned char data, status, flag;
  756. int fifo_count;
  757. int work = 0;
  758. struct mgsl_icount *icount = &info->icount;
  759. if (tcd) {
  760. /* early termination, get FIFO count from RBCL register */
  761. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  762. /* Zero fifo count could mean 0 or 32 bytes available.
  763. * If BIT5 of STAR is set then at least 1 byte is available.
  764. */
  765. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  766. fifo_count = 32;
  767. } else
  768. fifo_count = 32;
  769. tty_buffer_request_room(tty, fifo_count);
  770. /* Flush received async data to receive data buffer. */
  771. while (fifo_count) {
  772. data = read_reg(info, CHA + RXFIFO);
  773. status = read_reg(info, CHA + RXFIFO);
  774. fifo_count -= 2;
  775. icount->rx++;
  776. flag = TTY_NORMAL;
  777. // if no frameing/crc error then save data
  778. // BIT7:parity error
  779. // BIT6:framing error
  780. if (status & (BIT7 + BIT6)) {
  781. if (status & BIT7)
  782. icount->parity++;
  783. else
  784. icount->frame++;
  785. /* discard char if tty control flags say so */
  786. if (status & info->ignore_status_mask)
  787. continue;
  788. status &= info->read_status_mask;
  789. if (status & BIT7)
  790. flag = TTY_PARITY;
  791. else if (status & BIT6)
  792. flag = TTY_FRAME;
  793. }
  794. work += tty_insert_flip_char(tty, data, flag);
  795. }
  796. issue_command(info, CHA, CMD_RXFIFO);
  797. if (debug_level >= DEBUG_LEVEL_ISR) {
  798. printk("%s(%d):rx_ready_async",
  799. __FILE__,__LINE__);
  800. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  801. __FILE__,__LINE__,icount->rx,icount->brk,
  802. icount->parity,icount->frame,icount->overrun);
  803. }
  804. if (work)
  805. tty_flip_buffer_push(tty);
  806. }
  807. static void tx_done(MGSLPC_INFO *info, struct tty_struct *tty)
  808. {
  809. if (!info->tx_active)
  810. return;
  811. info->tx_active = false;
  812. info->tx_aborting = false;
  813. if (info->params.mode == MGSL_MODE_ASYNC)
  814. return;
  815. info->tx_count = info->tx_put = info->tx_get = 0;
  816. del_timer(&info->tx_timer);
  817. if (info->drop_rts_on_tx_done) {
  818. get_signals(info);
  819. if (info->serial_signals & SerialSignal_RTS) {
  820. info->serial_signals &= ~SerialSignal_RTS;
  821. set_signals(info);
  822. }
  823. info->drop_rts_on_tx_done = false;
  824. }
  825. #if SYNCLINK_GENERIC_HDLC
  826. if (info->netcount)
  827. hdlcdev_tx_done(info);
  828. else
  829. #endif
  830. {
  831. if (tty->stopped || tty->hw_stopped) {
  832. tx_stop(info);
  833. return;
  834. }
  835. info->pending_bh |= BH_TRANSMIT;
  836. }
  837. }
  838. static void tx_ready(MGSLPC_INFO *info, struct tty_struct *tty)
  839. {
  840. unsigned char fifo_count = 32;
  841. int c;
  842. if (debug_level >= DEBUG_LEVEL_ISR)
  843. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  844. if (info->params.mode == MGSL_MODE_HDLC) {
  845. if (!info->tx_active)
  846. return;
  847. } else {
  848. if (tty->stopped || tty->hw_stopped) {
  849. tx_stop(info);
  850. return;
  851. }
  852. if (!info->tx_count)
  853. info->tx_active = false;
  854. }
  855. if (!info->tx_count)
  856. return;
  857. while (info->tx_count && fifo_count) {
  858. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  859. if (c == 1) {
  860. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  861. } else {
  862. write_reg16(info, CHA + TXFIFO,
  863. *((unsigned short*)(info->tx_buf + info->tx_get)));
  864. }
  865. info->tx_count -= c;
  866. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  867. fifo_count -= c;
  868. }
  869. if (info->params.mode == MGSL_MODE_ASYNC) {
  870. if (info->tx_count < WAKEUP_CHARS)
  871. info->pending_bh |= BH_TRANSMIT;
  872. issue_command(info, CHA, CMD_TXFIFO);
  873. } else {
  874. if (info->tx_count)
  875. issue_command(info, CHA, CMD_TXFIFO);
  876. else
  877. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  878. }
  879. }
  880. static void cts_change(MGSLPC_INFO *info, struct tty_struct *tty)
  881. {
  882. get_signals(info);
  883. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  884. irq_disable(info, CHB, IRQ_CTS);
  885. info->icount.cts++;
  886. if (info->serial_signals & SerialSignal_CTS)
  887. info->input_signal_events.cts_up++;
  888. else
  889. info->input_signal_events.cts_down++;
  890. wake_up_interruptible(&info->status_event_wait_q);
  891. wake_up_interruptible(&info->event_wait_q);
  892. if (info->port.flags & ASYNC_CTS_FLOW) {
  893. if (tty->hw_stopped) {
  894. if (info->serial_signals & SerialSignal_CTS) {
  895. if (debug_level >= DEBUG_LEVEL_ISR)
  896. printk("CTS tx start...");
  897. if (tty)
  898. tty->hw_stopped = 0;
  899. tx_start(info, tty);
  900. info->pending_bh |= BH_TRANSMIT;
  901. return;
  902. }
  903. } else {
  904. if (!(info->serial_signals & SerialSignal_CTS)) {
  905. if (debug_level >= DEBUG_LEVEL_ISR)
  906. printk("CTS tx stop...");
  907. if (tty)
  908. tty->hw_stopped = 1;
  909. tx_stop(info);
  910. }
  911. }
  912. }
  913. info->pending_bh |= BH_STATUS;
  914. }
  915. static void dcd_change(MGSLPC_INFO *info, struct tty_struct *tty)
  916. {
  917. get_signals(info);
  918. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  919. irq_disable(info, CHB, IRQ_DCD);
  920. info->icount.dcd++;
  921. if (info->serial_signals & SerialSignal_DCD) {
  922. info->input_signal_events.dcd_up++;
  923. }
  924. else
  925. info->input_signal_events.dcd_down++;
  926. #if SYNCLINK_GENERIC_HDLC
  927. if (info->netcount) {
  928. if (info->serial_signals & SerialSignal_DCD)
  929. netif_carrier_on(info->netdev);
  930. else
  931. netif_carrier_off(info->netdev);
  932. }
  933. #endif
  934. wake_up_interruptible(&info->status_event_wait_q);
  935. wake_up_interruptible(&info->event_wait_q);
  936. if (info->port.flags & ASYNC_CHECK_CD) {
  937. if (debug_level >= DEBUG_LEVEL_ISR)
  938. printk("%s CD now %s...", info->device_name,
  939. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  940. if (info->serial_signals & SerialSignal_DCD)
  941. wake_up_interruptible(&info->port.open_wait);
  942. else {
  943. if (debug_level >= DEBUG_LEVEL_ISR)
  944. printk("doing serial hangup...");
  945. if (tty)
  946. tty_hangup(tty);
  947. }
  948. }
  949. info->pending_bh |= BH_STATUS;
  950. }
  951. static void dsr_change(MGSLPC_INFO *info)
  952. {
  953. get_signals(info);
  954. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  955. port_irq_disable(info, PVR_DSR);
  956. info->icount.dsr++;
  957. if (info->serial_signals & SerialSignal_DSR)
  958. info->input_signal_events.dsr_up++;
  959. else
  960. info->input_signal_events.dsr_down++;
  961. wake_up_interruptible(&info->status_event_wait_q);
  962. wake_up_interruptible(&info->event_wait_q);
  963. info->pending_bh |= BH_STATUS;
  964. }
  965. static void ri_change(MGSLPC_INFO *info)
  966. {
  967. get_signals(info);
  968. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  969. port_irq_disable(info, PVR_RI);
  970. info->icount.rng++;
  971. if (info->serial_signals & SerialSignal_RI)
  972. info->input_signal_events.ri_up++;
  973. else
  974. info->input_signal_events.ri_down++;
  975. wake_up_interruptible(&info->status_event_wait_q);
  976. wake_up_interruptible(&info->event_wait_q);
  977. info->pending_bh |= BH_STATUS;
  978. }
  979. /* Interrupt service routine entry point.
  980. *
  981. * Arguments:
  982. *
  983. * irq interrupt number that caused interrupt
  984. * dev_id device ID supplied during interrupt registration
  985. */
  986. static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
  987. {
  988. MGSLPC_INFO *info = dev_id;
  989. struct tty_struct *tty;
  990. unsigned short isr;
  991. unsigned char gis, pis;
  992. int count=0;
  993. if (debug_level >= DEBUG_LEVEL_ISR)
  994. printk("mgslpc_isr(%d) entry.\n", info->irq_level);
  995. if (!(info->p_dev->_locked))
  996. return IRQ_HANDLED;
  997. tty = tty_port_tty_get(&info->port);
  998. spin_lock(&info->lock);
  999. while ((gis = read_reg(info, CHA + GIS))) {
  1000. if (debug_level >= DEBUG_LEVEL_ISR)
  1001. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1002. if ((gis & 0x70) || count > 1000) {
  1003. printk("synclink_cs:hardware failed or ejected\n");
  1004. break;
  1005. }
  1006. count++;
  1007. if (gis & (BIT1 + BIT0)) {
  1008. isr = read_reg16(info, CHB + ISR);
  1009. if (isr & IRQ_DCD)
  1010. dcd_change(info, tty);
  1011. if (isr & IRQ_CTS)
  1012. cts_change(info, tty);
  1013. }
  1014. if (gis & (BIT3 + BIT2))
  1015. {
  1016. isr = read_reg16(info, CHA + ISR);
  1017. if (isr & IRQ_TIMER) {
  1018. info->irq_occurred = true;
  1019. irq_disable(info, CHA, IRQ_TIMER);
  1020. }
  1021. /* receive IRQs */
  1022. if (isr & IRQ_EXITHUNT) {
  1023. info->icount.exithunt++;
  1024. wake_up_interruptible(&info->event_wait_q);
  1025. }
  1026. if (isr & IRQ_BREAK_ON) {
  1027. info->icount.brk++;
  1028. if (info->port.flags & ASYNC_SAK)
  1029. do_SAK(tty);
  1030. }
  1031. if (isr & IRQ_RXTIME) {
  1032. issue_command(info, CHA, CMD_RXFIFO_READ);
  1033. }
  1034. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1035. if (info->params.mode == MGSL_MODE_HDLC)
  1036. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1037. else
  1038. rx_ready_async(info, isr & IRQ_RXEOM, tty);
  1039. }
  1040. /* transmit IRQs */
  1041. if (isr & IRQ_UNDERRUN) {
  1042. if (info->tx_aborting)
  1043. info->icount.txabort++;
  1044. else
  1045. info->icount.txunder++;
  1046. tx_done(info, tty);
  1047. }
  1048. else if (isr & IRQ_ALLSENT) {
  1049. info->icount.txok++;
  1050. tx_done(info, tty);
  1051. }
  1052. else if (isr & IRQ_TXFIFO)
  1053. tx_ready(info, tty);
  1054. }
  1055. if (gis & BIT7) {
  1056. pis = read_reg(info, CHA + PIS);
  1057. if (pis & BIT1)
  1058. dsr_change(info);
  1059. if (pis & BIT2)
  1060. ri_change(info);
  1061. }
  1062. }
  1063. /* Request bottom half processing if there's something
  1064. * for it to do and the bh is not already running
  1065. */
  1066. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1067. if ( debug_level >= DEBUG_LEVEL_ISR )
  1068. printk("%s(%d):%s queueing bh task.\n",
  1069. __FILE__,__LINE__,info->device_name);
  1070. schedule_work(&info->task);
  1071. info->bh_requested = true;
  1072. }
  1073. spin_unlock(&info->lock);
  1074. tty_kref_put(tty);
  1075. if (debug_level >= DEBUG_LEVEL_ISR)
  1076. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1077. __FILE__, __LINE__, info->irq_level);
  1078. return IRQ_HANDLED;
  1079. }
  1080. /* Initialize and start device.
  1081. */
  1082. static int startup(MGSLPC_INFO * info, struct tty_struct *tty)
  1083. {
  1084. int retval = 0;
  1085. if (debug_level >= DEBUG_LEVEL_INFO)
  1086. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1087. if (info->port.flags & ASYNC_INITIALIZED)
  1088. return 0;
  1089. if (!info->tx_buf) {
  1090. /* allocate a page of memory for a transmit buffer */
  1091. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1092. if (!info->tx_buf) {
  1093. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1094. __FILE__,__LINE__,info->device_name);
  1095. return -ENOMEM;
  1096. }
  1097. }
  1098. info->pending_bh = 0;
  1099. memset(&info->icount, 0, sizeof(info->icount));
  1100. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1101. /* Allocate and claim adapter resources */
  1102. retval = claim_resources(info);
  1103. /* perform existance check and diagnostics */
  1104. if ( !retval )
  1105. retval = adapter_test(info);
  1106. if ( retval ) {
  1107. if (capable(CAP_SYS_ADMIN) && tty)
  1108. set_bit(TTY_IO_ERROR, &tty->flags);
  1109. release_resources(info);
  1110. return retval;
  1111. }
  1112. /* program hardware for current parameters */
  1113. mgslpc_change_params(info, tty);
  1114. if (tty)
  1115. clear_bit(TTY_IO_ERROR, &tty->flags);
  1116. info->port.flags |= ASYNC_INITIALIZED;
  1117. return 0;
  1118. }
  1119. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1120. */
  1121. static void shutdown(MGSLPC_INFO * info, struct tty_struct *tty)
  1122. {
  1123. unsigned long flags;
  1124. if (!(info->port.flags & ASYNC_INITIALIZED))
  1125. return;
  1126. if (debug_level >= DEBUG_LEVEL_INFO)
  1127. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1128. __FILE__,__LINE__, info->device_name );
  1129. /* clear status wait queue because status changes */
  1130. /* can't happen after shutting down the hardware */
  1131. wake_up_interruptible(&info->status_event_wait_q);
  1132. wake_up_interruptible(&info->event_wait_q);
  1133. del_timer_sync(&info->tx_timer);
  1134. if (info->tx_buf) {
  1135. free_page((unsigned long) info->tx_buf);
  1136. info->tx_buf = NULL;
  1137. }
  1138. spin_lock_irqsave(&info->lock,flags);
  1139. rx_stop(info);
  1140. tx_stop(info);
  1141. /* TODO:disable interrupts instead of reset to preserve signal states */
  1142. reset_device(info);
  1143. if (!tty || tty->termios->c_cflag & HUPCL) {
  1144. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1145. set_signals(info);
  1146. }
  1147. spin_unlock_irqrestore(&info->lock,flags);
  1148. release_resources(info);
  1149. if (tty)
  1150. set_bit(TTY_IO_ERROR, &tty->flags);
  1151. info->port.flags &= ~ASYNC_INITIALIZED;
  1152. }
  1153. static void mgslpc_program_hw(MGSLPC_INFO *info, struct tty_struct *tty)
  1154. {
  1155. unsigned long flags;
  1156. spin_lock_irqsave(&info->lock,flags);
  1157. rx_stop(info);
  1158. tx_stop(info);
  1159. info->tx_count = info->tx_put = info->tx_get = 0;
  1160. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1161. hdlc_mode(info);
  1162. else
  1163. async_mode(info);
  1164. set_signals(info);
  1165. info->dcd_chkcount = 0;
  1166. info->cts_chkcount = 0;
  1167. info->ri_chkcount = 0;
  1168. info->dsr_chkcount = 0;
  1169. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1170. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1171. get_signals(info);
  1172. if (info->netcount || (tty && (tty->termios->c_cflag & CREAD)))
  1173. rx_start(info);
  1174. spin_unlock_irqrestore(&info->lock,flags);
  1175. }
  1176. /* Reconfigure adapter based on new parameters
  1177. */
  1178. static void mgslpc_change_params(MGSLPC_INFO *info, struct tty_struct *tty)
  1179. {
  1180. unsigned cflag;
  1181. int bits_per_char;
  1182. if (!tty || !tty->termios)
  1183. return;
  1184. if (debug_level >= DEBUG_LEVEL_INFO)
  1185. printk("%s(%d):mgslpc_change_params(%s)\n",
  1186. __FILE__,__LINE__, info->device_name );
  1187. cflag = tty->termios->c_cflag;
  1188. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1189. /* otherwise assert DTR and RTS */
  1190. if (cflag & CBAUD)
  1191. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1192. else
  1193. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1194. /* byte size and parity */
  1195. switch (cflag & CSIZE) {
  1196. case CS5: info->params.data_bits = 5; break;
  1197. case CS6: info->params.data_bits = 6; break;
  1198. case CS7: info->params.data_bits = 7; break;
  1199. case CS8: info->params.data_bits = 8; break;
  1200. default: info->params.data_bits = 7; break;
  1201. }
  1202. if (cflag & CSTOPB)
  1203. info->params.stop_bits = 2;
  1204. else
  1205. info->params.stop_bits = 1;
  1206. info->params.parity = ASYNC_PARITY_NONE;
  1207. if (cflag & PARENB) {
  1208. if (cflag & PARODD)
  1209. info->params.parity = ASYNC_PARITY_ODD;
  1210. else
  1211. info->params.parity = ASYNC_PARITY_EVEN;
  1212. #ifdef CMSPAR
  1213. if (cflag & CMSPAR)
  1214. info->params.parity = ASYNC_PARITY_SPACE;
  1215. #endif
  1216. }
  1217. /* calculate number of jiffies to transmit a full
  1218. * FIFO (32 bytes) at specified data rate
  1219. */
  1220. bits_per_char = info->params.data_bits +
  1221. info->params.stop_bits + 1;
  1222. /* if port data rate is set to 460800 or less then
  1223. * allow tty settings to override, otherwise keep the
  1224. * current data rate.
  1225. */
  1226. if (info->params.data_rate <= 460800) {
  1227. info->params.data_rate = tty_get_baud_rate(tty);
  1228. }
  1229. if ( info->params.data_rate ) {
  1230. info->timeout = (32*HZ*bits_per_char) /
  1231. info->params.data_rate;
  1232. }
  1233. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1234. if (cflag & CRTSCTS)
  1235. info->port.flags |= ASYNC_CTS_FLOW;
  1236. else
  1237. info->port.flags &= ~ASYNC_CTS_FLOW;
  1238. if (cflag & CLOCAL)
  1239. info->port.flags &= ~ASYNC_CHECK_CD;
  1240. else
  1241. info->port.flags |= ASYNC_CHECK_CD;
  1242. /* process tty input control flags */
  1243. info->read_status_mask = 0;
  1244. if (I_INPCK(tty))
  1245. info->read_status_mask |= BIT7 | BIT6;
  1246. if (I_IGNPAR(tty))
  1247. info->ignore_status_mask |= BIT7 | BIT6;
  1248. mgslpc_program_hw(info, tty);
  1249. }
  1250. /* Add a character to the transmit buffer
  1251. */
  1252. static int mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1253. {
  1254. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1255. unsigned long flags;
  1256. if (debug_level >= DEBUG_LEVEL_INFO) {
  1257. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1258. __FILE__,__LINE__,ch,info->device_name);
  1259. }
  1260. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1261. return 0;
  1262. if (!info->tx_buf)
  1263. return 0;
  1264. spin_lock_irqsave(&info->lock,flags);
  1265. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1266. if (info->tx_count < TXBUFSIZE - 1) {
  1267. info->tx_buf[info->tx_put++] = ch;
  1268. info->tx_put &= TXBUFSIZE-1;
  1269. info->tx_count++;
  1270. }
  1271. }
  1272. spin_unlock_irqrestore(&info->lock,flags);
  1273. return 1;
  1274. }
  1275. /* Enable transmitter so remaining characters in the
  1276. * transmit buffer are sent.
  1277. */
  1278. static void mgslpc_flush_chars(struct tty_struct *tty)
  1279. {
  1280. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1281. unsigned long flags;
  1282. if (debug_level >= DEBUG_LEVEL_INFO)
  1283. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1284. __FILE__,__LINE__,info->device_name,info->tx_count);
  1285. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1286. return;
  1287. if (info->tx_count <= 0 || tty->stopped ||
  1288. tty->hw_stopped || !info->tx_buf)
  1289. return;
  1290. if (debug_level >= DEBUG_LEVEL_INFO)
  1291. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1292. __FILE__,__LINE__,info->device_name);
  1293. spin_lock_irqsave(&info->lock,flags);
  1294. if (!info->tx_active)
  1295. tx_start(info, tty);
  1296. spin_unlock_irqrestore(&info->lock,flags);
  1297. }
  1298. /* Send a block of data
  1299. *
  1300. * Arguments:
  1301. *
  1302. * tty pointer to tty information structure
  1303. * buf pointer to buffer containing send data
  1304. * count size of send data in bytes
  1305. *
  1306. * Returns: number of characters written
  1307. */
  1308. static int mgslpc_write(struct tty_struct * tty,
  1309. const unsigned char *buf, int count)
  1310. {
  1311. int c, ret = 0;
  1312. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1313. unsigned long flags;
  1314. if (debug_level >= DEBUG_LEVEL_INFO)
  1315. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1316. __FILE__,__LINE__,info->device_name,count);
  1317. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1318. !info->tx_buf)
  1319. goto cleanup;
  1320. if (info->params.mode == MGSL_MODE_HDLC) {
  1321. if (count > TXBUFSIZE) {
  1322. ret = -EIO;
  1323. goto cleanup;
  1324. }
  1325. if (info->tx_active)
  1326. goto cleanup;
  1327. else if (info->tx_count)
  1328. goto start;
  1329. }
  1330. for (;;) {
  1331. c = min(count,
  1332. min(TXBUFSIZE - info->tx_count - 1,
  1333. TXBUFSIZE - info->tx_put));
  1334. if (c <= 0)
  1335. break;
  1336. memcpy(info->tx_buf + info->tx_put, buf, c);
  1337. spin_lock_irqsave(&info->lock,flags);
  1338. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1339. info->tx_count += c;
  1340. spin_unlock_irqrestore(&info->lock,flags);
  1341. buf += c;
  1342. count -= c;
  1343. ret += c;
  1344. }
  1345. start:
  1346. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1347. spin_lock_irqsave(&info->lock,flags);
  1348. if (!info->tx_active)
  1349. tx_start(info, tty);
  1350. spin_unlock_irqrestore(&info->lock,flags);
  1351. }
  1352. cleanup:
  1353. if (debug_level >= DEBUG_LEVEL_INFO)
  1354. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1355. __FILE__,__LINE__,info->device_name,ret);
  1356. return ret;
  1357. }
  1358. /* Return the count of free bytes in transmit buffer
  1359. */
  1360. static int mgslpc_write_room(struct tty_struct *tty)
  1361. {
  1362. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1363. int ret;
  1364. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1365. return 0;
  1366. if (info->params.mode == MGSL_MODE_HDLC) {
  1367. /* HDLC (frame oriented) mode */
  1368. if (info->tx_active)
  1369. return 0;
  1370. else
  1371. return HDLC_MAX_FRAME_SIZE;
  1372. } else {
  1373. ret = TXBUFSIZE - info->tx_count - 1;
  1374. if (ret < 0)
  1375. ret = 0;
  1376. }
  1377. if (debug_level >= DEBUG_LEVEL_INFO)
  1378. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1379. __FILE__,__LINE__, info->device_name, ret);
  1380. return ret;
  1381. }
  1382. /* Return the count of bytes in transmit buffer
  1383. */
  1384. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1385. {
  1386. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1387. int rc;
  1388. if (debug_level >= DEBUG_LEVEL_INFO)
  1389. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1390. __FILE__,__LINE__, info->device_name );
  1391. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1392. return 0;
  1393. if (info->params.mode == MGSL_MODE_HDLC)
  1394. rc = info->tx_active ? info->max_frame_size : 0;
  1395. else
  1396. rc = info->tx_count;
  1397. if (debug_level >= DEBUG_LEVEL_INFO)
  1398. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1399. __FILE__,__LINE__, info->device_name, rc);
  1400. return rc;
  1401. }
  1402. /* Discard all data in the send buffer
  1403. */
  1404. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1405. {
  1406. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1407. unsigned long flags;
  1408. if (debug_level >= DEBUG_LEVEL_INFO)
  1409. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1410. __FILE__,__LINE__, info->device_name );
  1411. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1412. return;
  1413. spin_lock_irqsave(&info->lock,flags);
  1414. info->tx_count = info->tx_put = info->tx_get = 0;
  1415. del_timer(&info->tx_timer);
  1416. spin_unlock_irqrestore(&info->lock,flags);
  1417. wake_up_interruptible(&tty->write_wait);
  1418. tty_wakeup(tty);
  1419. }
  1420. /* Send a high-priority XON/XOFF character
  1421. */
  1422. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1423. {
  1424. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1425. unsigned long flags;
  1426. if (debug_level >= DEBUG_LEVEL_INFO)
  1427. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1428. __FILE__,__LINE__, info->device_name, ch );
  1429. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1430. return;
  1431. info->x_char = ch;
  1432. if (ch) {
  1433. spin_lock_irqsave(&info->lock,flags);
  1434. if (!info->tx_enabled)
  1435. tx_start(info, tty);
  1436. spin_unlock_irqrestore(&info->lock,flags);
  1437. }
  1438. }
  1439. /* Signal remote device to throttle send data (our receive data)
  1440. */
  1441. static void mgslpc_throttle(struct tty_struct * tty)
  1442. {
  1443. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1444. unsigned long flags;
  1445. if (debug_level >= DEBUG_LEVEL_INFO)
  1446. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1447. __FILE__,__LINE__, info->device_name );
  1448. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1449. return;
  1450. if (I_IXOFF(tty))
  1451. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1452. if (tty->termios->c_cflag & CRTSCTS) {
  1453. spin_lock_irqsave(&info->lock,flags);
  1454. info->serial_signals &= ~SerialSignal_RTS;
  1455. set_signals(info);
  1456. spin_unlock_irqrestore(&info->lock,flags);
  1457. }
  1458. }
  1459. /* Signal remote device to stop throttling send data (our receive data)
  1460. */
  1461. static void mgslpc_unthrottle(struct tty_struct * tty)
  1462. {
  1463. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1464. unsigned long flags;
  1465. if (debug_level >= DEBUG_LEVEL_INFO)
  1466. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1467. __FILE__,__LINE__, info->device_name );
  1468. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1469. return;
  1470. if (I_IXOFF(tty)) {
  1471. if (info->x_char)
  1472. info->x_char = 0;
  1473. else
  1474. mgslpc_send_xchar(tty, START_CHAR(tty));
  1475. }
  1476. if (tty->termios->c_cflag & CRTSCTS) {
  1477. spin_lock_irqsave(&info->lock,flags);
  1478. info->serial_signals |= SerialSignal_RTS;
  1479. set_signals(info);
  1480. spin_unlock_irqrestore(&info->lock,flags);
  1481. }
  1482. }
  1483. /* get the current serial statistics
  1484. */
  1485. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1486. {
  1487. int err;
  1488. if (debug_level >= DEBUG_LEVEL_INFO)
  1489. printk("get_params(%s)\n", info->device_name);
  1490. if (!user_icount) {
  1491. memset(&info->icount, 0, sizeof(info->icount));
  1492. } else {
  1493. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1494. if (err)
  1495. return -EFAULT;
  1496. }
  1497. return 0;
  1498. }
  1499. /* get the current serial parameters
  1500. */
  1501. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1502. {
  1503. int err;
  1504. if (debug_level >= DEBUG_LEVEL_INFO)
  1505. printk("get_params(%s)\n", info->device_name);
  1506. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1507. if (err)
  1508. return -EFAULT;
  1509. return 0;
  1510. }
  1511. /* set the serial parameters
  1512. *
  1513. * Arguments:
  1514. *
  1515. * info pointer to device instance data
  1516. * new_params user buffer containing new serial params
  1517. *
  1518. * Returns: 0 if success, otherwise error code
  1519. */
  1520. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params, struct tty_struct *tty)
  1521. {
  1522. unsigned long flags;
  1523. MGSL_PARAMS tmp_params;
  1524. int err;
  1525. if (debug_level >= DEBUG_LEVEL_INFO)
  1526. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1527. info->device_name );
  1528. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1529. if (err) {
  1530. if ( debug_level >= DEBUG_LEVEL_INFO )
  1531. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1532. __FILE__,__LINE__,info->device_name);
  1533. return -EFAULT;
  1534. }
  1535. spin_lock_irqsave(&info->lock,flags);
  1536. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1537. spin_unlock_irqrestore(&info->lock,flags);
  1538. mgslpc_change_params(info, tty);
  1539. return 0;
  1540. }
  1541. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1542. {
  1543. int err;
  1544. if (debug_level >= DEBUG_LEVEL_INFO)
  1545. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1546. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1547. if (err)
  1548. return -EFAULT;
  1549. return 0;
  1550. }
  1551. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1552. {
  1553. unsigned long flags;
  1554. if (debug_level >= DEBUG_LEVEL_INFO)
  1555. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1556. spin_lock_irqsave(&info->lock,flags);
  1557. info->idle_mode = idle_mode;
  1558. tx_set_idle(info);
  1559. spin_unlock_irqrestore(&info->lock,flags);
  1560. return 0;
  1561. }
  1562. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1563. {
  1564. int err;
  1565. if (debug_level >= DEBUG_LEVEL_INFO)
  1566. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1567. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1568. if (err)
  1569. return -EFAULT;
  1570. return 0;
  1571. }
  1572. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1573. {
  1574. unsigned long flags;
  1575. unsigned char val;
  1576. if (debug_level >= DEBUG_LEVEL_INFO)
  1577. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1578. spin_lock_irqsave(&info->lock,flags);
  1579. info->if_mode = if_mode;
  1580. val = read_reg(info, PVR) & 0x0f;
  1581. switch (info->if_mode)
  1582. {
  1583. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1584. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1585. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1586. }
  1587. write_reg(info, PVR, val);
  1588. spin_unlock_irqrestore(&info->lock,flags);
  1589. return 0;
  1590. }
  1591. static int set_txenable(MGSLPC_INFO * info, int enable, struct tty_struct *tty)
  1592. {
  1593. unsigned long flags;
  1594. if (debug_level >= DEBUG_LEVEL_INFO)
  1595. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1596. spin_lock_irqsave(&info->lock,flags);
  1597. if (enable) {
  1598. if (!info->tx_enabled)
  1599. tx_start(info, tty);
  1600. } else {
  1601. if (info->tx_enabled)
  1602. tx_stop(info);
  1603. }
  1604. spin_unlock_irqrestore(&info->lock,flags);
  1605. return 0;
  1606. }
  1607. static int tx_abort(MGSLPC_INFO * info)
  1608. {
  1609. unsigned long flags;
  1610. if (debug_level >= DEBUG_LEVEL_INFO)
  1611. printk("tx_abort(%s)\n", info->device_name);
  1612. spin_lock_irqsave(&info->lock,flags);
  1613. if (info->tx_active && info->tx_count &&
  1614. info->params.mode == MGSL_MODE_HDLC) {
  1615. /* clear data count so FIFO is not filled on next IRQ.
  1616. * This results in underrun and abort transmission.
  1617. */
  1618. info->tx_count = info->tx_put = info->tx_get = 0;
  1619. info->tx_aborting = true;
  1620. }
  1621. spin_unlock_irqrestore(&info->lock,flags);
  1622. return 0;
  1623. }
  1624. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1625. {
  1626. unsigned long flags;
  1627. if (debug_level >= DEBUG_LEVEL_INFO)
  1628. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1629. spin_lock_irqsave(&info->lock,flags);
  1630. if (enable) {
  1631. if (!info->rx_enabled)
  1632. rx_start(info);
  1633. } else {
  1634. if (info->rx_enabled)
  1635. rx_stop(info);
  1636. }
  1637. spin_unlock_irqrestore(&info->lock,flags);
  1638. return 0;
  1639. }
  1640. /* wait for specified event to occur
  1641. *
  1642. * Arguments: info pointer to device instance data
  1643. * mask pointer to bitmask of events to wait for
  1644. * Return Value: 0 if successful and bit mask updated with
  1645. * of events triggerred,
  1646. * otherwise error code
  1647. */
  1648. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1649. {
  1650. unsigned long flags;
  1651. int s;
  1652. int rc=0;
  1653. struct mgsl_icount cprev, cnow;
  1654. int events;
  1655. int mask;
  1656. struct _input_signal_events oldsigs, newsigs;
  1657. DECLARE_WAITQUEUE(wait, current);
  1658. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1659. if (rc)
  1660. return -EFAULT;
  1661. if (debug_level >= DEBUG_LEVEL_INFO)
  1662. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1663. spin_lock_irqsave(&info->lock,flags);
  1664. /* return immediately if state matches requested events */
  1665. get_signals(info);
  1666. s = info->serial_signals;
  1667. events = mask &
  1668. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1669. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1670. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1671. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1672. if (events) {
  1673. spin_unlock_irqrestore(&info->lock,flags);
  1674. goto exit;
  1675. }
  1676. /* save current irq counts */
  1677. cprev = info->icount;
  1678. oldsigs = info->input_signal_events;
  1679. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1680. (mask & MgslEvent_ExitHuntMode))
  1681. irq_enable(info, CHA, IRQ_EXITHUNT);
  1682. set_current_state(TASK_INTERRUPTIBLE);
  1683. add_wait_queue(&info->event_wait_q, &wait);
  1684. spin_unlock_irqrestore(&info->lock,flags);
  1685. for(;;) {
  1686. schedule();
  1687. if (signal_pending(current)) {
  1688. rc = -ERESTARTSYS;
  1689. break;
  1690. }
  1691. /* get current irq counts */
  1692. spin_lock_irqsave(&info->lock,flags);
  1693. cnow = info->icount;
  1694. newsigs = info->input_signal_events;
  1695. set_current_state(TASK_INTERRUPTIBLE);
  1696. spin_unlock_irqrestore(&info->lock,flags);
  1697. /* if no change, wait aborted for some reason */
  1698. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1699. newsigs.dsr_down == oldsigs.dsr_down &&
  1700. newsigs.dcd_up == oldsigs.dcd_up &&
  1701. newsigs.dcd_down == oldsigs.dcd_down &&
  1702. newsigs.cts_up == oldsigs.cts_up &&
  1703. newsigs.cts_down == oldsigs.cts_down &&
  1704. newsigs.ri_up == oldsigs.ri_up &&
  1705. newsigs.ri_down == oldsigs.ri_down &&
  1706. cnow.exithunt == cprev.exithunt &&
  1707. cnow.rxidle == cprev.rxidle) {
  1708. rc = -EIO;
  1709. break;
  1710. }
  1711. events = mask &
  1712. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1713. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1714. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1715. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1716. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1717. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1718. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1719. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1720. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1721. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1722. if (events)
  1723. break;
  1724. cprev = cnow;
  1725. oldsigs = newsigs;
  1726. }
  1727. remove_wait_queue(&info->event_wait_q, &wait);
  1728. set_current_state(TASK_RUNNING);
  1729. if (mask & MgslEvent_ExitHuntMode) {
  1730. spin_lock_irqsave(&info->lock,flags);
  1731. if (!waitqueue_active(&info->event_wait_q))
  1732. irq_disable(info, CHA, IRQ_EXITHUNT);
  1733. spin_unlock_irqrestore(&info->lock,flags);
  1734. }
  1735. exit:
  1736. if (rc == 0)
  1737. PUT_USER(rc, events, mask_ptr);
  1738. return rc;
  1739. }
  1740. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1741. {
  1742. unsigned long flags;
  1743. int rc;
  1744. struct mgsl_icount cprev, cnow;
  1745. DECLARE_WAITQUEUE(wait, current);
  1746. /* save current irq counts */
  1747. spin_lock_irqsave(&info->lock,flags);
  1748. cprev = info->icount;
  1749. add_wait_queue(&info->status_event_wait_q, &wait);
  1750. set_current_state(TASK_INTERRUPTIBLE);
  1751. spin_unlock_irqrestore(&info->lock,flags);
  1752. for(;;) {
  1753. schedule();
  1754. if (signal_pending(current)) {
  1755. rc = -ERESTARTSYS;
  1756. break;
  1757. }
  1758. /* get new irq counts */
  1759. spin_lock_irqsave(&info->lock,flags);
  1760. cnow = info->icount;
  1761. set_current_state(TASK_INTERRUPTIBLE);
  1762. spin_unlock_irqrestore(&info->lock,flags);
  1763. /* if no change, wait aborted for some reason */
  1764. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1765. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1766. rc = -EIO;
  1767. break;
  1768. }
  1769. /* check for change in caller specified modem input */
  1770. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1771. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1772. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1773. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1774. rc = 0;
  1775. break;
  1776. }
  1777. cprev = cnow;
  1778. }
  1779. remove_wait_queue(&info->status_event_wait_q, &wait);
  1780. set_current_state(TASK_RUNNING);
  1781. return rc;
  1782. }
  1783. /* return the state of the serial control and status signals
  1784. */
  1785. static int tiocmget(struct tty_struct *tty, struct file *file)
  1786. {
  1787. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1788. unsigned int result;
  1789. unsigned long flags;
  1790. spin_lock_irqsave(&info->lock,flags);
  1791. get_signals(info);
  1792. spin_unlock_irqrestore(&info->lock,flags);
  1793. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1794. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1795. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1796. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1797. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1798. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1799. if (debug_level >= DEBUG_LEVEL_INFO)
  1800. printk("%s(%d):%s tiocmget() value=%08X\n",
  1801. __FILE__,__LINE__, info->device_name, result );
  1802. return result;
  1803. }
  1804. /* set modem control signals (DTR/RTS)
  1805. */
  1806. static int tiocmset(struct tty_struct *tty, struct file *file,
  1807. unsigned int set, unsigned int clear)
  1808. {
  1809. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1810. unsigned long flags;
  1811. if (debug_level >= DEBUG_LEVEL_INFO)
  1812. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1813. __FILE__,__LINE__,info->device_name, set, clear);
  1814. if (set & TIOCM_RTS)
  1815. info->serial_signals |= SerialSignal_RTS;
  1816. if (set & TIOCM_DTR)
  1817. info->serial_signals |= SerialSignal_DTR;
  1818. if (clear & TIOCM_RTS)
  1819. info->serial_signals &= ~SerialSignal_RTS;
  1820. if (clear & TIOCM_DTR)
  1821. info->serial_signals &= ~SerialSignal_DTR;
  1822. spin_lock_irqsave(&info->lock,flags);
  1823. set_signals(info);
  1824. spin_unlock_irqrestore(&info->lock,flags);
  1825. return 0;
  1826. }
  1827. /* Set or clear transmit break condition
  1828. *
  1829. * Arguments: tty pointer to tty instance data
  1830. * break_state -1=set break condition, 0=clear
  1831. */
  1832. static int mgslpc_break(struct tty_struct *tty, int break_state)
  1833. {
  1834. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1835. unsigned long flags;
  1836. if (debug_level >= DEBUG_LEVEL_INFO)
  1837. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1838. __FILE__,__LINE__, info->device_name, break_state);
  1839. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1840. return -EINVAL;
  1841. spin_lock_irqsave(&info->lock,flags);
  1842. if (break_state == -1)
  1843. set_reg_bits(info, CHA+DAFO, BIT6);
  1844. else
  1845. clear_reg_bits(info, CHA+DAFO, BIT6);
  1846. spin_unlock_irqrestore(&info->lock,flags);
  1847. return 0;
  1848. }
  1849. /* Service an IOCTL request
  1850. *
  1851. * Arguments:
  1852. *
  1853. * tty pointer to tty instance data
  1854. * file pointer to associated file object for device
  1855. * cmd IOCTL command code
  1856. * arg command argument/context
  1857. *
  1858. * Return Value: 0 if success, otherwise error code
  1859. */
  1860. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1861. unsigned int cmd, unsigned long arg)
  1862. {
  1863. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1864. int error;
  1865. struct mgsl_icount cnow; /* kernel counter temps */
  1866. struct serial_icounter_struct __user *p_cuser; /* user space */
  1867. void __user *argp = (void __user *)arg;
  1868. unsigned long flags;
  1869. if (debug_level >= DEBUG_LEVEL_INFO)
  1870. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1871. info->device_name, cmd );
  1872. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1873. return -ENODEV;
  1874. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1875. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1876. if (tty->flags & (1 << TTY_IO_ERROR))
  1877. return -EIO;
  1878. }
  1879. switch (cmd) {
  1880. case MGSL_IOCGPARAMS:
  1881. return get_params(info, argp);
  1882. case MGSL_IOCSPARAMS:
  1883. return set_params(info, argp, tty);
  1884. case MGSL_IOCGTXIDLE:
  1885. return get_txidle(info, argp);
  1886. case MGSL_IOCSTXIDLE:
  1887. return set_txidle(info, (int)arg);
  1888. case MGSL_IOCGIF:
  1889. return get_interface(info, argp);
  1890. case MGSL_IOCSIF:
  1891. return set_interface(info,(int)arg);
  1892. case MGSL_IOCTXENABLE:
  1893. return set_txenable(info,(int)arg, tty);
  1894. case MGSL_IOCRXENABLE:
  1895. return set_rxenable(info,(int)arg);
  1896. case MGSL_IOCTXABORT:
  1897. return tx_abort(info);
  1898. case MGSL_IOCGSTATS:
  1899. return get_stats(info, argp);
  1900. case MGSL_IOCWAITEVENT:
  1901. return wait_events(info, argp);
  1902. case TIOCMIWAIT:
  1903. return modem_input_wait(info,(int)arg);
  1904. case TIOCGICOUNT:
  1905. spin_lock_irqsave(&info->lock,flags);
  1906. cnow = info->icount;
  1907. spin_unlock_irqrestore(&info->lock,flags);
  1908. p_cuser = argp;
  1909. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1910. if (error) return error;
  1911. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1912. if (error) return error;
  1913. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1914. if (error) return error;
  1915. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1916. if (error) return error;
  1917. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1918. if (error) return error;
  1919. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1920. if (error) return error;
  1921. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1922. if (error) return error;
  1923. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1924. if (error) return error;
  1925. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1926. if (error) return error;
  1927. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1928. if (error) return error;
  1929. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1930. if (error) return error;
  1931. return 0;
  1932. default:
  1933. return -ENOIOCTLCMD;
  1934. }
  1935. return 0;
  1936. }
  1937. /* Set new termios settings
  1938. *
  1939. * Arguments:
  1940. *
  1941. * tty pointer to tty structure
  1942. * termios pointer to buffer to hold returned old termios
  1943. */
  1944. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1945. {
  1946. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1947. unsigned long flags;
  1948. if (debug_level >= DEBUG_LEVEL_INFO)
  1949. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1950. tty->driver->name );
  1951. /* just return if nothing has changed */
  1952. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1953. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1954. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1955. return;
  1956. mgslpc_change_params(info, tty);
  1957. /* Handle transition to B0 status */
  1958. if (old_termios->c_cflag & CBAUD &&
  1959. !(tty->termios->c_cflag & CBAUD)) {
  1960. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1961. spin_lock_irqsave(&info->lock,flags);
  1962. set_signals(info);
  1963. spin_unlock_irqrestore(&info->lock,flags);
  1964. }
  1965. /* Handle transition away from B0 status */
  1966. if (!(old_termios->c_cflag & CBAUD) &&
  1967. tty->termios->c_cflag & CBAUD) {
  1968. info->serial_signals |= SerialSignal_DTR;
  1969. if (!(tty->termios->c_cflag & CRTSCTS) ||
  1970. !test_bit(TTY_THROTTLED, &tty->flags)) {
  1971. info->serial_signals |= SerialSignal_RTS;
  1972. }
  1973. spin_lock_irqsave(&info->lock,flags);
  1974. set_signals(info);
  1975. spin_unlock_irqrestore(&info->lock,flags);
  1976. }
  1977. /* Handle turning off CRTSCTS */
  1978. if (old_termios->c_cflag & CRTSCTS &&
  1979. !(tty->termios->c_cflag & CRTSCTS)) {
  1980. tty->hw_stopped = 0;
  1981. tx_release(tty);
  1982. }
  1983. }
  1984. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  1985. {
  1986. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1987. struct tty_port *port = &info->port;
  1988. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  1989. return;
  1990. if (debug_level >= DEBUG_LEVEL_INFO)
  1991. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  1992. __FILE__,__LINE__, info->device_name, port->count);
  1993. WARN_ON(!port->count);
  1994. if (tty_port_close_start(port, tty, filp) == 0)
  1995. goto cleanup;
  1996. if (port->flags & ASYNC_INITIALIZED)
  1997. mgslpc_wait_until_sent(tty, info->timeout);
  1998. mgslpc_flush_buffer(tty);
  1999. tty_ldisc_flush(tty);
  2000. shutdown(info, tty);
  2001. tty_port_close_end(port, tty);
  2002. tty_port_tty_set(port, NULL);
  2003. cleanup:
  2004. if (debug_level >= DEBUG_LEVEL_INFO)
  2005. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2006. tty->driver->name, port->count);
  2007. }
  2008. /* Wait until the transmitter is empty.
  2009. */
  2010. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2011. {
  2012. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2013. unsigned long orig_jiffies, char_time;
  2014. if (!info )
  2015. return;
  2016. if (debug_level >= DEBUG_LEVEL_INFO)
  2017. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2018. __FILE__,__LINE__, info->device_name );
  2019. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2020. return;
  2021. if (!(info->port.flags & ASYNC_INITIALIZED))
  2022. goto exit;
  2023. orig_jiffies = jiffies;
  2024. /* Set check interval to 1/5 of estimated time to
  2025. * send a character, and make it at least 1. The check
  2026. * interval should also be less than the timeout.
  2027. * Note: use tight timings here to satisfy the NIST-PCTS.
  2028. */
  2029. if ( info->params.data_rate ) {
  2030. char_time = info->timeout/(32 * 5);
  2031. if (!char_time)
  2032. char_time++;
  2033. } else
  2034. char_time = 1;
  2035. if (timeout)
  2036. char_time = min_t(unsigned long, char_time, timeout);
  2037. if (info->params.mode == MGSL_MODE_HDLC) {
  2038. while (info->tx_active) {
  2039. msleep_interruptible(jiffies_to_msecs(char_time));
  2040. if (signal_pending(current))
  2041. break;
  2042. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2043. break;
  2044. }
  2045. } else {
  2046. while ((info->tx_count || info->tx_active) &&
  2047. info->tx_enabled) {
  2048. msleep_interruptible(jiffies_to_msecs(char_time));
  2049. if (signal_pending(current))
  2050. break;
  2051. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2052. break;
  2053. }
  2054. }
  2055. exit:
  2056. if (debug_level >= DEBUG_LEVEL_INFO)
  2057. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2058. __FILE__,__LINE__, info->device_name );
  2059. }
  2060. /* Called by tty_hangup() when a hangup is signaled.
  2061. * This is the same as closing all open files for the port.
  2062. */
  2063. static void mgslpc_hangup(struct tty_struct *tty)
  2064. {
  2065. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2066. if (debug_level >= DEBUG_LEVEL_INFO)
  2067. printk("%s(%d):mgslpc_hangup(%s)\n",
  2068. __FILE__,__LINE__, info->device_name );
  2069. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2070. return;
  2071. mgslpc_flush_buffer(tty);
  2072. shutdown(info, tty);
  2073. tty_port_hangup(&info->port);
  2074. }
  2075. static int carrier_raised(struct tty_port *port)
  2076. {
  2077. MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
  2078. unsigned long flags;
  2079. spin_lock_irqsave(&info->lock,flags);
  2080. get_signals(info);
  2081. spin_unlock_irqrestore(&info->lock,flags);
  2082. if (info->serial_signals & SerialSignal_DCD)
  2083. return 1;
  2084. return 0;
  2085. }
  2086. static void dtr_rts(struct tty_port *port, int onoff)
  2087. {
  2088. MGSLPC_INFO *info = container_of(port, MGSLPC_INFO, port);
  2089. unsigned long flags;
  2090. spin_lock_irqsave(&info->lock,flags);
  2091. if (onoff)
  2092. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2093. else
  2094. info->serial_signals &= ~SerialSignal_RTS + SerialSignal_DTR;
  2095. set_signals(info);
  2096. spin_unlock_irqrestore(&info->lock,flags);
  2097. }
  2098. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2099. {
  2100. MGSLPC_INFO *info;
  2101. struct tty_port *port;
  2102. int retval, line;
  2103. unsigned long flags;
  2104. /* verify range of specified line number */
  2105. line = tty->index;
  2106. if ((line < 0) || (line >= mgslpc_device_count)) {
  2107. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2108. __FILE__,__LINE__,line);
  2109. return -ENODEV;
  2110. }
  2111. /* find the info structure for the specified line */
  2112. info = mgslpc_device_list;
  2113. while(info && info->line != line)
  2114. info = info->next_device;
  2115. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2116. return -ENODEV;
  2117. port = &info->port;
  2118. tty->driver_data = info;
  2119. tty_port_tty_set(port, tty);
  2120. if (debug_level >= DEBUG_LEVEL_INFO)
  2121. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2122. __FILE__,__LINE__,tty->driver->name, port->count);
  2123. /* If port is closing, signal caller to try again */
  2124. if (tty_hung_up_p(filp) || port->flags & ASYNC_CLOSING){
  2125. if (port->flags & ASYNC_CLOSING)
  2126. interruptible_sleep_on(&port->close_wait);
  2127. retval = ((port->flags & ASYNC_HUP_NOTIFY) ?
  2128. -EAGAIN : -ERESTARTSYS);
  2129. goto cleanup;
  2130. }
  2131. tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2132. spin_lock_irqsave(&info->netlock, flags);
  2133. if (info->netcount) {
  2134. retval = -EBUSY;
  2135. spin_unlock_irqrestore(&info->netlock, flags);
  2136. goto cleanup;
  2137. }
  2138. spin_lock(&port->lock);
  2139. port->count++;
  2140. spin_unlock(&port->lock);
  2141. spin_unlock_irqrestore(&info->netlock, flags);
  2142. if (port->count == 1) {
  2143. /* 1st open on this device, init hardware */
  2144. retval = startup(info, tty);
  2145. if (retval < 0)
  2146. goto cleanup;
  2147. }
  2148. retval = tty_port_block_til_ready(&info->port, tty, filp);
  2149. if (retval) {
  2150. if (debug_level >= DEBUG_LEVEL_INFO)
  2151. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2152. __FILE__,__LINE__, info->device_name, retval);
  2153. goto cleanup;
  2154. }
  2155. if (debug_level >= DEBUG_LEVEL_INFO)
  2156. printk("%s(%d):mgslpc_open(%s) success\n",
  2157. __FILE__,__LINE__, info->device_name);
  2158. retval = 0;
  2159. cleanup:
  2160. return retval;
  2161. }
  2162. /*
  2163. * /proc fs routines....
  2164. */
  2165. static inline void line_info(struct seq_file *m, MGSLPC_INFO *info)
  2166. {
  2167. char stat_buf[30];
  2168. unsigned long flags;
  2169. seq_printf(m, "%s:io:%04X irq:%d",
  2170. info->device_name, info->io_base, info->irq_level);
  2171. /* output current serial signal states */
  2172. spin_lock_irqsave(&info->lock,flags);
  2173. get_signals(info);
  2174. spin_unlock_irqrestore(&info->lock,flags);
  2175. stat_buf[0] = 0;
  2176. stat_buf[1] = 0;
  2177. if (info->serial_signals & SerialSignal_RTS)
  2178. strcat(stat_buf, "|RTS");
  2179. if (info->serial_signals & SerialSignal_CTS)
  2180. strcat(stat_buf, "|CTS");
  2181. if (info->serial_signals & SerialSignal_DTR)
  2182. strcat(stat_buf, "|DTR");
  2183. if (info->serial_signals & SerialSignal_DSR)
  2184. strcat(stat_buf, "|DSR");
  2185. if (info->serial_signals & SerialSignal_DCD)
  2186. strcat(stat_buf, "|CD");
  2187. if (info->serial_signals & SerialSignal_RI)
  2188. strcat(stat_buf, "|RI");
  2189. if (info->params.mode == MGSL_MODE_HDLC) {
  2190. seq_printf(m, " HDLC txok:%d rxok:%d",
  2191. info->icount.txok, info->icount.rxok);
  2192. if (info->icount.txunder)
  2193. seq_printf(m, " txunder:%d", info->icount.txunder);
  2194. if (info->icount.txabort)
  2195. seq_printf(m, " txabort:%d", info->icount.txabort);
  2196. if (info->icount.rxshort)
  2197. seq_printf(m, " rxshort:%d", info->icount.rxshort);
  2198. if (info->icount.rxlong)
  2199. seq_printf(m, " rxlong:%d", info->icount.rxlong);
  2200. if (info->icount.rxover)
  2201. seq_printf(m, " rxover:%d", info->icount.rxover);
  2202. if (info->icount.rxcrc)
  2203. seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
  2204. } else {
  2205. seq_printf(m, " ASYNC tx:%d rx:%d",
  2206. info->icount.tx, info->icount.rx);
  2207. if (info->icount.frame)
  2208. seq_printf(m, " fe:%d", info->icount.frame);
  2209. if (info->icount.parity)
  2210. seq_printf(m, " pe:%d", info->icount.parity);
  2211. if (info->icount.brk)
  2212. seq_printf(m, " brk:%d", info->icount.brk);
  2213. if (info->icount.overrun)
  2214. seq_printf(m, " oe:%d", info->icount.overrun);
  2215. }
  2216. /* Append serial signal status to end */
  2217. seq_printf(m, " %s\n", stat_buf+1);
  2218. seq_printf(m, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2219. info->tx_active,info->bh_requested,info->bh_running,
  2220. info->pending_bh);
  2221. }
  2222. /* Called to print information about devices
  2223. */
  2224. static int mgslpc_proc_show(struct seq_file *m, void *v)
  2225. {
  2226. MGSLPC_INFO *info;
  2227. seq_printf(m, "synclink driver:%s\n", driver_version);
  2228. info = mgslpc_device_list;
  2229. while( info ) {
  2230. line_info(m, info);
  2231. info = info->next_device;
  2232. }
  2233. return 0;
  2234. }
  2235. static int mgslpc_proc_open(struct inode *inode, struct file *file)
  2236. {
  2237. return single_open(file, mgslpc_proc_show, NULL);
  2238. }
  2239. static const struct file_operations mgslpc_proc_fops = {
  2240. .owner = THIS_MODULE,
  2241. .open = mgslpc_proc_open,
  2242. .read = seq_read,
  2243. .llseek = seq_lseek,
  2244. .release = single_release,
  2245. };
  2246. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2247. {
  2248. /* each buffer has header and data */
  2249. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2250. /* calculate total allocation size for 8 buffers */
  2251. info->rx_buf_total_size = info->rx_buf_size * 8;
  2252. /* limit total allocated memory */
  2253. if (info->rx_buf_total_size > 0x10000)
  2254. info->rx_buf_total_size = 0x10000;
  2255. /* calculate number of buffers */
  2256. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2257. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2258. if (info->rx_buf == NULL)
  2259. return -ENOMEM;
  2260. rx_reset_buffers(info);
  2261. return 0;
  2262. }
  2263. static void rx_free_buffers(MGSLPC_INFO *info)
  2264. {
  2265. kfree(info->rx_buf);
  2266. info->rx_buf = NULL;
  2267. }
  2268. static int claim_resources(MGSLPC_INFO *info)
  2269. {
  2270. if (rx_alloc_buffers(info) < 0 ) {
  2271. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2272. release_resources(info);
  2273. return -ENODEV;
  2274. }
  2275. return 0;
  2276. }
  2277. static void release_resources(MGSLPC_INFO *info)
  2278. {
  2279. if (debug_level >= DEBUG_LEVEL_INFO)
  2280. printk("release_resources(%s)\n", info->device_name);
  2281. rx_free_buffers(info);
  2282. }
  2283. /* Add the specified device instance data structure to the
  2284. * global linked list of devices and increment the device count.
  2285. *
  2286. * Arguments: info pointer to device instance data
  2287. */
  2288. static void mgslpc_add_device(MGSLPC_INFO *info)
  2289. {
  2290. info->next_device = NULL;
  2291. info->line = mgslpc_device_count;
  2292. sprintf(info->device_name,"ttySLP%d",info->line);
  2293. if (info->line < MAX_DEVICE_COUNT) {
  2294. if (maxframe[info->line])
  2295. info->max_frame_size = maxframe[info->line];
  2296. }
  2297. mgslpc_device_count++;
  2298. if (!mgslpc_device_list)
  2299. mgslpc_device_list = info;
  2300. else {
  2301. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2302. while( current_dev->next_device )
  2303. current_dev = current_dev->next_device;
  2304. current_dev->next_device = info;
  2305. }
  2306. if (info->max_frame_size < 4096)
  2307. info->max_frame_size = 4096;
  2308. else if (info->max_frame_size > 65535)
  2309. info->max_frame_size = 65535;
  2310. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2311. info->device_name, info->io_base, info->irq_level);
  2312. #if SYNCLINK_GENERIC_HDLC
  2313. hdlcdev_init(info);
  2314. #endif
  2315. }
  2316. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2317. {
  2318. MGSLPC_INFO *info = mgslpc_device_list;
  2319. MGSLPC_INFO *last = NULL;
  2320. while(info) {
  2321. if (info == remove_info) {
  2322. if (last)
  2323. last->next_device = info->next_device;
  2324. else
  2325. mgslpc_device_list = info->next_device;
  2326. #if SYNCLINK_GENERIC_HDLC
  2327. hdlcdev_exit(info);
  2328. #endif
  2329. release_resources(info);
  2330. kfree(info);
  2331. mgslpc_device_count--;
  2332. return;
  2333. }
  2334. last = info;
  2335. info = info->next_device;
  2336. }
  2337. }
  2338. static struct pcmcia_device_id mgslpc_ids[] = {
  2339. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2340. PCMCIA_DEVICE_NULL
  2341. };
  2342. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2343. static struct pcmcia_driver mgslpc_driver = {
  2344. .owner = THIS_MODULE,
  2345. .drv = {
  2346. .name = "synclink_cs",
  2347. },
  2348. .probe = mgslpc_probe,
  2349. .remove = mgslpc_detach,
  2350. .id_table = mgslpc_ids,
  2351. .suspend = mgslpc_suspend,
  2352. .resume = mgslpc_resume,
  2353. };
  2354. static const struct tty_operations mgslpc_ops = {
  2355. .open = mgslpc_open,
  2356. .close = mgslpc_close,
  2357. .write = mgslpc_write,
  2358. .put_char = mgslpc_put_char,
  2359. .flush_chars = mgslpc_flush_chars,
  2360. .write_room = mgslpc_write_room,
  2361. .chars_in_buffer = mgslpc_chars_in_buffer,
  2362. .flush_buffer = mgslpc_flush_buffer,
  2363. .ioctl = mgslpc_ioctl,
  2364. .throttle = mgslpc_throttle,
  2365. .unthrottle = mgslpc_unthrottle,
  2366. .send_xchar = mgslpc_send_xchar,
  2367. .break_ctl = mgslpc_break,
  2368. .wait_until_sent = mgslpc_wait_until_sent,
  2369. .set_termios = mgslpc_set_termios,
  2370. .stop = tx_pause,
  2371. .start = tx_release,
  2372. .hangup = mgslpc_hangup,
  2373. .tiocmget = tiocmget,
  2374. .tiocmset = tiocmset,
  2375. .proc_fops = &mgslpc_proc_fops,
  2376. };
  2377. static void synclink_cs_cleanup(void)
  2378. {
  2379. int rc;
  2380. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2381. while(mgslpc_device_list)
  2382. mgslpc_remove_device(mgslpc_device_list);
  2383. if (serial_driver) {
  2384. if ((rc = tty_unregister_driver(serial_driver)))
  2385. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2386. __FILE__,__LINE__,rc);
  2387. put_tty_driver(serial_driver);
  2388. }
  2389. pcmcia_unregister_driver(&mgslpc_driver);
  2390. }
  2391. static int __init synclink_cs_init(void)
  2392. {
  2393. int rc;
  2394. if (break_on_load) {
  2395. mgslpc_get_text_ptr();
  2396. BREAKPOINT();
  2397. }
  2398. printk("%s %s\n", driver_name, driver_version);
  2399. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2400. return rc;
  2401. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2402. if (!serial_driver) {
  2403. rc = -ENOMEM;
  2404. goto error;
  2405. }
  2406. /* Initialize the tty_driver structure */
  2407. serial_driver->owner = THIS_MODULE;
  2408. serial_driver->driver_name = "synclink_cs";
  2409. serial_driver->name = "ttySLP";
  2410. serial_driver->major = ttymajor;
  2411. serial_driver->minor_start = 64;
  2412. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2413. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2414. serial_driver->init_termios = tty_std_termios;
  2415. serial_driver->init_termios.c_cflag =
  2416. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2417. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2418. tty_set_operations(serial_driver, &mgslpc_ops);
  2419. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2420. printk("%s(%d):Couldn't register serial driver\n",
  2421. __FILE__,__LINE__);
  2422. put_tty_driver(serial_driver);
  2423. serial_driver = NULL;
  2424. goto error;
  2425. }
  2426. printk("%s %s, tty major#%d\n",
  2427. driver_name, driver_version,
  2428. serial_driver->major);
  2429. return 0;
  2430. error:
  2431. synclink_cs_cleanup();
  2432. return rc;
  2433. }
  2434. static void __exit synclink_cs_exit(void)
  2435. {
  2436. synclink_cs_cleanup();
  2437. }
  2438. module_init(synclink_cs_init);
  2439. module_exit(synclink_cs_exit);
  2440. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2441. {
  2442. unsigned int M, N;
  2443. unsigned char val;
  2444. /* note:standard BRG mode is broken in V3.2 chip
  2445. * so enhanced mode is always used
  2446. */
  2447. if (rate) {
  2448. N = 3686400 / rate;
  2449. if (!N)
  2450. N = 1;
  2451. N >>= 1;
  2452. for (M = 1; N > 64 && M < 16; M++)
  2453. N >>= 1;
  2454. N--;
  2455. /* BGR[5..0] = N
  2456. * BGR[9..6] = M
  2457. * BGR[7..0] contained in BGR register
  2458. * BGR[9..8] contained in CCR2[7..6]
  2459. * divisor = (N+1)*2^M
  2460. *
  2461. * Note: M *must* not be zero (causes asymetric duty cycle)
  2462. */
  2463. write_reg(info, (unsigned char) (channel + BGR),
  2464. (unsigned char) ((M << 6) + N));
  2465. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2466. val |= ((M << 4) & 0xc0);
  2467. write_reg(info, (unsigned char) (channel + CCR2), val);
  2468. }
  2469. }
  2470. /* Enabled the AUX clock output at the specified frequency.
  2471. */
  2472. static void enable_auxclk(MGSLPC_INFO *info)
  2473. {
  2474. unsigned char val;
  2475. /* MODE
  2476. *
  2477. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2478. * 05 ADM Address Mode, 0 = no addr recognition
  2479. * 04 TMD Timer Mode, 0 = external
  2480. * 03 RAC Receiver Active, 0 = inactive
  2481. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2482. * 01 TRS Timer Resolution, 1=512
  2483. * 00 TLP Test Loop, 0 = no loop
  2484. *
  2485. * 1000 0010
  2486. */
  2487. val = 0x82;
  2488. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2489. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2490. val |= BIT2;
  2491. write_reg(info, CHB + MODE, val);
  2492. /* CCR0
  2493. *
  2494. * 07 PU Power Up, 1=active, 0=power down
  2495. * 06 MCE Master Clock Enable, 1=enabled
  2496. * 05 Reserved, 0
  2497. * 04..02 SC[2..0] Encoding
  2498. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2499. *
  2500. * 11000000
  2501. */
  2502. write_reg(info, CHB + CCR0, 0xc0);
  2503. /* CCR1
  2504. *
  2505. * 07 SFLG Shared Flag, 0 = disable shared flags
  2506. * 06 GALP Go Active On Loop, 0 = not used
  2507. * 05 GLP Go On Loop, 0 = not used
  2508. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2509. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2510. * 02..00 CM[2..0] Clock Mode
  2511. *
  2512. * 0001 0111
  2513. */
  2514. write_reg(info, CHB + CCR1, 0x17);
  2515. /* CCR2 (Channel B)
  2516. *
  2517. * 07..06 BGR[9..8] Baud rate bits 9..8
  2518. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2519. * 04 SSEL Clock source select, 1=submode b
  2520. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2521. * 02 RWX Read/Write Exchange 0=disabled
  2522. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2523. * 00 DIV, data inversion 0=disabled, 1=enabled
  2524. *
  2525. * 0011 1000
  2526. */
  2527. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2528. write_reg(info, CHB + CCR2, 0x38);
  2529. else
  2530. write_reg(info, CHB + CCR2, 0x30);
  2531. /* CCR4
  2532. *
  2533. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2534. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2535. * 05 TST1 Test Pin, 0=normal operation
  2536. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2537. * 03..02 Reserved, must be 0
  2538. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2539. *
  2540. * 0101 0000
  2541. */
  2542. write_reg(info, CHB + CCR4, 0x50);
  2543. /* if auxclk not enabled, set internal BRG so
  2544. * CTS transitions can be detected (requires TxC)
  2545. */
  2546. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2547. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2548. else
  2549. mgslpc_set_rate(info, CHB, 921600);
  2550. }
  2551. static void loopback_enable(MGSLPC_INFO *info)
  2552. {
  2553. unsigned char val;
  2554. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2555. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2556. write_reg(info, CHA + CCR1, val);
  2557. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2558. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2559. write_reg(info, CHA + CCR2, val);
  2560. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2561. if (info->params.clock_speed)
  2562. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2563. else
  2564. mgslpc_set_rate(info, CHA, 1843200);
  2565. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2566. val = read_reg(info, CHA + MODE) | BIT0;
  2567. write_reg(info, CHA + MODE, val);
  2568. }
  2569. static void hdlc_mode(MGSLPC_INFO *info)
  2570. {
  2571. unsigned char val;
  2572. unsigned char clkmode, clksubmode;
  2573. /* disable all interrupts */
  2574. irq_disable(info, CHA, 0xffff);
  2575. irq_disable(info, CHB, 0xffff);
  2576. port_irq_disable(info, 0xff);
  2577. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2578. clkmode = clksubmode = 0;
  2579. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2580. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2581. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2582. clkmode = 7;
  2583. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2584. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2585. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2586. clkmode = 7;
  2587. clksubmode = 1;
  2588. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2589. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2590. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2591. clkmode = 6;
  2592. clksubmode = 1;
  2593. } else {
  2594. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2595. clkmode = 6;
  2596. }
  2597. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2598. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2599. clksubmode = 1;
  2600. }
  2601. /* MODE
  2602. *
  2603. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2604. * 05 ADM Address Mode, 0 = no addr recognition
  2605. * 04 TMD Timer Mode, 0 = external
  2606. * 03 RAC Receiver Active, 0 = inactive
  2607. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2608. * 01 TRS Timer Resolution, 1=512
  2609. * 00 TLP Test Loop, 0 = no loop
  2610. *
  2611. * 1000 0010
  2612. */
  2613. val = 0x82;
  2614. if (info->params.loopback)
  2615. val |= BIT0;
  2616. /* preserve RTS state */
  2617. if (info->serial_signals & SerialSignal_RTS)
  2618. val |= BIT2;
  2619. write_reg(info, CHA + MODE, val);
  2620. /* CCR0
  2621. *
  2622. * 07 PU Power Up, 1=active, 0=power down
  2623. * 06 MCE Master Clock Enable, 1=enabled
  2624. * 05 Reserved, 0
  2625. * 04..02 SC[2..0] Encoding
  2626. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2627. *
  2628. * 11000000
  2629. */
  2630. val = 0xc0;
  2631. switch (info->params.encoding)
  2632. {
  2633. case HDLC_ENCODING_NRZI:
  2634. val |= BIT3;
  2635. break;
  2636. case HDLC_ENCODING_BIPHASE_SPACE:
  2637. val |= BIT4;
  2638. break; // FM0
  2639. case HDLC_ENCODING_BIPHASE_MARK:
  2640. val |= BIT4 + BIT2;
  2641. break; // FM1
  2642. case HDLC_ENCODING_BIPHASE_LEVEL:
  2643. val |= BIT4 + BIT3;
  2644. break; // Manchester
  2645. }
  2646. write_reg(info, CHA + CCR0, val);
  2647. /* CCR1
  2648. *
  2649. * 07 SFLG Shared Flag, 0 = disable shared flags
  2650. * 06 GALP Go Active On Loop, 0 = not used
  2651. * 05 GLP Go On Loop, 0 = not used
  2652. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2653. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2654. * 02..00 CM[2..0] Clock Mode
  2655. *
  2656. * 0001 0000
  2657. */
  2658. val = 0x10 + clkmode;
  2659. write_reg(info, CHA + CCR1, val);
  2660. /* CCR2
  2661. *
  2662. * 07..06 BGR[9..8] Baud rate bits 9..8
  2663. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2664. * 04 SSEL Clock source select, 1=submode b
  2665. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2666. * 02 RWX Read/Write Exchange 0=disabled
  2667. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2668. * 00 DIV, data inversion 0=disabled, 1=enabled
  2669. *
  2670. * 0000 0000
  2671. */
  2672. val = 0x00;
  2673. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2674. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2675. val |= BIT5;
  2676. if (clksubmode)
  2677. val |= BIT4;
  2678. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2679. val |= BIT1;
  2680. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2681. val |= BIT0;
  2682. write_reg(info, CHA + CCR2, val);
  2683. /* CCR3
  2684. *
  2685. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2686. * 05 EPT Enable preamble transmission, 1=enabled
  2687. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2688. * 03 CRL CRC Reset Level, 0=FFFF
  2689. * 02 RCRC Rx CRC 0=On 1=Off
  2690. * 01 TCRC Tx CRC 0=On 1=Off
  2691. * 00 PSD DPLL Phase Shift Disable
  2692. *
  2693. * 0000 0000
  2694. */
  2695. val = 0x00;
  2696. if (info->params.crc_type == HDLC_CRC_NONE)
  2697. val |= BIT2 + BIT1;
  2698. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2699. val |= BIT5;
  2700. switch (info->params.preamble_length)
  2701. {
  2702. case HDLC_PREAMBLE_LENGTH_16BITS:
  2703. val |= BIT6;
  2704. break;
  2705. case HDLC_PREAMBLE_LENGTH_32BITS:
  2706. val |= BIT6;
  2707. break;
  2708. case HDLC_PREAMBLE_LENGTH_64BITS:
  2709. val |= BIT7 + BIT6;
  2710. break;
  2711. }
  2712. write_reg(info, CHA + CCR3, val);
  2713. /* PRE - Preamble pattern */
  2714. val = 0;
  2715. switch (info->params.preamble)
  2716. {
  2717. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2718. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2719. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2720. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2721. }
  2722. write_reg(info, CHA + PRE, val);
  2723. /* CCR4
  2724. *
  2725. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2726. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2727. * 05 TST1 Test Pin, 0=normal operation
  2728. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2729. * 03..02 Reserved, must be 0
  2730. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2731. *
  2732. * 0101 0000
  2733. */
  2734. val = 0x50;
  2735. write_reg(info, CHA + CCR4, val);
  2736. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2737. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2738. else
  2739. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2740. /* RLCR Receive length check register
  2741. *
  2742. * 7 1=enable receive length check
  2743. * 6..0 Max frame length = (RL + 1) * 32
  2744. */
  2745. write_reg(info, CHA + RLCR, 0);
  2746. /* XBCH Transmit Byte Count High
  2747. *
  2748. * 07 DMA mode, 0 = interrupt driven
  2749. * 06 NRM, 0=ABM (ignored)
  2750. * 05 CAS Carrier Auto Start
  2751. * 04 XC Transmit Continuously (ignored)
  2752. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2753. *
  2754. * 0000 0000
  2755. */
  2756. val = 0x00;
  2757. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2758. val |= BIT5;
  2759. write_reg(info, CHA + XBCH, val);
  2760. enable_auxclk(info);
  2761. if (info->params.loopback || info->testing_irq)
  2762. loopback_enable(info);
  2763. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2764. {
  2765. irq_enable(info, CHB, IRQ_CTS);
  2766. /* PVR[3] 1=AUTO CTS active */
  2767. set_reg_bits(info, CHA + PVR, BIT3);
  2768. } else
  2769. clear_reg_bits(info, CHA + PVR, BIT3);
  2770. irq_enable(info, CHA,
  2771. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2772. IRQ_UNDERRUN + IRQ_TXFIFO);
  2773. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2774. wait_command_complete(info, CHA);
  2775. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2776. /* Master clock mode enabled above to allow reset commands
  2777. * to complete even if no data clocks are present.
  2778. *
  2779. * Disable master clock mode for normal communications because
  2780. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2781. * IRQ when in master clock mode.
  2782. *
  2783. * Leave master clock mode enabled for IRQ test because the
  2784. * timer IRQ used by the test can only happen in master clock mode.
  2785. */
  2786. if (!info->testing_irq)
  2787. clear_reg_bits(info, CHA + CCR0, BIT6);
  2788. tx_set_idle(info);
  2789. tx_stop(info);
  2790. rx_stop(info);
  2791. }
  2792. static void rx_stop(MGSLPC_INFO *info)
  2793. {
  2794. if (debug_level >= DEBUG_LEVEL_ISR)
  2795. printk("%s(%d):rx_stop(%s)\n",
  2796. __FILE__,__LINE__, info->device_name );
  2797. /* MODE:03 RAC Receiver Active, 0=inactive */
  2798. clear_reg_bits(info, CHA + MODE, BIT3);
  2799. info->rx_enabled = false;
  2800. info->rx_overflow = false;
  2801. }
  2802. static void rx_start(MGSLPC_INFO *info)
  2803. {
  2804. if (debug_level >= DEBUG_LEVEL_ISR)
  2805. printk("%s(%d):rx_start(%s)\n",
  2806. __FILE__,__LINE__, info->device_name );
  2807. rx_reset_buffers(info);
  2808. info->rx_enabled = false;
  2809. info->rx_overflow = false;
  2810. /* MODE:03 RAC Receiver Active, 1=active */
  2811. set_reg_bits(info, CHA + MODE, BIT3);
  2812. info->rx_enabled = true;
  2813. }
  2814. static void tx_start(MGSLPC_INFO *info, struct tty_struct *tty)
  2815. {
  2816. if (debug_level >= DEBUG_LEVEL_ISR)
  2817. printk("%s(%d):tx_start(%s)\n",
  2818. __FILE__,__LINE__, info->device_name );
  2819. if (info->tx_count) {
  2820. /* If auto RTS enabled and RTS is inactive, then assert */
  2821. /* RTS and set a flag indicating that the driver should */
  2822. /* negate RTS when the transmission completes. */
  2823. info->drop_rts_on_tx_done = false;
  2824. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2825. get_signals(info);
  2826. if (!(info->serial_signals & SerialSignal_RTS)) {
  2827. info->serial_signals |= SerialSignal_RTS;
  2828. set_signals(info);
  2829. info->drop_rts_on_tx_done = true;
  2830. }
  2831. }
  2832. if (info->params.mode == MGSL_MODE_ASYNC) {
  2833. if (!info->tx_active) {
  2834. info->tx_active = true;
  2835. tx_ready(info, tty);
  2836. }
  2837. } else {
  2838. info->tx_active = true;
  2839. tx_ready(info, tty);
  2840. mod_timer(&info->tx_timer, jiffies +
  2841. msecs_to_jiffies(5000));
  2842. }
  2843. }
  2844. if (!info->tx_enabled)
  2845. info->tx_enabled = true;
  2846. }
  2847. static void tx_stop(MGSLPC_INFO *info)
  2848. {
  2849. if (debug_level >= DEBUG_LEVEL_ISR)
  2850. printk("%s(%d):tx_stop(%s)\n",
  2851. __FILE__,__LINE__, info->device_name );
  2852. del_timer(&info->tx_timer);
  2853. info->tx_enabled = false;
  2854. info->tx_active = false;
  2855. }
  2856. /* Reset the adapter to a known state and prepare it for further use.
  2857. */
  2858. static void reset_device(MGSLPC_INFO *info)
  2859. {
  2860. /* power up both channels (set BIT7) */
  2861. write_reg(info, CHA + CCR0, 0x80);
  2862. write_reg(info, CHB + CCR0, 0x80);
  2863. write_reg(info, CHA + MODE, 0);
  2864. write_reg(info, CHB + MODE, 0);
  2865. /* disable all interrupts */
  2866. irq_disable(info, CHA, 0xffff);
  2867. irq_disable(info, CHB, 0xffff);
  2868. port_irq_disable(info, 0xff);
  2869. /* PCR Port Configuration Register
  2870. *
  2871. * 07..04 DEC[3..0] Serial I/F select outputs
  2872. * 03 output, 1=AUTO CTS control enabled
  2873. * 02 RI Ring Indicator input 0=active
  2874. * 01 DSR input 0=active
  2875. * 00 DTR output 0=active
  2876. *
  2877. * 0000 0110
  2878. */
  2879. write_reg(info, PCR, 0x06);
  2880. /* PVR Port Value Register
  2881. *
  2882. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  2883. * 03 AUTO CTS output 1=enabled
  2884. * 02 RI Ring Indicator input
  2885. * 01 DSR input
  2886. * 00 DTR output (1=inactive)
  2887. *
  2888. * 0000 0001
  2889. */
  2890. // write_reg(info, PVR, PVR_DTR);
  2891. /* IPC Interrupt Port Configuration
  2892. *
  2893. * 07 VIS 1=Masked interrupts visible
  2894. * 06..05 Reserved, 0
  2895. * 04..03 SLA Slave address, 00 ignored
  2896. * 02 CASM Cascading Mode, 1=daisy chain
  2897. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  2898. *
  2899. * 0000 0101
  2900. */
  2901. write_reg(info, IPC, 0x05);
  2902. }
  2903. static void async_mode(MGSLPC_INFO *info)
  2904. {
  2905. unsigned char val;
  2906. /* disable all interrupts */
  2907. irq_disable(info, CHA, 0xffff);
  2908. irq_disable(info, CHB, 0xffff);
  2909. port_irq_disable(info, 0xff);
  2910. /* MODE
  2911. *
  2912. * 07 Reserved, 0
  2913. * 06 FRTS RTS State, 0=active
  2914. * 05 FCTS Flow Control on CTS
  2915. * 04 FLON Flow Control Enable
  2916. * 03 RAC Receiver Active, 0 = inactive
  2917. * 02 RTS 0=Auto RTS, 1=manual RTS
  2918. * 01 TRS Timer Resolution, 1=512
  2919. * 00 TLP Test Loop, 0 = no loop
  2920. *
  2921. * 0000 0110
  2922. */
  2923. val = 0x06;
  2924. if (info->params.loopback)
  2925. val |= BIT0;
  2926. /* preserve RTS state */
  2927. if (!(info->serial_signals & SerialSignal_RTS))
  2928. val |= BIT6;
  2929. write_reg(info, CHA + MODE, val);
  2930. /* CCR0
  2931. *
  2932. * 07 PU Power Up, 1=active, 0=power down
  2933. * 06 MCE Master Clock Enable, 1=enabled
  2934. * 05 Reserved, 0
  2935. * 04..02 SC[2..0] Encoding, 000=NRZ
  2936. * 01..00 SM[1..0] Serial Mode, 11=Async
  2937. *
  2938. * 1000 0011
  2939. */
  2940. write_reg(info, CHA + CCR0, 0x83);
  2941. /* CCR1
  2942. *
  2943. * 07..05 Reserved, 0
  2944. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2945. * 03 BCR Bit Clock Rate, 1=16x
  2946. * 02..00 CM[2..0] Clock Mode, 111=BRG
  2947. *
  2948. * 0001 1111
  2949. */
  2950. write_reg(info, CHA + CCR1, 0x1f);
  2951. /* CCR2 (channel A)
  2952. *
  2953. * 07..06 BGR[9..8] Baud rate bits 9..8
  2954. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2955. * 04 SSEL Clock source select, 1=submode b
  2956. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2957. * 02 RWX Read/Write Exchange 0=disabled
  2958. * 01 Reserved, 0
  2959. * 00 DIV, data inversion 0=disabled, 1=enabled
  2960. *
  2961. * 0001 0000
  2962. */
  2963. write_reg(info, CHA + CCR2, 0x10);
  2964. /* CCR3
  2965. *
  2966. * 07..01 Reserved, 0
  2967. * 00 PSD DPLL Phase Shift Disable
  2968. *
  2969. * 0000 0000
  2970. */
  2971. write_reg(info, CHA + CCR3, 0);
  2972. /* CCR4
  2973. *
  2974. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2975. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2976. * 05 TST1 Test Pin, 0=normal operation
  2977. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2978. * 03..00 Reserved, must be 0
  2979. *
  2980. * 0101 0000
  2981. */
  2982. write_reg(info, CHA + CCR4, 0x50);
  2983. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  2984. /* DAFO Data Format
  2985. *
  2986. * 07 Reserved, 0
  2987. * 06 XBRK transmit break, 0=normal operation
  2988. * 05 Stop bits (0=1, 1=2)
  2989. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  2990. * 02 PAREN Parity Enable
  2991. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  2992. *
  2993. */
  2994. val = 0x00;
  2995. if (info->params.data_bits != 8)
  2996. val |= BIT0; /* 7 bits */
  2997. if (info->params.stop_bits != 1)
  2998. val |= BIT5;
  2999. if (info->params.parity != ASYNC_PARITY_NONE)
  3000. {
  3001. val |= BIT2; /* Parity enable */
  3002. if (info->params.parity == ASYNC_PARITY_ODD)
  3003. val |= BIT3;
  3004. else
  3005. val |= BIT4;
  3006. }
  3007. write_reg(info, CHA + DAFO, val);
  3008. /* RFC Rx FIFO Control
  3009. *
  3010. * 07 Reserved, 0
  3011. * 06 DPS, 1=parity bit not stored in data byte
  3012. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3013. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3014. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3015. * 01 Reserved, 0
  3016. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3017. *
  3018. * 0101 1100
  3019. */
  3020. write_reg(info, CHA + RFC, 0x5c);
  3021. /* RLCR Receive length check register
  3022. *
  3023. * Max frame length = (RL + 1) * 32
  3024. */
  3025. write_reg(info, CHA + RLCR, 0);
  3026. /* XBCH Transmit Byte Count High
  3027. *
  3028. * 07 DMA mode, 0 = interrupt driven
  3029. * 06 NRM, 0=ABM (ignored)
  3030. * 05 CAS Carrier Auto Start
  3031. * 04 XC Transmit Continuously (ignored)
  3032. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3033. *
  3034. * 0000 0000
  3035. */
  3036. val = 0x00;
  3037. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3038. val |= BIT5;
  3039. write_reg(info, CHA + XBCH, val);
  3040. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3041. irq_enable(info, CHA, IRQ_CTS);
  3042. /* MODE:03 RAC Receiver Active, 1=active */
  3043. set_reg_bits(info, CHA + MODE, BIT3);
  3044. enable_auxclk(info);
  3045. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3046. irq_enable(info, CHB, IRQ_CTS);
  3047. /* PVR[3] 1=AUTO CTS active */
  3048. set_reg_bits(info, CHA + PVR, BIT3);
  3049. } else
  3050. clear_reg_bits(info, CHA + PVR, BIT3);
  3051. irq_enable(info, CHA,
  3052. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3053. IRQ_ALLSENT + IRQ_TXFIFO);
  3054. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3055. wait_command_complete(info, CHA);
  3056. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3057. }
  3058. /* Set the HDLC idle mode for the transmitter.
  3059. */
  3060. static void tx_set_idle(MGSLPC_INFO *info)
  3061. {
  3062. /* Note: ESCC2 only supports flags and one idle modes */
  3063. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3064. set_reg_bits(info, CHA + CCR1, BIT3);
  3065. else
  3066. clear_reg_bits(info, CHA + CCR1, BIT3);
  3067. }
  3068. /* get state of the V24 status (input) signals.
  3069. */
  3070. static void get_signals(MGSLPC_INFO *info)
  3071. {
  3072. unsigned char status = 0;
  3073. /* preserve DTR and RTS */
  3074. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3075. if (read_reg(info, CHB + VSTR) & BIT7)
  3076. info->serial_signals |= SerialSignal_DCD;
  3077. if (read_reg(info, CHB + STAR) & BIT1)
  3078. info->serial_signals |= SerialSignal_CTS;
  3079. status = read_reg(info, CHA + PVR);
  3080. if (!(status & PVR_RI))
  3081. info->serial_signals |= SerialSignal_RI;
  3082. if (!(status & PVR_DSR))
  3083. info->serial_signals |= SerialSignal_DSR;
  3084. }
  3085. /* Set the state of DTR and RTS based on contents of
  3086. * serial_signals member of device extension.
  3087. */
  3088. static void set_signals(MGSLPC_INFO *info)
  3089. {
  3090. unsigned char val;
  3091. val = read_reg(info, CHA + MODE);
  3092. if (info->params.mode == MGSL_MODE_ASYNC) {
  3093. if (info->serial_signals & SerialSignal_RTS)
  3094. val &= ~BIT6;
  3095. else
  3096. val |= BIT6;
  3097. } else {
  3098. if (info->serial_signals & SerialSignal_RTS)
  3099. val |= BIT2;
  3100. else
  3101. val &= ~BIT2;
  3102. }
  3103. write_reg(info, CHA + MODE, val);
  3104. if (info->serial_signals & SerialSignal_DTR)
  3105. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3106. else
  3107. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3108. }
  3109. static void rx_reset_buffers(MGSLPC_INFO *info)
  3110. {
  3111. RXBUF *buf;
  3112. int i;
  3113. info->rx_put = 0;
  3114. info->rx_get = 0;
  3115. info->rx_frame_count = 0;
  3116. for (i=0 ; i < info->rx_buf_count ; i++) {
  3117. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3118. buf->status = buf->count = 0;
  3119. }
  3120. }
  3121. /* Attempt to return a received HDLC frame
  3122. * Only frames received without errors are returned.
  3123. *
  3124. * Returns true if frame returned, otherwise false
  3125. */
  3126. static bool rx_get_frame(MGSLPC_INFO *info, struct tty_struct *tty)
  3127. {
  3128. unsigned short status;
  3129. RXBUF *buf;
  3130. unsigned int framesize = 0;
  3131. unsigned long flags;
  3132. bool return_frame = false;
  3133. if (info->rx_frame_count == 0)
  3134. return false;
  3135. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3136. status = buf->status;
  3137. /* 07 VFR 1=valid frame
  3138. * 06 RDO 1=data overrun
  3139. * 05 CRC 1=OK, 0=error
  3140. * 04 RAB 1=frame aborted
  3141. */
  3142. if ((status & 0xf0) != 0xA0) {
  3143. if (!(status & BIT7) || (status & BIT4))
  3144. info->icount.rxabort++;
  3145. else if (status & BIT6)
  3146. info->icount.rxover++;
  3147. else if (!(status & BIT5)) {
  3148. info->icount.rxcrc++;
  3149. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3150. return_frame = true;
  3151. }
  3152. framesize = 0;
  3153. #if SYNCLINK_GENERIC_HDLC
  3154. {
  3155. info->netdev->stats.rx_errors++;
  3156. info->netdev->stats.rx_frame_errors++;
  3157. }
  3158. #endif
  3159. } else
  3160. return_frame = true;
  3161. if (return_frame)
  3162. framesize = buf->count;
  3163. if (debug_level >= DEBUG_LEVEL_BH)
  3164. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3165. __FILE__,__LINE__,info->device_name,status,framesize);
  3166. if (debug_level >= DEBUG_LEVEL_DATA)
  3167. trace_block(info, buf->data, framesize, 0);
  3168. if (framesize) {
  3169. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3170. framesize+1 > info->max_frame_size) ||
  3171. framesize > info->max_frame_size)
  3172. info->icount.rxlong++;
  3173. else {
  3174. if (status & BIT5)
  3175. info->icount.rxok++;
  3176. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3177. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3178. ++framesize;
  3179. }
  3180. #if SYNCLINK_GENERIC_HDLC
  3181. if (info->netcount)
  3182. hdlcdev_rx(info, buf->data, framesize);
  3183. else
  3184. #endif
  3185. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3186. }
  3187. }
  3188. spin_lock_irqsave(&info->lock,flags);
  3189. buf->status = buf->count = 0;
  3190. info->rx_frame_count--;
  3191. info->rx_get++;
  3192. if (info->rx_get >= info->rx_buf_count)
  3193. info->rx_get = 0;
  3194. spin_unlock_irqrestore(&info->lock,flags);
  3195. return true;
  3196. }
  3197. static bool register_test(MGSLPC_INFO *info)
  3198. {
  3199. static unsigned char patterns[] =
  3200. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3201. static unsigned int count = ARRAY_SIZE(patterns);
  3202. unsigned int i;
  3203. bool rc = true;
  3204. unsigned long flags;
  3205. spin_lock_irqsave(&info->lock,flags);
  3206. reset_device(info);
  3207. for (i = 0; i < count; i++) {
  3208. write_reg(info, XAD1, patterns[i]);
  3209. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3210. if ((read_reg(info, XAD1) != patterns[i]) ||
  3211. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3212. rc = false;
  3213. break;
  3214. }
  3215. }
  3216. spin_unlock_irqrestore(&info->lock,flags);
  3217. return rc;
  3218. }
  3219. static bool irq_test(MGSLPC_INFO *info)
  3220. {
  3221. unsigned long end_time;
  3222. unsigned long flags;
  3223. spin_lock_irqsave(&info->lock,flags);
  3224. reset_device(info);
  3225. info->testing_irq = true;
  3226. hdlc_mode(info);
  3227. info->irq_occurred = false;
  3228. /* init hdlc mode */
  3229. irq_enable(info, CHA, IRQ_TIMER);
  3230. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3231. issue_command(info, CHA, CMD_START_TIMER);
  3232. spin_unlock_irqrestore(&info->lock,flags);
  3233. end_time=100;
  3234. while(end_time-- && !info->irq_occurred) {
  3235. msleep_interruptible(10);
  3236. }
  3237. info->testing_irq = false;
  3238. spin_lock_irqsave(&info->lock,flags);
  3239. reset_device(info);
  3240. spin_unlock_irqrestore(&info->lock,flags);
  3241. return info->irq_occurred;
  3242. }
  3243. static int adapter_test(MGSLPC_INFO *info)
  3244. {
  3245. if (!register_test(info)) {
  3246. info->init_error = DiagStatus_AddressFailure;
  3247. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3248. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3249. return -ENODEV;
  3250. }
  3251. if (!irq_test(info)) {
  3252. info->init_error = DiagStatus_IrqFailure;
  3253. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3254. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3255. return -ENODEV;
  3256. }
  3257. if (debug_level >= DEBUG_LEVEL_INFO)
  3258. printk("%s(%d):device %s passed diagnostics\n",
  3259. __FILE__,__LINE__,info->device_name);
  3260. return 0;
  3261. }
  3262. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3263. {
  3264. int i;
  3265. int linecount;
  3266. if (xmit)
  3267. printk("%s tx data:\n",info->device_name);
  3268. else
  3269. printk("%s rx data:\n",info->device_name);
  3270. while(count) {
  3271. if (count > 16)
  3272. linecount = 16;
  3273. else
  3274. linecount = count;
  3275. for(i=0;i<linecount;i++)
  3276. printk("%02X ",(unsigned char)data[i]);
  3277. for(;i<17;i++)
  3278. printk(" ");
  3279. for(i=0;i<linecount;i++) {
  3280. if (data[i]>=040 && data[i]<=0176)
  3281. printk("%c",data[i]);
  3282. else
  3283. printk(".");
  3284. }
  3285. printk("\n");
  3286. data += linecount;
  3287. count -= linecount;
  3288. }
  3289. }
  3290. /* HDLC frame time out
  3291. * update stats and do tx completion processing
  3292. */
  3293. static void tx_timeout(unsigned long context)
  3294. {
  3295. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3296. unsigned long flags;
  3297. if ( debug_level >= DEBUG_LEVEL_INFO )
  3298. printk( "%s(%d):tx_timeout(%s)\n",
  3299. __FILE__,__LINE__,info->device_name);
  3300. if(info->tx_active &&
  3301. info->params.mode == MGSL_MODE_HDLC) {
  3302. info->icount.txtimeout++;
  3303. }
  3304. spin_lock_irqsave(&info->lock,flags);
  3305. info->tx_active = false;
  3306. info->tx_count = info->tx_put = info->tx_get = 0;
  3307. spin_unlock_irqrestore(&info->lock,flags);
  3308. #if SYNCLINK_GENERIC_HDLC
  3309. if (info->netcount)
  3310. hdlcdev_tx_done(info);
  3311. else
  3312. #endif
  3313. {
  3314. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3315. bh_transmit(info, tty);
  3316. tty_kref_put(tty);
  3317. }
  3318. }
  3319. #if SYNCLINK_GENERIC_HDLC
  3320. /**
  3321. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3322. * set encoding and frame check sequence (FCS) options
  3323. *
  3324. * dev pointer to network device structure
  3325. * encoding serial encoding setting
  3326. * parity FCS setting
  3327. *
  3328. * returns 0 if success, otherwise error code
  3329. */
  3330. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3331. unsigned short parity)
  3332. {
  3333. MGSLPC_INFO *info = dev_to_port(dev);
  3334. struct tty_struct *tty;
  3335. unsigned char new_encoding;
  3336. unsigned short new_crctype;
  3337. /* return error if TTY interface open */
  3338. if (info->port.count)
  3339. return -EBUSY;
  3340. switch (encoding)
  3341. {
  3342. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3343. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3344. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3345. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3346. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3347. default: return -EINVAL;
  3348. }
  3349. switch (parity)
  3350. {
  3351. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3352. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3353. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3354. default: return -EINVAL;
  3355. }
  3356. info->params.encoding = new_encoding;
  3357. info->params.crc_type = new_crctype;
  3358. /* if network interface up, reprogram hardware */
  3359. if (info->netcount) {
  3360. tty = tty_port_tty_get(&info->port);
  3361. mgslpc_program_hw(info, tty);
  3362. tty_kref_put(tty);
  3363. }
  3364. return 0;
  3365. }
  3366. /**
  3367. * called by generic HDLC layer to send frame
  3368. *
  3369. * skb socket buffer containing HDLC frame
  3370. * dev pointer to network device structure
  3371. */
  3372. static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
  3373. struct net_device *dev)
  3374. {
  3375. MGSLPC_INFO *info = dev_to_port(dev);
  3376. unsigned long flags;
  3377. if (debug_level >= DEBUG_LEVEL_INFO)
  3378. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3379. /* stop sending until this frame completes */
  3380. netif_stop_queue(dev);
  3381. /* copy data to device buffers */
  3382. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3383. info->tx_get = 0;
  3384. info->tx_put = info->tx_count = skb->len;
  3385. /* update network statistics */
  3386. dev->stats.tx_packets++;
  3387. dev->stats.tx_bytes += skb->len;
  3388. /* done with socket buffer, so free it */
  3389. dev_kfree_skb(skb);
  3390. /* save start time for transmit timeout detection */
  3391. dev->trans_start = jiffies;
  3392. /* start hardware transmitter if necessary */
  3393. spin_lock_irqsave(&info->lock,flags);
  3394. if (!info->tx_active) {
  3395. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3396. tx_start(info, tty);
  3397. tty_kref_put(tty);
  3398. }
  3399. spin_unlock_irqrestore(&info->lock,flags);
  3400. return NETDEV_TX_OK;
  3401. }
  3402. /**
  3403. * called by network layer when interface enabled
  3404. * claim resources and initialize hardware
  3405. *
  3406. * dev pointer to network device structure
  3407. *
  3408. * returns 0 if success, otherwise error code
  3409. */
  3410. static int hdlcdev_open(struct net_device *dev)
  3411. {
  3412. MGSLPC_INFO *info = dev_to_port(dev);
  3413. struct tty_struct *tty;
  3414. int rc;
  3415. unsigned long flags;
  3416. if (debug_level >= DEBUG_LEVEL_INFO)
  3417. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3418. /* generic HDLC layer open processing */
  3419. if ((rc = hdlc_open(dev)))
  3420. return rc;
  3421. /* arbitrate between network and tty opens */
  3422. spin_lock_irqsave(&info->netlock, flags);
  3423. if (info->port.count != 0 || info->netcount != 0) {
  3424. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3425. spin_unlock_irqrestore(&info->netlock, flags);
  3426. return -EBUSY;
  3427. }
  3428. info->netcount=1;
  3429. spin_unlock_irqrestore(&info->netlock, flags);
  3430. tty = tty_port_tty_get(&info->port);
  3431. /* claim resources and init adapter */
  3432. if ((rc = startup(info, tty)) != 0) {
  3433. tty_kref_put(tty);
  3434. spin_lock_irqsave(&info->netlock, flags);
  3435. info->netcount=0;
  3436. spin_unlock_irqrestore(&info->netlock, flags);
  3437. return rc;
  3438. }
  3439. /* assert DTR and RTS, apply hardware settings */
  3440. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3441. mgslpc_program_hw(info, tty);
  3442. tty_kref_put(tty);
  3443. /* enable network layer transmit */
  3444. dev->trans_start = jiffies;
  3445. netif_start_queue(dev);
  3446. /* inform generic HDLC layer of current DCD status */
  3447. spin_lock_irqsave(&info->lock, flags);
  3448. get_signals(info);
  3449. spin_unlock_irqrestore(&info->lock, flags);
  3450. if (info->serial_signals & SerialSignal_DCD)
  3451. netif_carrier_on(dev);
  3452. else
  3453. netif_carrier_off(dev);
  3454. return 0;
  3455. }
  3456. /**
  3457. * called by network layer when interface is disabled
  3458. * shutdown hardware and release resources
  3459. *
  3460. * dev pointer to network device structure
  3461. *
  3462. * returns 0 if success, otherwise error code
  3463. */
  3464. static int hdlcdev_close(struct net_device *dev)
  3465. {
  3466. MGSLPC_INFO *info = dev_to_port(dev);
  3467. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3468. unsigned long flags;
  3469. if (debug_level >= DEBUG_LEVEL_INFO)
  3470. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3471. netif_stop_queue(dev);
  3472. /* shutdown adapter and release resources */
  3473. shutdown(info, tty);
  3474. tty_kref_put(tty);
  3475. hdlc_close(dev);
  3476. spin_lock_irqsave(&info->netlock, flags);
  3477. info->netcount=0;
  3478. spin_unlock_irqrestore(&info->netlock, flags);
  3479. return 0;
  3480. }
  3481. /**
  3482. * called by network layer to process IOCTL call to network device
  3483. *
  3484. * dev pointer to network device structure
  3485. * ifr pointer to network interface request structure
  3486. * cmd IOCTL command code
  3487. *
  3488. * returns 0 if success, otherwise error code
  3489. */
  3490. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3491. {
  3492. const size_t size = sizeof(sync_serial_settings);
  3493. sync_serial_settings new_line;
  3494. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3495. MGSLPC_INFO *info = dev_to_port(dev);
  3496. unsigned int flags;
  3497. if (debug_level >= DEBUG_LEVEL_INFO)
  3498. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3499. /* return error if TTY interface open */
  3500. if (info->port.count)
  3501. return -EBUSY;
  3502. if (cmd != SIOCWANDEV)
  3503. return hdlc_ioctl(dev, ifr, cmd);
  3504. switch(ifr->ifr_settings.type) {
  3505. case IF_GET_IFACE: /* return current sync_serial_settings */
  3506. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3507. if (ifr->ifr_settings.size < size) {
  3508. ifr->ifr_settings.size = size; /* data size wanted */
  3509. return -ENOBUFS;
  3510. }
  3511. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3512. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3513. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3514. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3515. switch (flags){
  3516. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3517. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3518. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3519. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3520. default: new_line.clock_type = CLOCK_DEFAULT;
  3521. }
  3522. new_line.clock_rate = info->params.clock_speed;
  3523. new_line.loopback = info->params.loopback ? 1:0;
  3524. if (copy_to_user(line, &new_line, size))
  3525. return -EFAULT;
  3526. return 0;
  3527. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3528. if(!capable(CAP_NET_ADMIN))
  3529. return -EPERM;
  3530. if (copy_from_user(&new_line, line, size))
  3531. return -EFAULT;
  3532. switch (new_line.clock_type)
  3533. {
  3534. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3535. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3536. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3537. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3538. case CLOCK_DEFAULT: flags = info->params.flags &
  3539. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3540. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3541. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3542. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3543. default: return -EINVAL;
  3544. }
  3545. if (new_line.loopback != 0 && new_line.loopback != 1)
  3546. return -EINVAL;
  3547. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3548. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3549. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3550. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3551. info->params.flags |= flags;
  3552. info->params.loopback = new_line.loopback;
  3553. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3554. info->params.clock_speed = new_line.clock_rate;
  3555. else
  3556. info->params.clock_speed = 0;
  3557. /* if network interface up, reprogram hardware */
  3558. if (info->netcount) {
  3559. struct tty_struct *tty = tty_port_tty_get(&info->port);
  3560. mgslpc_program_hw(info, tty);
  3561. tty_kref_put(tty);
  3562. }
  3563. return 0;
  3564. default:
  3565. return hdlc_ioctl(dev, ifr, cmd);
  3566. }
  3567. }
  3568. /**
  3569. * called by network layer when transmit timeout is detected
  3570. *
  3571. * dev pointer to network device structure
  3572. */
  3573. static void hdlcdev_tx_timeout(struct net_device *dev)
  3574. {
  3575. MGSLPC_INFO *info = dev_to_port(dev);
  3576. unsigned long flags;
  3577. if (debug_level >= DEBUG_LEVEL_INFO)
  3578. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3579. dev->stats.tx_errors++;
  3580. dev->stats.tx_aborted_errors++;
  3581. spin_lock_irqsave(&info->lock,flags);
  3582. tx_stop(info);
  3583. spin_unlock_irqrestore(&info->lock,flags);
  3584. netif_wake_queue(dev);
  3585. }
  3586. /**
  3587. * called by device driver when transmit completes
  3588. * reenable network layer transmit if stopped
  3589. *
  3590. * info pointer to device instance information
  3591. */
  3592. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3593. {
  3594. if (netif_queue_stopped(info->netdev))
  3595. netif_wake_queue(info->netdev);
  3596. }
  3597. /**
  3598. * called by device driver when frame received
  3599. * pass frame to network layer
  3600. *
  3601. * info pointer to device instance information
  3602. * buf pointer to buffer contianing frame data
  3603. * size count of data bytes in buf
  3604. */
  3605. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3606. {
  3607. struct sk_buff *skb = dev_alloc_skb(size);
  3608. struct net_device *dev = info->netdev;
  3609. if (debug_level >= DEBUG_LEVEL_INFO)
  3610. printk("hdlcdev_rx(%s)\n",dev->name);
  3611. if (skb == NULL) {
  3612. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3613. dev->stats.rx_dropped++;
  3614. return;
  3615. }
  3616. memcpy(skb_put(skb, size), buf, size);
  3617. skb->protocol = hdlc_type_trans(skb, dev);
  3618. dev->stats.rx_packets++;
  3619. dev->stats.rx_bytes += size;
  3620. netif_rx(skb);
  3621. }
  3622. static const struct net_device_ops hdlcdev_ops = {
  3623. .ndo_open = hdlcdev_open,
  3624. .ndo_stop = hdlcdev_close,
  3625. .ndo_change_mtu = hdlc_change_mtu,
  3626. .ndo_start_xmit = hdlc_start_xmit,
  3627. .ndo_do_ioctl = hdlcdev_ioctl,
  3628. .ndo_tx_timeout = hdlcdev_tx_timeout,
  3629. };
  3630. /**
  3631. * called by device driver when adding device instance
  3632. * do generic HDLC initialization
  3633. *
  3634. * info pointer to device instance information
  3635. *
  3636. * returns 0 if success, otherwise error code
  3637. */
  3638. static int hdlcdev_init(MGSLPC_INFO *info)
  3639. {
  3640. int rc;
  3641. struct net_device *dev;
  3642. hdlc_device *hdlc;
  3643. /* allocate and initialize network and HDLC layer objects */
  3644. if (!(dev = alloc_hdlcdev(info))) {
  3645. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3646. return -ENOMEM;
  3647. }
  3648. /* for network layer reporting purposes only */
  3649. dev->base_addr = info->io_base;
  3650. dev->irq = info->irq_level;
  3651. /* network layer callbacks and settings */
  3652. dev->netdev_ops = &hdlcdev_ops;
  3653. dev->watchdog_timeo = 10 * HZ;
  3654. dev->tx_queue_len = 50;
  3655. /* generic HDLC layer callbacks and settings */
  3656. hdlc = dev_to_hdlc(dev);
  3657. hdlc->attach = hdlcdev_attach;
  3658. hdlc->xmit = hdlcdev_xmit;
  3659. /* register objects with HDLC layer */
  3660. if ((rc = register_hdlc_device(dev))) {
  3661. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3662. free_netdev(dev);
  3663. return rc;
  3664. }
  3665. info->netdev = dev;
  3666. return 0;
  3667. }
  3668. /**
  3669. * called by device driver when removing device instance
  3670. * do generic HDLC cleanup
  3671. *
  3672. * info pointer to device instance information
  3673. */
  3674. static void hdlcdev_exit(MGSLPC_INFO *info)
  3675. {
  3676. unregister_hdlc_device(info->netdev);
  3677. free_netdev(info->netdev);
  3678. info->netdev = NULL;
  3679. }
  3680. #endif /* CONFIG_HDLC */