cm_bf527.c 23 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2008-2009 Bluetechnix
  4. * 2005 National ICT Australia (NICTA)
  5. * Aidan Williams <aidan@nicta.com.au>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/partitions.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/spi/flash.h>
  16. #include <linux/etherdevice.h>
  17. #include <linux/i2c.h>
  18. #include <linux/irq.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/usb/musb.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/reboot.h>
  24. #include <asm/nand.h>
  25. #include <asm/portmux.h>
  26. #include <asm/dpmc.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "Bluetechnix CM-BF527";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  36. #include <linux/usb/isp1760.h>
  37. static struct resource bfin_isp1760_resources[] = {
  38. [0] = {
  39. .start = 0x203C0000,
  40. .end = 0x203C0000 + 0x000fffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_PF7,
  45. .end = IRQ_PF7,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct isp1760_platform_data isp1760_priv = {
  50. .is_isp1761 = 0,
  51. .bus_width_16 = 1,
  52. .port1_otg = 0,
  53. .analog_oc = 0,
  54. .dack_polarity_high = 0,
  55. .dreq_polarity_high = 0,
  56. };
  57. static struct platform_device bfin_isp1760_device = {
  58. .name = "isp1760",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &isp1760_priv,
  62. },
  63. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  64. .resource = bfin_isp1760_resources,
  65. };
  66. #endif
  67. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  68. static struct resource musb_resources[] = {
  69. [0] = {
  70. .start = 0xffc03800,
  71. .end = 0xffc03cff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. [1] = { /* general IRQ */
  75. .start = IRQ_USB_INT0,
  76. .end = IRQ_USB_INT0,
  77. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  78. },
  79. [2] = { /* DMA IRQ */
  80. .start = IRQ_USB_DMA,
  81. .end = IRQ_USB_DMA,
  82. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  83. },
  84. };
  85. static struct musb_hdrc_config musb_config = {
  86. .multipoint = 0,
  87. .dyn_fifo = 0,
  88. .soft_con = 1,
  89. .dma = 1,
  90. .num_eps = 8,
  91. .dma_channels = 8,
  92. .gpio_vrsel = GPIO_PF11,
  93. /* Some custom boards need to be active low, just set it to "0"
  94. * if it is the case.
  95. */
  96. .gpio_vrsel_active = 1,
  97. };
  98. static struct musb_hdrc_platform_data musb_plat = {
  99. #if defined(CONFIG_USB_MUSB_OTG)
  100. .mode = MUSB_OTG,
  101. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  102. .mode = MUSB_HOST,
  103. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  104. .mode = MUSB_PERIPHERAL,
  105. #endif
  106. .config = &musb_config,
  107. };
  108. static u64 musb_dmamask = ~(u32)0;
  109. static struct platform_device musb_device = {
  110. .name = "musb_hdrc",
  111. .id = 0,
  112. .dev = {
  113. .dma_mask = &musb_dmamask,
  114. .coherent_dma_mask = 0xffffffff,
  115. .platform_data = &musb_plat,
  116. },
  117. .num_resources = ARRAY_SIZE(musb_resources),
  118. .resource = musb_resources,
  119. };
  120. #endif
  121. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  122. static struct mtd_partition partition_info[] = {
  123. {
  124. .name = "linux kernel(nand)",
  125. .offset = 0,
  126. .size = 4 * 1024 * 1024,
  127. },
  128. {
  129. .name = "file system(nand)",
  130. .offset = MTDPART_OFS_APPEND,
  131. .size = MTDPART_SIZ_FULL,
  132. },
  133. };
  134. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  135. .page_size = NFC_PG_SIZE_256,
  136. .data_width = NFC_NWIDTH_8,
  137. .partitions = partition_info,
  138. .nr_partitions = ARRAY_SIZE(partition_info),
  139. .rd_dly = 3,
  140. .wr_dly = 3,
  141. };
  142. static struct resource bf5xx_nand_resources[] = {
  143. {
  144. .start = NFC_CTL,
  145. .end = NFC_DATA_RD + 2,
  146. .flags = IORESOURCE_MEM,
  147. },
  148. {
  149. .start = CH_NFC,
  150. .end = CH_NFC,
  151. .flags = IORESOURCE_IRQ,
  152. },
  153. };
  154. static struct platform_device bf5xx_nand_device = {
  155. .name = "bf5xx-nand",
  156. .id = 0,
  157. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  158. .resource = bf5xx_nand_resources,
  159. .dev = {
  160. .platform_data = &bf5xx_nand_platform,
  161. },
  162. };
  163. #endif
  164. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  165. static struct resource bfin_pcmcia_cf_resources[] = {
  166. {
  167. .start = 0x20310000, /* IO PORT */
  168. .end = 0x20312000,
  169. .flags = IORESOURCE_MEM,
  170. }, {
  171. .start = 0x20311000, /* Attribute Memory */
  172. .end = 0x20311FFF,
  173. .flags = IORESOURCE_MEM,
  174. }, {
  175. .start = IRQ_PF4,
  176. .end = IRQ_PF4,
  177. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  178. }, {
  179. .start = 6, /* Card Detect PF6 */
  180. .end = 6,
  181. .flags = IORESOURCE_IRQ,
  182. },
  183. };
  184. static struct platform_device bfin_pcmcia_cf_device = {
  185. .name = "bfin_cf_pcmcia",
  186. .id = -1,
  187. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  188. .resource = bfin_pcmcia_cf_resources,
  189. };
  190. #endif
  191. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  192. static struct platform_device rtc_device = {
  193. .name = "rtc-bfin",
  194. .id = -1,
  195. };
  196. #endif
  197. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  198. #include <linux/smc91x.h>
  199. static struct smc91x_platdata smc91x_info = {
  200. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  201. .leda = RPC_LED_100_10,
  202. .ledb = RPC_LED_TX_RX,
  203. };
  204. static struct resource smc91x_resources[] = {
  205. {
  206. .name = "smc91x-regs",
  207. .start = 0x20300300,
  208. .end = 0x20300300 + 16,
  209. .flags = IORESOURCE_MEM,
  210. }, {
  211. .start = IRQ_PF7,
  212. .end = IRQ_PF7,
  213. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  214. },
  215. };
  216. static struct platform_device smc91x_device = {
  217. .name = "smc91x",
  218. .id = 0,
  219. .num_resources = ARRAY_SIZE(smc91x_resources),
  220. .resource = smc91x_resources,
  221. .dev = {
  222. .platform_data = &smc91x_info,
  223. },
  224. };
  225. #endif
  226. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  227. static struct resource dm9000_resources[] = {
  228. [0] = {
  229. .start = 0x203FB800,
  230. .end = 0x203FB800 + 1,
  231. .flags = IORESOURCE_MEM,
  232. },
  233. [1] = {
  234. .start = 0x203FB804,
  235. .end = 0x203FB804 + 1,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. [2] = {
  239. .start = IRQ_PF9,
  240. .end = IRQ_PF9,
  241. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  242. },
  243. };
  244. static struct platform_device dm9000_device = {
  245. .name = "dm9000",
  246. .id = -1,
  247. .num_resources = ARRAY_SIZE(dm9000_resources),
  248. .resource = dm9000_resources,
  249. };
  250. #endif
  251. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  252. static struct platform_device bfin_mii_bus = {
  253. .name = "bfin_mii_bus",
  254. };
  255. static struct platform_device bfin_mac_device = {
  256. .name = "bfin_mac",
  257. .dev.platform_data = &bfin_mii_bus,
  258. };
  259. #endif
  260. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  261. static struct resource net2272_bfin_resources[] = {
  262. {
  263. .start = 0x20300000,
  264. .end = 0x20300000 + 0x100,
  265. .flags = IORESOURCE_MEM,
  266. }, {
  267. .start = IRQ_PF7,
  268. .end = IRQ_PF7,
  269. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  270. },
  271. };
  272. static struct platform_device net2272_bfin_device = {
  273. .name = "net2272",
  274. .id = -1,
  275. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  276. .resource = net2272_bfin_resources,
  277. };
  278. #endif
  279. #if defined(CONFIG_MTD_M25P80) \
  280. || defined(CONFIG_MTD_M25P80_MODULE)
  281. static struct mtd_partition bfin_spi_flash_partitions[] = {
  282. {
  283. .name = "bootloader(spi)",
  284. .size = 0x00040000,
  285. .offset = 0,
  286. .mask_flags = MTD_CAP_ROM
  287. }, {
  288. .name = "linux kernel(spi)",
  289. .size = MTDPART_SIZ_FULL,
  290. .offset = MTDPART_OFS_APPEND,
  291. }
  292. };
  293. static struct flash_platform_data bfin_spi_flash_data = {
  294. .name = "m25p80",
  295. .parts = bfin_spi_flash_partitions,
  296. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  297. .type = "m25p16",
  298. };
  299. /* SPI flash chip (m25p64) */
  300. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  301. .enable_dma = 0, /* use dma transfer with this chip*/
  302. .bits_per_word = 8,
  303. };
  304. #endif
  305. #if defined(CONFIG_BFIN_SPI_ADC) \
  306. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  307. /* SPI ADC chip */
  308. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  309. .enable_dma = 1, /* use dma transfer with this chip*/
  310. .bits_per_word = 16,
  311. };
  312. #endif
  313. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  314. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  315. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  316. .enable_dma = 0,
  317. .bits_per_word = 16,
  318. };
  319. #endif
  320. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  321. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  322. .enable_dma = 0,
  323. .bits_per_word = 8,
  324. };
  325. #endif
  326. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  327. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  328. .enable_dma = 0,
  329. .bits_per_word = 16,
  330. };
  331. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  332. .model = 7877,
  333. .vref_delay_usecs = 50, /* internal, no capacitor */
  334. .x_plate_ohms = 419,
  335. .y_plate_ohms = 486,
  336. .pressure_max = 1000,
  337. .pressure_min = 0,
  338. .stopacq_polarity = 1,
  339. .first_conversion_delay = 3,
  340. .acquisition_time = 1,
  341. .averaging = 1,
  342. .pen_down_acc_interval = 1,
  343. };
  344. #endif
  345. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  346. && defined(CONFIG_SND_SOC_WM8731_SPI)
  347. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  348. .enable_dma = 0,
  349. .bits_per_word = 16,
  350. };
  351. #endif
  352. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  353. static struct bfin5xx_spi_chip spidev_chip_info = {
  354. .enable_dma = 0,
  355. .bits_per_word = 8,
  356. };
  357. #endif
  358. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  359. #if defined(CONFIG_MTD_M25P80) \
  360. || defined(CONFIG_MTD_M25P80_MODULE)
  361. {
  362. /* the modalias must be the same as spi device driver name */
  363. .modalias = "m25p80", /* Name of spi_driver for this device */
  364. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  365. .bus_num = 0, /* Framework bus number */
  366. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  367. .platform_data = &bfin_spi_flash_data,
  368. .controller_data = &spi_flash_chip_info,
  369. .mode = SPI_MODE_3,
  370. },
  371. #endif
  372. #if defined(CONFIG_BFIN_SPI_ADC) \
  373. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  374. {
  375. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  376. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  377. .bus_num = 0, /* Framework bus number */
  378. .chip_select = 1, /* Framework chip select. */
  379. .platform_data = NULL, /* No spi_driver specific config */
  380. .controller_data = &spi_adc_chip_info,
  381. },
  382. #endif
  383. #if defined(CONFIG_SND_BLACKFIN_AD183X) \
  384. || defined(CONFIG_SND_BLACKFIN_AD183X_MODULE)
  385. {
  386. .modalias = "ad1836",
  387. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  388. .bus_num = 0,
  389. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  390. .controller_data = &ad1836_spi_chip_info,
  391. },
  392. #endif
  393. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  394. {
  395. .modalias = "mmc_spi",
  396. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  397. .bus_num = 0,
  398. .chip_select = 5,
  399. .controller_data = &mmc_spi_chip_info,
  400. .mode = SPI_MODE_3,
  401. },
  402. #endif
  403. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  404. {
  405. .modalias = "ad7877",
  406. .platform_data = &bfin_ad7877_ts_info,
  407. .irq = IRQ_PF8,
  408. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  409. .bus_num = 0,
  410. .chip_select = 2,
  411. .controller_data = &spi_ad7877_chip_info,
  412. },
  413. #endif
  414. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  415. && defined(CONFIG_SND_SOC_WM8731_SPI)
  416. {
  417. .modalias = "wm8731",
  418. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  419. .bus_num = 0,
  420. .chip_select = 5,
  421. .controller_data = &spi_wm8731_chip_info,
  422. .mode = SPI_MODE_0,
  423. },
  424. #endif
  425. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  426. {
  427. .modalias = "spidev",
  428. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  429. .bus_num = 0,
  430. .chip_select = 1,
  431. .controller_data = &spidev_chip_info,
  432. },
  433. #endif
  434. };
  435. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  436. /* SPI controller data */
  437. static struct bfin5xx_spi_master bfin_spi0_info = {
  438. .num_chipselect = 8,
  439. .enable_dma = 1, /* master has the ability to do dma transfer */
  440. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  441. };
  442. /* SPI (0) */
  443. static struct resource bfin_spi0_resource[] = {
  444. [0] = {
  445. .start = SPI0_REGBASE,
  446. .end = SPI0_REGBASE + 0xFF,
  447. .flags = IORESOURCE_MEM,
  448. },
  449. [1] = {
  450. .start = CH_SPI,
  451. .end = CH_SPI,
  452. .flags = IORESOURCE_DMA,
  453. },
  454. [2] = {
  455. .start = IRQ_SPI,
  456. .end = IRQ_SPI,
  457. .flags = IORESOURCE_IRQ,
  458. },
  459. };
  460. static struct platform_device bfin_spi0_device = {
  461. .name = "bfin-spi",
  462. .id = 0, /* Bus number */
  463. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  464. .resource = bfin_spi0_resource,
  465. .dev = {
  466. .platform_data = &bfin_spi0_info, /* Passed to driver */
  467. },
  468. };
  469. #endif /* spi master and devices */
  470. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  471. static struct mtd_partition cm_partitions[] = {
  472. {
  473. .name = "bootloader(nor)",
  474. .size = 0x40000,
  475. .offset = 0,
  476. }, {
  477. .name = "linux kernel(nor)",
  478. .size = 0x100000,
  479. .offset = MTDPART_OFS_APPEND,
  480. }, {
  481. .name = "file system(nor)",
  482. .size = MTDPART_SIZ_FULL,
  483. .offset = MTDPART_OFS_APPEND,
  484. }
  485. };
  486. static struct physmap_flash_data cm_flash_data = {
  487. .width = 2,
  488. .parts = cm_partitions,
  489. .nr_parts = ARRAY_SIZE(cm_partitions),
  490. };
  491. static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
  492. static struct resource cm_flash_resource[] = {
  493. {
  494. .name = "cfi_probe",
  495. .start = 0x20000000,
  496. .end = 0x201fffff,
  497. .flags = IORESOURCE_MEM,
  498. }, {
  499. .start = (unsigned long)cm_flash_gpios,
  500. .end = ARRAY_SIZE(cm_flash_gpios),
  501. .flags = IORESOURCE_IRQ,
  502. }
  503. };
  504. static struct platform_device cm_flash_device = {
  505. .name = "gpio-addr-flash",
  506. .id = 0,
  507. .dev = {
  508. .platform_data = &cm_flash_data,
  509. },
  510. .num_resources = ARRAY_SIZE(cm_flash_resource),
  511. .resource = cm_flash_resource,
  512. };
  513. #endif
  514. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  515. #ifdef CONFIG_SERIAL_BFIN_UART0
  516. static struct resource bfin_uart0_resources[] = {
  517. {
  518. .start = UART0_THR,
  519. .end = UART0_GCTL+2,
  520. .flags = IORESOURCE_MEM,
  521. },
  522. {
  523. .start = IRQ_UART0_RX,
  524. .end = IRQ_UART0_RX+1,
  525. .flags = IORESOURCE_IRQ,
  526. },
  527. {
  528. .start = IRQ_UART0_ERROR,
  529. .end = IRQ_UART0_ERROR,
  530. .flags = IORESOURCE_IRQ,
  531. },
  532. {
  533. .start = CH_UART0_TX,
  534. .end = CH_UART0_TX,
  535. .flags = IORESOURCE_DMA,
  536. },
  537. {
  538. .start = CH_UART0_RX,
  539. .end = CH_UART0_RX,
  540. .flags = IORESOURCE_DMA,
  541. },
  542. };
  543. unsigned short bfin_uart0_peripherals[] = {
  544. P_UART0_TX, P_UART0_RX, 0
  545. };
  546. static struct platform_device bfin_uart0_device = {
  547. .name = "bfin-uart",
  548. .id = 0,
  549. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  550. .resource = bfin_uart0_resources,
  551. .dev = {
  552. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  553. },
  554. };
  555. #endif
  556. #ifdef CONFIG_SERIAL_BFIN_UART1
  557. static struct resource bfin_uart1_resources[] = {
  558. {
  559. .start = UART1_THR,
  560. .end = UART1_GCTL+2,
  561. .flags = IORESOURCE_MEM,
  562. },
  563. {
  564. .start = IRQ_UART1_RX,
  565. .end = IRQ_UART1_RX+1,
  566. .flags = IORESOURCE_IRQ,
  567. },
  568. {
  569. .start = IRQ_UART1_ERROR,
  570. .end = IRQ_UART1_ERROR,
  571. .flags = IORESOURCE_IRQ,
  572. },
  573. {
  574. .start = CH_UART1_TX,
  575. .end = CH_UART1_TX,
  576. .flags = IORESOURCE_DMA,
  577. },
  578. {
  579. .start = CH_UART1_RX,
  580. .end = CH_UART1_RX,
  581. .flags = IORESOURCE_DMA,
  582. },
  583. #ifdef CONFIG_BFIN_UART1_CTSRTS
  584. { /* CTS pin */
  585. .start = GPIO_PF9,
  586. .end = GPIO_PF9,
  587. .flags = IORESOURCE_IO,
  588. },
  589. { /* RTS pin */
  590. .start = GPIO_PF10,
  591. .end = GPIO_PF10,
  592. .flags = IORESOURCE_IO,
  593. },
  594. #endif
  595. };
  596. unsigned short bfin_uart1_peripherals[] = {
  597. P_UART1_TX, P_UART1_RX, 0
  598. };
  599. static struct platform_device bfin_uart1_device = {
  600. .name = "bfin-uart",
  601. .id = 1,
  602. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  603. .resource = bfin_uart1_resources,
  604. .dev = {
  605. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  606. },
  607. };
  608. #endif
  609. #endif
  610. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  611. #ifdef CONFIG_BFIN_SIR0
  612. static struct resource bfin_sir0_resources[] = {
  613. {
  614. .start = 0xFFC00400,
  615. .end = 0xFFC004FF,
  616. .flags = IORESOURCE_MEM,
  617. },
  618. {
  619. .start = IRQ_UART0_RX,
  620. .end = IRQ_UART0_RX+1,
  621. .flags = IORESOURCE_IRQ,
  622. },
  623. {
  624. .start = CH_UART0_RX,
  625. .end = CH_UART0_RX+1,
  626. .flags = IORESOURCE_DMA,
  627. },
  628. };
  629. static struct platform_device bfin_sir0_device = {
  630. .name = "bfin_sir",
  631. .id = 0,
  632. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  633. .resource = bfin_sir0_resources,
  634. };
  635. #endif
  636. #ifdef CONFIG_BFIN_SIR1
  637. static struct resource bfin_sir1_resources[] = {
  638. {
  639. .start = 0xFFC02000,
  640. .end = 0xFFC020FF,
  641. .flags = IORESOURCE_MEM,
  642. },
  643. {
  644. .start = IRQ_UART1_RX,
  645. .end = IRQ_UART1_RX+1,
  646. .flags = IORESOURCE_IRQ,
  647. },
  648. {
  649. .start = CH_UART1_RX,
  650. .end = CH_UART1_RX+1,
  651. .flags = IORESOURCE_DMA,
  652. },
  653. };
  654. static struct platform_device bfin_sir1_device = {
  655. .name = "bfin_sir",
  656. .id = 1,
  657. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  658. .resource = bfin_sir1_resources,
  659. };
  660. #endif
  661. #endif
  662. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  663. static struct resource bfin_twi0_resource[] = {
  664. [0] = {
  665. .start = TWI0_REGBASE,
  666. .end = TWI0_REGBASE,
  667. .flags = IORESOURCE_MEM,
  668. },
  669. [1] = {
  670. .start = IRQ_TWI,
  671. .end = IRQ_TWI,
  672. .flags = IORESOURCE_IRQ,
  673. },
  674. };
  675. static struct platform_device i2c_bfin_twi_device = {
  676. .name = "i2c-bfin-twi",
  677. .id = 0,
  678. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  679. .resource = bfin_twi0_resource,
  680. };
  681. #endif
  682. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  683. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  684. {
  685. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  686. },
  687. #endif
  688. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  689. {
  690. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  691. .irq = IRQ_PF8,
  692. },
  693. #endif
  694. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  695. {
  696. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  697. },
  698. #endif
  699. };
  700. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  701. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  702. static struct resource bfin_sport0_uart_resources[] = {
  703. {
  704. .start = SPORT0_TCR1,
  705. .end = SPORT0_MRCS3+4,
  706. .flags = IORESOURCE_MEM,
  707. },
  708. {
  709. .start = IRQ_SPORT0_RX,
  710. .end = IRQ_SPORT0_RX+1,
  711. .flags = IORESOURCE_IRQ,
  712. },
  713. {
  714. .start = IRQ_SPORT0_ERROR,
  715. .end = IRQ_SPORT0_ERROR,
  716. .flags = IORESOURCE_IRQ,
  717. },
  718. };
  719. unsigned short bfin_sport0_peripherals[] = {
  720. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  721. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
  722. };
  723. static struct platform_device bfin_sport0_uart_device = {
  724. .name = "bfin-sport-uart",
  725. .id = 0,
  726. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  727. .resource = bfin_sport0_uart_resources,
  728. .dev = {
  729. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  730. },
  731. };
  732. #endif
  733. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  734. static struct resource bfin_sport1_uart_resources[] = {
  735. {
  736. .start = SPORT1_TCR1,
  737. .end = SPORT1_MRCS3+4,
  738. .flags = IORESOURCE_MEM,
  739. },
  740. {
  741. .start = IRQ_SPORT1_RX,
  742. .end = IRQ_SPORT1_RX+1,
  743. .flags = IORESOURCE_IRQ,
  744. },
  745. {
  746. .start = IRQ_SPORT1_ERROR,
  747. .end = IRQ_SPORT1_ERROR,
  748. .flags = IORESOURCE_IRQ,
  749. },
  750. };
  751. unsigned short bfin_sport1_peripherals[] = {
  752. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  753. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
  754. };
  755. static struct platform_device bfin_sport1_uart_device = {
  756. .name = "bfin-sport-uart",
  757. .id = 1,
  758. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  759. .resource = bfin_sport1_uart_resources,
  760. .dev = {
  761. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  762. },
  763. };
  764. #endif
  765. #endif
  766. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  767. #include <linux/input.h>
  768. #include <linux/gpio_keys.h>
  769. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  770. {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
  771. };
  772. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  773. .buttons = bfin_gpio_keys_table,
  774. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  775. };
  776. static struct platform_device bfin_device_gpiokeys = {
  777. .name = "gpio-keys",
  778. .dev = {
  779. .platform_data = &bfin_gpio_keys_data,
  780. },
  781. };
  782. #endif
  783. static const unsigned int cclk_vlev_datasheet[] =
  784. {
  785. VRPAIR(VLEV_100, 400000000),
  786. VRPAIR(VLEV_105, 426000000),
  787. VRPAIR(VLEV_110, 500000000),
  788. VRPAIR(VLEV_115, 533000000),
  789. VRPAIR(VLEV_120, 600000000),
  790. };
  791. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  792. .tuple_tab = cclk_vlev_datasheet,
  793. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  794. .vr_settling_time = 25 /* us */,
  795. };
  796. static struct platform_device bfin_dpmc = {
  797. .name = "bfin dpmc",
  798. .dev = {
  799. .platform_data = &bfin_dmpc_vreg_data,
  800. },
  801. };
  802. static struct platform_device *cmbf527_devices[] __initdata = {
  803. &bfin_dpmc,
  804. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  805. &bf5xx_nand_device,
  806. #endif
  807. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  808. &bfin_pcmcia_cf_device,
  809. #endif
  810. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  811. &rtc_device,
  812. #endif
  813. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  814. &bfin_isp1760_device,
  815. #endif
  816. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  817. &musb_device,
  818. #endif
  819. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  820. &smc91x_device,
  821. #endif
  822. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  823. &dm9000_device,
  824. #endif
  825. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  826. &bfin_mii_bus,
  827. &bfin_mac_device,
  828. #endif
  829. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  830. &net2272_bfin_device,
  831. #endif
  832. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  833. &bfin_spi0_device,
  834. #endif
  835. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  836. #ifdef CONFIG_SERIAL_BFIN_UART0
  837. &bfin_uart0_device,
  838. #endif
  839. #ifdef CONFIG_SERIAL_BFIN_UART1
  840. &bfin_uart1_device,
  841. #endif
  842. #endif
  843. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  844. #ifdef CONFIG_BFIN_SIR0
  845. &bfin_sir0_device,
  846. #endif
  847. #ifdef CONFIG_BFIN_SIR1
  848. &bfin_sir1_device,
  849. #endif
  850. #endif
  851. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  852. &i2c_bfin_twi_device,
  853. #endif
  854. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  855. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  856. &bfin_sport0_uart_device,
  857. #endif
  858. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  859. &bfin_sport1_uart_device,
  860. #endif
  861. #endif
  862. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  863. &bfin_device_gpiokeys,
  864. #endif
  865. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  866. &cm_flash_device,
  867. #endif
  868. };
  869. static int __init cm_init(void)
  870. {
  871. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  872. i2c_register_board_info(0, bfin_i2c_board_info,
  873. ARRAY_SIZE(bfin_i2c_board_info));
  874. platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
  875. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  876. return 0;
  877. }
  878. arch_initcall(cm_init);
  879. static struct platform_device *cmbf527_early_devices[] __initdata = {
  880. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  881. #ifdef CONFIG_SERIAL_BFIN_UART0
  882. &bfin_uart0_device,
  883. #endif
  884. #ifdef CONFIG_SERIAL_BFIN_UART1
  885. &bfin_uart1_device,
  886. #endif
  887. #endif
  888. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  889. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  890. &bfin_sport0_uart_device,
  891. #endif
  892. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  893. &bfin_sport1_uart_device,
  894. #endif
  895. #endif
  896. };
  897. void __init native_machine_early_platform_add_devices(void)
  898. {
  899. printk(KERN_INFO "register early platform devices\n");
  900. early_platform_add_devices(cmbf527_early_devices,
  901. ARRAY_SIZE(cmbf527_early_devices));
  902. }
  903. void native_machine_restart(char *cmd)
  904. {
  905. /* workaround reboot hang when booting from SPI */
  906. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  907. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  908. }
  909. void bfin_get_ether_addr(char *addr)
  910. {
  911. random_ether_addr(addr);
  912. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  913. }
  914. EXPORT_SYMBOL(bfin_get_ether_addr);