time.c 45 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/delay.h>
  39. #include <asm/s390_ext.h>
  40. #include <asm/div64.h>
  41. #include <asm/vdso.h>
  42. #include <asm/irq.h>
  43. #include <asm/irq_regs.h>
  44. #include <asm/timer.h>
  45. #include <asm/etr.h>
  46. #include <asm/cio.h>
  47. /* change this if you have some constant time drift */
  48. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  49. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  50. /*
  51. * Create a small time difference between the timer interrupts
  52. * on the different cpus to avoid lock contention.
  53. */
  54. #define CPU_DEVIATION (smp_processor_id() << 12)
  55. #define TICK_SIZE tick
  56. u64 sched_clock_base_cc = -1; /* Force to data section. */
  57. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  58. /*
  59. * Scheduler clock - returns current time in nanosec units.
  60. */
  61. unsigned long long notrace sched_clock(void)
  62. {
  63. return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
  64. }
  65. /*
  66. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  67. */
  68. unsigned long long monotonic_clock(void)
  69. {
  70. return sched_clock();
  71. }
  72. EXPORT_SYMBOL(monotonic_clock);
  73. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  74. {
  75. unsigned long long sec;
  76. sec = todval >> 12;
  77. do_div(sec, 1000000);
  78. xtime->tv_sec = sec;
  79. todval -= (sec * 1000000) << 12;
  80. xtime->tv_nsec = ((todval * 1000) >> 12);
  81. }
  82. void clock_comparator_work(void)
  83. {
  84. struct clock_event_device *cd;
  85. S390_lowcore.clock_comparator = -1ULL;
  86. set_clock_comparator(S390_lowcore.clock_comparator);
  87. cd = &__get_cpu_var(comparators);
  88. cd->event_handler(cd);
  89. }
  90. /*
  91. * Fixup the clock comparator.
  92. */
  93. static void fixup_clock_comparator(unsigned long long delta)
  94. {
  95. /* If nobody is waiting there's nothing to fix. */
  96. if (S390_lowcore.clock_comparator == -1ULL)
  97. return;
  98. S390_lowcore.clock_comparator += delta;
  99. set_clock_comparator(S390_lowcore.clock_comparator);
  100. }
  101. static int s390_next_event(unsigned long delta,
  102. struct clock_event_device *evt)
  103. {
  104. S390_lowcore.clock_comparator = get_clock() + delta;
  105. set_clock_comparator(S390_lowcore.clock_comparator);
  106. return 0;
  107. }
  108. static void s390_set_mode(enum clock_event_mode mode,
  109. struct clock_event_device *evt)
  110. {
  111. }
  112. /*
  113. * Set up lowcore and control register of the current cpu to
  114. * enable TOD clock and clock comparator interrupts.
  115. */
  116. void init_cpu_timer(void)
  117. {
  118. struct clock_event_device *cd;
  119. int cpu;
  120. S390_lowcore.clock_comparator = -1ULL;
  121. set_clock_comparator(S390_lowcore.clock_comparator);
  122. cpu = smp_processor_id();
  123. cd = &per_cpu(comparators, cpu);
  124. cd->name = "comparator";
  125. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  126. cd->mult = 16777;
  127. cd->shift = 12;
  128. cd->min_delta_ns = 1;
  129. cd->max_delta_ns = LONG_MAX;
  130. cd->rating = 400;
  131. cd->cpumask = cpumask_of(cpu);
  132. cd->set_next_event = s390_next_event;
  133. cd->set_mode = s390_set_mode;
  134. clockevents_register_device(cd);
  135. /* Enable clock comparator timer interrupt. */
  136. __ctl_set_bit(0,11);
  137. /* Always allow the timing alert external interrupt. */
  138. __ctl_set_bit(0, 4);
  139. }
  140. static void clock_comparator_interrupt(__u16 code)
  141. {
  142. if (S390_lowcore.clock_comparator == -1ULL)
  143. set_clock_comparator(S390_lowcore.clock_comparator);
  144. }
  145. static void etr_timing_alert(struct etr_irq_parm *);
  146. static void stp_timing_alert(struct stp_irq_parm *);
  147. static void timing_alert_interrupt(__u16 code)
  148. {
  149. if (S390_lowcore.ext_params & 0x00c40000)
  150. etr_timing_alert((struct etr_irq_parm *)
  151. &S390_lowcore.ext_params);
  152. if (S390_lowcore.ext_params & 0x00038000)
  153. stp_timing_alert((struct stp_irq_parm *)
  154. &S390_lowcore.ext_params);
  155. }
  156. static void etr_reset(void);
  157. static void stp_reset(void);
  158. void read_persistent_clock(struct timespec *ts)
  159. {
  160. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  161. }
  162. void read_boot_clock(struct timespec *ts)
  163. {
  164. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  165. }
  166. static cycle_t read_tod_clock(struct clocksource *cs)
  167. {
  168. return get_clock();
  169. }
  170. static struct clocksource clocksource_tod = {
  171. .name = "tod",
  172. .rating = 400,
  173. .read = read_tod_clock,
  174. .mask = -1ULL,
  175. .mult = 1000,
  176. .shift = 12,
  177. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  178. };
  179. struct clocksource * __init clocksource_default_clock(void)
  180. {
  181. return &clocksource_tod;
  182. }
  183. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
  184. {
  185. if (clock != &clocksource_tod)
  186. return;
  187. /* Make userspace gettimeofday spin until we're done. */
  188. ++vdso_data->tb_update_count;
  189. smp_wmb();
  190. vdso_data->xtime_tod_stamp = clock->cycle_last;
  191. vdso_data->xtime_clock_sec = xtime.tv_sec;
  192. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  193. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  194. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  195. smp_wmb();
  196. ++vdso_data->tb_update_count;
  197. }
  198. extern struct timezone sys_tz;
  199. void update_vsyscall_tz(void)
  200. {
  201. /* Make userspace gettimeofday spin until we're done. */
  202. ++vdso_data->tb_update_count;
  203. smp_wmb();
  204. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  205. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  206. smp_wmb();
  207. ++vdso_data->tb_update_count;
  208. }
  209. /*
  210. * Initialize the TOD clock and the CPU timer of
  211. * the boot cpu.
  212. */
  213. void __init time_init(void)
  214. {
  215. /* Reset time synchronization interfaces. */
  216. etr_reset();
  217. stp_reset();
  218. /* request the clock comparator external interrupt */
  219. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  220. panic("Couldn't request external interrupt 0x1004");
  221. /* request the timing alert external interrupt */
  222. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  223. panic("Couldn't request external interrupt 0x1406");
  224. if (clocksource_register(&clocksource_tod) != 0)
  225. panic("Could not register TOD clock source");
  226. /* Enable TOD clock interrupts on the boot cpu. */
  227. init_cpu_timer();
  228. /* Enable cpu timer interrupts on the boot cpu. */
  229. vtime_init();
  230. }
  231. /*
  232. * The time is "clock". old is what we think the time is.
  233. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  234. * "delay" is an approximation how long the synchronization took. If
  235. * the time correction is positive, then "delay" is subtracted from
  236. * the time difference and only the remaining part is passed to ntp.
  237. */
  238. static unsigned long long adjust_time(unsigned long long old,
  239. unsigned long long clock,
  240. unsigned long long delay)
  241. {
  242. unsigned long long delta, ticks;
  243. struct timex adjust;
  244. if (clock > old) {
  245. /* It is later than we thought. */
  246. delta = ticks = clock - old;
  247. delta = ticks = (delta < delay) ? 0 : delta - delay;
  248. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  249. adjust.offset = ticks * (1000000 / HZ);
  250. } else {
  251. /* It is earlier than we thought. */
  252. delta = ticks = old - clock;
  253. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  254. delta = -delta;
  255. adjust.offset = -ticks * (1000000 / HZ);
  256. }
  257. sched_clock_base_cc += delta;
  258. if (adjust.offset != 0) {
  259. pr_notice("The ETR interface has adjusted the clock "
  260. "by %li microseconds\n", adjust.offset);
  261. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  262. do_adjtimex(&adjust);
  263. }
  264. return delta;
  265. }
  266. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  267. static DEFINE_MUTEX(clock_sync_mutex);
  268. static unsigned long clock_sync_flags;
  269. #define CLOCK_SYNC_HAS_ETR 0
  270. #define CLOCK_SYNC_HAS_STP 1
  271. #define CLOCK_SYNC_ETR 2
  272. #define CLOCK_SYNC_STP 3
  273. /*
  274. * The synchronous get_clock function. It will write the current clock
  275. * value to the clock pointer and return 0 if the clock is in sync with
  276. * the external time source. If the clock mode is local it will return
  277. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  278. * reference.
  279. */
  280. int get_sync_clock(unsigned long long *clock)
  281. {
  282. atomic_t *sw_ptr;
  283. unsigned int sw0, sw1;
  284. sw_ptr = &get_cpu_var(clock_sync_word);
  285. sw0 = atomic_read(sw_ptr);
  286. *clock = get_clock();
  287. sw1 = atomic_read(sw_ptr);
  288. put_cpu_var(clock_sync_sync);
  289. if (sw0 == sw1 && (sw0 & 0x80000000U))
  290. /* Success: time is in sync. */
  291. return 0;
  292. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  293. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  294. return -ENOSYS;
  295. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  296. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  297. return -EACCES;
  298. return -EAGAIN;
  299. }
  300. EXPORT_SYMBOL(get_sync_clock);
  301. /*
  302. * Make get_sync_clock return -EAGAIN.
  303. */
  304. static void disable_sync_clock(void *dummy)
  305. {
  306. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  307. /*
  308. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  309. * fail until the sync bit is turned back on. In addition
  310. * increase the "sequence" counter to avoid the race of an
  311. * etr event and the complete recovery against get_sync_clock.
  312. */
  313. atomic_clear_mask(0x80000000, sw_ptr);
  314. atomic_inc(sw_ptr);
  315. }
  316. /*
  317. * Make get_sync_clock return 0 again.
  318. * Needs to be called from a context disabled for preemption.
  319. */
  320. static void enable_sync_clock(void)
  321. {
  322. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  323. atomic_set_mask(0x80000000, sw_ptr);
  324. }
  325. /*
  326. * Function to check if the clock is in sync.
  327. */
  328. static inline int check_sync_clock(void)
  329. {
  330. atomic_t *sw_ptr;
  331. int rc;
  332. sw_ptr = &get_cpu_var(clock_sync_word);
  333. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  334. put_cpu_var(clock_sync_sync);
  335. return rc;
  336. }
  337. /* Single threaded workqueue used for etr and stp sync events */
  338. static struct workqueue_struct *time_sync_wq;
  339. static void __init time_init_wq(void)
  340. {
  341. if (time_sync_wq)
  342. return;
  343. time_sync_wq = create_singlethread_workqueue("timesync");
  344. stop_machine_create();
  345. }
  346. /*
  347. * External Time Reference (ETR) code.
  348. */
  349. static int etr_port0_online;
  350. static int etr_port1_online;
  351. static int etr_steai_available;
  352. static int __init early_parse_etr(char *p)
  353. {
  354. if (strncmp(p, "off", 3) == 0)
  355. etr_port0_online = etr_port1_online = 0;
  356. else if (strncmp(p, "port0", 5) == 0)
  357. etr_port0_online = 1;
  358. else if (strncmp(p, "port1", 5) == 0)
  359. etr_port1_online = 1;
  360. else if (strncmp(p, "on", 2) == 0)
  361. etr_port0_online = etr_port1_online = 1;
  362. return 0;
  363. }
  364. early_param("etr", early_parse_etr);
  365. enum etr_event {
  366. ETR_EVENT_PORT0_CHANGE,
  367. ETR_EVENT_PORT1_CHANGE,
  368. ETR_EVENT_PORT_ALERT,
  369. ETR_EVENT_SYNC_CHECK,
  370. ETR_EVENT_SWITCH_LOCAL,
  371. ETR_EVENT_UPDATE,
  372. };
  373. /*
  374. * Valid bit combinations of the eacr register are (x = don't care):
  375. * e0 e1 dp p0 p1 ea es sl
  376. * 0 0 x 0 0 0 0 0 initial, disabled state
  377. * 0 0 x 0 1 1 0 0 port 1 online
  378. * 0 0 x 1 0 1 0 0 port 0 online
  379. * 0 0 x 1 1 1 0 0 both ports online
  380. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  381. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  382. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  383. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  384. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  385. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  386. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  387. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  388. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  389. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  390. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  391. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  392. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  393. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  394. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  395. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  396. */
  397. static struct etr_eacr etr_eacr;
  398. static u64 etr_tolec; /* time of last eacr update */
  399. static struct etr_aib etr_port0;
  400. static int etr_port0_uptodate;
  401. static struct etr_aib etr_port1;
  402. static int etr_port1_uptodate;
  403. static unsigned long etr_events;
  404. static struct timer_list etr_timer;
  405. static void etr_timeout(unsigned long dummy);
  406. static void etr_work_fn(struct work_struct *work);
  407. static DEFINE_MUTEX(etr_work_mutex);
  408. static DECLARE_WORK(etr_work, etr_work_fn);
  409. /*
  410. * Reset ETR attachment.
  411. */
  412. static void etr_reset(void)
  413. {
  414. etr_eacr = (struct etr_eacr) {
  415. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  416. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  417. .es = 0, .sl = 0 };
  418. if (etr_setr(&etr_eacr) == 0) {
  419. etr_tolec = get_clock();
  420. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  421. if (etr_port0_online && etr_port1_online)
  422. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  423. } else if (etr_port0_online || etr_port1_online) {
  424. pr_warning("The real or virtual hardware system does "
  425. "not provide an ETR interface\n");
  426. etr_port0_online = etr_port1_online = 0;
  427. }
  428. }
  429. static int __init etr_init(void)
  430. {
  431. struct etr_aib aib;
  432. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  433. return 0;
  434. time_init_wq();
  435. /* Check if this machine has the steai instruction. */
  436. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  437. etr_steai_available = 1;
  438. setup_timer(&etr_timer, etr_timeout, 0UL);
  439. if (etr_port0_online) {
  440. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  441. queue_work(time_sync_wq, &etr_work);
  442. }
  443. if (etr_port1_online) {
  444. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  445. queue_work(time_sync_wq, &etr_work);
  446. }
  447. return 0;
  448. }
  449. arch_initcall(etr_init);
  450. /*
  451. * Two sorts of ETR machine checks. The architecture reads:
  452. * "When a machine-check niterruption occurs and if a switch-to-local or
  453. * ETR-sync-check interrupt request is pending but disabled, this pending
  454. * disabled interruption request is indicated and is cleared".
  455. * Which means that we can get etr_switch_to_local events from the machine
  456. * check handler although the interruption condition is disabled. Lovely..
  457. */
  458. /*
  459. * Switch to local machine check. This is called when the last usable
  460. * ETR port goes inactive. After switch to local the clock is not in sync.
  461. */
  462. void etr_switch_to_local(void)
  463. {
  464. if (!etr_eacr.sl)
  465. return;
  466. disable_sync_clock(NULL);
  467. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  468. queue_work(time_sync_wq, &etr_work);
  469. }
  470. /*
  471. * ETR sync check machine check. This is called when the ETR OTE and the
  472. * local clock OTE are farther apart than the ETR sync check tolerance.
  473. * After a ETR sync check the clock is not in sync. The machine check
  474. * is broadcasted to all cpus at the same time.
  475. */
  476. void etr_sync_check(void)
  477. {
  478. if (!etr_eacr.es)
  479. return;
  480. disable_sync_clock(NULL);
  481. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  482. queue_work(time_sync_wq, &etr_work);
  483. }
  484. /*
  485. * ETR timing alert. There are two causes:
  486. * 1) port state change, check the usability of the port
  487. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  488. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  489. * or ETR-data word 4 (edf4) has changed.
  490. */
  491. static void etr_timing_alert(struct etr_irq_parm *intparm)
  492. {
  493. if (intparm->pc0)
  494. /* ETR port 0 state change. */
  495. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  496. if (intparm->pc1)
  497. /* ETR port 1 state change. */
  498. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  499. if (intparm->eai)
  500. /*
  501. * ETR port alert on either port 0, 1 or both.
  502. * Both ports are not up-to-date now.
  503. */
  504. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  505. queue_work(time_sync_wq, &etr_work);
  506. }
  507. static void etr_timeout(unsigned long dummy)
  508. {
  509. set_bit(ETR_EVENT_UPDATE, &etr_events);
  510. queue_work(time_sync_wq, &etr_work);
  511. }
  512. /*
  513. * Check if the etr mode is pss.
  514. */
  515. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  516. {
  517. return eacr.es && !eacr.sl;
  518. }
  519. /*
  520. * Check if the etr mode is etr.
  521. */
  522. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  523. {
  524. return eacr.es && eacr.sl;
  525. }
  526. /*
  527. * Check if the port can be used for TOD synchronization.
  528. * For PPS mode the port has to receive OTEs. For ETR mode
  529. * the port has to receive OTEs, the ETR stepping bit has to
  530. * be zero and the validity bits for data frame 1, 2, and 3
  531. * have to be 1.
  532. */
  533. static int etr_port_valid(struct etr_aib *aib, int port)
  534. {
  535. unsigned int psc;
  536. /* Check that this port is receiving OTEs. */
  537. if (aib->tsp == 0)
  538. return 0;
  539. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  540. if (psc == etr_lpsc_pps_mode)
  541. return 1;
  542. if (psc == etr_lpsc_operational_step)
  543. return !aib->esw.y && aib->slsw.v1 &&
  544. aib->slsw.v2 && aib->slsw.v3;
  545. return 0;
  546. }
  547. /*
  548. * Check if two ports are on the same network.
  549. */
  550. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  551. {
  552. // FIXME: any other fields we have to compare?
  553. return aib1->edf1.net_id == aib2->edf1.net_id;
  554. }
  555. /*
  556. * Wrapper for etr_stei that converts physical port states
  557. * to logical port states to be consistent with the output
  558. * of stetr (see etr_psc vs. etr_lpsc).
  559. */
  560. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  561. {
  562. BUG_ON(etr_steai(aib, func) != 0);
  563. /* Convert port state to logical port state. */
  564. if (aib->esw.psc0 == 1)
  565. aib->esw.psc0 = 2;
  566. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  567. aib->esw.psc0 = 1;
  568. if (aib->esw.psc1 == 1)
  569. aib->esw.psc1 = 2;
  570. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  571. aib->esw.psc1 = 1;
  572. }
  573. /*
  574. * Check if the aib a2 is still connected to the same attachment as
  575. * aib a1, the etv values differ by one and a2 is valid.
  576. */
  577. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  578. {
  579. int state_a1, state_a2;
  580. /* Paranoia check: e0/e1 should better be the same. */
  581. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  582. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  583. return 0;
  584. /* Still connected to the same etr ? */
  585. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  586. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  587. if (state_a1 == etr_lpsc_operational_step) {
  588. if (state_a2 != etr_lpsc_operational_step ||
  589. a1->edf1.net_id != a2->edf1.net_id ||
  590. a1->edf1.etr_id != a2->edf1.etr_id ||
  591. a1->edf1.etr_pn != a2->edf1.etr_pn)
  592. return 0;
  593. } else if (state_a2 != etr_lpsc_pps_mode)
  594. return 0;
  595. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  596. if (a1->edf2.etv + 1 != a2->edf2.etv)
  597. return 0;
  598. if (!etr_port_valid(a2, p))
  599. return 0;
  600. return 1;
  601. }
  602. struct clock_sync_data {
  603. atomic_t cpus;
  604. int in_sync;
  605. unsigned long long fixup_cc;
  606. int etr_port;
  607. struct etr_aib *etr_aib;
  608. };
  609. static void clock_sync_cpu(struct clock_sync_data *sync)
  610. {
  611. atomic_dec(&sync->cpus);
  612. enable_sync_clock();
  613. /*
  614. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  615. * is called on all other cpus while the TOD clocks is stopped.
  616. * __udelay will stop the cpu on an enabled wait psw until the
  617. * TOD is running again.
  618. */
  619. while (sync->in_sync == 0) {
  620. __udelay(1);
  621. /*
  622. * A different cpu changes *in_sync. Therefore use
  623. * barrier() to force memory access.
  624. */
  625. barrier();
  626. }
  627. if (sync->in_sync != 1)
  628. /* Didn't work. Clear per-cpu in sync bit again. */
  629. disable_sync_clock(NULL);
  630. /*
  631. * This round of TOD syncing is done. Set the clock comparator
  632. * to the next tick and let the processor continue.
  633. */
  634. fixup_clock_comparator(sync->fixup_cc);
  635. }
  636. /*
  637. * Sync the TOD clock using the port refered to by aibp. This port
  638. * has to be enabled and the other port has to be disabled. The
  639. * last eacr update has to be more than 1.6 seconds in the past.
  640. */
  641. static int etr_sync_clock(void *data)
  642. {
  643. static int first;
  644. unsigned long long clock, old_clock, delay, delta;
  645. struct clock_sync_data *etr_sync;
  646. struct etr_aib *sync_port, *aib;
  647. int port;
  648. int rc;
  649. etr_sync = data;
  650. if (xchg(&first, 1) == 1) {
  651. /* Slave */
  652. clock_sync_cpu(etr_sync);
  653. return 0;
  654. }
  655. /* Wait until all other cpus entered the sync function. */
  656. while (atomic_read(&etr_sync->cpus) != 0)
  657. cpu_relax();
  658. port = etr_sync->etr_port;
  659. aib = etr_sync->etr_aib;
  660. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  661. enable_sync_clock();
  662. /* Set clock to next OTE. */
  663. __ctl_set_bit(14, 21);
  664. __ctl_set_bit(0, 29);
  665. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  666. old_clock = get_clock();
  667. if (set_clock(clock) == 0) {
  668. __udelay(1); /* Wait for the clock to start. */
  669. __ctl_clear_bit(0, 29);
  670. __ctl_clear_bit(14, 21);
  671. etr_stetr(aib);
  672. /* Adjust Linux timing variables. */
  673. delay = (unsigned long long)
  674. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  675. delta = adjust_time(old_clock, clock, delay);
  676. etr_sync->fixup_cc = delta;
  677. fixup_clock_comparator(delta);
  678. /* Verify that the clock is properly set. */
  679. if (!etr_aib_follows(sync_port, aib, port)) {
  680. /* Didn't work. */
  681. disable_sync_clock(NULL);
  682. etr_sync->in_sync = -EAGAIN;
  683. rc = -EAGAIN;
  684. } else {
  685. etr_sync->in_sync = 1;
  686. rc = 0;
  687. }
  688. } else {
  689. /* Could not set the clock ?!? */
  690. __ctl_clear_bit(0, 29);
  691. __ctl_clear_bit(14, 21);
  692. disable_sync_clock(NULL);
  693. etr_sync->in_sync = -EAGAIN;
  694. rc = -EAGAIN;
  695. }
  696. xchg(&first, 0);
  697. return rc;
  698. }
  699. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  700. {
  701. struct clock_sync_data etr_sync;
  702. struct etr_aib *sync_port;
  703. int follows;
  704. int rc;
  705. /* Check if the current aib is adjacent to the sync port aib. */
  706. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  707. follows = etr_aib_follows(sync_port, aib, port);
  708. memcpy(sync_port, aib, sizeof(*aib));
  709. if (!follows)
  710. return -EAGAIN;
  711. memset(&etr_sync, 0, sizeof(etr_sync));
  712. etr_sync.etr_aib = aib;
  713. etr_sync.etr_port = port;
  714. get_online_cpus();
  715. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  716. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  717. put_online_cpus();
  718. return rc;
  719. }
  720. /*
  721. * Handle the immediate effects of the different events.
  722. * The port change event is used for online/offline changes.
  723. */
  724. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  725. {
  726. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  727. eacr.es = 0;
  728. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  729. eacr.es = eacr.sl = 0;
  730. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  731. etr_port0_uptodate = etr_port1_uptodate = 0;
  732. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  733. if (eacr.e0)
  734. /*
  735. * Port change of an enabled port. We have to
  736. * assume that this can have caused an stepping
  737. * port switch.
  738. */
  739. etr_tolec = get_clock();
  740. eacr.p0 = etr_port0_online;
  741. if (!eacr.p0)
  742. eacr.e0 = 0;
  743. etr_port0_uptodate = 0;
  744. }
  745. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  746. if (eacr.e1)
  747. /*
  748. * Port change of an enabled port. We have to
  749. * assume that this can have caused an stepping
  750. * port switch.
  751. */
  752. etr_tolec = get_clock();
  753. eacr.p1 = etr_port1_online;
  754. if (!eacr.p1)
  755. eacr.e1 = 0;
  756. etr_port1_uptodate = 0;
  757. }
  758. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  759. return eacr;
  760. }
  761. /*
  762. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  763. * one of the ports needs an update.
  764. */
  765. static void etr_set_tolec_timeout(unsigned long long now)
  766. {
  767. unsigned long micros;
  768. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  769. (!etr_eacr.p1 || etr_port1_uptodate))
  770. return;
  771. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  772. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  773. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  774. }
  775. /*
  776. * Set up a time that expires after 1/2 second.
  777. */
  778. static void etr_set_sync_timeout(void)
  779. {
  780. mod_timer(&etr_timer, jiffies + HZ/2);
  781. }
  782. /*
  783. * Update the aib information for one or both ports.
  784. */
  785. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  786. struct etr_eacr eacr)
  787. {
  788. /* With both ports disabled the aib information is useless. */
  789. if (!eacr.e0 && !eacr.e1)
  790. return eacr;
  791. /* Update port0 or port1 with aib stored in etr_work_fn. */
  792. if (aib->esw.q == 0) {
  793. /* Information for port 0 stored. */
  794. if (eacr.p0 && !etr_port0_uptodate) {
  795. etr_port0 = *aib;
  796. if (etr_port0_online)
  797. etr_port0_uptodate = 1;
  798. }
  799. } else {
  800. /* Information for port 1 stored. */
  801. if (eacr.p1 && !etr_port1_uptodate) {
  802. etr_port1 = *aib;
  803. if (etr_port0_online)
  804. etr_port1_uptodate = 1;
  805. }
  806. }
  807. /*
  808. * Do not try to get the alternate port aib if the clock
  809. * is not in sync yet.
  810. */
  811. if (!check_sync_clock())
  812. return eacr;
  813. /*
  814. * If steai is available we can get the information about
  815. * the other port immediately. If only stetr is available the
  816. * data-port bit toggle has to be used.
  817. */
  818. if (etr_steai_available) {
  819. if (eacr.p0 && !etr_port0_uptodate) {
  820. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  821. etr_port0_uptodate = 1;
  822. }
  823. if (eacr.p1 && !etr_port1_uptodate) {
  824. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  825. etr_port1_uptodate = 1;
  826. }
  827. } else {
  828. /*
  829. * One port was updated above, if the other
  830. * port is not uptodate toggle dp bit.
  831. */
  832. if ((eacr.p0 && !etr_port0_uptodate) ||
  833. (eacr.p1 && !etr_port1_uptodate))
  834. eacr.dp ^= 1;
  835. else
  836. eacr.dp = 0;
  837. }
  838. return eacr;
  839. }
  840. /*
  841. * Write new etr control register if it differs from the current one.
  842. * Return 1 if etr_tolec has been updated as well.
  843. */
  844. static void etr_update_eacr(struct etr_eacr eacr)
  845. {
  846. int dp_changed;
  847. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  848. /* No change, return. */
  849. return;
  850. /*
  851. * The disable of an active port of the change of the data port
  852. * bit can/will cause a change in the data port.
  853. */
  854. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  855. (etr_eacr.dp ^ eacr.dp) != 0;
  856. etr_eacr = eacr;
  857. etr_setr(&etr_eacr);
  858. if (dp_changed)
  859. etr_tolec = get_clock();
  860. }
  861. /*
  862. * ETR work. In this function you'll find the main logic. In
  863. * particular this is the only function that calls etr_update_eacr(),
  864. * it "controls" the etr control register.
  865. */
  866. static void etr_work_fn(struct work_struct *work)
  867. {
  868. unsigned long long now;
  869. struct etr_eacr eacr;
  870. struct etr_aib aib;
  871. int sync_port;
  872. /* prevent multiple execution. */
  873. mutex_lock(&etr_work_mutex);
  874. /* Create working copy of etr_eacr. */
  875. eacr = etr_eacr;
  876. /* Check for the different events and their immediate effects. */
  877. eacr = etr_handle_events(eacr);
  878. /* Check if ETR is supposed to be active. */
  879. eacr.ea = eacr.p0 || eacr.p1;
  880. if (!eacr.ea) {
  881. /* Both ports offline. Reset everything. */
  882. eacr.dp = eacr.es = eacr.sl = 0;
  883. on_each_cpu(disable_sync_clock, NULL, 1);
  884. del_timer_sync(&etr_timer);
  885. etr_update_eacr(eacr);
  886. goto out_unlock;
  887. }
  888. /* Store aib to get the current ETR status word. */
  889. BUG_ON(etr_stetr(&aib) != 0);
  890. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  891. now = get_clock();
  892. /*
  893. * Update the port information if the last stepping port change
  894. * or data port change is older than 1.6 seconds.
  895. */
  896. if (now >= etr_tolec + (1600000 << 12))
  897. eacr = etr_handle_update(&aib, eacr);
  898. /*
  899. * Select ports to enable. The prefered synchronization mode is PPS.
  900. * If a port can be enabled depends on a number of things:
  901. * 1) The port needs to be online and uptodate. A port is not
  902. * disabled just because it is not uptodate, but it is only
  903. * enabled if it is uptodate.
  904. * 2) The port needs to have the same mode (pps / etr).
  905. * 3) The port needs to be usable -> etr_port_valid() == 1
  906. * 4) To enable the second port the clock needs to be in sync.
  907. * 5) If both ports are useable and are ETR ports, the network id
  908. * has to be the same.
  909. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  910. */
  911. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  912. eacr.sl = 0;
  913. eacr.e0 = 1;
  914. if (!etr_mode_is_pps(etr_eacr))
  915. eacr.es = 0;
  916. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  917. eacr.e1 = 0;
  918. // FIXME: uptodate checks ?
  919. else if (etr_port0_uptodate && etr_port1_uptodate)
  920. eacr.e1 = 1;
  921. sync_port = (etr_port0_uptodate &&
  922. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  923. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  924. eacr.sl = 0;
  925. eacr.e0 = 0;
  926. eacr.e1 = 1;
  927. if (!etr_mode_is_pps(etr_eacr))
  928. eacr.es = 0;
  929. sync_port = (etr_port1_uptodate &&
  930. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  931. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  932. eacr.sl = 1;
  933. eacr.e0 = 1;
  934. if (!etr_mode_is_etr(etr_eacr))
  935. eacr.es = 0;
  936. if (!eacr.es || !eacr.p1 ||
  937. aib.esw.psc1 != etr_lpsc_operational_alt)
  938. eacr.e1 = 0;
  939. else if (etr_port0_uptodate && etr_port1_uptodate &&
  940. etr_compare_network(&etr_port0, &etr_port1))
  941. eacr.e1 = 1;
  942. sync_port = (etr_port0_uptodate &&
  943. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  944. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  945. eacr.sl = 1;
  946. eacr.e0 = 0;
  947. eacr.e1 = 1;
  948. if (!etr_mode_is_etr(etr_eacr))
  949. eacr.es = 0;
  950. sync_port = (etr_port1_uptodate &&
  951. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  952. } else {
  953. /* Both ports not usable. */
  954. eacr.es = eacr.sl = 0;
  955. sync_port = -1;
  956. }
  957. /*
  958. * If the clock is in sync just update the eacr and return.
  959. * If there is no valid sync port wait for a port update.
  960. */
  961. if (check_sync_clock() || sync_port < 0) {
  962. etr_update_eacr(eacr);
  963. etr_set_tolec_timeout(now);
  964. goto out_unlock;
  965. }
  966. /*
  967. * Prepare control register for clock syncing
  968. * (reset data port bit, set sync check control.
  969. */
  970. eacr.dp = 0;
  971. eacr.es = 1;
  972. /*
  973. * Update eacr and try to synchronize the clock. If the update
  974. * of eacr caused a stepping port switch (or if we have to
  975. * assume that a stepping port switch has occured) or the
  976. * clock syncing failed, reset the sync check control bit
  977. * and set up a timer to try again after 0.5 seconds
  978. */
  979. etr_update_eacr(eacr);
  980. if (now < etr_tolec + (1600000 << 12) ||
  981. etr_sync_clock_stop(&aib, sync_port) != 0) {
  982. /* Sync failed. Try again in 1/2 second. */
  983. eacr.es = 0;
  984. etr_update_eacr(eacr);
  985. etr_set_sync_timeout();
  986. } else
  987. etr_set_tolec_timeout(now);
  988. out_unlock:
  989. mutex_unlock(&etr_work_mutex);
  990. }
  991. /*
  992. * Sysfs interface functions
  993. */
  994. static struct sysdev_class etr_sysclass = {
  995. .name = "etr",
  996. };
  997. static struct sys_device etr_port0_dev = {
  998. .id = 0,
  999. .cls = &etr_sysclass,
  1000. };
  1001. static struct sys_device etr_port1_dev = {
  1002. .id = 1,
  1003. .cls = &etr_sysclass,
  1004. };
  1005. /*
  1006. * ETR class attributes
  1007. */
  1008. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1009. {
  1010. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1011. }
  1012. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1013. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1014. {
  1015. char *mode_str;
  1016. if (etr_mode_is_pps(etr_eacr))
  1017. mode_str = "pps";
  1018. else if (etr_mode_is_etr(etr_eacr))
  1019. mode_str = "etr";
  1020. else
  1021. mode_str = "local";
  1022. return sprintf(buf, "%s\n", mode_str);
  1023. }
  1024. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1025. /*
  1026. * ETR port attributes
  1027. */
  1028. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1029. {
  1030. if (dev == &etr_port0_dev)
  1031. return etr_port0_online ? &etr_port0 : NULL;
  1032. else
  1033. return etr_port1_online ? &etr_port1 : NULL;
  1034. }
  1035. static ssize_t etr_online_show(struct sys_device *dev,
  1036. struct sysdev_attribute *attr,
  1037. char *buf)
  1038. {
  1039. unsigned int online;
  1040. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1041. return sprintf(buf, "%i\n", online);
  1042. }
  1043. static ssize_t etr_online_store(struct sys_device *dev,
  1044. struct sysdev_attribute *attr,
  1045. const char *buf, size_t count)
  1046. {
  1047. unsigned int value;
  1048. value = simple_strtoul(buf, NULL, 0);
  1049. if (value != 0 && value != 1)
  1050. return -EINVAL;
  1051. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1052. return -EOPNOTSUPP;
  1053. mutex_lock(&clock_sync_mutex);
  1054. if (dev == &etr_port0_dev) {
  1055. if (etr_port0_online == value)
  1056. goto out; /* Nothing to do. */
  1057. etr_port0_online = value;
  1058. if (etr_port0_online && etr_port1_online)
  1059. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1060. else
  1061. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1062. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1063. queue_work(time_sync_wq, &etr_work);
  1064. } else {
  1065. if (etr_port1_online == value)
  1066. goto out; /* Nothing to do. */
  1067. etr_port1_online = value;
  1068. if (etr_port0_online && etr_port1_online)
  1069. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1070. else
  1071. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1072. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1073. queue_work(time_sync_wq, &etr_work);
  1074. }
  1075. out:
  1076. mutex_unlock(&clock_sync_mutex);
  1077. return count;
  1078. }
  1079. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1080. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1081. struct sysdev_attribute *attr,
  1082. char *buf)
  1083. {
  1084. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1085. etr_eacr.e0 : etr_eacr.e1);
  1086. }
  1087. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1088. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1089. struct sysdev_attribute *attr, char *buf)
  1090. {
  1091. if (!etr_port0_online && !etr_port1_online)
  1092. /* Status word is not uptodate if both ports are offline. */
  1093. return -ENODATA;
  1094. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1095. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1096. }
  1097. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1098. static ssize_t etr_untuned_show(struct sys_device *dev,
  1099. struct sysdev_attribute *attr, char *buf)
  1100. {
  1101. struct etr_aib *aib = etr_aib_from_dev(dev);
  1102. if (!aib || !aib->slsw.v1)
  1103. return -ENODATA;
  1104. return sprintf(buf, "%i\n", aib->edf1.u);
  1105. }
  1106. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1107. static ssize_t etr_network_id_show(struct sys_device *dev,
  1108. struct sysdev_attribute *attr, char *buf)
  1109. {
  1110. struct etr_aib *aib = etr_aib_from_dev(dev);
  1111. if (!aib || !aib->slsw.v1)
  1112. return -ENODATA;
  1113. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1114. }
  1115. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1116. static ssize_t etr_id_show(struct sys_device *dev,
  1117. struct sysdev_attribute *attr, char *buf)
  1118. {
  1119. struct etr_aib *aib = etr_aib_from_dev(dev);
  1120. if (!aib || !aib->slsw.v1)
  1121. return -ENODATA;
  1122. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1123. }
  1124. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1125. static ssize_t etr_port_number_show(struct sys_device *dev,
  1126. struct sysdev_attribute *attr, char *buf)
  1127. {
  1128. struct etr_aib *aib = etr_aib_from_dev(dev);
  1129. if (!aib || !aib->slsw.v1)
  1130. return -ENODATA;
  1131. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1132. }
  1133. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1134. static ssize_t etr_coupled_show(struct sys_device *dev,
  1135. struct sysdev_attribute *attr, char *buf)
  1136. {
  1137. struct etr_aib *aib = etr_aib_from_dev(dev);
  1138. if (!aib || !aib->slsw.v3)
  1139. return -ENODATA;
  1140. return sprintf(buf, "%i\n", aib->edf3.c);
  1141. }
  1142. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1143. static ssize_t etr_local_time_show(struct sys_device *dev,
  1144. struct sysdev_attribute *attr, char *buf)
  1145. {
  1146. struct etr_aib *aib = etr_aib_from_dev(dev);
  1147. if (!aib || !aib->slsw.v3)
  1148. return -ENODATA;
  1149. return sprintf(buf, "%i\n", aib->edf3.blto);
  1150. }
  1151. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1152. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1153. struct sysdev_attribute *attr, char *buf)
  1154. {
  1155. struct etr_aib *aib = etr_aib_from_dev(dev);
  1156. if (!aib || !aib->slsw.v3)
  1157. return -ENODATA;
  1158. return sprintf(buf, "%i\n", aib->edf3.buo);
  1159. }
  1160. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1161. static struct sysdev_attribute *etr_port_attributes[] = {
  1162. &attr_online,
  1163. &attr_stepping_control,
  1164. &attr_state_code,
  1165. &attr_untuned,
  1166. &attr_network,
  1167. &attr_id,
  1168. &attr_port,
  1169. &attr_coupled,
  1170. &attr_local_time,
  1171. &attr_utc_offset,
  1172. NULL
  1173. };
  1174. static int __init etr_register_port(struct sys_device *dev)
  1175. {
  1176. struct sysdev_attribute **attr;
  1177. int rc;
  1178. rc = sysdev_register(dev);
  1179. if (rc)
  1180. goto out;
  1181. for (attr = etr_port_attributes; *attr; attr++) {
  1182. rc = sysdev_create_file(dev, *attr);
  1183. if (rc)
  1184. goto out_unreg;
  1185. }
  1186. return 0;
  1187. out_unreg:
  1188. for (; attr >= etr_port_attributes; attr--)
  1189. sysdev_remove_file(dev, *attr);
  1190. sysdev_unregister(dev);
  1191. out:
  1192. return rc;
  1193. }
  1194. static void __init etr_unregister_port(struct sys_device *dev)
  1195. {
  1196. struct sysdev_attribute **attr;
  1197. for (attr = etr_port_attributes; *attr; attr++)
  1198. sysdev_remove_file(dev, *attr);
  1199. sysdev_unregister(dev);
  1200. }
  1201. static int __init etr_init_sysfs(void)
  1202. {
  1203. int rc;
  1204. rc = sysdev_class_register(&etr_sysclass);
  1205. if (rc)
  1206. goto out;
  1207. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1208. if (rc)
  1209. goto out_unreg_class;
  1210. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1211. if (rc)
  1212. goto out_remove_stepping_port;
  1213. rc = etr_register_port(&etr_port0_dev);
  1214. if (rc)
  1215. goto out_remove_stepping_mode;
  1216. rc = etr_register_port(&etr_port1_dev);
  1217. if (rc)
  1218. goto out_remove_port0;
  1219. return 0;
  1220. out_remove_port0:
  1221. etr_unregister_port(&etr_port0_dev);
  1222. out_remove_stepping_mode:
  1223. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1224. out_remove_stepping_port:
  1225. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1226. out_unreg_class:
  1227. sysdev_class_unregister(&etr_sysclass);
  1228. out:
  1229. return rc;
  1230. }
  1231. device_initcall(etr_init_sysfs);
  1232. /*
  1233. * Server Time Protocol (STP) code.
  1234. */
  1235. static int stp_online;
  1236. static struct stp_sstpi stp_info;
  1237. static void *stp_page;
  1238. static void stp_work_fn(struct work_struct *work);
  1239. static DEFINE_MUTEX(stp_work_mutex);
  1240. static DECLARE_WORK(stp_work, stp_work_fn);
  1241. static struct timer_list stp_timer;
  1242. static int __init early_parse_stp(char *p)
  1243. {
  1244. if (strncmp(p, "off", 3) == 0)
  1245. stp_online = 0;
  1246. else if (strncmp(p, "on", 2) == 0)
  1247. stp_online = 1;
  1248. return 0;
  1249. }
  1250. early_param("stp", early_parse_stp);
  1251. /*
  1252. * Reset STP attachment.
  1253. */
  1254. static void __init stp_reset(void)
  1255. {
  1256. int rc;
  1257. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1258. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1259. if (rc == 0)
  1260. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1261. else if (stp_online) {
  1262. pr_warning("The real or virtual hardware system does "
  1263. "not provide an STP interface\n");
  1264. free_page((unsigned long) stp_page);
  1265. stp_page = NULL;
  1266. stp_online = 0;
  1267. }
  1268. }
  1269. static void stp_timeout(unsigned long dummy)
  1270. {
  1271. queue_work(time_sync_wq, &stp_work);
  1272. }
  1273. static int __init stp_init(void)
  1274. {
  1275. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1276. return 0;
  1277. setup_timer(&stp_timer, stp_timeout, 0UL);
  1278. time_init_wq();
  1279. if (!stp_online)
  1280. return 0;
  1281. queue_work(time_sync_wq, &stp_work);
  1282. return 0;
  1283. }
  1284. arch_initcall(stp_init);
  1285. /*
  1286. * STP timing alert. There are three causes:
  1287. * 1) timing status change
  1288. * 2) link availability change
  1289. * 3) time control parameter change
  1290. * In all three cases we are only interested in the clock source state.
  1291. * If a STP clock source is now available use it.
  1292. */
  1293. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1294. {
  1295. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1296. queue_work(time_sync_wq, &stp_work);
  1297. }
  1298. /*
  1299. * STP sync check machine check. This is called when the timing state
  1300. * changes from the synchronized state to the unsynchronized state.
  1301. * After a STP sync check the clock is not in sync. The machine check
  1302. * is broadcasted to all cpus at the same time.
  1303. */
  1304. void stp_sync_check(void)
  1305. {
  1306. disable_sync_clock(NULL);
  1307. queue_work(time_sync_wq, &stp_work);
  1308. }
  1309. /*
  1310. * STP island condition machine check. This is called when an attached
  1311. * server attempts to communicate over an STP link and the servers
  1312. * have matching CTN ids and have a valid stratum-1 configuration
  1313. * but the configurations do not match.
  1314. */
  1315. void stp_island_check(void)
  1316. {
  1317. disable_sync_clock(NULL);
  1318. queue_work(time_sync_wq, &stp_work);
  1319. }
  1320. static int stp_sync_clock(void *data)
  1321. {
  1322. static int first;
  1323. unsigned long long old_clock, delta;
  1324. struct clock_sync_data *stp_sync;
  1325. int rc;
  1326. stp_sync = data;
  1327. if (xchg(&first, 1) == 1) {
  1328. /* Slave */
  1329. clock_sync_cpu(stp_sync);
  1330. return 0;
  1331. }
  1332. /* Wait until all other cpus entered the sync function. */
  1333. while (atomic_read(&stp_sync->cpus) != 0)
  1334. cpu_relax();
  1335. enable_sync_clock();
  1336. rc = 0;
  1337. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1338. stp_info.todoff[2] || stp_info.todoff[3] ||
  1339. stp_info.tmd != 2) {
  1340. old_clock = get_clock();
  1341. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1342. if (rc == 0) {
  1343. delta = adjust_time(old_clock, get_clock(), 0);
  1344. fixup_clock_comparator(delta);
  1345. rc = chsc_sstpi(stp_page, &stp_info,
  1346. sizeof(struct stp_sstpi));
  1347. if (rc == 0 && stp_info.tmd != 2)
  1348. rc = -EAGAIN;
  1349. }
  1350. }
  1351. if (rc) {
  1352. disable_sync_clock(NULL);
  1353. stp_sync->in_sync = -EAGAIN;
  1354. } else
  1355. stp_sync->in_sync = 1;
  1356. xchg(&first, 0);
  1357. return 0;
  1358. }
  1359. /*
  1360. * STP work. Check for the STP state and take over the clock
  1361. * synchronization if the STP clock source is usable.
  1362. */
  1363. static void stp_work_fn(struct work_struct *work)
  1364. {
  1365. struct clock_sync_data stp_sync;
  1366. int rc;
  1367. /* prevent multiple execution. */
  1368. mutex_lock(&stp_work_mutex);
  1369. if (!stp_online) {
  1370. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1371. del_timer_sync(&stp_timer);
  1372. goto out_unlock;
  1373. }
  1374. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1375. if (rc)
  1376. goto out_unlock;
  1377. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1378. if (rc || stp_info.c == 0)
  1379. goto out_unlock;
  1380. /* Skip synchronization if the clock is already in sync. */
  1381. if (check_sync_clock())
  1382. goto out_unlock;
  1383. memset(&stp_sync, 0, sizeof(stp_sync));
  1384. get_online_cpus();
  1385. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1386. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1387. put_online_cpus();
  1388. if (!check_sync_clock())
  1389. /*
  1390. * There is a usable clock but the synchonization failed.
  1391. * Retry after a second.
  1392. */
  1393. mod_timer(&stp_timer, jiffies + HZ);
  1394. out_unlock:
  1395. mutex_unlock(&stp_work_mutex);
  1396. }
  1397. /*
  1398. * STP class sysfs interface functions
  1399. */
  1400. static struct sysdev_class stp_sysclass = {
  1401. .name = "stp",
  1402. };
  1403. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1404. {
  1405. if (!stp_online)
  1406. return -ENODATA;
  1407. return sprintf(buf, "%016llx\n",
  1408. *(unsigned long long *) stp_info.ctnid);
  1409. }
  1410. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1411. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1412. {
  1413. if (!stp_online)
  1414. return -ENODATA;
  1415. return sprintf(buf, "%i\n", stp_info.ctn);
  1416. }
  1417. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1418. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1419. {
  1420. if (!stp_online || !(stp_info.vbits & 0x2000))
  1421. return -ENODATA;
  1422. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1423. }
  1424. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1425. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1426. {
  1427. if (!stp_online || !(stp_info.vbits & 0x8000))
  1428. return -ENODATA;
  1429. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1430. }
  1431. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1432. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1433. {
  1434. if (!stp_online)
  1435. return -ENODATA;
  1436. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1437. }
  1438. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1439. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1440. {
  1441. if (!stp_online || !(stp_info.vbits & 0x0800))
  1442. return -ENODATA;
  1443. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1444. }
  1445. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1446. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1447. {
  1448. if (!stp_online || !(stp_info.vbits & 0x4000))
  1449. return -ENODATA;
  1450. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1451. }
  1452. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1453. stp_time_zone_offset_show, NULL);
  1454. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1455. {
  1456. if (!stp_online)
  1457. return -ENODATA;
  1458. return sprintf(buf, "%i\n", stp_info.tmd);
  1459. }
  1460. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1461. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1462. {
  1463. if (!stp_online)
  1464. return -ENODATA;
  1465. return sprintf(buf, "%i\n", stp_info.tst);
  1466. }
  1467. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1468. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1469. {
  1470. return sprintf(buf, "%i\n", stp_online);
  1471. }
  1472. static ssize_t stp_online_store(struct sysdev_class *class,
  1473. const char *buf, size_t count)
  1474. {
  1475. unsigned int value;
  1476. value = simple_strtoul(buf, NULL, 0);
  1477. if (value != 0 && value != 1)
  1478. return -EINVAL;
  1479. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1480. return -EOPNOTSUPP;
  1481. mutex_lock(&clock_sync_mutex);
  1482. stp_online = value;
  1483. if (stp_online)
  1484. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1485. else
  1486. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1487. queue_work(time_sync_wq, &stp_work);
  1488. mutex_unlock(&clock_sync_mutex);
  1489. return count;
  1490. }
  1491. /*
  1492. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1493. * stp/online but attr_online already exists in this file ..
  1494. */
  1495. static struct sysdev_class_attribute attr_stp_online = {
  1496. .attr = { .name = "online", .mode = 0600 },
  1497. .show = stp_online_show,
  1498. .store = stp_online_store,
  1499. };
  1500. static struct sysdev_class_attribute *stp_attributes[] = {
  1501. &attr_ctn_id,
  1502. &attr_ctn_type,
  1503. &attr_dst_offset,
  1504. &attr_leap_seconds,
  1505. &attr_stp_online,
  1506. &attr_stratum,
  1507. &attr_time_offset,
  1508. &attr_time_zone_offset,
  1509. &attr_timing_mode,
  1510. &attr_timing_state,
  1511. NULL
  1512. };
  1513. static int __init stp_init_sysfs(void)
  1514. {
  1515. struct sysdev_class_attribute **attr;
  1516. int rc;
  1517. rc = sysdev_class_register(&stp_sysclass);
  1518. if (rc)
  1519. goto out;
  1520. for (attr = stp_attributes; *attr; attr++) {
  1521. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1522. if (rc)
  1523. goto out_unreg;
  1524. }
  1525. return 0;
  1526. out_unreg:
  1527. for (; attr >= stp_attributes; attr--)
  1528. sysdev_class_remove_file(&stp_sysclass, *attr);
  1529. sysdev_class_unregister(&stp_sysclass);
  1530. out:
  1531. return rc;
  1532. }
  1533. device_initcall(stp_init_sysfs);