wm8960.c 29 KB

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  1. /*
  2. * wm8960.c -- WM8960 ALSA SoC Audio driver
  3. *
  4. * Author: Liam Girdwood
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/init.h>
  13. #include <linux/delay.h>
  14. #include <linux/pm.h>
  15. #include <linux/i2c.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <sound/soc-dapm.h>
  23. #include <sound/initval.h>
  24. #include <sound/tlv.h>
  25. #include <sound/wm8960.h>
  26. #include "wm8960.h"
  27. #define AUDIO_NAME "wm8960"
  28. /* R25 - Power 1 */
  29. #define WM8960_VMID_MASK 0x180
  30. #define WM8960_VREF 0x40
  31. /* R26 - Power 2 */
  32. #define WM8960_PWR2_LOUT1 0x40
  33. #define WM8960_PWR2_ROUT1 0x20
  34. #define WM8960_PWR2_OUT3 0x02
  35. /* R28 - Anti-pop 1 */
  36. #define WM8960_POBCTRL 0x80
  37. #define WM8960_BUFDCOPEN 0x10
  38. #define WM8960_BUFIOEN 0x08
  39. #define WM8960_SOFT_ST 0x04
  40. #define WM8960_HPSTBY 0x01
  41. /* R29 - Anti-pop 2 */
  42. #define WM8960_DISOP 0x40
  43. #define WM8960_DRES_MASK 0x30
  44. /*
  45. * wm8960 register cache
  46. * We can't read the WM8960 register space when we are
  47. * using 2 wire for device control, so we cache them instead.
  48. */
  49. static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
  50. 0x0097, 0x0097, 0x0000, 0x0000,
  51. 0x0000, 0x0008, 0x0000, 0x000a,
  52. 0x01c0, 0x0000, 0x00ff, 0x00ff,
  53. 0x0000, 0x0000, 0x0000, 0x0000,
  54. 0x0000, 0x007b, 0x0100, 0x0032,
  55. 0x0000, 0x00c3, 0x00c3, 0x01c0,
  56. 0x0000, 0x0000, 0x0000, 0x0000,
  57. 0x0000, 0x0000, 0x0000, 0x0000,
  58. 0x0100, 0x0100, 0x0050, 0x0050,
  59. 0x0050, 0x0050, 0x0000, 0x0000,
  60. 0x0000, 0x0000, 0x0040, 0x0000,
  61. 0x0000, 0x0050, 0x0050, 0x0000,
  62. 0x0002, 0x0037, 0x004d, 0x0080,
  63. 0x0008, 0x0031, 0x0026, 0x00e9,
  64. };
  65. struct wm8960_priv {
  66. u16 reg_cache[WM8960_CACHEREGNUM];
  67. enum snd_soc_control_type control_type;
  68. void *control_data;
  69. int (*set_bias_level)(struct snd_soc_codec *,
  70. enum snd_soc_bias_level level);
  71. struct snd_soc_dapm_widget *lout1;
  72. struct snd_soc_dapm_widget *rout1;
  73. struct snd_soc_dapm_widget *out3;
  74. bool deemph;
  75. int playback_fs;
  76. };
  77. #define wm8960_reset(c) snd_soc_write(c, WM8960_RESET, 0)
  78. /* enumerated controls */
  79. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  80. "Right Inverted", "Stereo Inversion"};
  81. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  82. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  83. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  84. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  85. static const struct soc_enum wm8960_enum[] = {
  86. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  87. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  88. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  89. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  90. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  91. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  92. };
  93. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  94. static int wm8960_set_deemph(struct snd_soc_codec *codec)
  95. {
  96. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  97. int val, i, best;
  98. /* If we're using deemphasis select the nearest available sample
  99. * rate.
  100. */
  101. if (wm8960->deemph) {
  102. best = 1;
  103. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  104. if (abs(deemph_settings[i] - wm8960->playback_fs) <
  105. abs(deemph_settings[best] - wm8960->playback_fs))
  106. best = i;
  107. }
  108. val = best << 1;
  109. } else {
  110. val = 0;
  111. }
  112. dev_dbg(codec->dev, "Set deemphasis %d\n", val);
  113. return snd_soc_update_bits(codec, WM8960_DACCTL1,
  114. 0x6, val);
  115. }
  116. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  117. struct snd_ctl_elem_value *ucontrol)
  118. {
  119. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  120. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  121. ucontrol->value.enumerated.item[0] = wm8960->deemph;
  122. return 0;
  123. }
  124. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  125. struct snd_ctl_elem_value *ucontrol)
  126. {
  127. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  128. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  129. int deemph = ucontrol->value.enumerated.item[0];
  130. if (deemph > 1)
  131. return -EINVAL;
  132. wm8960->deemph = deemph;
  133. return wm8960_set_deemph(codec);
  134. }
  135. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9700, 50, 0);
  136. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1);
  137. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  138. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  139. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  140. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  141. 0, 63, 0, adc_tlv),
  142. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  143. 6, 1, 0),
  144. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  145. 7, 1, 0),
  146. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  147. 0, 255, 0, dac_tlv),
  148. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  149. 0, 127, 0, out_tlv),
  150. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  151. 7, 1, 0),
  152. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  153. 0, 127, 0, out_tlv),
  154. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  155. 7, 1, 0),
  156. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  157. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  158. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  159. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  160. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  161. SOC_ENUM("DAC Polarity", wm8960_enum[2]),
  162. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  163. wm8960_get_deemph, wm8960_put_deemph),
  164. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  165. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  166. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  167. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  168. SOC_ENUM("ALC Function", wm8960_enum[4]),
  169. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  170. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  171. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  172. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  173. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  174. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  175. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  176. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  177. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  178. SOC_DOUBLE_R("ADC PCM Capture Volume", WM8960_LINPATH, WM8960_RINPATH,
  179. 0, 127, 0),
  180. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  181. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  182. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  183. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  184. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  185. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  186. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  187. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  188. };
  189. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  190. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  191. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  192. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  193. };
  194. static const struct snd_kcontrol_new wm8960_lin[] = {
  195. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  196. };
  197. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  198. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  199. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  200. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  201. };
  202. static const struct snd_kcontrol_new wm8960_rin[] = {
  203. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  204. };
  205. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  206. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  207. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  208. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  209. };
  210. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  211. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  212. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  213. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  214. };
  215. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  216. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  217. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  218. };
  219. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  220. SND_SOC_DAPM_INPUT("LINPUT1"),
  221. SND_SOC_DAPM_INPUT("RINPUT1"),
  222. SND_SOC_DAPM_INPUT("LINPUT2"),
  223. SND_SOC_DAPM_INPUT("RINPUT2"),
  224. SND_SOC_DAPM_INPUT("LINPUT3"),
  225. SND_SOC_DAPM_INPUT("RINPUT3"),
  226. SND_SOC_DAPM_MICBIAS("MICB", WM8960_POWER1, 1, 0),
  227. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  228. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  229. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  230. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  231. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  232. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  233. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  234. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  235. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER2, 3, 0),
  236. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER2, 2, 0),
  237. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  238. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  239. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  240. &wm8960_loutput_mixer[0],
  241. ARRAY_SIZE(wm8960_loutput_mixer)),
  242. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  243. &wm8960_routput_mixer[0],
  244. ARRAY_SIZE(wm8960_routput_mixer)),
  245. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  246. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  247. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  248. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  249. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  250. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  251. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  252. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  253. SND_SOC_DAPM_OUTPUT("HP_L"),
  254. SND_SOC_DAPM_OUTPUT("HP_R"),
  255. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  256. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  257. SND_SOC_DAPM_OUTPUT("OUT3"),
  258. };
  259. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  260. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  261. &wm8960_mono_out[0],
  262. ARRAY_SIZE(wm8960_mono_out)),
  263. };
  264. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  265. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  266. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  267. };
  268. static const struct snd_soc_dapm_route audio_paths[] = {
  269. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  270. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  271. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  272. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer", },
  273. { "Left Input Mixer", NULL, "LINPUT1", }, /* Really Boost Switch */
  274. { "Left Input Mixer", NULL, "LINPUT2" },
  275. { "Left Input Mixer", NULL, "LINPUT3" },
  276. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  277. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  278. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  279. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer", },
  280. { "Right Input Mixer", NULL, "RINPUT1", }, /* Really Boost Switch */
  281. { "Right Input Mixer", NULL, "RINPUT2" },
  282. { "Right Input Mixer", NULL, "LINPUT3" },
  283. { "Left ADC", NULL, "Left Input Mixer" },
  284. { "Right ADC", NULL, "Right Input Mixer" },
  285. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  286. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer"} ,
  287. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  288. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  289. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" } ,
  290. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  291. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  292. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  293. { "HP_L", NULL, "LOUT1 PGA" },
  294. { "HP_R", NULL, "ROUT1 PGA" },
  295. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  296. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  297. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  298. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  299. { "SPK_LN", NULL, "Left Speaker Output" },
  300. { "SPK_LP", NULL, "Left Speaker Output" },
  301. { "SPK_RN", NULL, "Right Speaker Output" },
  302. { "SPK_RP", NULL, "Right Speaker Output" },
  303. };
  304. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  305. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  306. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  307. { "OUT3", NULL, "Mono Output Mixer", }
  308. };
  309. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  310. { "HP_L", NULL, "OUT3 VMID" },
  311. { "HP_R", NULL, "OUT3 VMID" },
  312. { "OUT3 VMID", NULL, "Left Output Mixer" },
  313. { "OUT3 VMID", NULL, "Right Output Mixer" },
  314. };
  315. static int wm8960_add_widgets(struct snd_soc_codec *codec)
  316. {
  317. struct wm8960_data *pdata = codec->dev->platform_data;
  318. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  319. struct snd_soc_dapm_widget *w;
  320. snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets,
  321. ARRAY_SIZE(wm8960_dapm_widgets));
  322. snd_soc_dapm_add_routes(codec, audio_paths, ARRAY_SIZE(audio_paths));
  323. /* In capless mode OUT3 is used to provide VMID for the
  324. * headphone outputs, otherwise it is used as a mono mixer.
  325. */
  326. if (pdata && pdata->capless) {
  327. snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets_capless,
  328. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  329. snd_soc_dapm_add_routes(codec, audio_paths_capless,
  330. ARRAY_SIZE(audio_paths_capless));
  331. } else {
  332. snd_soc_dapm_new_controls(codec, wm8960_dapm_widgets_out3,
  333. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  334. snd_soc_dapm_add_routes(codec, audio_paths_out3,
  335. ARRAY_SIZE(audio_paths_out3));
  336. }
  337. /* We need to power up the headphone output stage out of
  338. * sequence for capless mode. To save scanning the widget
  339. * list each time to find the desired power state do so now
  340. * and save the result.
  341. */
  342. list_for_each_entry(w, &codec->dapm_widgets, list) {
  343. if (strcmp(w->name, "LOUT1 PGA") == 0)
  344. wm8960->lout1 = w;
  345. if (strcmp(w->name, "ROUT1 PGA") == 0)
  346. wm8960->rout1 = w;
  347. if (strcmp(w->name, "OUT3 VMID") == 0)
  348. wm8960->out3 = w;
  349. }
  350. return 0;
  351. }
  352. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  353. unsigned int fmt)
  354. {
  355. struct snd_soc_codec *codec = codec_dai->codec;
  356. u16 iface = 0;
  357. /* set master/slave audio interface */
  358. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  359. case SND_SOC_DAIFMT_CBM_CFM:
  360. iface |= 0x0040;
  361. break;
  362. case SND_SOC_DAIFMT_CBS_CFS:
  363. break;
  364. default:
  365. return -EINVAL;
  366. }
  367. /* interface format */
  368. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  369. case SND_SOC_DAIFMT_I2S:
  370. iface |= 0x0002;
  371. break;
  372. case SND_SOC_DAIFMT_RIGHT_J:
  373. break;
  374. case SND_SOC_DAIFMT_LEFT_J:
  375. iface |= 0x0001;
  376. break;
  377. case SND_SOC_DAIFMT_DSP_A:
  378. iface |= 0x0003;
  379. break;
  380. case SND_SOC_DAIFMT_DSP_B:
  381. iface |= 0x0013;
  382. break;
  383. default:
  384. return -EINVAL;
  385. }
  386. /* clock inversion */
  387. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  388. case SND_SOC_DAIFMT_NB_NF:
  389. break;
  390. case SND_SOC_DAIFMT_IB_IF:
  391. iface |= 0x0090;
  392. break;
  393. case SND_SOC_DAIFMT_IB_NF:
  394. iface |= 0x0080;
  395. break;
  396. case SND_SOC_DAIFMT_NB_IF:
  397. iface |= 0x0010;
  398. break;
  399. default:
  400. return -EINVAL;
  401. }
  402. /* set iface */
  403. snd_soc_write(codec, WM8960_IFACE1, iface);
  404. return 0;
  405. }
  406. static struct {
  407. int rate;
  408. unsigned int val;
  409. } alc_rates[] = {
  410. { 48000, 0 },
  411. { 44100, 0 },
  412. { 32000, 1 },
  413. { 22050, 2 },
  414. { 24000, 2 },
  415. { 16000, 3 },
  416. { 11250, 4 },
  417. { 12000, 4 },
  418. { 8000, 5 },
  419. };
  420. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  421. struct snd_pcm_hw_params *params,
  422. struct snd_soc_dai *dai)
  423. {
  424. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  425. struct snd_soc_codec *codec = rtd->codec;
  426. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  427. u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
  428. int i;
  429. /* bit size */
  430. switch (params_format(params)) {
  431. case SNDRV_PCM_FORMAT_S16_LE:
  432. break;
  433. case SNDRV_PCM_FORMAT_S20_3LE:
  434. iface |= 0x0004;
  435. break;
  436. case SNDRV_PCM_FORMAT_S24_LE:
  437. iface |= 0x0008;
  438. break;
  439. }
  440. /* Update filters for the new rate */
  441. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  442. wm8960->playback_fs = params_rate(params);
  443. wm8960_set_deemph(codec);
  444. } else {
  445. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  446. if (alc_rates[i].rate == params_rate(params))
  447. snd_soc_update_bits(codec,
  448. WM8960_ADDCTL3, 0x7,
  449. alc_rates[i].val);
  450. }
  451. /* set iface */
  452. snd_soc_write(codec, WM8960_IFACE1, iface);
  453. return 0;
  454. }
  455. static int wm8960_mute(struct snd_soc_dai *dai, int mute)
  456. {
  457. struct snd_soc_codec *codec = dai->codec;
  458. u16 mute_reg = snd_soc_read(codec, WM8960_DACCTL1) & 0xfff7;
  459. if (mute)
  460. snd_soc_write(codec, WM8960_DACCTL1, mute_reg | 0x8);
  461. else
  462. snd_soc_write(codec, WM8960_DACCTL1, mute_reg);
  463. return 0;
  464. }
  465. static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
  466. enum snd_soc_bias_level level)
  467. {
  468. u16 reg;
  469. switch (level) {
  470. case SND_SOC_BIAS_ON:
  471. break;
  472. case SND_SOC_BIAS_PREPARE:
  473. /* Set VMID to 2x50k */
  474. reg = snd_soc_read(codec, WM8960_POWER1);
  475. reg &= ~0x180;
  476. reg |= 0x80;
  477. snd_soc_write(codec, WM8960_POWER1, reg);
  478. break;
  479. case SND_SOC_BIAS_STANDBY:
  480. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  481. /* Enable anti-pop features */
  482. snd_soc_write(codec, WM8960_APOP1,
  483. WM8960_POBCTRL | WM8960_SOFT_ST |
  484. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  485. /* Enable & ramp VMID at 2x50k */
  486. reg = snd_soc_read(codec, WM8960_POWER1);
  487. reg |= 0x80;
  488. snd_soc_write(codec, WM8960_POWER1, reg);
  489. msleep(100);
  490. /* Enable VREF */
  491. snd_soc_write(codec, WM8960_POWER1, reg | WM8960_VREF);
  492. /* Disable anti-pop features */
  493. snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
  494. }
  495. /* Set VMID to 2x250k */
  496. reg = snd_soc_read(codec, WM8960_POWER1);
  497. reg &= ~0x180;
  498. reg |= 0x100;
  499. snd_soc_write(codec, WM8960_POWER1, reg);
  500. break;
  501. case SND_SOC_BIAS_OFF:
  502. /* Enable anti-pop features */
  503. snd_soc_write(codec, WM8960_APOP1,
  504. WM8960_POBCTRL | WM8960_SOFT_ST |
  505. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  506. /* Disable VMID and VREF, let them discharge */
  507. snd_soc_write(codec, WM8960_POWER1, 0);
  508. msleep(600);
  509. break;
  510. }
  511. codec->bias_level = level;
  512. return 0;
  513. }
  514. static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
  515. enum snd_soc_bias_level level)
  516. {
  517. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  518. int reg;
  519. switch (level) {
  520. case SND_SOC_BIAS_ON:
  521. break;
  522. case SND_SOC_BIAS_PREPARE:
  523. switch (codec->bias_level) {
  524. case SND_SOC_BIAS_STANDBY:
  525. /* Enable anti pop mode */
  526. snd_soc_update_bits(codec, WM8960_APOP1,
  527. WM8960_POBCTRL | WM8960_SOFT_ST |
  528. WM8960_BUFDCOPEN,
  529. WM8960_POBCTRL | WM8960_SOFT_ST |
  530. WM8960_BUFDCOPEN);
  531. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  532. reg = 0;
  533. if (wm8960->lout1 && wm8960->lout1->power)
  534. reg |= WM8960_PWR2_LOUT1;
  535. if (wm8960->rout1 && wm8960->rout1->power)
  536. reg |= WM8960_PWR2_ROUT1;
  537. if (wm8960->out3 && wm8960->out3->power)
  538. reg |= WM8960_PWR2_OUT3;
  539. snd_soc_update_bits(codec, WM8960_POWER2,
  540. WM8960_PWR2_LOUT1 |
  541. WM8960_PWR2_ROUT1 |
  542. WM8960_PWR2_OUT3, reg);
  543. /* Enable VMID at 2*50k */
  544. snd_soc_update_bits(codec, WM8960_POWER1,
  545. WM8960_VMID_MASK, 0x80);
  546. /* Ramp */
  547. msleep(100);
  548. /* Enable VREF */
  549. snd_soc_update_bits(codec, WM8960_POWER1,
  550. WM8960_VREF, WM8960_VREF);
  551. msleep(100);
  552. break;
  553. case SND_SOC_BIAS_ON:
  554. /* Enable anti-pop mode */
  555. snd_soc_update_bits(codec, WM8960_APOP1,
  556. WM8960_POBCTRL | WM8960_SOFT_ST |
  557. WM8960_BUFDCOPEN,
  558. WM8960_POBCTRL | WM8960_SOFT_ST |
  559. WM8960_BUFDCOPEN);
  560. /* Disable VMID and VREF */
  561. snd_soc_update_bits(codec, WM8960_POWER1,
  562. WM8960_VREF | WM8960_VMID_MASK, 0);
  563. break;
  564. default:
  565. break;
  566. }
  567. break;
  568. case SND_SOC_BIAS_STANDBY:
  569. switch (codec->bias_level) {
  570. case SND_SOC_BIAS_PREPARE:
  571. /* Disable HP discharge */
  572. snd_soc_update_bits(codec, WM8960_APOP2,
  573. WM8960_DISOP | WM8960_DRES_MASK,
  574. 0);
  575. /* Disable anti-pop features */
  576. snd_soc_update_bits(codec, WM8960_APOP1,
  577. WM8960_POBCTRL | WM8960_SOFT_ST |
  578. WM8960_BUFDCOPEN,
  579. WM8960_POBCTRL | WM8960_SOFT_ST |
  580. WM8960_BUFDCOPEN);
  581. break;
  582. default:
  583. break;
  584. }
  585. break;
  586. case SND_SOC_BIAS_OFF:
  587. break;
  588. }
  589. codec->bias_level = level;
  590. return 0;
  591. }
  592. /* PLL divisors */
  593. struct _pll_div {
  594. u32 pre_div:1;
  595. u32 n:4;
  596. u32 k:24;
  597. };
  598. /* The size in bits of the pll divide multiplied by 10
  599. * to allow rounding later */
  600. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  601. static int pll_factors(unsigned int source, unsigned int target,
  602. struct _pll_div *pll_div)
  603. {
  604. unsigned long long Kpart;
  605. unsigned int K, Ndiv, Nmod;
  606. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  607. /* Scale up target to PLL operating frequency */
  608. target *= 4;
  609. Ndiv = target / source;
  610. if (Ndiv < 6) {
  611. source >>= 1;
  612. pll_div->pre_div = 1;
  613. Ndiv = target / source;
  614. } else
  615. pll_div->pre_div = 0;
  616. if ((Ndiv < 6) || (Ndiv > 12)) {
  617. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  618. return -EINVAL;
  619. }
  620. pll_div->n = Ndiv;
  621. Nmod = target % source;
  622. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  623. do_div(Kpart, source);
  624. K = Kpart & 0xFFFFFFFF;
  625. /* Check if we need to round */
  626. if ((K % 10) >= 5)
  627. K += 5;
  628. /* Move down to proper range now rounding is done */
  629. K /= 10;
  630. pll_div->k = K;
  631. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  632. pll_div->n, pll_div->k, pll_div->pre_div);
  633. return 0;
  634. }
  635. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  636. int source, unsigned int freq_in, unsigned int freq_out)
  637. {
  638. struct snd_soc_codec *codec = codec_dai->codec;
  639. u16 reg;
  640. static struct _pll_div pll_div;
  641. int ret;
  642. if (freq_in && freq_out) {
  643. ret = pll_factors(freq_in, freq_out, &pll_div);
  644. if (ret != 0)
  645. return ret;
  646. }
  647. /* Disable the PLL: even if we are changing the frequency the
  648. * PLL needs to be disabled while we do so. */
  649. snd_soc_write(codec, WM8960_CLOCK1,
  650. snd_soc_read(codec, WM8960_CLOCK1) & ~1);
  651. snd_soc_write(codec, WM8960_POWER2,
  652. snd_soc_read(codec, WM8960_POWER2) & ~1);
  653. if (!freq_in || !freq_out)
  654. return 0;
  655. reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
  656. reg |= pll_div.pre_div << 4;
  657. reg |= pll_div.n;
  658. if (pll_div.k) {
  659. reg |= 0x20;
  660. snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f);
  661. snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff);
  662. snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff);
  663. }
  664. snd_soc_write(codec, WM8960_PLL1, reg);
  665. /* Turn it on */
  666. snd_soc_write(codec, WM8960_POWER2,
  667. snd_soc_read(codec, WM8960_POWER2) | 1);
  668. msleep(250);
  669. snd_soc_write(codec, WM8960_CLOCK1,
  670. snd_soc_read(codec, WM8960_CLOCK1) | 1);
  671. return 0;
  672. }
  673. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  674. int div_id, int div)
  675. {
  676. struct snd_soc_codec *codec = codec_dai->codec;
  677. u16 reg;
  678. switch (div_id) {
  679. case WM8960_SYSCLKDIV:
  680. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
  681. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  682. break;
  683. case WM8960_DACDIV:
  684. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
  685. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  686. break;
  687. case WM8960_OPCLKDIV:
  688. reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
  689. snd_soc_write(codec, WM8960_PLL1, reg | div);
  690. break;
  691. case WM8960_DCLKDIV:
  692. reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
  693. snd_soc_write(codec, WM8960_CLOCK2, reg | div);
  694. break;
  695. case WM8960_TOCLKSEL:
  696. reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
  697. snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
  698. break;
  699. default:
  700. return -EINVAL;
  701. }
  702. return 0;
  703. }
  704. static int wm8960_set_bias_level(struct snd_soc_codec *codec,
  705. enum snd_soc_bias_level level)
  706. {
  707. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  708. return wm8960->set_bias_level(codec, level);
  709. }
  710. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  711. #define WM8960_FORMATS \
  712. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  713. SNDRV_PCM_FMTBIT_S24_LE)
  714. static struct snd_soc_dai_ops wm8960_dai_ops = {
  715. .hw_params = wm8960_hw_params,
  716. .digital_mute = wm8960_mute,
  717. .set_fmt = wm8960_set_dai_fmt,
  718. .set_clkdiv = wm8960_set_dai_clkdiv,
  719. .set_pll = wm8960_set_dai_pll,
  720. };
  721. static struct snd_soc_dai_driver wm8960_dai = {
  722. .name = "wm8960-hifi",
  723. .playback = {
  724. .stream_name = "Playback",
  725. .channels_min = 1,
  726. .channels_max = 2,
  727. .rates = WM8960_RATES,
  728. .formats = WM8960_FORMATS,},
  729. .capture = {
  730. .stream_name = "Capture",
  731. .channels_min = 1,
  732. .channels_max = 2,
  733. .rates = WM8960_RATES,
  734. .formats = WM8960_FORMATS,},
  735. .ops = &wm8960_dai_ops,
  736. .symmetric_rates = 1,
  737. };
  738. static int wm8960_suspend(struct snd_soc_codec *codec, pm_message_t state)
  739. {
  740. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  741. wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
  742. return 0;
  743. }
  744. static int wm8960_resume(struct snd_soc_codec *codec)
  745. {
  746. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  747. int i;
  748. u8 data[2];
  749. u16 *cache = codec->reg_cache;
  750. /* Sync reg_cache with the hardware */
  751. for (i = 0; i < ARRAY_SIZE(wm8960_reg); i++) {
  752. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  753. data[1] = cache[i] & 0x00ff;
  754. codec->hw_write(codec->control_data, data, 2);
  755. }
  756. wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  757. return 0;
  758. }
  759. static int wm8960_probe(struct snd_soc_codec *codec)
  760. {
  761. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  762. struct wm8960_data *pdata = dev_get_platdata(codec->dev);
  763. int ret;
  764. u16 reg;
  765. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  766. codec->control_data = wm8960->control_data;
  767. if (!pdata) {
  768. dev_warn(codec->dev, "No platform data supplied\n");
  769. } else {
  770. if (pdata->dres > WM8960_DRES_MAX) {
  771. dev_err(codec->dev, "Invalid DRES: %d\n", pdata->dres);
  772. pdata->dres = 0;
  773. }
  774. if (pdata->capless)
  775. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  776. }
  777. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8960->control_type);
  778. if (ret < 0) {
  779. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  780. return ret;
  781. }
  782. ret = wm8960_reset(codec);
  783. if (ret < 0) {
  784. dev_err(codec->dev, "Failed to issue reset\n");
  785. return ret;
  786. }
  787. wm8960->set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  788. /* Latch the update bits */
  789. reg = snd_soc_read(codec, WM8960_LINVOL);
  790. snd_soc_write(codec, WM8960_LINVOL, reg | 0x100);
  791. reg = snd_soc_read(codec, WM8960_RINVOL);
  792. snd_soc_write(codec, WM8960_RINVOL, reg | 0x100);
  793. reg = snd_soc_read(codec, WM8960_LADC);
  794. snd_soc_write(codec, WM8960_LADC, reg | 0x100);
  795. reg = snd_soc_read(codec, WM8960_RADC);
  796. snd_soc_write(codec, WM8960_RADC, reg | 0x100);
  797. reg = snd_soc_read(codec, WM8960_LDAC);
  798. snd_soc_write(codec, WM8960_LDAC, reg | 0x100);
  799. reg = snd_soc_read(codec, WM8960_RDAC);
  800. snd_soc_write(codec, WM8960_RDAC, reg | 0x100);
  801. reg = snd_soc_read(codec, WM8960_LOUT1);
  802. snd_soc_write(codec, WM8960_LOUT1, reg | 0x100);
  803. reg = snd_soc_read(codec, WM8960_ROUT1);
  804. snd_soc_write(codec, WM8960_ROUT1, reg | 0x100);
  805. reg = snd_soc_read(codec, WM8960_LOUT2);
  806. snd_soc_write(codec, WM8960_LOUT2, reg | 0x100);
  807. reg = snd_soc_read(codec, WM8960_ROUT2);
  808. snd_soc_write(codec, WM8960_ROUT2, reg | 0x100);
  809. snd_soc_add_controls(codec, wm8960_snd_controls,
  810. ARRAY_SIZE(wm8960_snd_controls));
  811. wm8960_add_widgets(codec);
  812. return 0;
  813. }
  814. /* power down chip */
  815. static int wm8960_remove(struct snd_soc_codec *codec)
  816. {
  817. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  818. wm8960->set_bias_level(codec, SND_SOC_BIAS_OFF);
  819. return 0;
  820. }
  821. static struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
  822. .probe = wm8960_probe,
  823. .remove = wm8960_remove,
  824. .suspend = wm8960_suspend,
  825. .resume = wm8960_resume,
  826. .set_bias_level = wm8960_set_bias_level,
  827. .reg_cache_size = ARRAY_SIZE(wm8960_reg),
  828. .reg_word_size = sizeof(u16),
  829. .reg_cache_default = wm8960_reg,
  830. };
  831. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  832. static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
  833. const struct i2c_device_id *id)
  834. {
  835. struct wm8960_priv *wm8960;
  836. int ret;
  837. wm8960 = kzalloc(sizeof(struct wm8960_priv), GFP_KERNEL);
  838. if (wm8960 == NULL)
  839. return -ENOMEM;
  840. i2c_set_clientdata(i2c, wm8960);
  841. wm8960->control_data = i2c;
  842. ret = snd_soc_register_codec(&i2c->dev,
  843. &soc_codec_dev_wm8960, &wm8960_dai, 1);
  844. if (ret < 0)
  845. kfree(wm8960);
  846. return ret;
  847. }
  848. static __devexit int wm8960_i2c_remove(struct i2c_client *client)
  849. {
  850. snd_soc_unregister_codec(&client->dev);
  851. kfree(i2c_get_clientdata(client));
  852. return 0;
  853. }
  854. static const struct i2c_device_id wm8960_i2c_id[] = {
  855. { "wm8960", 0 },
  856. { }
  857. };
  858. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  859. static struct i2c_driver wm8960_i2c_driver = {
  860. .driver = {
  861. .name = "wm8960-codec",
  862. .owner = THIS_MODULE,
  863. },
  864. .probe = wm8960_i2c_probe,
  865. .remove = __devexit_p(wm8960_i2c_remove),
  866. .id_table = wm8960_i2c_id,
  867. };
  868. #endif
  869. static int __init wm8960_modinit(void)
  870. {
  871. int ret = 0;
  872. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  873. ret = i2c_add_driver(&wm8960_i2c_driver);
  874. if (ret != 0) {
  875. printk(KERN_ERR "Failed to register WM8960 I2C driver: %d\n",
  876. ret);
  877. }
  878. #endif
  879. return ret;
  880. }
  881. module_init(wm8960_modinit);
  882. static void __exit wm8960_exit(void)
  883. {
  884. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  885. i2c_del_driver(&wm8960_i2c_driver);
  886. #endif
  887. }
  888. module_exit(wm8960_exit);
  889. MODULE_DESCRIPTION("ASoC WM8960 driver");
  890. MODULE_AUTHOR("Liam Girdwood");
  891. MODULE_LICENSE("GPL");