sdhci-s3c.c 13 KB

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  1. /* linux/drivers/mmc/host/sdhci-s3c.c
  2. *
  3. * Copyright 2008 Openmoko Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * SDHCI (HSMMC) support for Samsung SoC
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/dma-mapping.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/clk.h>
  19. #include <linux/io.h>
  20. #include <linux/gpio.h>
  21. #include <linux/mmc/host.h>
  22. #include <plat/sdhci.h>
  23. #include <plat/regs-sdhci.h>
  24. #include "sdhci.h"
  25. #define MAX_BUS_CLK (4)
  26. /**
  27. * struct sdhci_s3c - S3C SDHCI instance
  28. * @host: The SDHCI host created
  29. * @pdev: The platform device we where created from.
  30. * @ioarea: The resource created when we claimed the IO area.
  31. * @pdata: The platform data for this controller.
  32. * @cur_clk: The index of the current bus clock.
  33. * @clk_io: The clock for the internal bus interface.
  34. * @clk_bus: The clocks that are available for the SD/MMC bus clock.
  35. */
  36. struct sdhci_s3c {
  37. struct sdhci_host *host;
  38. struct platform_device *pdev;
  39. struct resource *ioarea;
  40. struct s3c_sdhci_platdata *pdata;
  41. unsigned int cur_clk;
  42. int ext_cd_irq;
  43. int ext_cd_gpio;
  44. struct clk *clk_io;
  45. struct clk *clk_bus[MAX_BUS_CLK];
  46. };
  47. static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
  48. {
  49. return sdhci_priv(host);
  50. }
  51. /**
  52. * get_curclk - convert ctrl2 register to clock source number
  53. * @ctrl2: Control2 register value.
  54. */
  55. static u32 get_curclk(u32 ctrl2)
  56. {
  57. ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
  58. ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
  59. return ctrl2;
  60. }
  61. static void sdhci_s3c_check_sclk(struct sdhci_host *host)
  62. {
  63. struct sdhci_s3c *ourhost = to_s3c(host);
  64. u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
  65. if (get_curclk(tmp) != ourhost->cur_clk) {
  66. dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n");
  67. tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
  68. tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
  69. writel(tmp, host->ioaddr + 0x80);
  70. }
  71. }
  72. /**
  73. * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
  74. * @host: The SDHCI host instance.
  75. *
  76. * Callback to return the maximum clock rate acheivable by the controller.
  77. */
  78. static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
  79. {
  80. struct sdhci_s3c *ourhost = to_s3c(host);
  81. struct clk *busclk;
  82. unsigned int rate, max;
  83. int clk;
  84. /* note, a reset will reset the clock source */
  85. sdhci_s3c_check_sclk(host);
  86. for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) {
  87. busclk = ourhost->clk_bus[clk];
  88. if (!busclk)
  89. continue;
  90. rate = clk_get_rate(busclk);
  91. if (rate > max)
  92. max = rate;
  93. }
  94. return max;
  95. }
  96. /**
  97. * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
  98. * @ourhost: Our SDHCI instance.
  99. * @src: The source clock index.
  100. * @wanted: The clock frequency wanted.
  101. */
  102. static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
  103. unsigned int src,
  104. unsigned int wanted)
  105. {
  106. unsigned long rate;
  107. struct clk *clksrc = ourhost->clk_bus[src];
  108. int div;
  109. if (!clksrc)
  110. return UINT_MAX;
  111. rate = clk_get_rate(clksrc);
  112. for (div = 1; div < 256; div *= 2) {
  113. if ((rate / div) <= wanted)
  114. break;
  115. }
  116. dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
  117. src, rate, wanted, rate / div);
  118. return (wanted - (rate / div));
  119. }
  120. /**
  121. * sdhci_s3c_set_clock - callback on clock change
  122. * @host: The SDHCI host being changed
  123. * @clock: The clock rate being requested.
  124. *
  125. * When the card's clock is going to be changed, look at the new frequency
  126. * and find the best clock source to go with it.
  127. */
  128. static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
  129. {
  130. struct sdhci_s3c *ourhost = to_s3c(host);
  131. unsigned int best = UINT_MAX;
  132. unsigned int delta;
  133. int best_src = 0;
  134. int src;
  135. u32 ctrl;
  136. /* don't bother if the clock is going off. */
  137. if (clock == 0)
  138. return;
  139. for (src = 0; src < MAX_BUS_CLK; src++) {
  140. delta = sdhci_s3c_consider_clock(ourhost, src, clock);
  141. if (delta < best) {
  142. best = delta;
  143. best_src = src;
  144. }
  145. }
  146. dev_dbg(&ourhost->pdev->dev,
  147. "selected source %d, clock %d, delta %d\n",
  148. best_src, clock, best);
  149. /* select the new clock source */
  150. if (ourhost->cur_clk != best_src) {
  151. struct clk *clk = ourhost->clk_bus[best_src];
  152. /* turn clock off to card before changing clock source */
  153. writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
  154. ourhost->cur_clk = best_src;
  155. host->max_clk = clk_get_rate(clk);
  156. ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
  157. ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
  158. ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
  159. writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
  160. }
  161. /* reconfigure the hardware for new clock rate */
  162. {
  163. struct mmc_ios ios;
  164. ios.clock = clock;
  165. if (ourhost->pdata->cfg_card)
  166. (ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,
  167. &ios, NULL);
  168. }
  169. }
  170. /**
  171. * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
  172. * @host: The SDHCI host being queried
  173. *
  174. * To init mmc host properly a minimal clock value is needed. For high system
  175. * bus clock's values the standard formula gives values out of allowed range.
  176. * The clock still can be set to lower values, if clock source other then
  177. * system bus is selected.
  178. */
  179. static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
  180. {
  181. struct sdhci_s3c *ourhost = to_s3c(host);
  182. unsigned int delta, min = UINT_MAX;
  183. int src;
  184. for (src = 0; src < MAX_BUS_CLK; src++) {
  185. delta = sdhci_s3c_consider_clock(ourhost, src, 0);
  186. if (delta == UINT_MAX)
  187. continue;
  188. /* delta is a negative value in this case */
  189. if (-delta < min)
  190. min = -delta;
  191. }
  192. return min;
  193. }
  194. static struct sdhci_ops sdhci_s3c_ops = {
  195. .get_max_clock = sdhci_s3c_get_max_clk,
  196. .set_clock = sdhci_s3c_set_clock,
  197. .get_min_clock = sdhci_s3c_get_min_clock,
  198. };
  199. static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
  200. {
  201. struct sdhci_host *host = platform_get_drvdata(dev);
  202. unsigned long flags;
  203. if (host) {
  204. spin_lock_irqsave(&host->lock, flags);
  205. if (state) {
  206. dev_dbg(&dev->dev, "card inserted.\n");
  207. host->flags &= ~SDHCI_DEVICE_DEAD;
  208. host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
  209. } else {
  210. dev_dbg(&dev->dev, "card removed.\n");
  211. host->flags |= SDHCI_DEVICE_DEAD;
  212. host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
  213. }
  214. tasklet_schedule(&host->card_tasklet);
  215. spin_unlock_irqrestore(&host->lock, flags);
  216. }
  217. }
  218. static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id)
  219. {
  220. struct sdhci_s3c *sc = dev_id;
  221. int status = gpio_get_value(sc->ext_cd_gpio);
  222. if (sc->pdata->ext_cd_gpio_invert)
  223. status = !status;
  224. sdhci_s3c_notify_change(sc->pdev, status);
  225. return IRQ_HANDLED;
  226. }
  227. static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
  228. {
  229. struct s3c_sdhci_platdata *pdata = sc->pdata;
  230. struct device *dev = &sc->pdev->dev;
  231. if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
  232. sc->ext_cd_gpio = pdata->ext_cd_gpio;
  233. sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
  234. if (sc->ext_cd_irq &&
  235. request_threaded_irq(sc->ext_cd_irq, NULL,
  236. sdhci_s3c_gpio_card_detect_thread,
  237. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  238. dev_name(dev), sc) == 0) {
  239. int status = gpio_get_value(sc->ext_cd_gpio);
  240. if (pdata->ext_cd_gpio_invert)
  241. status = !status;
  242. sdhci_s3c_notify_change(sc->pdev, status);
  243. } else {
  244. dev_warn(dev, "cannot request irq for card detect\n");
  245. sc->ext_cd_irq = 0;
  246. }
  247. } else {
  248. dev_err(dev, "cannot request gpio for card detect\n");
  249. }
  250. }
  251. static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
  252. {
  253. struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
  254. struct device *dev = &pdev->dev;
  255. struct sdhci_host *host;
  256. struct sdhci_s3c *sc;
  257. struct resource *res;
  258. int ret, irq, ptr, clks;
  259. if (!pdata) {
  260. dev_err(dev, "no device data specified\n");
  261. return -ENOENT;
  262. }
  263. irq = platform_get_irq(pdev, 0);
  264. if (irq < 0) {
  265. dev_err(dev, "no irq specified\n");
  266. return irq;
  267. }
  268. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  269. if (!res) {
  270. dev_err(dev, "no memory specified\n");
  271. return -ENOENT;
  272. }
  273. host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
  274. if (IS_ERR(host)) {
  275. dev_err(dev, "sdhci_alloc_host() failed\n");
  276. return PTR_ERR(host);
  277. }
  278. sc = sdhci_priv(host);
  279. sc->host = host;
  280. sc->pdev = pdev;
  281. sc->pdata = pdata;
  282. sc->ext_cd_gpio = -1; /* invalid gpio number */
  283. platform_set_drvdata(pdev, host);
  284. sc->clk_io = clk_get(dev, "hsmmc");
  285. if (IS_ERR(sc->clk_io)) {
  286. dev_err(dev, "failed to get io clock\n");
  287. ret = PTR_ERR(sc->clk_io);
  288. goto err_io_clk;
  289. }
  290. /* enable the local io clock and keep it running for the moment. */
  291. clk_enable(sc->clk_io);
  292. for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
  293. struct clk *clk;
  294. char *name = pdata->clocks[ptr];
  295. if (name == NULL)
  296. continue;
  297. clk = clk_get(dev, name);
  298. if (IS_ERR(clk)) {
  299. dev_err(dev, "failed to get clock %s\n", name);
  300. continue;
  301. }
  302. clks++;
  303. sc->clk_bus[ptr] = clk;
  304. clk_enable(clk);
  305. dev_info(dev, "clock source %d: %s (%ld Hz)\n",
  306. ptr, name, clk_get_rate(clk));
  307. }
  308. if (clks == 0) {
  309. dev_err(dev, "failed to find any bus clocks\n");
  310. ret = -ENOENT;
  311. goto err_no_busclks;
  312. }
  313. sc->ioarea = request_mem_region(res->start, resource_size(res),
  314. mmc_hostname(host->mmc));
  315. if (!sc->ioarea) {
  316. dev_err(dev, "failed to reserve register area\n");
  317. ret = -ENXIO;
  318. goto err_req_regs;
  319. }
  320. host->ioaddr = ioremap_nocache(res->start, resource_size(res));
  321. if (!host->ioaddr) {
  322. dev_err(dev, "failed to map registers\n");
  323. ret = -ENXIO;
  324. goto err_req_regs;
  325. }
  326. /* Ensure we have minimal gpio selected CMD/CLK/Detect */
  327. if (pdata->cfg_gpio)
  328. pdata->cfg_gpio(pdev, pdata->max_width);
  329. host->hw_name = "samsung-hsmmc";
  330. host->ops = &sdhci_s3c_ops;
  331. host->quirks = 0;
  332. host->irq = irq;
  333. /* Setup quirks for the controller */
  334. host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
  335. host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
  336. #ifndef CONFIG_MMC_SDHCI_S3C_DMA
  337. /* we currently see overruns on errors, so disable the SDMA
  338. * support as well. */
  339. host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
  340. #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
  341. /* It seems we do not get an DATA transfer complete on non-busy
  342. * transfers, not sure if this is a problem with this specific
  343. * SDHCI block, or a missing configuration that needs to be set. */
  344. host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
  345. if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
  346. pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
  347. host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
  348. if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
  349. host->mmc->caps = MMC_CAP_NONREMOVABLE;
  350. host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
  351. SDHCI_QUIRK_32BIT_DMA_SIZE);
  352. /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
  353. host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
  354. ret = sdhci_add_host(host);
  355. if (ret) {
  356. dev_err(dev, "sdhci_add_host() failed\n");
  357. goto err_add_host;
  358. }
  359. /* The following two methods of card detection might call
  360. sdhci_s3c_notify_change() immediately, so they can be called
  361. only after sdhci_add_host(). Setup errors are ignored. */
  362. if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init)
  363. pdata->ext_cd_init(&sdhci_s3c_notify_change);
  364. if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
  365. gpio_is_valid(pdata->ext_cd_gpio))
  366. sdhci_s3c_setup_card_detect_gpio(sc);
  367. return 0;
  368. err_add_host:
  369. release_resource(sc->ioarea);
  370. kfree(sc->ioarea);
  371. err_req_regs:
  372. for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
  373. clk_disable(sc->clk_bus[ptr]);
  374. clk_put(sc->clk_bus[ptr]);
  375. }
  376. err_no_busclks:
  377. clk_disable(sc->clk_io);
  378. clk_put(sc->clk_io);
  379. err_io_clk:
  380. sdhci_free_host(host);
  381. return ret;
  382. }
  383. static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
  384. {
  385. struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
  386. struct sdhci_host *host = platform_get_drvdata(pdev);
  387. struct sdhci_s3c *sc = sdhci_priv(host);
  388. int ptr;
  389. if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup)
  390. pdata->ext_cd_cleanup(&sdhci_s3c_notify_change);
  391. if (sc->ext_cd_irq)
  392. free_irq(sc->ext_cd_irq, sc);
  393. if (gpio_is_valid(sc->ext_cd_gpio))
  394. gpio_free(sc->ext_cd_gpio);
  395. sdhci_remove_host(host, 1);
  396. for (ptr = 0; ptr < 3; ptr++) {
  397. if (sc->clk_bus[ptr]) {
  398. clk_disable(sc->clk_bus[ptr]);
  399. clk_put(sc->clk_bus[ptr]);
  400. }
  401. }
  402. clk_disable(sc->clk_io);
  403. clk_put(sc->clk_io);
  404. iounmap(host->ioaddr);
  405. release_resource(sc->ioarea);
  406. kfree(sc->ioarea);
  407. sdhci_free_host(host);
  408. platform_set_drvdata(pdev, NULL);
  409. return 0;
  410. }
  411. #ifdef CONFIG_PM
  412. static int sdhci_s3c_suspend(struct platform_device *dev, pm_message_t pm)
  413. {
  414. struct sdhci_host *host = platform_get_drvdata(dev);
  415. sdhci_suspend_host(host, pm);
  416. return 0;
  417. }
  418. static int sdhci_s3c_resume(struct platform_device *dev)
  419. {
  420. struct sdhci_host *host = platform_get_drvdata(dev);
  421. sdhci_resume_host(host);
  422. return 0;
  423. }
  424. #else
  425. #define sdhci_s3c_suspend NULL
  426. #define sdhci_s3c_resume NULL
  427. #endif
  428. static struct platform_driver sdhci_s3c_driver = {
  429. .probe = sdhci_s3c_probe,
  430. .remove = __devexit_p(sdhci_s3c_remove),
  431. .suspend = sdhci_s3c_suspend,
  432. .resume = sdhci_s3c_resume,
  433. .driver = {
  434. .owner = THIS_MODULE,
  435. .name = "s3c-sdhci",
  436. },
  437. };
  438. static int __init sdhci_s3c_init(void)
  439. {
  440. return platform_driver_register(&sdhci_s3c_driver);
  441. }
  442. static void __exit sdhci_s3c_exit(void)
  443. {
  444. platform_driver_unregister(&sdhci_s3c_driver);
  445. }
  446. module_init(sdhci_s3c_init);
  447. module_exit(sdhci_s3c_exit);
  448. MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
  449. MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
  450. MODULE_LICENSE("GPL v2");
  451. MODULE_ALIAS("platform:s3c-sdhci");