ip0x.c 7.4 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2007 David Rowe
  4. * 2006 Intratrade Ltd.
  5. * Ivan Danov <idanov@gmail.com>
  6. * 2005 National ICT Australia (NICTA)
  7. * Aidan Williams <aidan@nicta.com.au>
  8. *
  9. * Licensed under the GPL-2 or later.
  10. */
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/mtd.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/flash.h>
  17. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  18. #include <linux/usb/isp1362.h>
  19. #endif
  20. #include <asm/irq.h>
  21. #include <asm/dma.h>
  22. #include <asm/bfin5xx_spi.h>
  23. #include <asm/portmux.h>
  24. #include <mach/fio_flag.h>
  25. /*
  26. * Name the Board for the /proc/cpuinfo
  27. */
  28. const char bfin_board_name[] = "IP04/IP08";
  29. /*
  30. * Driver needs to know address, irq and flag pin.
  31. */
  32. #if defined(CONFIG_BFIN532_IP0X)
  33. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  34. #include <linux/dm9000.h>
  35. static struct resource dm9000_resource1[] = {
  36. {
  37. .start = 0x20100000,
  38. .end = 0x20100000 + 1,
  39. .flags = IORESOURCE_MEM
  40. },{
  41. .start = 0x20100000 + 2,
  42. .end = 0x20100000 + 3,
  43. .flags = IORESOURCE_MEM
  44. },{
  45. .start = IRQ_PF15,
  46. .end = IRQ_PF15,
  47. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
  48. }
  49. };
  50. static struct resource dm9000_resource2[] = {
  51. {
  52. .start = 0x20200000,
  53. .end = 0x20200000 + 1,
  54. .flags = IORESOURCE_MEM
  55. },{
  56. .start = 0x20200000 + 2,
  57. .end = 0x20200000 + 3,
  58. .flags = IORESOURCE_MEM
  59. },{
  60. .start = IRQ_PF14,
  61. .end = IRQ_PF14,
  62. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
  63. }
  64. };
  65. /*
  66. * for the moment we limit ourselves to 16bit IO until some
  67. * better IO routines can be written and tested
  68. */
  69. static struct dm9000_plat_data dm9000_platdata1 = {
  70. .flags = DM9000_PLATF_16BITONLY,
  71. };
  72. static struct platform_device dm9000_device1 = {
  73. .name = "dm9000",
  74. .id = 0,
  75. .num_resources = ARRAY_SIZE(dm9000_resource1),
  76. .resource = dm9000_resource1,
  77. .dev = {
  78. .platform_data = &dm9000_platdata1,
  79. }
  80. };
  81. static struct dm9000_plat_data dm9000_platdata2 = {
  82. .flags = DM9000_PLATF_16BITONLY,
  83. };
  84. static struct platform_device dm9000_device2 = {
  85. .name = "dm9000",
  86. .id = 1,
  87. .num_resources = ARRAY_SIZE(dm9000_resource2),
  88. .resource = dm9000_resource2,
  89. .dev = {
  90. .platform_data = &dm9000_platdata2,
  91. }
  92. };
  93. #endif
  94. #endif
  95. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  96. /* all SPI peripherals info goes here */
  97. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  98. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  99. .enable_dma = 0, /* if 1 - block!!! */
  100. .bits_per_word = 8,
  101. };
  102. #endif
  103. /* Notice: for blackfin, the speed_hz is the value of register
  104. * SPI_BAUD, not the real baudrate */
  105. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  106. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  107. {
  108. .modalias = "mmc_spi",
  109. .max_speed_hz = 2,
  110. .bus_num = 1,
  111. .chip_select = 5,
  112. .controller_data = &mmc_spi_chip_info,
  113. },
  114. #endif
  115. };
  116. /* SPI controller data */
  117. static struct bfin5xx_spi_master spi_bfin_master_info = {
  118. .num_chipselect = 8,
  119. .enable_dma = 1, /* master has the ability to do dma transfer */
  120. };
  121. static struct platform_device spi_bfin_master_device = {
  122. .name = "bfin-spi-master",
  123. .id = 1, /* Bus number */
  124. .dev = {
  125. .platform_data = &spi_bfin_master_info, /* Passed to driver */
  126. },
  127. };
  128. #endif /* spi master and devices */
  129. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  130. #ifdef CONFIG_SERIAL_BFIN_UART0
  131. static struct resource bfin_uart0_resources[] = {
  132. {
  133. .start = BFIN_UART_THR,
  134. .end = BFIN_UART_GCTL+2,
  135. .flags = IORESOURCE_MEM,
  136. },
  137. {
  138. .start = IRQ_UART0_RX,
  139. .end = IRQ_UART0_RX + 1,
  140. .flags = IORESOURCE_IRQ,
  141. },
  142. {
  143. .start = IRQ_UART0_ERROR,
  144. .end = IRQ_UART0_ERROR,
  145. .flags = IORESOURCE_IRQ,
  146. },
  147. {
  148. .start = CH_UART0_TX,
  149. .end = CH_UART0_TX,
  150. .flags = IORESOURCE_DMA,
  151. },
  152. {
  153. .start = CH_UART0_RX,
  154. .end = CH_UART0_RX,
  155. .flags = IORESOURCE_DMA,
  156. },
  157. };
  158. unsigned short bfin_uart0_peripherals[] = {
  159. P_UART0_TX, P_UART0_RX, 0
  160. };
  161. static struct platform_device bfin_uart0_device = {
  162. .name = "bfin-uart",
  163. .id = 0,
  164. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  165. .resource = bfin_uart0_resources,
  166. .dev = {
  167. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  168. },
  169. };
  170. #endif
  171. #endif
  172. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  173. #ifdef CONFIG_BFIN_SIR0
  174. static struct resource bfin_sir0_resources[] = {
  175. {
  176. .start = 0xFFC00400,
  177. .end = 0xFFC004FF,
  178. .flags = IORESOURCE_MEM,
  179. },
  180. {
  181. .start = IRQ_UART0_RX,
  182. .end = IRQ_UART0_RX+1,
  183. .flags = IORESOURCE_IRQ,
  184. },
  185. {
  186. .start = CH_UART0_RX,
  187. .end = CH_UART0_RX+1,
  188. .flags = IORESOURCE_DMA,
  189. },
  190. };
  191. static struct platform_device bfin_sir0_device = {
  192. .name = "bfin_sir",
  193. .id = 0,
  194. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  195. .resource = bfin_sir0_resources,
  196. };
  197. #endif
  198. #endif
  199. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  200. static struct resource isp1362_hcd_resources[] = {
  201. {
  202. .start = 0x20300000,
  203. .end = 0x20300000 + 1,
  204. .flags = IORESOURCE_MEM,
  205. },{
  206. .start = 0x20300000 + 2,
  207. .end = 0x20300000 + 3,
  208. .flags = IORESOURCE_MEM,
  209. },{
  210. .start = IRQ_PF11,
  211. .end = IRQ_PF11,
  212. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  213. },
  214. };
  215. static struct isp1362_platform_data isp1362_priv = {
  216. .sel15Kres = 1,
  217. .clknotstop = 0,
  218. .oc_enable = 0, /* external OC */
  219. .int_act_high = 0,
  220. .int_edge_triggered = 0,
  221. .remote_wakeup_connected = 0,
  222. .no_power_switching = 1,
  223. .power_switching_mode = 0,
  224. };
  225. static struct platform_device isp1362_hcd_device = {
  226. .name = "isp1362-hcd",
  227. .id = 0,
  228. .dev = {
  229. .platform_data = &isp1362_priv,
  230. },
  231. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  232. .resource = isp1362_hcd_resources,
  233. };
  234. #endif
  235. static struct platform_device *ip0x_devices[] __initdata = {
  236. #if defined(CONFIG_BFIN532_IP0X)
  237. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  238. &dm9000_device1,
  239. &dm9000_device2,
  240. #endif
  241. #endif
  242. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  243. &spi_bfin_master_device,
  244. #endif
  245. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  246. #ifdef CONFIG_SERIAL_BFIN_UART0
  247. &bfin_uart0_device,
  248. #endif
  249. #endif
  250. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  251. #ifdef CONFIG_BFIN_SIR0
  252. &bfin_sir0_device,
  253. #endif
  254. #endif
  255. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  256. &isp1362_hcd_device,
  257. #endif
  258. };
  259. static int __init ip0x_init(void)
  260. {
  261. int i;
  262. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  263. platform_add_devices(ip0x_devices, ARRAY_SIZE(ip0x_devices));
  264. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  265. for (i = 0; i < ARRAY_SIZE(bfin_spi_board_info); ++i) {
  266. int j = 1 << bfin_spi_board_info[i].chip_select;
  267. /* set spi cs to 1 */
  268. bfin_write_FIO_DIR(bfin_read_FIO_DIR() | j);
  269. bfin_write_FIO_FLAG_S(j);
  270. }
  271. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  272. #endif
  273. return 0;
  274. }
  275. arch_initcall(ip0x_init);
  276. static struct platform_device *ip0x_early_devices[] __initdata = {
  277. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  278. #ifdef CONFIG_SERIAL_BFIN_UART0
  279. &bfin_uart0_device,
  280. #endif
  281. #endif
  282. };
  283. void __init native_machine_early_platform_add_devices(void)
  284. {
  285. printk(KERN_INFO "register early platform devices\n");
  286. early_platform_add_devices(ip0x_early_devices,
  287. ARRAY_SIZE(ip0x_early_devices));
  288. }