oxygen.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385
  1. /*
  2. * C-Media CMI8788 driver for C-Media's reference design and for the X-Meridian
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /*
  20. * SPI 0 -> 1st AK4396 (front)
  21. * SPI 1 -> 2nd AK4396 (surround)
  22. * SPI 2 -> 3rd AK4396 (center/LFE)
  23. * SPI 3 -> WM8785
  24. * SPI 4 -> 4th AK4396 (back)
  25. *
  26. * GPIO 0 -> DFS0 of AK5385
  27. * GPIO 1 -> DFS1 of AK5385
  28. */
  29. #include <linux/pci.h>
  30. #include <sound/control.h>
  31. #include <sound/core.h>
  32. #include <sound/initval.h>
  33. #include <sound/pcm.h>
  34. #include <sound/pcm_params.h>
  35. #include <sound/tlv.h>
  36. #include "oxygen.h"
  37. #include "ak4396.h"
  38. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  39. MODULE_DESCRIPTION("C-Media CMI8788 driver");
  40. MODULE_LICENSE("GPL");
  41. MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
  42. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  43. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  44. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  45. module_param_array(index, int, NULL, 0444);
  46. MODULE_PARM_DESC(index, "card index");
  47. module_param_array(id, charp, NULL, 0444);
  48. MODULE_PARM_DESC(id, "ID string");
  49. module_param_array(enable, bool, NULL, 0444);
  50. MODULE_PARM_DESC(enable, "enable card");
  51. static struct pci_device_id oxygen_ids[] __devinitdata = {
  52. { OXYGEN_PCI_SUBID(0x10b0, 0x0216) },
  53. { OXYGEN_PCI_SUBID(0x10b0, 0x0218) },
  54. { OXYGEN_PCI_SUBID(0x10b0, 0x0219) },
  55. { OXYGEN_PCI_SUBID(0x13f6, 0x0001) },
  56. { OXYGEN_PCI_SUBID(0x13f6, 0x0010) },
  57. { OXYGEN_PCI_SUBID(0x13f6, 0x8788) },
  58. { OXYGEN_PCI_SUBID(0x147a, 0xa017) },
  59. { OXYGEN_PCI_SUBID(0x1a58, 0x0910) },
  60. { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = 1 },
  61. { OXYGEN_PCI_SUBID(0x7284, 0x9761) },
  62. { }
  63. };
  64. MODULE_DEVICE_TABLE(pci, oxygen_ids);
  65. #define GPIO_AK5385_DFS_MASK 0x0003
  66. #define GPIO_AK5385_DFS_NORMAL 0x0000
  67. #define GPIO_AK5385_DFS_DOUBLE 0x0001
  68. #define GPIO_AK5385_DFS_QUAD 0x0002
  69. #define WM8785_R0 0
  70. #define WM8785_R1 1
  71. #define WM8785_R2 2
  72. #define WM8785_R7 7
  73. /* R0 */
  74. #define WM8785_MCR_MASK 0x007
  75. #define WM8785_MCR_SLAVE 0x000
  76. #define WM8785_MCR_MASTER_128 0x001
  77. #define WM8785_MCR_MASTER_192 0x002
  78. #define WM8785_MCR_MASTER_256 0x003
  79. #define WM8785_MCR_MASTER_384 0x004
  80. #define WM8785_MCR_MASTER_512 0x005
  81. #define WM8785_MCR_MASTER_768 0x006
  82. #define WM8785_OSR_MASK 0x018
  83. #define WM8785_OSR_SINGLE 0x000
  84. #define WM8785_OSR_DOUBLE 0x008
  85. #define WM8785_OSR_QUAD 0x010
  86. #define WM8785_FORMAT_MASK 0x060
  87. #define WM8785_FORMAT_RJUST 0x000
  88. #define WM8785_FORMAT_LJUST 0x020
  89. #define WM8785_FORMAT_I2S 0x040
  90. #define WM8785_FORMAT_DSP 0x060
  91. /* R1 */
  92. #define WM8785_WL_MASK 0x003
  93. #define WM8785_WL_16 0x000
  94. #define WM8785_WL_20 0x001
  95. #define WM8785_WL_24 0x002
  96. #define WM8785_WL_32 0x003
  97. #define WM8785_LRP 0x004
  98. #define WM8785_BCLKINV 0x008
  99. #define WM8785_LRSWAP 0x010
  100. #define WM8785_DEVNO_MASK 0x0e0
  101. /* R2 */
  102. #define WM8785_HPFR 0x001
  103. #define WM8785_HPFL 0x002
  104. #define WM8785_SDODIS 0x004
  105. #define WM8785_PWRDNR 0x008
  106. #define WM8785_PWRDNL 0x010
  107. #define WM8785_TDM_MASK 0x1c0
  108. struct generic_data {
  109. u8 ak4396_ctl2;
  110. };
  111. static void ak4396_write(struct oxygen *chip, unsigned int codec,
  112. u8 reg, u8 value)
  113. {
  114. /* maps ALSA channel pair number to SPI output */
  115. static const u8 codec_spi_map[4] = {
  116. 0, 1, 2, 4
  117. };
  118. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  119. OXYGEN_SPI_DATA_LENGTH_2 |
  120. OXYGEN_SPI_CLOCK_320 |
  121. (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
  122. OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
  123. AK4396_WRITE | (reg << 8) | value);
  124. }
  125. static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
  126. {
  127. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  128. OXYGEN_SPI_DATA_LENGTH_2 |
  129. OXYGEN_SPI_CLOCK_320 |
  130. (3 << OXYGEN_SPI_CODEC_SHIFT) |
  131. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  132. (reg << 9) | value);
  133. }
  134. static void ak4396_init(struct oxygen *chip)
  135. {
  136. struct generic_data *data = chip->model_data;
  137. unsigned int i;
  138. data->ak4396_ctl2 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
  139. for (i = 0; i < 4; ++i) {
  140. ak4396_write(chip, i,
  141. AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
  142. ak4396_write(chip, i,
  143. AK4396_CONTROL_2, data->ak4396_ctl2);
  144. ak4396_write(chip, i,
  145. AK4396_CONTROL_3, AK4396_PCM);
  146. ak4396_write(chip, i, AK4396_LCH_ATT, 0xff);
  147. ak4396_write(chip, i, AK4396_RCH_ATT, 0xff);
  148. }
  149. snd_component_add(chip->card, "AK4396");
  150. }
  151. static void ak5385_init(struct oxygen *chip)
  152. {
  153. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
  154. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
  155. snd_component_add(chip->card, "AK5385");
  156. }
  157. static void wm8785_init(struct oxygen *chip)
  158. {
  159. wm8785_write(chip, WM8785_R7, 0);
  160. wm8785_write(chip, WM8785_R0, WM8785_MCR_SLAVE |
  161. WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST);
  162. wm8785_write(chip, WM8785_R1, WM8785_WL_24);
  163. snd_component_add(chip->card, "WM8785");
  164. }
  165. static void generic_init(struct oxygen *chip)
  166. {
  167. ak4396_init(chip);
  168. wm8785_init(chip);
  169. }
  170. static void meridian_init(struct oxygen *chip)
  171. {
  172. ak4396_init(chip);
  173. ak5385_init(chip);
  174. }
  175. static void generic_cleanup(struct oxygen *chip)
  176. {
  177. }
  178. static void set_ak4396_params(struct oxygen *chip,
  179. struct snd_pcm_hw_params *params)
  180. {
  181. struct generic_data *data = chip->model_data;
  182. unsigned int i;
  183. u8 value;
  184. value = data->ak4396_ctl2 & ~AK4396_DFS_MASK;
  185. if (params_rate(params) <= 54000)
  186. value |= AK4396_DFS_NORMAL;
  187. else if (params_rate(params) <= 108000)
  188. value |= AK4396_DFS_DOUBLE;
  189. else
  190. value |= AK4396_DFS_QUAD;
  191. data->ak4396_ctl2 = value;
  192. for (i = 0; i < 4; ++i) {
  193. ak4396_write(chip, i,
  194. AK4396_CONTROL_1, AK4396_DIF_24_MSB);
  195. ak4396_write(chip, i,
  196. AK4396_CONTROL_2, value);
  197. ak4396_write(chip, i,
  198. AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
  199. }
  200. }
  201. static void update_ak4396_volume(struct oxygen *chip)
  202. {
  203. unsigned int i;
  204. for (i = 0; i < 4; ++i) {
  205. ak4396_write(chip, i,
  206. AK4396_LCH_ATT, chip->dac_volume[i * 2]);
  207. ak4396_write(chip, i,
  208. AK4396_RCH_ATT, chip->dac_volume[i * 2 + 1]);
  209. }
  210. }
  211. static void update_ak4396_mute(struct oxygen *chip)
  212. {
  213. struct generic_data *data = chip->model_data;
  214. unsigned int i;
  215. u8 value;
  216. value = data->ak4396_ctl2 & ~AK4396_SMUTE;
  217. if (chip->dac_mute)
  218. value |= AK4396_SMUTE;
  219. data->ak4396_ctl2 = value;
  220. for (i = 0; i < 4; ++i)
  221. ak4396_write(chip, i, AK4396_CONTROL_2, value);
  222. }
  223. static void set_wm8785_params(struct oxygen *chip,
  224. struct snd_pcm_hw_params *params)
  225. {
  226. unsigned int value;
  227. wm8785_write(chip, WM8785_R7, 0);
  228. value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
  229. if (params_rate(params) <= 48000)
  230. value |= WM8785_OSR_SINGLE;
  231. else if (params_rate(params) <= 96000)
  232. value |= WM8785_OSR_DOUBLE;
  233. else
  234. value |= WM8785_OSR_QUAD;
  235. wm8785_write(chip, WM8785_R0, value);
  236. if (snd_pcm_format_width(params_format(params)) <= 16)
  237. value = WM8785_WL_16;
  238. else
  239. value = WM8785_WL_24;
  240. wm8785_write(chip, WM8785_R1, value);
  241. }
  242. static void set_ak5385_params(struct oxygen *chip,
  243. struct snd_pcm_hw_params *params)
  244. {
  245. unsigned int value;
  246. if (params_rate(params) <= 54000)
  247. value = GPIO_AK5385_DFS_NORMAL;
  248. else if (params_rate(params) <= 108000)
  249. value = GPIO_AK5385_DFS_DOUBLE;
  250. else
  251. value = GPIO_AK5385_DFS_QUAD;
  252. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  253. value, GPIO_AK5385_DFS_MASK);
  254. }
  255. static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
  256. static int ak4396_control_filter(struct snd_kcontrol_new *template)
  257. {
  258. if (!strcmp(template->name, "Master Playback Volume")) {
  259. template->access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  260. template->tlv.p = ak4396_db_scale;
  261. }
  262. return 0;
  263. }
  264. static const struct oxygen_model model_generic = {
  265. .shortname = "C-Media CMI8788",
  266. .longname = "C-Media Oxygen HD Audio",
  267. .chip = "CMI8788",
  268. .owner = THIS_MODULE,
  269. .init = generic_init,
  270. .control_filter = ak4396_control_filter,
  271. .cleanup = generic_cleanup,
  272. .set_dac_params = set_ak4396_params,
  273. .set_adc_params = set_wm8785_params,
  274. .update_dac_volume = update_ak4396_volume,
  275. .update_dac_mute = update_ak4396_mute,
  276. .model_data_size = sizeof(struct generic_data),
  277. .dac_channels = 8,
  278. .used_channels = OXYGEN_CHANNEL_A |
  279. OXYGEN_CHANNEL_C |
  280. OXYGEN_CHANNEL_SPDIF |
  281. OXYGEN_CHANNEL_MULTICH |
  282. OXYGEN_CHANNEL_AC97,
  283. .function_flags = OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  284. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  285. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  286. };
  287. static const struct oxygen_model model_meridian = {
  288. .shortname = "C-Media CMI8788",
  289. .longname = "C-Media Oxygen HD Audio",
  290. .chip = "CMI8788",
  291. .owner = THIS_MODULE,
  292. .init = meridian_init,
  293. .control_filter = ak4396_control_filter,
  294. .cleanup = generic_cleanup,
  295. .set_dac_params = set_ak4396_params,
  296. .set_adc_params = set_ak5385_params,
  297. .update_dac_volume = update_ak4396_volume,
  298. .update_dac_mute = update_ak4396_mute,
  299. .model_data_size = sizeof(struct generic_data),
  300. .dac_channels = 8,
  301. .used_channels = OXYGEN_CHANNEL_B |
  302. OXYGEN_CHANNEL_C |
  303. OXYGEN_CHANNEL_SPDIF |
  304. OXYGEN_CHANNEL_MULTICH |
  305. OXYGEN_CHANNEL_AC97,
  306. .function_flags = OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  307. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  308. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  309. };
  310. static int __devinit generic_oxygen_probe(struct pci_dev *pci,
  311. const struct pci_device_id *pci_id)
  312. {
  313. static int dev;
  314. int is_meridian;
  315. int err;
  316. if (dev >= SNDRV_CARDS)
  317. return -ENODEV;
  318. if (!enable[dev]) {
  319. ++dev;
  320. return -ENOENT;
  321. }
  322. is_meridian = pci_id->driver_data;
  323. err = oxygen_pci_probe(pci, index[dev], id[dev], is_meridian,
  324. is_meridian ? &model_meridian : &model_generic);
  325. if (err >= 0)
  326. ++dev;
  327. return err;
  328. }
  329. static struct pci_driver oxygen_driver = {
  330. .name = "CMI8788",
  331. .id_table = oxygen_ids,
  332. .probe = generic_oxygen_probe,
  333. .remove = __devexit_p(oxygen_pci_remove),
  334. };
  335. static int __init alsa_card_oxygen_init(void)
  336. {
  337. return pci_register_driver(&oxygen_driver);
  338. }
  339. static void __exit alsa_card_oxygen_exit(void)
  340. {
  341. pci_unregister_driver(&oxygen_driver);
  342. }
  343. module_init(alsa_card_oxygen_init)
  344. module_exit(alsa_card_oxygen_exit)