cx23885-cards.c 25 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include "cx23885.h"
  27. #include "tuner-xc2028.h"
  28. #include "netup-init.h"
  29. /* ------------------------------------------------------------------ */
  30. /* board config info */
  31. struct cx23885_board cx23885_boards[] = {
  32. [CX23885_BOARD_UNKNOWN] = {
  33. .name = "UNKNOWN/GENERIC",
  34. /* Ensure safe default for unknown boards */
  35. .clk_freq = 0,
  36. .input = {{
  37. .type = CX23885_VMUX_COMPOSITE1,
  38. .vmux = 0,
  39. }, {
  40. .type = CX23885_VMUX_COMPOSITE2,
  41. .vmux = 1,
  42. }, {
  43. .type = CX23885_VMUX_COMPOSITE3,
  44. .vmux = 2,
  45. }, {
  46. .type = CX23885_VMUX_COMPOSITE4,
  47. .vmux = 3,
  48. } },
  49. },
  50. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  51. .name = "Hauppauge WinTV-HVR1800lp",
  52. .portc = CX23885_MPEG_DVB,
  53. .input = {{
  54. .type = CX23885_VMUX_TELEVISION,
  55. .vmux = 0,
  56. .gpio0 = 0xff00,
  57. }, {
  58. .type = CX23885_VMUX_DEBUG,
  59. .vmux = 0,
  60. .gpio0 = 0xff01,
  61. }, {
  62. .type = CX23885_VMUX_COMPOSITE1,
  63. .vmux = 1,
  64. .gpio0 = 0xff02,
  65. }, {
  66. .type = CX23885_VMUX_SVIDEO,
  67. .vmux = 2,
  68. .gpio0 = 0xff02,
  69. } },
  70. },
  71. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  72. .name = "Hauppauge WinTV-HVR1800",
  73. .porta = CX23885_ANALOG_VIDEO,
  74. .portb = CX23885_MPEG_ENCODER,
  75. .portc = CX23885_MPEG_DVB,
  76. .tuner_type = TUNER_PHILIPS_TDA8290,
  77. .tuner_addr = 0x42, /* 0x84 >> 1 */
  78. .input = {{
  79. .type = CX23885_VMUX_TELEVISION,
  80. .vmux = CX25840_VIN7_CH3 |
  81. CX25840_VIN5_CH2 |
  82. CX25840_VIN2_CH1,
  83. .gpio0 = 0,
  84. }, {
  85. .type = CX23885_VMUX_COMPOSITE1,
  86. .vmux = CX25840_VIN7_CH3 |
  87. CX25840_VIN4_CH2 |
  88. CX25840_VIN6_CH1,
  89. .gpio0 = 0,
  90. }, {
  91. .type = CX23885_VMUX_SVIDEO,
  92. .vmux = CX25840_VIN7_CH3 |
  93. CX25840_VIN4_CH2 |
  94. CX25840_VIN8_CH1 |
  95. CX25840_SVIDEO_ON,
  96. .gpio0 = 0,
  97. } },
  98. },
  99. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  100. .name = "Hauppauge WinTV-HVR1250",
  101. .portc = CX23885_MPEG_DVB,
  102. .input = {{
  103. .type = CX23885_VMUX_TELEVISION,
  104. .vmux = 0,
  105. .gpio0 = 0xff00,
  106. }, {
  107. .type = CX23885_VMUX_DEBUG,
  108. .vmux = 0,
  109. .gpio0 = 0xff01,
  110. }, {
  111. .type = CX23885_VMUX_COMPOSITE1,
  112. .vmux = 1,
  113. .gpio0 = 0xff02,
  114. }, {
  115. .type = CX23885_VMUX_SVIDEO,
  116. .vmux = 2,
  117. .gpio0 = 0xff02,
  118. } },
  119. },
  120. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  121. .name = "DViCO FusionHDTV5 Express",
  122. .portb = CX23885_MPEG_DVB,
  123. },
  124. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  125. .name = "Hauppauge WinTV-HVR1500Q",
  126. .portc = CX23885_MPEG_DVB,
  127. },
  128. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  129. .name = "Hauppauge WinTV-HVR1500",
  130. .portc = CX23885_MPEG_DVB,
  131. },
  132. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  133. .name = "Hauppauge WinTV-HVR1200",
  134. .portc = CX23885_MPEG_DVB,
  135. },
  136. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  137. .name = "Hauppauge WinTV-HVR1700",
  138. .portc = CX23885_MPEG_DVB,
  139. },
  140. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  141. .name = "Hauppauge WinTV-HVR1400",
  142. .portc = CX23885_MPEG_DVB,
  143. },
  144. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  145. .name = "DViCO FusionHDTV7 Dual Express",
  146. .portb = CX23885_MPEG_DVB,
  147. .portc = CX23885_MPEG_DVB,
  148. },
  149. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  150. .name = "DViCO FusionHDTV DVB-T Dual Express",
  151. .portb = CX23885_MPEG_DVB,
  152. .portc = CX23885_MPEG_DVB,
  153. },
  154. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  155. .name = "Leadtek Winfast PxDVR3200 H",
  156. .portc = CX23885_MPEG_DVB,
  157. },
  158. [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
  159. .name = "Compro VideoMate E650F",
  160. .portc = CX23885_MPEG_DVB,
  161. },
  162. [CX23885_BOARD_TBS_6920] = {
  163. .name = "TurboSight TBS 6920",
  164. .portb = CX23885_MPEG_DVB,
  165. },
  166. [CX23885_BOARD_TEVII_S470] = {
  167. .name = "TeVii S470",
  168. .portb = CX23885_MPEG_DVB,
  169. },
  170. [CX23885_BOARD_DVBWORLD_2005] = {
  171. .name = "DVBWorld DVB-S2 2005",
  172. .portb = CX23885_MPEG_DVB,
  173. },
  174. [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
  175. .cimax = 1,
  176. .name = "NetUP Dual DVB-S2 CI",
  177. .portb = CX23885_MPEG_DVB,
  178. .portc = CX23885_MPEG_DVB,
  179. },
  180. [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
  181. .name = "Hauppauge WinTV-HVR1270",
  182. .portc = CX23885_MPEG_DVB,
  183. },
  184. [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
  185. .name = "Hauppauge WinTV-HVR1275",
  186. .portc = CX23885_MPEG_DVB,
  187. },
  188. [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
  189. .name = "Hauppauge WinTV-HVR1255",
  190. .portc = CX23885_MPEG_DVB,
  191. },
  192. [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
  193. .name = "Hauppauge WinTV-HVR1210",
  194. .portc = CX23885_MPEG_DVB,
  195. },
  196. [CX23885_BOARD_MYGICA_X8506] = {
  197. .name = "Mygica X8506 DMB-TH",
  198. .portb = CX23885_MPEG_DVB,
  199. },
  200. [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
  201. .name = "Magic-Pro ProHDTV Extreme 2",
  202. .portb = CX23885_MPEG_DVB,
  203. },
  204. };
  205. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  206. /* ------------------------------------------------------------------ */
  207. /* PCI subsystem IDs */
  208. struct cx23885_subid cx23885_subids[] = {
  209. {
  210. .subvendor = 0x0070,
  211. .subdevice = 0x3400,
  212. .card = CX23885_BOARD_UNKNOWN,
  213. }, {
  214. .subvendor = 0x0070,
  215. .subdevice = 0x7600,
  216. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  217. }, {
  218. .subvendor = 0x0070,
  219. .subdevice = 0x7800,
  220. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  221. }, {
  222. .subvendor = 0x0070,
  223. .subdevice = 0x7801,
  224. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  225. }, {
  226. .subvendor = 0x0070,
  227. .subdevice = 0x7809,
  228. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  229. }, {
  230. .subvendor = 0x0070,
  231. .subdevice = 0x7911,
  232. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  233. }, {
  234. .subvendor = 0x18ac,
  235. .subdevice = 0xd500,
  236. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  237. }, {
  238. .subvendor = 0x0070,
  239. .subdevice = 0x7790,
  240. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  241. }, {
  242. .subvendor = 0x0070,
  243. .subdevice = 0x7797,
  244. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  245. }, {
  246. .subvendor = 0x0070,
  247. .subdevice = 0x7710,
  248. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  249. }, {
  250. .subvendor = 0x0070,
  251. .subdevice = 0x7717,
  252. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  253. }, {
  254. .subvendor = 0x0070,
  255. .subdevice = 0x71d1,
  256. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  257. }, {
  258. .subvendor = 0x0070,
  259. .subdevice = 0x71d3,
  260. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  261. }, {
  262. .subvendor = 0x0070,
  263. .subdevice = 0x8101,
  264. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  265. }, {
  266. .subvendor = 0x0070,
  267. .subdevice = 0x8010,
  268. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  269. }, {
  270. .subvendor = 0x18ac,
  271. .subdevice = 0xd618,
  272. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  273. }, {
  274. .subvendor = 0x18ac,
  275. .subdevice = 0xdb78,
  276. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  277. }, {
  278. .subvendor = 0x107d,
  279. .subdevice = 0x6681,
  280. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  281. }, {
  282. .subvendor = 0x185b,
  283. .subdevice = 0xe800,
  284. .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
  285. }, {
  286. .subvendor = 0x6920,
  287. .subdevice = 0x8888,
  288. .card = CX23885_BOARD_TBS_6920,
  289. }, {
  290. .subvendor = 0xd470,
  291. .subdevice = 0x9022,
  292. .card = CX23885_BOARD_TEVII_S470,
  293. }, {
  294. .subvendor = 0x0001,
  295. .subdevice = 0x2005,
  296. .card = CX23885_BOARD_DVBWORLD_2005,
  297. }, {
  298. .subvendor = 0x1b55,
  299. .subdevice = 0x2a2c,
  300. .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
  301. }, {
  302. .subvendor = 0x0070,
  303. .subdevice = 0x2211,
  304. .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
  305. }, {
  306. .subvendor = 0x0070,
  307. .subdevice = 0x2215,
  308. .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
  309. }, {
  310. .subvendor = 0x0070,
  311. .subdevice = 0x2251,
  312. .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
  313. }, {
  314. .subvendor = 0x0070,
  315. .subdevice = 0x2291,
  316. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  317. }, {
  318. .subvendor = 0x0070,
  319. .subdevice = 0x2295,
  320. .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
  321. }, {
  322. .subvendor = 0x14f1,
  323. .subdevice = 0x8651,
  324. .card = CX23885_BOARD_MYGICA_X8506,
  325. }, {
  326. .subvendor = 0x14f1,
  327. .subdevice = 0x8657,
  328. .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
  329. },
  330. };
  331. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  332. void cx23885_card_list(struct cx23885_dev *dev)
  333. {
  334. int i;
  335. if (0 == dev->pci->subsystem_vendor &&
  336. 0 == dev->pci->subsystem_device) {
  337. printk(KERN_INFO
  338. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  339. "%s: be autodetected. Pass card=<n> insmod option\n"
  340. "%s: to workaround that. Redirect complaints to the\n"
  341. "%s: vendor of the TV card. Best regards,\n"
  342. "%s: -- tux\n",
  343. dev->name, dev->name, dev->name, dev->name, dev->name);
  344. } else {
  345. printk(KERN_INFO
  346. "%s: Your board isn't known (yet) to the driver.\n"
  347. "%s: Try to pick one of the existing card configs via\n"
  348. "%s: card=<n> insmod option. Updating to the latest\n"
  349. "%s: version might help as well.\n",
  350. dev->name, dev->name, dev->name, dev->name);
  351. }
  352. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  353. dev->name);
  354. for (i = 0; i < cx23885_bcount; i++)
  355. printk(KERN_INFO "%s: card=%d -> %s\n",
  356. dev->name, i, cx23885_boards[i].name);
  357. }
  358. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  359. {
  360. struct tveeprom tv;
  361. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  362. eeprom_data);
  363. /* Make sure we support the board model */
  364. switch (tv.model) {
  365. case 22001:
  366. /* WinTV-HVR1270 (PCIe, Retail, half height)
  367. * ATSC/QAM and basic analog, IR Blast */
  368. case 22009:
  369. /* WinTV-HVR1210 (PCIe, Retail, half height)
  370. * DVB-T and basic analog, IR Blast */
  371. case 22011:
  372. /* WinTV-HVR1270 (PCIe, Retail, half height)
  373. * ATSC/QAM and basic analog, IR Recv */
  374. case 22019:
  375. /* WinTV-HVR1210 (PCIe, Retail, half height)
  376. * DVB-T and basic analog, IR Recv */
  377. case 22021:
  378. /* WinTV-HVR1275 (PCIe, Retail, half height)
  379. * ATSC/QAM and basic analog, IR Recv */
  380. case 22029:
  381. /* WinTV-HVR1210 (PCIe, Retail, half height)
  382. * DVB-T and basic analog, IR Recv */
  383. case 22101:
  384. /* WinTV-HVR1270 (PCIe, Retail, full height)
  385. * ATSC/QAM and basic analog, IR Blast */
  386. case 22109:
  387. /* WinTV-HVR1210 (PCIe, Retail, full height)
  388. * DVB-T and basic analog, IR Blast */
  389. case 22111:
  390. /* WinTV-HVR1270 (PCIe, Retail, full height)
  391. * ATSC/QAM and basic analog, IR Recv */
  392. case 22119:
  393. /* WinTV-HVR1210 (PCIe, Retail, full height)
  394. * DVB-T and basic analog, IR Recv */
  395. case 22121:
  396. /* WinTV-HVR1275 (PCIe, Retail, full height)
  397. * ATSC/QAM and basic analog, IR Recv */
  398. case 22129:
  399. /* WinTV-HVR1210 (PCIe, Retail, full height)
  400. * DVB-T and basic analog, IR Recv */
  401. case 71009:
  402. /* WinTV-HVR1200 (PCIe, Retail, full height)
  403. * DVB-T and basic analog */
  404. case 71359:
  405. /* WinTV-HVR1200 (PCIe, OEM, half height)
  406. * DVB-T and basic analog */
  407. case 71439:
  408. /* WinTV-HVR1200 (PCIe, OEM, half height)
  409. * DVB-T and basic analog */
  410. case 71449:
  411. /* WinTV-HVR1200 (PCIe, OEM, full height)
  412. * DVB-T and basic analog */
  413. case 71939:
  414. /* WinTV-HVR1200 (PCIe, OEM, half height)
  415. * DVB-T and basic analog */
  416. case 71949:
  417. /* WinTV-HVR1200 (PCIe, OEM, full height)
  418. * DVB-T and basic analog */
  419. case 71959:
  420. /* WinTV-HVR1200 (PCIe, OEM, full height)
  421. * DVB-T and basic analog */
  422. case 71979:
  423. /* WinTV-HVR1200 (PCIe, OEM, half height)
  424. * DVB-T and basic analog */
  425. case 71999:
  426. /* WinTV-HVR1200 (PCIe, OEM, full height)
  427. * DVB-T and basic analog */
  428. case 76601:
  429. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  430. channel ATSC and MPEG2 HW Encoder */
  431. case 77001:
  432. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  433. and Basic analog */
  434. case 77011:
  435. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  436. and Basic analog */
  437. case 77041:
  438. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  439. and Basic analog */
  440. case 77051:
  441. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  442. and Basic analog */
  443. case 78011:
  444. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  445. Dual channel ATSC and MPEG2 HW Encoder */
  446. case 78501:
  447. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  448. Dual channel ATSC and MPEG2 HW Encoder */
  449. case 78521:
  450. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  451. Dual channel ATSC and MPEG2 HW Encoder */
  452. case 78531:
  453. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  454. Dual channel ATSC and MPEG2 HW Encoder */
  455. case 78631:
  456. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  457. Dual channel ATSC and MPEG2 HW Encoder */
  458. case 79001:
  459. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  460. ATSC and Basic analog */
  461. case 79101:
  462. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  463. ATSC and Basic analog */
  464. case 79561:
  465. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  466. ATSC and Basic analog */
  467. case 79571:
  468. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  469. ATSC and Basic analog */
  470. case 79671:
  471. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  472. ATSC and Basic analog */
  473. case 80019:
  474. /* WinTV-HVR1400 (Express Card, Retail, IR,
  475. * DVB-T and Basic analog */
  476. case 81509:
  477. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  478. * DVB-T and MPEG2 HW Encoder */
  479. case 81519:
  480. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  481. * DVB-T and MPEG2 HW Encoder */
  482. break;
  483. default:
  484. printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
  485. dev->name, tv.model);
  486. break;
  487. }
  488. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  489. dev->name, tv.model);
  490. }
  491. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  492. {
  493. struct cx23885_tsport *port = priv;
  494. struct cx23885_dev *dev = port->dev;
  495. u32 bitmask = 0;
  496. if (command == XC2028_RESET_CLK)
  497. return 0;
  498. if (command != 0) {
  499. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  500. __func__, command);
  501. return -EINVAL;
  502. }
  503. switch (dev->board) {
  504. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  505. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  506. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  507. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  508. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  509. /* Tuner Reset Command */
  510. bitmask = 0x04;
  511. break;
  512. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  513. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  514. /* Two identical tuners on two different i2c buses,
  515. * we need to reset the correct gpio. */
  516. if (port->nr == 1)
  517. bitmask = 0x01;
  518. else if (port->nr == 2)
  519. bitmask = 0x04;
  520. break;
  521. }
  522. if (bitmask) {
  523. /* Drive the tuner into reset and back out */
  524. cx_clear(GP0_IO, bitmask);
  525. mdelay(200);
  526. cx_set(GP0_IO, bitmask);
  527. }
  528. return 0;
  529. }
  530. void cx23885_gpio_setup(struct cx23885_dev *dev)
  531. {
  532. switch (dev->board) {
  533. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  534. /* GPIO-0 cx24227 demodulator reset */
  535. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  536. break;
  537. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  538. /* GPIO-0 cx24227 demodulator */
  539. /* GPIO-2 xc3028 tuner */
  540. /* Put the parts into reset */
  541. cx_set(GP0_IO, 0x00050000);
  542. cx_clear(GP0_IO, 0x00000005);
  543. msleep(5);
  544. /* Bring the parts out of reset */
  545. cx_set(GP0_IO, 0x00050005);
  546. break;
  547. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  548. /* GPIO-0 cx24227 demodulator reset */
  549. /* GPIO-2 xc5000 tuner reset */
  550. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  551. break;
  552. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  553. /* GPIO-0 656_CLK */
  554. /* GPIO-1 656_D0 */
  555. /* GPIO-2 8295A Reset */
  556. /* GPIO-3-10 cx23417 data0-7 */
  557. /* GPIO-11-14 cx23417 addr0-3 */
  558. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  559. /* GPIO-19 IR_RX */
  560. /* CX23417 GPIO's */
  561. /* EIO15 Zilog Reset */
  562. /* EIO14 S5H1409/CX24227 Reset */
  563. /* Force the TDA8295A into reset and back */
  564. cx_set(GP0_IO, 0x00040004);
  565. mdelay(20);
  566. cx_clear(GP0_IO, 0x00000004);
  567. mdelay(20);
  568. cx_set(GP0_IO, 0x00040004);
  569. mdelay(20);
  570. break;
  571. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  572. /* GPIO-0 tda10048 demodulator reset */
  573. /* GPIO-2 tda18271 tuner reset */
  574. /* Put the parts into reset and back */
  575. cx_set(GP0_IO, 0x00050000);
  576. mdelay(20);
  577. cx_clear(GP0_IO, 0x00000005);
  578. mdelay(20);
  579. cx_set(GP0_IO, 0x00050005);
  580. break;
  581. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  582. /* GPIO-0 TDA10048 demodulator reset */
  583. /* GPIO-2 TDA8295A Reset */
  584. /* GPIO-3-10 cx23417 data0-7 */
  585. /* GPIO-11-14 cx23417 addr0-3 */
  586. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  587. /* The following GPIO's are on the interna AVCore (cx25840) */
  588. /* GPIO-19 IR_RX */
  589. /* GPIO-20 IR_TX 416/DVBT Select */
  590. /* GPIO-21 IIS DAT */
  591. /* GPIO-22 IIS WCLK */
  592. /* GPIO-23 IIS BCLK */
  593. /* Put the parts into reset and back */
  594. cx_set(GP0_IO, 0x00050000);
  595. mdelay(20);
  596. cx_clear(GP0_IO, 0x00000005);
  597. mdelay(20);
  598. cx_set(GP0_IO, 0x00050005);
  599. break;
  600. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  601. /* GPIO-0 Dibcom7000p demodulator reset */
  602. /* GPIO-2 xc3028L tuner reset */
  603. /* GPIO-13 LED */
  604. /* Put the parts into reset and back */
  605. cx_set(GP0_IO, 0x00050000);
  606. mdelay(20);
  607. cx_clear(GP0_IO, 0x00000005);
  608. mdelay(20);
  609. cx_set(GP0_IO, 0x00050005);
  610. break;
  611. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  612. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  613. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  614. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  615. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  616. /* Put the parts into reset and back */
  617. cx_set(GP0_IO, 0x000f0000);
  618. mdelay(20);
  619. cx_clear(GP0_IO, 0x0000000f);
  620. mdelay(20);
  621. cx_set(GP0_IO, 0x000f000f);
  622. break;
  623. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  624. /* GPIO-0 portb xc3028 reset */
  625. /* GPIO-1 portb zl10353 reset */
  626. /* GPIO-2 portc xc3028 reset */
  627. /* GPIO-3 portc zl10353 reset */
  628. /* Put the parts into reset and back */
  629. cx_set(GP0_IO, 0x000f0000);
  630. mdelay(20);
  631. cx_clear(GP0_IO, 0x0000000f);
  632. mdelay(20);
  633. cx_set(GP0_IO, 0x000f000f);
  634. break;
  635. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  636. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  637. /* GPIO-2 xc3028 tuner reset */
  638. /* The following GPIO's are on the internal AVCore (cx25840) */
  639. /* GPIO-? zl10353 demod reset */
  640. /* Put the parts into reset and back */
  641. cx_set(GP0_IO, 0x00040000);
  642. mdelay(20);
  643. cx_clear(GP0_IO, 0x00000004);
  644. mdelay(20);
  645. cx_set(GP0_IO, 0x00040004);
  646. break;
  647. case CX23885_BOARD_TBS_6920:
  648. case CX23885_BOARD_TEVII_S470:
  649. cx_write(MC417_CTL, 0x00000036);
  650. cx_write(MC417_OEN, 0x00001000);
  651. cx_write(MC417_RWD, 0x00001800);
  652. break;
  653. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  654. /* GPIO-0 INTA from CiMax1
  655. GPIO-1 INTB from CiMax2
  656. GPIO-2 reset chips
  657. GPIO-3 to GPIO-10 data/addr for CA
  658. GPIO-11 ~CS0 to CiMax1
  659. GPIO-12 ~CS1 to CiMax2
  660. GPIO-13 ADL0 load LSB addr
  661. GPIO-14 ADL1 load MSB addr
  662. GPIO-15 ~RDY from CiMax
  663. GPIO-17 ~RD to CiMax
  664. GPIO-18 ~WR to CiMax
  665. */
  666. cx_set(GP0_IO, 0x00040000); /* GPIO as out */
  667. /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
  668. cx_clear(GP0_IO, 0x00030004);
  669. mdelay(100);/* reset delay */
  670. cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
  671. cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
  672. /* GPIO-15 IN as ~ACK, rest as OUT */
  673. cx_write(MC417_OEN, 0x00001000);
  674. /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
  675. cx_write(MC417_RWD, 0x0000c300);
  676. /* enable irq */
  677. cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
  678. break;
  679. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  680. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  681. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  682. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  683. /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
  684. /* GPIO-6 I2C Gate which can isolate the demod from the bus */
  685. /* GPIO-9 Demod reset */
  686. /* Put the parts into reset and back */
  687. cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
  688. cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
  689. cx23885_gpio_clear(dev, GPIO_9);
  690. mdelay(20);
  691. cx23885_gpio_set(dev, GPIO_9);
  692. break;
  693. case CX23885_BOARD_MYGICA_X8506:
  694. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  695. /* GPIO-1 reset XC5000 */
  696. /* GPIO-2 reset LGS8GL5 / LGS8G75 */
  697. cx_set(GP0_IO, 0x00060000);
  698. cx_clear(GP0_IO, 0x00000006);
  699. mdelay(100);
  700. cx_set(GP0_IO, 0x00060006);
  701. mdelay(100);
  702. break;
  703. }
  704. }
  705. int cx23885_ir_init(struct cx23885_dev *dev)
  706. {
  707. switch (dev->board) {
  708. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  709. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  710. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  711. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  712. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  713. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  714. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  715. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  716. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  717. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  718. /* FIXME: Implement me */
  719. break;
  720. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  721. request_module("ir-kbd-i2c");
  722. break;
  723. }
  724. return 0;
  725. }
  726. void cx23885_card_setup(struct cx23885_dev *dev)
  727. {
  728. struct cx23885_tsport *ts1 = &dev->ts1;
  729. struct cx23885_tsport *ts2 = &dev->ts2;
  730. static u8 eeprom[256];
  731. if (dev->i2c_bus[0].i2c_rc == 0) {
  732. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  733. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  734. eeprom, sizeof(eeprom));
  735. }
  736. switch (dev->board) {
  737. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  738. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  739. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  740. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  741. if (dev->i2c_bus[0].i2c_rc == 0)
  742. hauppauge_eeprom(dev, eeprom+0x80);
  743. break;
  744. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  745. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  746. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  747. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  748. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  749. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  750. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  751. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  752. if (dev->i2c_bus[0].i2c_rc == 0)
  753. hauppauge_eeprom(dev, eeprom+0xc0);
  754. break;
  755. }
  756. switch (dev->board) {
  757. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  758. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  759. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  760. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  761. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  762. /* break omitted intentionally */
  763. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  764. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  765. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  766. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  767. break;
  768. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  769. /* Defaults for VID B - Analog encoder */
  770. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  771. ts1->gen_ctrl_val = 0x10e;
  772. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  773. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  774. /* APB_TSVALERR_POL (active low)*/
  775. ts1->vld_misc_val = 0x2000;
  776. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  777. /* Defaults for VID C */
  778. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  779. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  780. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  781. break;
  782. case CX23885_BOARD_TEVII_S470:
  783. case CX23885_BOARD_TBS_6920:
  784. case CX23885_BOARD_DVBWORLD_2005:
  785. ts1->gen_ctrl_val = 0x5; /* Parallel */
  786. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  787. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  788. break;
  789. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  790. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  791. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  792. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  793. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  794. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  795. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  796. break;
  797. case CX23885_BOARD_MYGICA_X8506:
  798. case CX23885_BOARD_MAGICPRO_PROHDTVE2:
  799. ts1->gen_ctrl_val = 0x5; /* Parallel */
  800. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  801. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  802. break;
  803. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  804. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  805. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  806. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  807. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  808. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  809. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  810. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  811. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  812. case CX23885_BOARD_HAUPPAUGE_HVR1270:
  813. case CX23885_BOARD_HAUPPAUGE_HVR1275:
  814. case CX23885_BOARD_HAUPPAUGE_HVR1255:
  815. case CX23885_BOARD_HAUPPAUGE_HVR1210:
  816. default:
  817. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  818. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  819. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  820. }
  821. /* Certain boards support analog, or require the avcore to be
  822. * loaded, ensure this happens.
  823. */
  824. switch (dev->board) {
  825. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  826. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  827. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  828. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  829. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  830. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  831. dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
  832. &dev->i2c_bus[2].i2c_adap,
  833. "cx25840", "cx25840", 0x88 >> 1);
  834. v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
  835. break;
  836. }
  837. /* AUX-PLL 27MHz CLK */
  838. switch (dev->board) {
  839. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  840. netup_initialize(dev);
  841. break;
  842. }
  843. }
  844. /* ------------------------------------------------------------------ */