stamp.c 75 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/io.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/nand.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/mtd/plat-ram.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/spi/spi.h>
  18. #include <linux/spi/flash.h>
  19. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  20. #include <linux/usb/isp1362.h>
  21. #endif
  22. #include <linux/i2c.h>
  23. #include <linux/i2c/adp5588.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/ata_platform.h>
  26. #include <linux/irq.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/usb/sl811.h>
  29. #include <linux/spi/mmc_spi.h>
  30. #include <linux/leds.h>
  31. #include <linux/input.h>
  32. #include <asm/dma.h>
  33. #include <asm/bfin5xx_spi.h>
  34. #include <asm/reboot.h>
  35. #include <asm/portmux.h>
  36. #include <asm/dpmc.h>
  37. #include <asm/bfin_sport.h>
  38. #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
  39. #include <linux/regulator/fixed.h>
  40. #endif
  41. #include <linux/regulator/machine.h>
  42. #include <linux/regulator/consumer.h>
  43. #include <linux/regulator/userspace-consumer.h>
  44. /*
  45. * Name the Board for the /proc/cpuinfo
  46. */
  47. const char bfin_board_name[] = "ADI BF537-STAMP";
  48. /*
  49. * Driver needs to know address, irq and flag pin.
  50. */
  51. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  52. #include <linux/usb/isp1760.h>
  53. static struct resource bfin_isp1760_resources[] = {
  54. [0] = {
  55. .start = 0x203C0000,
  56. .end = 0x203C0000 + 0x000fffff,
  57. .flags = IORESOURCE_MEM,
  58. },
  59. [1] = {
  60. .start = IRQ_PF7,
  61. .end = IRQ_PF7,
  62. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  63. },
  64. };
  65. static struct isp1760_platform_data isp1760_priv = {
  66. .is_isp1761 = 0,
  67. .bus_width_16 = 1,
  68. .port1_otg = 0,
  69. .analog_oc = 0,
  70. .dack_polarity_high = 0,
  71. .dreq_polarity_high = 0,
  72. };
  73. static struct platform_device bfin_isp1760_device = {
  74. .name = "isp1760",
  75. .id = 0,
  76. .dev = {
  77. .platform_data = &isp1760_priv,
  78. },
  79. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  80. .resource = bfin_isp1760_resources,
  81. };
  82. #endif
  83. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  84. #include <linux/gpio_keys.h>
  85. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  86. {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
  87. {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
  88. {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
  89. {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
  90. };
  91. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  92. .buttons = bfin_gpio_keys_table,
  93. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  94. };
  95. static struct platform_device bfin_device_gpiokeys = {
  96. .name = "gpio-keys",
  97. .dev = {
  98. .platform_data = &bfin_gpio_keys_data,
  99. },
  100. };
  101. #endif
  102. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  103. static struct resource bfin_pcmcia_cf_resources[] = {
  104. {
  105. .start = 0x20310000, /* IO PORT */
  106. .end = 0x20312000,
  107. .flags = IORESOURCE_MEM,
  108. }, {
  109. .start = 0x20311000, /* Attribute Memory */
  110. .end = 0x20311FFF,
  111. .flags = IORESOURCE_MEM,
  112. }, {
  113. .start = IRQ_PF4,
  114. .end = IRQ_PF4,
  115. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  116. }, {
  117. .start = 6, /* Card Detect PF6 */
  118. .end = 6,
  119. .flags = IORESOURCE_IRQ,
  120. },
  121. };
  122. static struct platform_device bfin_pcmcia_cf_device = {
  123. .name = "bfin_cf_pcmcia",
  124. .id = -1,
  125. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  126. .resource = bfin_pcmcia_cf_resources,
  127. };
  128. #endif
  129. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  130. static struct platform_device rtc_device = {
  131. .name = "rtc-bfin",
  132. .id = -1,
  133. };
  134. #endif
  135. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  136. #include <linux/smc91x.h>
  137. static struct smc91x_platdata smc91x_info = {
  138. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  139. .leda = RPC_LED_100_10,
  140. .ledb = RPC_LED_TX_RX,
  141. };
  142. static struct resource smc91x_resources[] = {
  143. {
  144. .name = "smc91x-regs",
  145. .start = 0x20300300,
  146. .end = 0x20300300 + 16,
  147. .flags = IORESOURCE_MEM,
  148. }, {
  149. .start = IRQ_PF7,
  150. .end = IRQ_PF7,
  151. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  152. },
  153. };
  154. static struct platform_device smc91x_device = {
  155. .name = "smc91x",
  156. .id = 0,
  157. .num_resources = ARRAY_SIZE(smc91x_resources),
  158. .resource = smc91x_resources,
  159. .dev = {
  160. .platform_data = &smc91x_info,
  161. },
  162. };
  163. #endif
  164. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  165. static struct resource dm9000_resources[] = {
  166. [0] = {
  167. .start = 0x203FB800,
  168. .end = 0x203FB800 + 1,
  169. .flags = IORESOURCE_MEM,
  170. },
  171. [1] = {
  172. .start = 0x203FB804,
  173. .end = 0x203FB804 + 1,
  174. .flags = IORESOURCE_MEM,
  175. },
  176. [2] = {
  177. .start = IRQ_PF9,
  178. .end = IRQ_PF9,
  179. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  180. },
  181. };
  182. static struct platform_device dm9000_device = {
  183. .name = "dm9000",
  184. .id = -1,
  185. .num_resources = ARRAY_SIZE(dm9000_resources),
  186. .resource = dm9000_resources,
  187. };
  188. #endif
  189. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  190. static struct resource sl811_hcd_resources[] = {
  191. {
  192. .start = 0x20340000,
  193. .end = 0x20340000,
  194. .flags = IORESOURCE_MEM,
  195. }, {
  196. .start = 0x20340004,
  197. .end = 0x20340004,
  198. .flags = IORESOURCE_MEM,
  199. }, {
  200. .start = IRQ_PF4,
  201. .end = IRQ_PF4,
  202. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  203. },
  204. };
  205. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  206. void sl811_port_power(struct device *dev, int is_on)
  207. {
  208. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  209. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  210. }
  211. #endif
  212. static struct sl811_platform_data sl811_priv = {
  213. .potpg = 10,
  214. .power = 250, /* == 500mA */
  215. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  216. .port_power = &sl811_port_power,
  217. #endif
  218. };
  219. static struct platform_device sl811_hcd_device = {
  220. .name = "sl811-hcd",
  221. .id = 0,
  222. .dev = {
  223. .platform_data = &sl811_priv,
  224. },
  225. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  226. .resource = sl811_hcd_resources,
  227. };
  228. #endif
  229. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  230. static struct resource isp1362_hcd_resources[] = {
  231. {
  232. .start = 0x20360000,
  233. .end = 0x20360000,
  234. .flags = IORESOURCE_MEM,
  235. }, {
  236. .start = 0x20360004,
  237. .end = 0x20360004,
  238. .flags = IORESOURCE_MEM,
  239. }, {
  240. .start = IRQ_PF3,
  241. .end = IRQ_PF3,
  242. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  243. },
  244. };
  245. static struct isp1362_platform_data isp1362_priv = {
  246. .sel15Kres = 1,
  247. .clknotstop = 0,
  248. .oc_enable = 0,
  249. .int_act_high = 0,
  250. .int_edge_triggered = 0,
  251. .remote_wakeup_connected = 0,
  252. .no_power_switching = 1,
  253. .power_switching_mode = 0,
  254. };
  255. static struct platform_device isp1362_hcd_device = {
  256. .name = "isp1362-hcd",
  257. .id = 0,
  258. .dev = {
  259. .platform_data = &isp1362_priv,
  260. },
  261. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  262. .resource = isp1362_hcd_resources,
  263. };
  264. #endif
  265. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  266. static unsigned short bfin_can_peripherals[] = {
  267. P_CAN0_RX, P_CAN0_TX, 0
  268. };
  269. static struct resource bfin_can_resources[] = {
  270. {
  271. .start = 0xFFC02A00,
  272. .end = 0xFFC02FFF,
  273. .flags = IORESOURCE_MEM,
  274. },
  275. {
  276. .start = IRQ_CAN_RX,
  277. .end = IRQ_CAN_RX,
  278. .flags = IORESOURCE_IRQ,
  279. },
  280. {
  281. .start = IRQ_CAN_TX,
  282. .end = IRQ_CAN_TX,
  283. .flags = IORESOURCE_IRQ,
  284. },
  285. {
  286. .start = IRQ_CAN_ERROR,
  287. .end = IRQ_CAN_ERROR,
  288. .flags = IORESOURCE_IRQ,
  289. },
  290. };
  291. static struct platform_device bfin_can_device = {
  292. .name = "bfin_can",
  293. .num_resources = ARRAY_SIZE(bfin_can_resources),
  294. .resource = bfin_can_resources,
  295. .dev = {
  296. .platform_data = &bfin_can_peripherals, /* Passed to driver */
  297. },
  298. };
  299. #endif
  300. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  301. #include <linux/bfin_mac.h>
  302. static const unsigned short bfin_mac_peripherals[] = P_MII0;
  303. static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  304. {
  305. .addr = 1,
  306. .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  307. },
  308. };
  309. static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  310. .phydev_number = 1,
  311. .phydev_data = bfin_phydev_data,
  312. .phy_mode = PHY_INTERFACE_MODE_MII,
  313. .mac_peripherals = bfin_mac_peripherals,
  314. };
  315. static struct platform_device bfin_mii_bus = {
  316. .name = "bfin_mii_bus",
  317. .dev = {
  318. .platform_data = &bfin_mii_bus_data,
  319. }
  320. };
  321. static struct platform_device bfin_mac_device = {
  322. .name = "bfin_mac",
  323. .dev = {
  324. .platform_data = &bfin_mii_bus,
  325. }
  326. };
  327. #endif
  328. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  329. static struct resource net2272_bfin_resources[] = {
  330. {
  331. .start = 0x20300000,
  332. .end = 0x20300000 + 0x100,
  333. .flags = IORESOURCE_MEM,
  334. }, {
  335. .start = 1,
  336. .flags = IORESOURCE_BUS,
  337. }, {
  338. .start = IRQ_PF7,
  339. .end = IRQ_PF7,
  340. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  341. },
  342. };
  343. static struct platform_device net2272_bfin_device = {
  344. .name = "net2272",
  345. .id = -1,
  346. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  347. .resource = net2272_bfin_resources,
  348. };
  349. #endif
  350. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  351. const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
  352. static struct mtd_partition bfin_plat_nand_partitions[] = {
  353. {
  354. .name = "linux kernel(nand)",
  355. .size = 0x400000,
  356. .offset = 0,
  357. }, {
  358. .name = "file system(nand)",
  359. .size = MTDPART_SIZ_FULL,
  360. .offset = MTDPART_OFS_APPEND,
  361. },
  362. };
  363. #define BFIN_NAND_PLAT_CLE 2
  364. #define BFIN_NAND_PLAT_ALE 1
  365. static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  366. {
  367. struct nand_chip *this = mtd->priv;
  368. if (cmd == NAND_CMD_NONE)
  369. return;
  370. if (ctrl & NAND_CLE)
  371. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
  372. else
  373. writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
  374. }
  375. #define BFIN_NAND_PLAT_READY GPIO_PF3
  376. static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
  377. {
  378. return gpio_get_value(BFIN_NAND_PLAT_READY);
  379. }
  380. static struct platform_nand_data bfin_plat_nand_data = {
  381. .chip = {
  382. .nr_chips = 1,
  383. .chip_delay = 30,
  384. .part_probe_types = part_probes,
  385. .partitions = bfin_plat_nand_partitions,
  386. .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
  387. },
  388. .ctrl = {
  389. .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
  390. .dev_ready = bfin_plat_nand_dev_ready,
  391. },
  392. };
  393. #define MAX(x, y) (x > y ? x : y)
  394. static struct resource bfin_plat_nand_resources = {
  395. .start = 0x20212000,
  396. .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
  397. .flags = IORESOURCE_MEM,
  398. };
  399. static struct platform_device bfin_async_nand_device = {
  400. .name = "gen_nand",
  401. .id = -1,
  402. .num_resources = 1,
  403. .resource = &bfin_plat_nand_resources,
  404. .dev = {
  405. .platform_data = &bfin_plat_nand_data,
  406. },
  407. };
  408. static void bfin_plat_nand_init(void)
  409. {
  410. gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
  411. }
  412. #else
  413. static void bfin_plat_nand_init(void) {}
  414. #endif
  415. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  416. static struct mtd_partition stamp_partitions[] = {
  417. {
  418. .name = "bootloader(nor)",
  419. .size = 0x40000,
  420. .offset = 0,
  421. }, {
  422. .name = "linux kernel(nor)",
  423. .size = 0x180000,
  424. .offset = MTDPART_OFS_APPEND,
  425. }, {
  426. .name = "file system(nor)",
  427. .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
  428. .offset = MTDPART_OFS_APPEND,
  429. }, {
  430. .name = "MAC Address(nor)",
  431. .size = MTDPART_SIZ_FULL,
  432. .offset = 0x3F0000,
  433. .mask_flags = MTD_WRITEABLE,
  434. }
  435. };
  436. static struct physmap_flash_data stamp_flash_data = {
  437. .width = 2,
  438. .parts = stamp_partitions,
  439. .nr_parts = ARRAY_SIZE(stamp_partitions),
  440. #ifdef CONFIG_ROMKERNEL
  441. .probe_type = "map_rom",
  442. #endif
  443. };
  444. static struct resource stamp_flash_resource = {
  445. .start = 0x20000000,
  446. .end = 0x203fffff,
  447. .flags = IORESOURCE_MEM,
  448. };
  449. static struct platform_device stamp_flash_device = {
  450. .name = "physmap-flash",
  451. .id = 0,
  452. .dev = {
  453. .platform_data = &stamp_flash_data,
  454. },
  455. .num_resources = 1,
  456. .resource = &stamp_flash_resource,
  457. };
  458. #endif
  459. #if defined(CONFIG_MTD_M25P80) \
  460. || defined(CONFIG_MTD_M25P80_MODULE)
  461. static struct mtd_partition bfin_spi_flash_partitions[] = {
  462. {
  463. .name = "bootloader(spi)",
  464. .size = 0x00040000,
  465. .offset = 0,
  466. .mask_flags = MTD_CAP_ROM
  467. }, {
  468. .name = "linux kernel(spi)",
  469. .size = 0x180000,
  470. .offset = MTDPART_OFS_APPEND,
  471. }, {
  472. .name = "file system(spi)",
  473. .size = MTDPART_SIZ_FULL,
  474. .offset = MTDPART_OFS_APPEND,
  475. }
  476. };
  477. static struct flash_platform_data bfin_spi_flash_data = {
  478. .name = "m25p80",
  479. .parts = bfin_spi_flash_partitions,
  480. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  481. /* .type = "m25p64", */
  482. };
  483. /* SPI flash chip (m25p64) */
  484. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  485. .enable_dma = 0, /* use dma transfer with this chip*/
  486. };
  487. #endif
  488. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  489. #include <linux/input/ad714x.h>
  490. static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
  491. {
  492. .start_stage = 0,
  493. .end_stage = 7,
  494. .max_coord = 128,
  495. },
  496. };
  497. static struct ad714x_button_plat ad7147_spi_button_plat[] = {
  498. {
  499. .keycode = BTN_FORWARD,
  500. .l_mask = 0,
  501. .h_mask = 0x600,
  502. },
  503. {
  504. .keycode = BTN_LEFT,
  505. .l_mask = 0,
  506. .h_mask = 0x500,
  507. },
  508. {
  509. .keycode = BTN_MIDDLE,
  510. .l_mask = 0,
  511. .h_mask = 0x800,
  512. },
  513. {
  514. .keycode = BTN_RIGHT,
  515. .l_mask = 0x100,
  516. .h_mask = 0x400,
  517. },
  518. {
  519. .keycode = BTN_BACK,
  520. .l_mask = 0x200,
  521. .h_mask = 0x400,
  522. },
  523. };
  524. static struct ad714x_platform_data ad7147_spi_platform_data = {
  525. .slider_num = 1,
  526. .button_num = 5,
  527. .slider = ad7147_spi_slider_plat,
  528. .button = ad7147_spi_button_plat,
  529. .stage_cfg_reg = {
  530. {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  531. {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  532. {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
  533. {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
  534. {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
  535. {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
  536. {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
  537. {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
  538. {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
  539. {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
  540. {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
  541. {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
  542. },
  543. .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
  544. };
  545. #endif
  546. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  547. #include <linux/input/ad714x.h>
  548. static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
  549. {
  550. .keycode = BTN_1,
  551. .l_mask = 0,
  552. .h_mask = 0x1,
  553. },
  554. {
  555. .keycode = BTN_2,
  556. .l_mask = 0,
  557. .h_mask = 0x2,
  558. },
  559. {
  560. .keycode = BTN_3,
  561. .l_mask = 0,
  562. .h_mask = 0x4,
  563. },
  564. {
  565. .keycode = BTN_4,
  566. .l_mask = 0x0,
  567. .h_mask = 0x8,
  568. },
  569. };
  570. static struct ad714x_platform_data ad7142_i2c_platform_data = {
  571. .button_num = 4,
  572. .button = ad7142_i2c_button_plat,
  573. .stage_cfg_reg = {
  574. /* fixme: figure out right setting for all comoponent according
  575. * to hardware feature of EVAL-AD7142EB board */
  576. {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  577. {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  578. {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  579. {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
  580. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  581. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  582. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  583. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  584. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  585. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  586. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  587. {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
  588. },
  589. .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
  590. };
  591. #endif
  592. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  593. static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
  594. .enable_dma = 0,
  595. };
  596. #endif
  597. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  598. static unsigned short ad2s120x_platform_data[] = {
  599. /* used as SAMPLE and RDVEL */
  600. GPIO_PF5, GPIO_PF6, 0
  601. };
  602. static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
  603. .enable_dma = 0,
  604. };
  605. #endif
  606. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  607. static unsigned short ad2s1210_platform_data[] = {
  608. /* use as SAMPLE, A0, A1 */
  609. GPIO_PF7, GPIO_PF8, GPIO_PF9,
  610. # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
  611. /* the RES0 and RES1 pins */
  612. GPIO_PF4, GPIO_PF5,
  613. # endif
  614. 0,
  615. };
  616. static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
  617. .enable_dma = 0,
  618. };
  619. #endif
  620. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  621. static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
  622. .enable_dma = 0,
  623. };
  624. #endif
  625. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  626. static unsigned short ad7816_platform_data[] = {
  627. GPIO_PF4, /* rdwr_pin */
  628. GPIO_PF5, /* convert_pin */
  629. GPIO_PF7, /* busy_pin */
  630. 0,
  631. };
  632. static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
  633. .enable_dma = 0,
  634. };
  635. #endif
  636. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  637. static unsigned long adt7310_platform_data[3] = {
  638. /* INT bound temperature alarm event. line 1 */
  639. IRQ_PG4, IRQF_TRIGGER_LOW,
  640. /* CT bound temperature alarm event irq_flags. line 0 */
  641. IRQF_TRIGGER_LOW,
  642. };
  643. static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
  644. .enable_dma = 0,
  645. };
  646. #endif
  647. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  648. static unsigned short ad7298_platform_data[] = {
  649. GPIO_PF7, /* busy_pin */
  650. 0,
  651. };
  652. #endif
  653. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  654. static unsigned long adt7316_spi_data[2] = {
  655. IRQF_TRIGGER_LOW, /* interrupt flags */
  656. GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  657. };
  658. static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
  659. .enable_dma = 0,
  660. };
  661. #endif
  662. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  663. #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
  664. static int bfin_mmc_spi_init(struct device *dev,
  665. irqreturn_t (*detect_int)(int, void *), void *data)
  666. {
  667. return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
  668. IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
  669. }
  670. static void bfin_mmc_spi_exit(struct device *dev, void *data)
  671. {
  672. free_irq(MMC_SPI_CARD_DETECT_INT, data);
  673. }
  674. static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
  675. .init = bfin_mmc_spi_init,
  676. .exit = bfin_mmc_spi_exit,
  677. .detect_delay = 100, /* msecs */
  678. };
  679. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  680. .enable_dma = 0,
  681. .pio_interrupt = 0,
  682. };
  683. #endif
  684. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  685. #include <linux/spi/ad7877.h>
  686. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  687. .model = 7877,
  688. .vref_delay_usecs = 50, /* internal, no capacitor */
  689. .x_plate_ohms = 419,
  690. .y_plate_ohms = 486,
  691. .pressure_max = 1000,
  692. .pressure_min = 0,
  693. .stopacq_polarity = 1,
  694. .first_conversion_delay = 3,
  695. .acquisition_time = 1,
  696. .averaging = 1,
  697. .pen_down_acc_interval = 1,
  698. };
  699. #endif
  700. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  701. #include <linux/spi/ad7879.h>
  702. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  703. .model = 7879, /* Model = AD7879 */
  704. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  705. .pressure_max = 10000,
  706. .pressure_min = 0,
  707. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  708. .acquisition_time = 1, /* 4us acquisition time per sample */
  709. .median = 2, /* do 8 measurements */
  710. .averaging = 1, /* take the average of 4 middle samples */
  711. .pen_down_acc_interval = 255, /* 9.4 ms */
  712. .gpio_export = 1, /* Export GPIO to gpiolib */
  713. .gpio_base = -1, /* Dynamic allocation */
  714. };
  715. #endif
  716. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  717. #include <linux/input/adxl34x.h>
  718. static const struct adxl34x_platform_data adxl34x_info = {
  719. .x_axis_offset = 0,
  720. .y_axis_offset = 0,
  721. .z_axis_offset = 0,
  722. .tap_threshold = 0x31,
  723. .tap_duration = 0x10,
  724. .tap_latency = 0x60,
  725. .tap_window = 0xF0,
  726. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  727. .act_axis_control = 0xFF,
  728. .activity_threshold = 5,
  729. .inactivity_threshold = 3,
  730. .inactivity_time = 4,
  731. .free_fall_threshold = 0x7,
  732. .free_fall_time = 0x20,
  733. .data_rate = 0x8,
  734. .data_range = ADXL_FULL_RES,
  735. .ev_type = EV_ABS,
  736. .ev_code_x = ABS_X, /* EV_REL */
  737. .ev_code_y = ABS_Y, /* EV_REL */
  738. .ev_code_z = ABS_Z, /* EV_REL */
  739. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  740. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  741. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  742. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  743. .fifo_mode = ADXL_FIFO_STREAM,
  744. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  745. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  746. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  747. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  748. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  749. };
  750. #endif
  751. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  752. static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
  753. .enable_dma = 1,
  754. };
  755. #endif
  756. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  757. #include <linux/spi/adf702x.h>
  758. #define TXREG 0x0160A470
  759. static const u32 adf7021_regs[] = {
  760. 0x09608FA0,
  761. 0x00575011,
  762. 0x00A7F092,
  763. 0x2B141563,
  764. 0x81F29E94,
  765. 0x00003155,
  766. 0x050A4F66,
  767. 0x00000007,
  768. 0x00000008,
  769. 0x000231E9,
  770. 0x3296354A,
  771. 0x891A2B3B,
  772. 0x00000D9C,
  773. 0x0000000D,
  774. 0x0000000E,
  775. 0x0000000F,
  776. };
  777. static struct adf702x_platform_data adf7021_platform_data = {
  778. .regs_base = (void *)SPORT1_TCR1,
  779. .dma_ch_rx = CH_SPORT1_RX,
  780. .dma_ch_tx = CH_SPORT1_TX,
  781. .irq_sport_err = IRQ_SPORT1_ERROR,
  782. .gpio_int_rfs = GPIO_PF8,
  783. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
  784. P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
  785. .adf702x_model = MODEL_ADF7021,
  786. .adf702x_regs = adf7021_regs,
  787. .tx_reg = TXREG,
  788. };
  789. static inline void adf702x_mac_init(void)
  790. {
  791. random_ether_addr(adf7021_platform_data.mac_addr);
  792. }
  793. #else
  794. static inline void adf702x_mac_init(void) {}
  795. #endif
  796. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  797. #include <linux/spi/ads7846.h>
  798. static int ads7873_get_pendown_state(void)
  799. {
  800. return gpio_get_value(GPIO_PF6);
  801. }
  802. static struct ads7846_platform_data __initdata ad7873_pdata = {
  803. .model = 7873, /* AD7873 */
  804. .x_max = 0xfff,
  805. .y_max = 0xfff,
  806. .x_plate_ohms = 620,
  807. .debounce_max = 1,
  808. .debounce_rep = 0,
  809. .debounce_tol = (~0),
  810. .get_pendown_state = ads7873_get_pendown_state,
  811. };
  812. #endif
  813. #if defined(CONFIG_MTD_DATAFLASH) \
  814. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  815. static struct mtd_partition bfin_spi_dataflash_partitions[] = {
  816. {
  817. .name = "bootloader(spi)",
  818. .size = 0x00040000,
  819. .offset = 0,
  820. .mask_flags = MTD_CAP_ROM
  821. }, {
  822. .name = "linux kernel(spi)",
  823. .size = 0x180000,
  824. .offset = MTDPART_OFS_APPEND,
  825. }, {
  826. .name = "file system(spi)",
  827. .size = MTDPART_SIZ_FULL,
  828. .offset = MTDPART_OFS_APPEND,
  829. }
  830. };
  831. static struct flash_platform_data bfin_spi_dataflash_data = {
  832. .name = "SPI Dataflash",
  833. .parts = bfin_spi_dataflash_partitions,
  834. .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
  835. };
  836. /* DataFlash chip */
  837. static struct bfin5xx_spi_chip data_flash_chip_info = {
  838. .enable_dma = 0, /* use dma transfer with this chip*/
  839. };
  840. #endif
  841. #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
  842. static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
  843. .enable_dma = 0, /* use dma transfer with this chip*/
  844. };
  845. #endif
  846. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  847. #if defined(CONFIG_MTD_M25P80) \
  848. || defined(CONFIG_MTD_M25P80_MODULE)
  849. {
  850. /* the modalias must be the same as spi device driver name */
  851. .modalias = "m25p80", /* Name of spi_driver for this device */
  852. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  853. .bus_num = 0, /* Framework bus number */
  854. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  855. .platform_data = &bfin_spi_flash_data,
  856. .controller_data = &spi_flash_chip_info,
  857. .mode = SPI_MODE_3,
  858. },
  859. #endif
  860. #if defined(CONFIG_MTD_DATAFLASH) \
  861. || defined(CONFIG_MTD_DATAFLASH_MODULE)
  862. { /* DataFlash chip */
  863. .modalias = "mtd_dataflash",
  864. .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
  865. .bus_num = 0, /* Framework bus number */
  866. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  867. .platform_data = &bfin_spi_dataflash_data,
  868. .controller_data = &data_flash_chip_info,
  869. .mode = SPI_MODE_3,
  870. },
  871. #endif
  872. #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
  873. || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
  874. {
  875. .modalias = "ad1836",
  876. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  877. .bus_num = 0,
  878. .chip_select = 4,
  879. .platform_data = "ad1836", /* only includes chip name for the moment */
  880. .mode = SPI_MODE_3,
  881. },
  882. #endif
  883. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  884. {
  885. .modalias = "ad193x",
  886. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  887. .bus_num = 0,
  888. .chip_select = 5,
  889. .mode = SPI_MODE_3,
  890. },
  891. #endif
  892. #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADV80X_MODULE)
  893. {
  894. .modalias = "adav801",
  895. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  896. .bus_num = 0,
  897. .chip_select = 1,
  898. .mode = SPI_MODE_3,
  899. },
  900. #endif
  901. #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
  902. {
  903. .modalias = "ad714x_captouch",
  904. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  905. .irq = IRQ_PF4,
  906. .bus_num = 0,
  907. .chip_select = 5,
  908. .mode = SPI_MODE_3,
  909. .platform_data = &ad7147_spi_platform_data,
  910. },
  911. #endif
  912. #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
  913. {
  914. .modalias = "ad2s90",
  915. .bus_num = 0,
  916. .chip_select = 3, /* change it for your board */
  917. .mode = SPI_MODE_3,
  918. .platform_data = NULL,
  919. .controller_data = &ad2s90_spi_chip_info,
  920. },
  921. #endif
  922. #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
  923. {
  924. .modalias = "ad2s120x",
  925. .bus_num = 0,
  926. .chip_select = 4, /* CS, change it for your board */
  927. .platform_data = ad2s120x_platform_data,
  928. .controller_data = &ad2s120x_spi_chip_info,
  929. },
  930. #endif
  931. #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
  932. {
  933. .modalias = "ad2s1210",
  934. .max_speed_hz = 8192000,
  935. .bus_num = 0,
  936. .chip_select = 4, /* CS, change it for your board */
  937. .platform_data = ad2s1210_platform_data,
  938. .controller_data = &ad2s1210_spi_chip_info,
  939. },
  940. #endif
  941. #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
  942. {
  943. .modalias = "ad7314",
  944. .max_speed_hz = 1000000,
  945. .bus_num = 0,
  946. .chip_select = 4, /* CS, change it for your board */
  947. .controller_data = &ad7314_spi_chip_info,
  948. .mode = SPI_MODE_1,
  949. },
  950. #endif
  951. #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
  952. {
  953. .modalias = "ad7818",
  954. .max_speed_hz = 1000000,
  955. .bus_num = 0,
  956. .chip_select = 4, /* CS, change it for your board */
  957. .platform_data = ad7816_platform_data,
  958. .controller_data = &ad7816_spi_chip_info,
  959. .mode = SPI_MODE_3,
  960. },
  961. #endif
  962. #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
  963. {
  964. .modalias = "adt7310",
  965. .max_speed_hz = 1000000,
  966. .irq = IRQ_PG5, /* CT alarm event. Line 0 */
  967. .bus_num = 0,
  968. .chip_select = 4, /* CS, change it for your board */
  969. .platform_data = adt7310_platform_data,
  970. .controller_data = &adt7310_spi_chip_info,
  971. .mode = SPI_MODE_3,
  972. },
  973. #endif
  974. #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
  975. {
  976. .modalias = "ad7298",
  977. .max_speed_hz = 1000000,
  978. .bus_num = 0,
  979. .chip_select = 4, /* CS, change it for your board */
  980. .platform_data = ad7298_platform_data,
  981. .mode = SPI_MODE_3,
  982. },
  983. #endif
  984. #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
  985. {
  986. .modalias = "adt7316",
  987. .max_speed_hz = 1000000,
  988. .irq = IRQ_PG5, /* interrupt line */
  989. .bus_num = 0,
  990. .chip_select = 4, /* CS, change it for your board */
  991. .platform_data = adt7316_spi_data,
  992. .controller_data = &adt7316_spi_chip_info,
  993. .mode = SPI_MODE_3,
  994. },
  995. #endif
  996. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  997. {
  998. .modalias = "mmc_spi",
  999. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1000. .bus_num = 0,
  1001. .chip_select = 4,
  1002. .platform_data = &bfin_mmc_spi_pdata,
  1003. .controller_data = &mmc_spi_chip_info,
  1004. .mode = SPI_MODE_3,
  1005. },
  1006. #endif
  1007. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  1008. {
  1009. .modalias = "ad7877",
  1010. .platform_data = &bfin_ad7877_ts_info,
  1011. .irq = IRQ_PF6,
  1012. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  1013. .bus_num = 0,
  1014. .chip_select = 1,
  1015. },
  1016. #endif
  1017. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  1018. {
  1019. .modalias = "ad7879",
  1020. .platform_data = &bfin_ad7879_ts_info,
  1021. .irq = IRQ_PF7,
  1022. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1023. .bus_num = 0,
  1024. .chip_select = 1,
  1025. .mode = SPI_CPHA | SPI_CPOL,
  1026. },
  1027. #endif
  1028. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  1029. {
  1030. .modalias = "spidev",
  1031. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  1032. .bus_num = 0,
  1033. .chip_select = 1,
  1034. },
  1035. #endif
  1036. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1037. {
  1038. .modalias = "bfin-lq035q1-spi",
  1039. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1040. .bus_num = 0,
  1041. .chip_select = 2,
  1042. .mode = SPI_CPHA | SPI_CPOL,
  1043. },
  1044. #endif
  1045. #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
  1046. {
  1047. .modalias = "enc28j60",
  1048. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  1049. .irq = IRQ_PF6,
  1050. .bus_num = 0,
  1051. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1052. .controller_data = &enc28j60_spi_chip_info,
  1053. .mode = SPI_MODE_0,
  1054. },
  1055. #endif
  1056. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  1057. {
  1058. .modalias = "adxl34x",
  1059. .platform_data = &adxl34x_info,
  1060. .irq = IRQ_PF6,
  1061. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  1062. .bus_num = 0,
  1063. .chip_select = 2,
  1064. .mode = SPI_MODE_3,
  1065. },
  1066. #endif
  1067. #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
  1068. {
  1069. .modalias = "adf702x",
  1070. .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
  1071. .bus_num = 0,
  1072. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1073. .platform_data = &adf7021_platform_data,
  1074. .mode = SPI_MODE_0,
  1075. },
  1076. #endif
  1077. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  1078. {
  1079. .modalias = "ads7846",
  1080. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1081. .bus_num = 0,
  1082. .irq = IRQ_PF6,
  1083. .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
  1084. .platform_data = &ad7873_pdata,
  1085. .mode = SPI_MODE_0,
  1086. },
  1087. #endif
  1088. #if defined(CONFIG_AD7476) \
  1089. || defined(CONFIG_AD7476_MODULE)
  1090. {
  1091. .modalias = "ad7476", /* Name of spi_driver for this device */
  1092. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  1093. .bus_num = 0, /* Framework bus number */
  1094. .chip_select = 1, /* Framework chip select. */
  1095. .platform_data = NULL, /* No spi_driver specific config */
  1096. .controller_data = &spi_ad7476_chip_info,
  1097. .mode = SPI_MODE_3,
  1098. },
  1099. #endif
  1100. #if defined(CONFIG_ADE7753) \
  1101. || defined(CONFIG_ADE7753_MODULE)
  1102. {
  1103. .modalias = "ade7753",
  1104. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1105. .bus_num = 0,
  1106. .chip_select = 1, /* CS, change it for your board */
  1107. .platform_data = NULL, /* No spi_driver specific config */
  1108. .mode = SPI_MODE_1,
  1109. },
  1110. #endif
  1111. #if defined(CONFIG_ADE7754) \
  1112. || defined(CONFIG_ADE7754_MODULE)
  1113. {
  1114. .modalias = "ade7754",
  1115. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1116. .bus_num = 0,
  1117. .chip_select = 1, /* CS, change it for your board */
  1118. .platform_data = NULL, /* No spi_driver specific config */
  1119. .mode = SPI_MODE_1,
  1120. },
  1121. #endif
  1122. #if defined(CONFIG_ADE7758) \
  1123. || defined(CONFIG_ADE7758_MODULE)
  1124. {
  1125. .modalias = "ade7758",
  1126. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1127. .bus_num = 0,
  1128. .chip_select = 1, /* CS, change it for your board */
  1129. .platform_data = NULL, /* No spi_driver specific config */
  1130. .mode = SPI_MODE_1,
  1131. },
  1132. #endif
  1133. #if defined(CONFIG_ADE7759) \
  1134. || defined(CONFIG_ADE7759_MODULE)
  1135. {
  1136. .modalias = "ade7759",
  1137. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1138. .bus_num = 0,
  1139. .chip_select = 1, /* CS, change it for your board */
  1140. .platform_data = NULL, /* No spi_driver specific config */
  1141. .mode = SPI_MODE_1,
  1142. },
  1143. #endif
  1144. #if defined(CONFIG_ADE7854_SPI) \
  1145. || defined(CONFIG_ADE7854_SPI_MODULE)
  1146. {
  1147. .modalias = "ade7854",
  1148. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1149. .bus_num = 0,
  1150. .chip_select = 1, /* CS, change it for your board */
  1151. .platform_data = NULL, /* No spi_driver specific config */
  1152. .mode = SPI_MODE_3,
  1153. },
  1154. #endif
  1155. #if defined(CONFIG_ADIS16060) \
  1156. || defined(CONFIG_ADIS16060_MODULE)
  1157. {
  1158. .modalias = "adis16060_r",
  1159. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1160. .bus_num = 0,
  1161. .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
  1162. .platform_data = NULL, /* No spi_driver specific config */
  1163. .mode = SPI_MODE_0,
  1164. },
  1165. {
  1166. .modalias = "adis16060_w",
  1167. .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
  1168. .bus_num = 0,
  1169. .chip_select = 2, /* CS for write, change it for your board */
  1170. .platform_data = NULL, /* No spi_driver specific config */
  1171. .mode = SPI_MODE_1,
  1172. },
  1173. #endif
  1174. #if defined(CONFIG_ADIS16130) \
  1175. || defined(CONFIG_ADIS16130_MODULE)
  1176. {
  1177. .modalias = "adis16130",
  1178. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1179. .bus_num = 0,
  1180. .chip_select = 1, /* CS for read, change it for your board */
  1181. .platform_data = NULL, /* No spi_driver specific config */
  1182. .mode = SPI_MODE_3,
  1183. },
  1184. #endif
  1185. #if defined(CONFIG_ADIS16201) \
  1186. || defined(CONFIG_ADIS16201_MODULE)
  1187. {
  1188. .modalias = "adis16201",
  1189. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1190. .bus_num = 0,
  1191. .chip_select = 5, /* CS, change it for your board */
  1192. .platform_data = NULL, /* No spi_driver specific config */
  1193. .mode = SPI_MODE_3,
  1194. .irq = IRQ_PF4,
  1195. },
  1196. #endif
  1197. #if defined(CONFIG_ADIS16203) \
  1198. || defined(CONFIG_ADIS16203_MODULE)
  1199. {
  1200. .modalias = "adis16203",
  1201. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1202. .bus_num = 0,
  1203. .chip_select = 5, /* CS, change it for your board */
  1204. .platform_data = NULL, /* No spi_driver specific config */
  1205. .mode = SPI_MODE_3,
  1206. .irq = IRQ_PF4,
  1207. },
  1208. #endif
  1209. #if defined(CONFIG_ADIS16204) \
  1210. || defined(CONFIG_ADIS16204_MODULE)
  1211. {
  1212. .modalias = "adis16204",
  1213. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1214. .bus_num = 0,
  1215. .chip_select = 5, /* CS, change it for your board */
  1216. .platform_data = NULL, /* No spi_driver specific config */
  1217. .mode = SPI_MODE_3,
  1218. .irq = IRQ_PF4,
  1219. },
  1220. #endif
  1221. #if defined(CONFIG_ADIS16209) \
  1222. || defined(CONFIG_ADIS16209_MODULE)
  1223. {
  1224. .modalias = "adis16209",
  1225. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1226. .bus_num = 0,
  1227. .chip_select = 5, /* CS, change it for your board */
  1228. .platform_data = NULL, /* No spi_driver specific config */
  1229. .mode = SPI_MODE_3,
  1230. .irq = IRQ_PF4,
  1231. },
  1232. #endif
  1233. #if defined(CONFIG_ADIS16220) \
  1234. || defined(CONFIG_ADIS16220_MODULE)
  1235. {
  1236. .modalias = "adis16220",
  1237. .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
  1238. .bus_num = 0,
  1239. .chip_select = 5, /* CS, change it for your board */
  1240. .platform_data = NULL, /* No spi_driver specific config */
  1241. .mode = SPI_MODE_3,
  1242. .irq = IRQ_PF4,
  1243. },
  1244. #endif
  1245. #if defined(CONFIG_ADIS16240) \
  1246. || defined(CONFIG_ADIS16240_MODULE)
  1247. {
  1248. .modalias = "adis16240",
  1249. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1250. .bus_num = 0,
  1251. .chip_select = 5, /* CS, change it for your board */
  1252. .platform_data = NULL, /* No spi_driver specific config */
  1253. .mode = SPI_MODE_3,
  1254. .irq = IRQ_PF4,
  1255. },
  1256. #endif
  1257. #if defined(CONFIG_ADIS16260) \
  1258. || defined(CONFIG_ADIS16260_MODULE)
  1259. {
  1260. .modalias = "adis16260",
  1261. .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
  1262. .bus_num = 0,
  1263. .chip_select = 5, /* CS, change it for your board */
  1264. .platform_data = NULL, /* No spi_driver specific config */
  1265. .mode = SPI_MODE_3,
  1266. .irq = IRQ_PF4,
  1267. },
  1268. #endif
  1269. #if defined(CONFIG_ADIS16261) \
  1270. || defined(CONFIG_ADIS16261_MODULE)
  1271. {
  1272. .modalias = "adis16261",
  1273. .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
  1274. .bus_num = 0,
  1275. .chip_select = 1, /* CS, change it for your board */
  1276. .platform_data = NULL, /* No spi_driver specific config */
  1277. .mode = SPI_MODE_3,
  1278. },
  1279. #endif
  1280. #if defined(CONFIG_ADIS16300) \
  1281. || defined(CONFIG_ADIS16300_MODULE)
  1282. {
  1283. .modalias = "adis16300",
  1284. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1285. .bus_num = 0,
  1286. .chip_select = 5, /* CS, change it for your board */
  1287. .platform_data = NULL, /* No spi_driver specific config */
  1288. .mode = SPI_MODE_3,
  1289. .irq = IRQ_PF4,
  1290. },
  1291. #endif
  1292. #if defined(CONFIG_ADIS16350) \
  1293. || defined(CONFIG_ADIS16350_MODULE)
  1294. {
  1295. .modalias = "adis16364",
  1296. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1297. .bus_num = 0,
  1298. .chip_select = 5, /* CS, change it for your board */
  1299. .platform_data = NULL, /* No spi_driver specific config */
  1300. .mode = SPI_MODE_3,
  1301. .irq = IRQ_PF4,
  1302. },
  1303. #endif
  1304. #if defined(CONFIG_ADIS16400) \
  1305. || defined(CONFIG_ADIS16400_MODULE)
  1306. {
  1307. .modalias = "adis16400",
  1308. .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
  1309. .bus_num = 0,
  1310. .chip_select = 1, /* CS, change it for your board */
  1311. .platform_data = NULL, /* No spi_driver specific config */
  1312. .mode = SPI_MODE_3,
  1313. },
  1314. #endif
  1315. };
  1316. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  1317. /* SPI controller data */
  1318. static struct bfin5xx_spi_master bfin_spi0_info = {
  1319. .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
  1320. .enable_dma = 1, /* master has the ability to do dma transfer */
  1321. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  1322. };
  1323. /* SPI (0) */
  1324. static struct resource bfin_spi0_resource[] = {
  1325. [0] = {
  1326. .start = SPI0_REGBASE,
  1327. .end = SPI0_REGBASE + 0xFF,
  1328. .flags = IORESOURCE_MEM,
  1329. },
  1330. [1] = {
  1331. .start = CH_SPI,
  1332. .end = CH_SPI,
  1333. .flags = IORESOURCE_DMA,
  1334. },
  1335. [2] = {
  1336. .start = IRQ_SPI,
  1337. .end = IRQ_SPI,
  1338. .flags = IORESOURCE_IRQ,
  1339. },
  1340. };
  1341. static struct platform_device bfin_spi0_device = {
  1342. .name = "bfin-spi",
  1343. .id = 0, /* Bus number */
  1344. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  1345. .resource = bfin_spi0_resource,
  1346. .dev = {
  1347. .platform_data = &bfin_spi0_info, /* Passed to driver */
  1348. },
  1349. };
  1350. #endif /* spi master and devices */
  1351. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  1352. /* SPORT SPI controller data */
  1353. static struct bfin5xx_spi_master bfin_sport_spi0_info = {
  1354. .num_chipselect = 1, /* master only supports one device */
  1355. .enable_dma = 0, /* master don't support DMA */
  1356. .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
  1357. P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
  1358. };
  1359. static struct resource bfin_sport_spi0_resource[] = {
  1360. [0] = {
  1361. .start = SPORT0_TCR1,
  1362. .end = SPORT0_TCR1 + 0xFF,
  1363. .flags = IORESOURCE_MEM,
  1364. },
  1365. [1] = {
  1366. .start = IRQ_SPORT0_ERROR,
  1367. .end = IRQ_SPORT0_ERROR,
  1368. .flags = IORESOURCE_IRQ,
  1369. },
  1370. };
  1371. static struct platform_device bfin_sport_spi0_device = {
  1372. .name = "bfin-sport-spi",
  1373. .id = 1, /* Bus number */
  1374. .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
  1375. .resource = bfin_sport_spi0_resource,
  1376. .dev = {
  1377. .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
  1378. },
  1379. };
  1380. static struct bfin5xx_spi_master bfin_sport_spi1_info = {
  1381. .num_chipselect = 1, /* master only supports one device */
  1382. .enable_dma = 0, /* master don't support DMA */
  1383. .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
  1384. P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
  1385. };
  1386. static struct resource bfin_sport_spi1_resource[] = {
  1387. [0] = {
  1388. .start = SPORT1_TCR1,
  1389. .end = SPORT1_TCR1 + 0xFF,
  1390. .flags = IORESOURCE_MEM,
  1391. },
  1392. [1] = {
  1393. .start = IRQ_SPORT1_ERROR,
  1394. .end = IRQ_SPORT1_ERROR,
  1395. .flags = IORESOURCE_IRQ,
  1396. },
  1397. };
  1398. static struct platform_device bfin_sport_spi1_device = {
  1399. .name = "bfin-sport-spi",
  1400. .id = 2, /* Bus number */
  1401. .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
  1402. .resource = bfin_sport_spi1_resource,
  1403. .dev = {
  1404. .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
  1405. },
  1406. };
  1407. #endif /* sport spi master and devices */
  1408. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  1409. static struct platform_device bfin_fb_device = {
  1410. .name = "bf537-lq035",
  1411. };
  1412. #endif
  1413. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  1414. #include <asm/bfin-lq035q1.h>
  1415. static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
  1416. .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
  1417. .ppi_mode = USE_RGB565_16_BIT_PPI,
  1418. .use_bl = 0, /* let something else control the LCD Blacklight */
  1419. .gpio_bl = GPIO_PF7,
  1420. };
  1421. static struct resource bfin_lq035q1_resources[] = {
  1422. {
  1423. .start = IRQ_PPI_ERROR,
  1424. .end = IRQ_PPI_ERROR,
  1425. .flags = IORESOURCE_IRQ,
  1426. },
  1427. };
  1428. static struct platform_device bfin_lq035q1_device = {
  1429. .name = "bfin-lq035q1",
  1430. .id = -1,
  1431. .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
  1432. .resource = bfin_lq035q1_resources,
  1433. .dev = {
  1434. .platform_data = &bfin_lq035q1_data,
  1435. },
  1436. };
  1437. #endif
  1438. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1439. #ifdef CONFIG_SERIAL_BFIN_UART0
  1440. static struct resource bfin_uart0_resources[] = {
  1441. {
  1442. .start = UART0_THR,
  1443. .end = UART0_GCTL+2,
  1444. .flags = IORESOURCE_MEM,
  1445. },
  1446. {
  1447. .start = IRQ_UART0_RX,
  1448. .end = IRQ_UART0_RX+1,
  1449. .flags = IORESOURCE_IRQ,
  1450. },
  1451. {
  1452. .start = IRQ_UART0_ERROR,
  1453. .end = IRQ_UART0_ERROR,
  1454. .flags = IORESOURCE_IRQ,
  1455. },
  1456. {
  1457. .start = CH_UART0_TX,
  1458. .end = CH_UART0_TX,
  1459. .flags = IORESOURCE_DMA,
  1460. },
  1461. {
  1462. .start = CH_UART0_RX,
  1463. .end = CH_UART0_RX,
  1464. .flags = IORESOURCE_DMA,
  1465. },
  1466. #ifdef CONFIG_BFIN_UART0_CTSRTS
  1467. { /* CTS pin */
  1468. .start = GPIO_PG7,
  1469. .end = GPIO_PG7,
  1470. .flags = IORESOURCE_IO,
  1471. },
  1472. { /* RTS pin */
  1473. .start = GPIO_PG6,
  1474. .end = GPIO_PG6,
  1475. .flags = IORESOURCE_IO,
  1476. },
  1477. #endif
  1478. };
  1479. static unsigned short bfin_uart0_peripherals[] = {
  1480. P_UART0_TX, P_UART0_RX, 0
  1481. };
  1482. static struct platform_device bfin_uart0_device = {
  1483. .name = "bfin-uart",
  1484. .id = 0,
  1485. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  1486. .resource = bfin_uart0_resources,
  1487. .dev = {
  1488. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  1489. },
  1490. };
  1491. #endif
  1492. #ifdef CONFIG_SERIAL_BFIN_UART1
  1493. static struct resource bfin_uart1_resources[] = {
  1494. {
  1495. .start = UART1_THR,
  1496. .end = UART1_GCTL+2,
  1497. .flags = IORESOURCE_MEM,
  1498. },
  1499. {
  1500. .start = IRQ_UART1_RX,
  1501. .end = IRQ_UART1_RX+1,
  1502. .flags = IORESOURCE_IRQ,
  1503. },
  1504. {
  1505. .start = IRQ_UART1_ERROR,
  1506. .end = IRQ_UART1_ERROR,
  1507. .flags = IORESOURCE_IRQ,
  1508. },
  1509. {
  1510. .start = CH_UART1_TX,
  1511. .end = CH_UART1_TX,
  1512. .flags = IORESOURCE_DMA,
  1513. },
  1514. {
  1515. .start = CH_UART1_RX,
  1516. .end = CH_UART1_RX,
  1517. .flags = IORESOURCE_DMA,
  1518. },
  1519. };
  1520. static unsigned short bfin_uart1_peripherals[] = {
  1521. P_UART1_TX, P_UART1_RX, 0
  1522. };
  1523. static struct platform_device bfin_uart1_device = {
  1524. .name = "bfin-uart",
  1525. .id = 1,
  1526. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  1527. .resource = bfin_uart1_resources,
  1528. .dev = {
  1529. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  1530. },
  1531. };
  1532. #endif
  1533. #endif
  1534. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1535. #ifdef CONFIG_BFIN_SIR0
  1536. static struct resource bfin_sir0_resources[] = {
  1537. {
  1538. .start = 0xFFC00400,
  1539. .end = 0xFFC004FF,
  1540. .flags = IORESOURCE_MEM,
  1541. },
  1542. {
  1543. .start = IRQ_UART0_RX,
  1544. .end = IRQ_UART0_RX+1,
  1545. .flags = IORESOURCE_IRQ,
  1546. },
  1547. {
  1548. .start = CH_UART0_RX,
  1549. .end = CH_UART0_RX+1,
  1550. .flags = IORESOURCE_DMA,
  1551. },
  1552. };
  1553. static struct platform_device bfin_sir0_device = {
  1554. .name = "bfin_sir",
  1555. .id = 0,
  1556. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  1557. .resource = bfin_sir0_resources,
  1558. };
  1559. #endif
  1560. #ifdef CONFIG_BFIN_SIR1
  1561. static struct resource bfin_sir1_resources[] = {
  1562. {
  1563. .start = 0xFFC02000,
  1564. .end = 0xFFC020FF,
  1565. .flags = IORESOURCE_MEM,
  1566. },
  1567. {
  1568. .start = IRQ_UART1_RX,
  1569. .end = IRQ_UART1_RX+1,
  1570. .flags = IORESOURCE_IRQ,
  1571. },
  1572. {
  1573. .start = CH_UART1_RX,
  1574. .end = CH_UART1_RX+1,
  1575. .flags = IORESOURCE_DMA,
  1576. },
  1577. };
  1578. static struct platform_device bfin_sir1_device = {
  1579. .name = "bfin_sir",
  1580. .id = 1,
  1581. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  1582. .resource = bfin_sir1_resources,
  1583. };
  1584. #endif
  1585. #endif
  1586. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1587. static struct resource bfin_twi0_resource[] = {
  1588. [0] = {
  1589. .start = TWI0_REGBASE,
  1590. .end = TWI0_REGBASE,
  1591. .flags = IORESOURCE_MEM,
  1592. },
  1593. [1] = {
  1594. .start = IRQ_TWI,
  1595. .end = IRQ_TWI,
  1596. .flags = IORESOURCE_IRQ,
  1597. },
  1598. };
  1599. static struct platform_device i2c_bfin_twi_device = {
  1600. .name = "i2c-bfin-twi",
  1601. .id = 0,
  1602. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1603. .resource = bfin_twi0_resource,
  1604. };
  1605. #endif
  1606. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  1607. static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
  1608. [0] = KEY_GRAVE,
  1609. [1] = KEY_1,
  1610. [2] = KEY_2,
  1611. [3] = KEY_3,
  1612. [4] = KEY_4,
  1613. [5] = KEY_5,
  1614. [6] = KEY_6,
  1615. [7] = KEY_7,
  1616. [8] = KEY_8,
  1617. [9] = KEY_9,
  1618. [10] = KEY_0,
  1619. [11] = KEY_MINUS,
  1620. [12] = KEY_EQUAL,
  1621. [13] = KEY_BACKSLASH,
  1622. [15] = KEY_KP0,
  1623. [16] = KEY_Q,
  1624. [17] = KEY_W,
  1625. [18] = KEY_E,
  1626. [19] = KEY_R,
  1627. [20] = KEY_T,
  1628. [21] = KEY_Y,
  1629. [22] = KEY_U,
  1630. [23] = KEY_I,
  1631. [24] = KEY_O,
  1632. [25] = KEY_P,
  1633. [26] = KEY_LEFTBRACE,
  1634. [27] = KEY_RIGHTBRACE,
  1635. [29] = KEY_KP1,
  1636. [30] = KEY_KP2,
  1637. [31] = KEY_KP3,
  1638. [32] = KEY_A,
  1639. [33] = KEY_S,
  1640. [34] = KEY_D,
  1641. [35] = KEY_F,
  1642. [36] = KEY_G,
  1643. [37] = KEY_H,
  1644. [38] = KEY_J,
  1645. [39] = KEY_K,
  1646. [40] = KEY_L,
  1647. [41] = KEY_SEMICOLON,
  1648. [42] = KEY_APOSTROPHE,
  1649. [43] = KEY_BACKSLASH,
  1650. [45] = KEY_KP4,
  1651. [46] = KEY_KP5,
  1652. [47] = KEY_KP6,
  1653. [48] = KEY_102ND,
  1654. [49] = KEY_Z,
  1655. [50] = KEY_X,
  1656. [51] = KEY_C,
  1657. [52] = KEY_V,
  1658. [53] = KEY_B,
  1659. [54] = KEY_N,
  1660. [55] = KEY_M,
  1661. [56] = KEY_COMMA,
  1662. [57] = KEY_DOT,
  1663. [58] = KEY_SLASH,
  1664. [60] = KEY_KPDOT,
  1665. [61] = KEY_KP7,
  1666. [62] = KEY_KP8,
  1667. [63] = KEY_KP9,
  1668. [64] = KEY_SPACE,
  1669. [65] = KEY_BACKSPACE,
  1670. [66] = KEY_TAB,
  1671. [67] = KEY_KPENTER,
  1672. [68] = KEY_ENTER,
  1673. [69] = KEY_ESC,
  1674. [70] = KEY_DELETE,
  1675. [74] = KEY_KPMINUS,
  1676. [76] = KEY_UP,
  1677. [77] = KEY_DOWN,
  1678. [78] = KEY_RIGHT,
  1679. [79] = KEY_LEFT,
  1680. };
  1681. static struct adp5588_kpad_platform_data adp5588_kpad_data = {
  1682. .rows = 8,
  1683. .cols = 10,
  1684. .keymap = adp5588_keymap,
  1685. .keymapsize = ARRAY_SIZE(adp5588_keymap),
  1686. .repeat = 0,
  1687. };
  1688. #endif
  1689. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  1690. #include <linux/mfd/adp5520.h>
  1691. /*
  1692. * ADP5520/5501 Backlight Data
  1693. */
  1694. static struct adp5520_backlight_platform_data adp5520_backlight_data = {
  1695. .fade_in = ADP5520_FADE_T_1200ms,
  1696. .fade_out = ADP5520_FADE_T_1200ms,
  1697. .fade_led_law = ADP5520_BL_LAW_LINEAR,
  1698. .en_ambl_sens = 1,
  1699. .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
  1700. .l1_daylight_max = ADP5520_BL_CUR_mA(15),
  1701. .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
  1702. .l2_office_max = ADP5520_BL_CUR_mA(7),
  1703. .l2_office_dim = ADP5520_BL_CUR_mA(0),
  1704. .l3_dark_max = ADP5520_BL_CUR_mA(3),
  1705. .l3_dark_dim = ADP5520_BL_CUR_mA(0),
  1706. .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
  1707. .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
  1708. .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
  1709. .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
  1710. };
  1711. /*
  1712. * ADP5520/5501 LEDs Data
  1713. */
  1714. static struct led_info adp5520_leds[] = {
  1715. {
  1716. .name = "adp5520-led1",
  1717. .default_trigger = "none",
  1718. .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
  1719. },
  1720. #ifdef ADP5520_EN_ALL_LEDS
  1721. {
  1722. .name = "adp5520-led2",
  1723. .default_trigger = "none",
  1724. .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
  1725. },
  1726. {
  1727. .name = "adp5520-led3",
  1728. .default_trigger = "none",
  1729. .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
  1730. },
  1731. #endif
  1732. };
  1733. static struct adp5520_leds_platform_data adp5520_leds_data = {
  1734. .num_leds = ARRAY_SIZE(adp5520_leds),
  1735. .leds = adp5520_leds,
  1736. .fade_in = ADP5520_FADE_T_600ms,
  1737. .fade_out = ADP5520_FADE_T_600ms,
  1738. .led_on_time = ADP5520_LED_ONT_600ms,
  1739. };
  1740. /*
  1741. * ADP5520 GPIO Data
  1742. */
  1743. static struct adp5520_gpio_platform_data adp5520_gpio_data = {
  1744. .gpio_start = 50,
  1745. .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1746. .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
  1747. };
  1748. /*
  1749. * ADP5520 Keypad Data
  1750. */
  1751. static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
  1752. [ADP5520_KEY(0, 0)] = KEY_GRAVE,
  1753. [ADP5520_KEY(0, 1)] = KEY_1,
  1754. [ADP5520_KEY(0, 2)] = KEY_2,
  1755. [ADP5520_KEY(0, 3)] = KEY_3,
  1756. [ADP5520_KEY(1, 0)] = KEY_4,
  1757. [ADP5520_KEY(1, 1)] = KEY_5,
  1758. [ADP5520_KEY(1, 2)] = KEY_6,
  1759. [ADP5520_KEY(1, 3)] = KEY_7,
  1760. [ADP5520_KEY(2, 0)] = KEY_8,
  1761. [ADP5520_KEY(2, 1)] = KEY_9,
  1762. [ADP5520_KEY(2, 2)] = KEY_0,
  1763. [ADP5520_KEY(2, 3)] = KEY_MINUS,
  1764. [ADP5520_KEY(3, 0)] = KEY_EQUAL,
  1765. [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
  1766. [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
  1767. [ADP5520_KEY(3, 3)] = KEY_ENTER,
  1768. };
  1769. static struct adp5520_keys_platform_data adp5520_keys_data = {
  1770. .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
  1771. .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
  1772. .keymap = adp5520_keymap,
  1773. .keymapsize = ARRAY_SIZE(adp5520_keymap),
  1774. .repeat = 0,
  1775. };
  1776. /*
  1777. * ADP5520/5501 Multifunction Device Init Data
  1778. */
  1779. static struct adp5520_platform_data adp5520_pdev_data = {
  1780. .backlight = &adp5520_backlight_data,
  1781. .leds = &adp5520_leds_data,
  1782. .gpio = &adp5520_gpio_data,
  1783. .keys = &adp5520_keys_data,
  1784. };
  1785. #endif
  1786. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  1787. static struct adp5588_gpio_platform_data adp5588_gpio_data = {
  1788. .gpio_start = 50,
  1789. .pullup_dis_mask = 0,
  1790. };
  1791. #endif
  1792. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  1793. #include <linux/i2c/adp8870.h>
  1794. static struct led_info adp8870_leds[] = {
  1795. {
  1796. .name = "adp8870-led7",
  1797. .default_trigger = "none",
  1798. .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
  1799. },
  1800. };
  1801. static struct adp8870_backlight_platform_data adp8870_pdata = {
  1802. .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
  1803. ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1804. .pwm_assign = 0, /* 1 = Enables PWM mode */
  1805. .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1806. .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1807. .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1808. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1809. .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1810. .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1811. .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1812. .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1813. .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1814. .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1815. .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1816. .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1817. .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1818. .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1819. .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1820. .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1821. .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1822. .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1823. .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
  1824. .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1825. .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
  1826. .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1827. .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1828. .leds = adp8870_leds,
  1829. .num_leds = ARRAY_SIZE(adp8870_leds),
  1830. .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1831. .led_fade_in = ADP8870_FADE_T_600ms,
  1832. .led_fade_out = ADP8870_FADE_T_600ms,
  1833. .led_on_time = ADP8870_LED_ONT_200ms,
  1834. };
  1835. #endif
  1836. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  1837. #include <linux/i2c/adp8860.h>
  1838. static struct led_info adp8860_leds[] = {
  1839. {
  1840. .name = "adp8860-led7",
  1841. .default_trigger = "none",
  1842. .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
  1843. },
  1844. };
  1845. static struct adp8860_backlight_platform_data adp8860_pdata = {
  1846. .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
  1847. ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
  1848. .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
  1849. .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
  1850. .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
  1851. .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
  1852. .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
  1853. .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1854. .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1855. .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1856. .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1857. .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1858. .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
  1859. .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1860. .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
  1861. .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1862. .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
  1863. .leds = adp8860_leds,
  1864. .num_leds = ARRAY_SIZE(adp8860_leds),
  1865. .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
  1866. .led_fade_in = ADP8860_FADE_T_600ms,
  1867. .led_fade_out = ADP8860_FADE_T_600ms,
  1868. .led_on_time = ADP8860_LED_ONT_200ms,
  1869. };
  1870. #endif
  1871. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  1872. static struct regulator_consumer_supply ad5398_consumer = {
  1873. .supply = "current",
  1874. };
  1875. static struct regulator_init_data ad5398_regulator_data = {
  1876. .constraints = {
  1877. .name = "current range",
  1878. .max_uA = 120000,
  1879. .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
  1880. },
  1881. .num_consumer_supplies = 1,
  1882. .consumer_supplies = &ad5398_consumer,
  1883. };
  1884. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  1885. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  1886. static struct platform_device ad5398_virt_consumer_device = {
  1887. .name = "reg-virt-consumer",
  1888. .id = 0,
  1889. .dev = {
  1890. .platform_data = "current", /* Passed to driver */
  1891. },
  1892. };
  1893. #endif
  1894. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  1895. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  1896. static struct regulator_bulk_data ad5398_bulk_data = {
  1897. .supply = "current",
  1898. };
  1899. static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
  1900. .name = "ad5398",
  1901. .num_supplies = 1,
  1902. .supplies = &ad5398_bulk_data,
  1903. };
  1904. static struct platform_device ad5398_userspace_consumer_device = {
  1905. .name = "reg-userspace-consumer",
  1906. .id = 0,
  1907. .dev = {
  1908. .platform_data = &ad5398_userspace_comsumer_data,
  1909. },
  1910. };
  1911. #endif
  1912. #endif
  1913. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  1914. /* INT bound temperature alarm event. line 1 */
  1915. static unsigned long adt7410_platform_data[2] = {
  1916. IRQ_PG4, IRQF_TRIGGER_LOW,
  1917. };
  1918. #endif
  1919. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  1920. /* INT bound temperature alarm event. line 1 */
  1921. static unsigned long adt7316_i2c_data[2] = {
  1922. IRQF_TRIGGER_LOW, /* interrupt flags */
  1923. GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
  1924. };
  1925. #endif
  1926. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  1927. #if defined(CONFIG_SND_BF5XX_SOC_AD193X) || defined(CONFIG_SND_BF5XX_SOC_AD193X_MODULE)
  1928. {
  1929. I2C_BOARD_INFO("ad1937", 0x04),
  1930. },
  1931. #endif
  1932. #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADAV80X_MODULE)
  1933. {
  1934. I2C_BOARD_INFO("adav803", 0x10),
  1935. },
  1936. #endif
  1937. #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
  1938. {
  1939. I2C_BOARD_INFO("ad7142_captouch", 0x2C),
  1940. .irq = IRQ_PG5,
  1941. .platform_data = (void *)&ad7142_i2c_platform_data,
  1942. },
  1943. #endif
  1944. #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
  1945. {
  1946. I2C_BOARD_INFO("ad7150", 0x48),
  1947. .irq = IRQ_PG5, /* fixme: use real interrupt number */
  1948. },
  1949. #endif
  1950. #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
  1951. {
  1952. I2C_BOARD_INFO("ad7152", 0x48),
  1953. },
  1954. #endif
  1955. #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
  1956. {
  1957. I2C_BOARD_INFO("ad774x", 0x48),
  1958. },
  1959. #endif
  1960. #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
  1961. {
  1962. I2C_BOARD_INFO("ade7854", 0x38),
  1963. },
  1964. #endif
  1965. #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
  1966. {
  1967. I2C_BOARD_INFO("adt75", 0x9),
  1968. .irq = IRQ_PG5,
  1969. },
  1970. #endif
  1971. #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
  1972. {
  1973. I2C_BOARD_INFO("adt7410", 0x48),
  1974. /* CT critical temperature event. line 0 */
  1975. .irq = IRQ_PG5,
  1976. .platform_data = (void *)&adt7410_platform_data,
  1977. },
  1978. #endif
  1979. #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
  1980. {
  1981. I2C_BOARD_INFO("ad7291", 0x20),
  1982. .irq = IRQ_PG5,
  1983. },
  1984. #endif
  1985. #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
  1986. {
  1987. I2C_BOARD_INFO("adt7316", 0x48),
  1988. .irq = IRQ_PG6,
  1989. .platform_data = (void *)&adt7316_i2c_data,
  1990. },
  1991. #endif
  1992. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  1993. {
  1994. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  1995. },
  1996. #endif
  1997. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  1998. {
  1999. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  2000. .irq = IRQ_PG6,
  2001. },
  2002. #endif
  2003. #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
  2004. {
  2005. I2C_BOARD_INFO("ad7879", 0x2F),
  2006. .irq = IRQ_PG5,
  2007. .platform_data = (void *)&bfin_ad7879_ts_info,
  2008. },
  2009. #endif
  2010. #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
  2011. {
  2012. I2C_BOARD_INFO("adp5588-keys", 0x34),
  2013. .irq = IRQ_PG0,
  2014. .platform_data = (void *)&adp5588_kpad_data,
  2015. },
  2016. #endif
  2017. #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
  2018. {
  2019. I2C_BOARD_INFO("pmic-adp5520", 0x32),
  2020. .irq = IRQ_PG0,
  2021. .platform_data = (void *)&adp5520_pdev_data,
  2022. },
  2023. #endif
  2024. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  2025. {
  2026. I2C_BOARD_INFO("adxl34x", 0x53),
  2027. .irq = IRQ_PG3,
  2028. .platform_data = (void *)&adxl34x_info,
  2029. },
  2030. #endif
  2031. #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
  2032. {
  2033. I2C_BOARD_INFO("adp5588-gpio", 0x34),
  2034. .platform_data = (void *)&adp5588_gpio_data,
  2035. },
  2036. #endif
  2037. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  2038. {
  2039. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  2040. },
  2041. #endif
  2042. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2043. {
  2044. I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
  2045. },
  2046. #endif
  2047. #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
  2048. {
  2049. I2C_BOARD_INFO("adp8870", 0x2B),
  2050. .platform_data = (void *)&adp8870_pdata,
  2051. },
  2052. #endif
  2053. #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
  2054. {
  2055. I2C_BOARD_INFO("adau1371", 0x1A),
  2056. },
  2057. #endif
  2058. #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
  2059. {
  2060. I2C_BOARD_INFO("adau1761", 0x38),
  2061. },
  2062. #endif
  2063. #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
  2064. {
  2065. I2C_BOARD_INFO("adau1361", 0x38),
  2066. },
  2067. #endif
  2068. #if defined(CONFIG_SND_SOC_ADAU1701) || defined(CONFIG_SND_SOC_ADAU1701_MODULE)
  2069. {
  2070. I2C_BOARD_INFO("adau1701", 0x34),
  2071. },
  2072. #endif
  2073. #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
  2074. {
  2075. I2C_BOARD_INFO("ad5258", 0x18),
  2076. },
  2077. #endif
  2078. #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
  2079. {
  2080. I2C_BOARD_INFO("ssm2602", 0x1b),
  2081. },
  2082. #endif
  2083. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2084. {
  2085. I2C_BOARD_INFO("ad5398", 0xC),
  2086. .platform_data = (void *)&ad5398_regulator_data,
  2087. },
  2088. #endif
  2089. #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
  2090. {
  2091. I2C_BOARD_INFO("adp8860", 0x2A),
  2092. .platform_data = (void *)&adp8860_pdata,
  2093. },
  2094. #endif
  2095. #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
  2096. {
  2097. I2C_BOARD_INFO("adau1373", 0x1A),
  2098. },
  2099. #endif
  2100. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  2101. {
  2102. I2C_BOARD_INFO("ad5252", 0x2e),
  2103. },
  2104. #endif
  2105. };
  2106. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2107. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2108. static struct resource bfin_sport0_uart_resources[] = {
  2109. {
  2110. .start = SPORT0_TCR1,
  2111. .end = SPORT0_MRCS3+4,
  2112. .flags = IORESOURCE_MEM,
  2113. },
  2114. {
  2115. .start = IRQ_SPORT0_RX,
  2116. .end = IRQ_SPORT0_RX+1,
  2117. .flags = IORESOURCE_IRQ,
  2118. },
  2119. {
  2120. .start = IRQ_SPORT0_ERROR,
  2121. .end = IRQ_SPORT0_ERROR,
  2122. .flags = IORESOURCE_IRQ,
  2123. },
  2124. };
  2125. static unsigned short bfin_sport0_peripherals[] = {
  2126. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  2127. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  2128. };
  2129. static struct platform_device bfin_sport0_uart_device = {
  2130. .name = "bfin-sport-uart",
  2131. .id = 0,
  2132. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  2133. .resource = bfin_sport0_uart_resources,
  2134. .dev = {
  2135. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  2136. },
  2137. };
  2138. #endif
  2139. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2140. static struct resource bfin_sport1_uart_resources[] = {
  2141. {
  2142. .start = SPORT1_TCR1,
  2143. .end = SPORT1_MRCS3+4,
  2144. .flags = IORESOURCE_MEM,
  2145. },
  2146. {
  2147. .start = IRQ_SPORT1_RX,
  2148. .end = IRQ_SPORT1_RX+1,
  2149. .flags = IORESOURCE_IRQ,
  2150. },
  2151. {
  2152. .start = IRQ_SPORT1_ERROR,
  2153. .end = IRQ_SPORT1_ERROR,
  2154. .flags = IORESOURCE_IRQ,
  2155. },
  2156. };
  2157. static unsigned short bfin_sport1_peripherals[] = {
  2158. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  2159. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  2160. };
  2161. static struct platform_device bfin_sport1_uart_device = {
  2162. .name = "bfin-sport-uart",
  2163. .id = 1,
  2164. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  2165. .resource = bfin_sport1_uart_resources,
  2166. .dev = {
  2167. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  2168. },
  2169. };
  2170. #endif
  2171. #endif
  2172. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2173. #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2174. /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
  2175. #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
  2176. #define PATA_INT IRQ_PF5
  2177. static struct pata_platform_info bfin_pata_platform_data = {
  2178. .ioport_shift = 1,
  2179. .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  2180. };
  2181. static struct resource bfin_pata_resources[] = {
  2182. {
  2183. .start = 0x20314020,
  2184. .end = 0x2031403F,
  2185. .flags = IORESOURCE_MEM,
  2186. },
  2187. {
  2188. .start = 0x2031401C,
  2189. .end = 0x2031401F,
  2190. .flags = IORESOURCE_MEM,
  2191. },
  2192. {
  2193. .start = PATA_INT,
  2194. .end = PATA_INT,
  2195. .flags = IORESOURCE_IRQ,
  2196. },
  2197. };
  2198. #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
  2199. static struct pata_platform_info bfin_pata_platform_data = {
  2200. .ioport_shift = 0,
  2201. };
  2202. /* CompactFlash Storage Card Memory Mapped Addressing
  2203. * /REG = A11 = 1
  2204. */
  2205. static struct resource bfin_pata_resources[] = {
  2206. {
  2207. .start = 0x20211800,
  2208. .end = 0x20211807,
  2209. .flags = IORESOURCE_MEM,
  2210. },
  2211. {
  2212. .start = 0x2021180E, /* Device Ctl */
  2213. .end = 0x2021180E,
  2214. .flags = IORESOURCE_MEM,
  2215. },
  2216. };
  2217. #endif
  2218. static struct platform_device bfin_pata_device = {
  2219. .name = "pata_platform",
  2220. .id = -1,
  2221. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  2222. .resource = bfin_pata_resources,
  2223. .dev = {
  2224. .platform_data = &bfin_pata_platform_data,
  2225. }
  2226. };
  2227. #endif
  2228. static const unsigned int cclk_vlev_datasheet[] =
  2229. {
  2230. VRPAIR(VLEV_085, 250000000),
  2231. VRPAIR(VLEV_090, 376000000),
  2232. VRPAIR(VLEV_095, 426000000),
  2233. VRPAIR(VLEV_100, 426000000),
  2234. VRPAIR(VLEV_105, 476000000),
  2235. VRPAIR(VLEV_110, 476000000),
  2236. VRPAIR(VLEV_115, 476000000),
  2237. VRPAIR(VLEV_120, 500000000),
  2238. VRPAIR(VLEV_125, 533000000),
  2239. VRPAIR(VLEV_130, 600000000),
  2240. };
  2241. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  2242. .tuple_tab = cclk_vlev_datasheet,
  2243. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  2244. .vr_settling_time = 25 /* us */,
  2245. };
  2246. static struct platform_device bfin_dpmc = {
  2247. .name = "bfin dpmc",
  2248. .dev = {
  2249. .platform_data = &bfin_dmpc_vreg_data,
  2250. },
  2251. };
  2252. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
  2253. defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
  2254. defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2255. #define SPORT_REQ(x) \
  2256. [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
  2257. P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
  2258. static const u16 bfin_snd_pin[][7] = {
  2259. SPORT_REQ(0),
  2260. SPORT_REQ(1),
  2261. };
  2262. static struct bfin_snd_platform_data bfin_snd_data[] = {
  2263. {
  2264. .pin_req = &bfin_snd_pin[0][0],
  2265. },
  2266. {
  2267. .pin_req = &bfin_snd_pin[1][0],
  2268. },
  2269. };
  2270. #define BFIN_SND_RES(x) \
  2271. [x] = { \
  2272. { \
  2273. .start = SPORT##x##_TCR1, \
  2274. .end = SPORT##x##_TCR1, \
  2275. .flags = IORESOURCE_MEM \
  2276. }, \
  2277. { \
  2278. .start = CH_SPORT##x##_RX, \
  2279. .end = CH_SPORT##x##_RX, \
  2280. .flags = IORESOURCE_DMA, \
  2281. }, \
  2282. { \
  2283. .start = CH_SPORT##x##_TX, \
  2284. .end = CH_SPORT##x##_TX, \
  2285. .flags = IORESOURCE_DMA, \
  2286. }, \
  2287. { \
  2288. .start = IRQ_SPORT##x##_ERROR, \
  2289. .end = IRQ_SPORT##x##_ERROR, \
  2290. .flags = IORESOURCE_IRQ, \
  2291. } \
  2292. }
  2293. static struct resource bfin_snd_resources[][4] = {
  2294. BFIN_SND_RES(0),
  2295. BFIN_SND_RES(1),
  2296. };
  2297. #endif
  2298. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  2299. static struct platform_device bfin_i2s_pcm = {
  2300. .name = "bfin-i2s-pcm-audio",
  2301. .id = -1,
  2302. };
  2303. #endif
  2304. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  2305. static struct platform_device bfin_tdm_pcm = {
  2306. .name = "bfin-tdm-pcm-audio",
  2307. .id = -1,
  2308. };
  2309. #endif
  2310. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2311. static struct platform_device bfin_ac97_pcm = {
  2312. .name = "bfin-ac97-pcm-audio",
  2313. .id = -1,
  2314. };
  2315. #endif
  2316. #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
  2317. static struct platform_device bfin_ad73311_codec_device = {
  2318. .name = "ad73311",
  2319. .id = -1,
  2320. };
  2321. #endif
  2322. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
  2323. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
  2324. static struct platform_device bfin_eval_adav801_device = {
  2325. .name = "bfin-eval-adav801",
  2326. .id = -1,
  2327. };
  2328. #endif
  2329. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  2330. static struct platform_device bfin_i2s = {
  2331. .name = "bfin-i2s",
  2332. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2333. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2334. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2335. .dev = {
  2336. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2337. },
  2338. };
  2339. #endif
  2340. #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
  2341. static struct platform_device bfin_tdm = {
  2342. .name = "bfin-tdm",
  2343. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2344. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2345. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2346. .dev = {
  2347. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2348. },
  2349. };
  2350. #endif
  2351. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  2352. static struct platform_device bfin_ac97 = {
  2353. .name = "bfin-ac97",
  2354. .id = CONFIG_SND_BF5XX_SPORT_NUM,
  2355. .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
  2356. .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
  2357. .dev = {
  2358. .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
  2359. },
  2360. };
  2361. #endif
  2362. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2363. #define REGULATOR_ADP122 "adp122"
  2364. #define REGULATOR_ADP122_UV 2500000
  2365. static struct regulator_consumer_supply adp122_consumers = {
  2366. .supply = REGULATOR_ADP122,
  2367. };
  2368. static struct regulator_init_data adp_switch_regulator_data = {
  2369. .constraints = {
  2370. .name = REGULATOR_ADP122,
  2371. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  2372. .min_uV = REGULATOR_ADP122_UV,
  2373. .max_uV = REGULATOR_ADP122_UV,
  2374. .min_uA = 0,
  2375. .max_uA = 300000,
  2376. },
  2377. .num_consumer_supplies = 1, /* only 1 */
  2378. .consumer_supplies = &adp122_consumers,
  2379. };
  2380. static struct fixed_voltage_config adp_switch_pdata = {
  2381. .supply_name = REGULATOR_ADP122,
  2382. .microvolts = REGULATOR_ADP122_UV,
  2383. .gpio = GPIO_PF2,
  2384. .enable_high = 1,
  2385. .enabled_at_boot = 0,
  2386. .init_data = &adp_switch_regulator_data,
  2387. };
  2388. static struct platform_device adp_switch_device = {
  2389. .name = "reg-fixed-voltage",
  2390. .id = 0,
  2391. .dev = {
  2392. .platform_data = &adp_switch_pdata,
  2393. },
  2394. };
  2395. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2396. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2397. static struct regulator_bulk_data adp122_bulk_data = {
  2398. .supply = REGULATOR_ADP122,
  2399. };
  2400. static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
  2401. .name = REGULATOR_ADP122,
  2402. .num_supplies = 1,
  2403. .supplies = &adp122_bulk_data,
  2404. };
  2405. static struct platform_device adp122_userspace_consumer_device = {
  2406. .name = "reg-userspace-consumer",
  2407. .id = 0,
  2408. .dev = {
  2409. .platform_data = &adp122_userspace_comsumer_data,
  2410. },
  2411. };
  2412. #endif
  2413. #endif
  2414. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2415. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2416. static struct resource iio_gpio_trigger_resources[] = {
  2417. [0] = {
  2418. .start = IRQ_PF5,
  2419. .end = IRQ_PF5,
  2420. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
  2421. },
  2422. };
  2423. static struct platform_device iio_gpio_trigger = {
  2424. .name = "iio_gpio_trigger",
  2425. .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
  2426. .resource = iio_gpio_trigger_resources,
  2427. };
  2428. #endif
  2429. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
  2430. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
  2431. static struct platform_device bf5xx_adau1373_device = {
  2432. .name = "bfin-eval-adau1373",
  2433. };
  2434. #endif
  2435. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
  2436. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
  2437. static struct platform_device bf5xx_adau1701_device = {
  2438. .name = "bfin-eval-adau1701",
  2439. };
  2440. #endif
  2441. static struct platform_device *stamp_devices[] __initdata = {
  2442. &bfin_dpmc,
  2443. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  2444. &bfin_pcmcia_cf_device,
  2445. #endif
  2446. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  2447. &rtc_device,
  2448. #endif
  2449. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  2450. &sl811_hcd_device,
  2451. #endif
  2452. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  2453. &isp1362_hcd_device,
  2454. #endif
  2455. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  2456. &bfin_isp1760_device,
  2457. #endif
  2458. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  2459. &smc91x_device,
  2460. #endif
  2461. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  2462. &dm9000_device,
  2463. #endif
  2464. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  2465. &bfin_can_device,
  2466. #endif
  2467. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  2468. &bfin_mii_bus,
  2469. &bfin_mac_device,
  2470. #endif
  2471. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  2472. &net2272_bfin_device,
  2473. #endif
  2474. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  2475. &bfin_spi0_device,
  2476. #endif
  2477. #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
  2478. &bfin_sport_spi0_device,
  2479. &bfin_sport_spi1_device,
  2480. #endif
  2481. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  2482. &bfin_fb_device,
  2483. #endif
  2484. #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
  2485. &bfin_lq035q1_device,
  2486. #endif
  2487. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  2488. #ifdef CONFIG_SERIAL_BFIN_UART0
  2489. &bfin_uart0_device,
  2490. #endif
  2491. #ifdef CONFIG_SERIAL_BFIN_UART1
  2492. &bfin_uart1_device,
  2493. #endif
  2494. #endif
  2495. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  2496. #ifdef CONFIG_BFIN_SIR0
  2497. &bfin_sir0_device,
  2498. #endif
  2499. #ifdef CONFIG_BFIN_SIR1
  2500. &bfin_sir1_device,
  2501. #endif
  2502. #endif
  2503. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  2504. &i2c_bfin_twi_device,
  2505. #endif
  2506. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  2507. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2508. &bfin_sport0_uart_device,
  2509. #endif
  2510. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2511. &bfin_sport1_uart_device,
  2512. #endif
  2513. #endif
  2514. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  2515. &bfin_pata_device,
  2516. #endif
  2517. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  2518. &bfin_device_gpiokeys,
  2519. #endif
  2520. #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  2521. &bfin_async_nand_device,
  2522. #endif
  2523. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  2524. &stamp_flash_device,
  2525. #endif
  2526. #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
  2527. &bfin_i2s_pcm,
  2528. #endif
  2529. #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
  2530. &bfin_tdm_pcm,
  2531. #endif
  2532. #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
  2533. &bfin_ac97_pcm,
  2534. #endif
  2535. #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
  2536. &bfin_ad73311_codec_device,
  2537. #endif
  2538. #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
  2539. &bfin_i2s,
  2540. #endif
  2541. #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
  2542. &bfin_tdm,
  2543. #endif
  2544. #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
  2545. &bfin_ac97,
  2546. #endif
  2547. #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
  2548. #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
  2549. defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
  2550. &ad5398_virt_consumer_device,
  2551. #endif
  2552. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2553. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2554. &ad5398_userspace_consumer_device,
  2555. #endif
  2556. #endif
  2557. #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
  2558. &adp_switch_device,
  2559. #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
  2560. defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
  2561. &adp122_userspace_consumer_device,
  2562. #endif
  2563. #endif
  2564. #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
  2565. defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
  2566. &iio_gpio_trigger,
  2567. #endif
  2568. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
  2569. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
  2570. &bf5xx_adau1373_device,
  2571. #endif
  2572. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
  2573. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
  2574. &bf5xx_adau1701_device,
  2575. #endif
  2576. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
  2577. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
  2578. &bfin_eval_adav801_device,
  2579. #endif
  2580. };
  2581. static int __init net2272_init(void)
  2582. {
  2583. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  2584. int ret;
  2585. ret = gpio_request(GPIO_PF6, "net2272");
  2586. if (ret)
  2587. return ret;
  2588. /* Reset the USB chip */
  2589. gpio_direction_output(GPIO_PF6, 0);
  2590. mdelay(2);
  2591. gpio_set_value(GPIO_PF6, 1);
  2592. #endif
  2593. return 0;
  2594. }
  2595. static int __init stamp_init(void)
  2596. {
  2597. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  2598. bfin_plat_nand_init();
  2599. adf702x_mac_init();
  2600. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  2601. i2c_register_board_info(0, bfin_i2c_board_info,
  2602. ARRAY_SIZE(bfin_i2c_board_info));
  2603. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  2604. if (net2272_init())
  2605. pr_warning("unable to configure net2272; it probably won't work\n");
  2606. return 0;
  2607. }
  2608. arch_initcall(stamp_init);
  2609. static struct platform_device *stamp_early_devices[] __initdata = {
  2610. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  2611. #ifdef CONFIG_SERIAL_BFIN_UART0
  2612. &bfin_uart0_device,
  2613. #endif
  2614. #ifdef CONFIG_SERIAL_BFIN_UART1
  2615. &bfin_uart1_device,
  2616. #endif
  2617. #endif
  2618. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  2619. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  2620. &bfin_sport0_uart_device,
  2621. #endif
  2622. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  2623. &bfin_sport1_uart_device,
  2624. #endif
  2625. #endif
  2626. };
  2627. void __init native_machine_early_platform_add_devices(void)
  2628. {
  2629. printk(KERN_INFO "register early platform devices\n");
  2630. early_platform_add_devices(stamp_early_devices,
  2631. ARRAY_SIZE(stamp_early_devices));
  2632. }
  2633. void native_machine_restart(char *cmd)
  2634. {
  2635. /* workaround reboot hang when booting from SPI */
  2636. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  2637. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  2638. }
  2639. /*
  2640. * Currently the MAC address is saved in Flash by U-Boot
  2641. */
  2642. #define FLASH_MAC 0x203f0000
  2643. void bfin_get_ether_addr(char *addr)
  2644. {
  2645. *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
  2646. *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
  2647. }
  2648. EXPORT_SYMBOL(bfin_get_ether_addr);