radeon_gem.c 9.9 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "radeon_drm.h"
  31. #include "radeon.h"
  32. int radeon_gem_object_init(struct drm_gem_object *obj)
  33. {
  34. BUG();
  35. return 0;
  36. }
  37. void radeon_gem_object_free(struct drm_gem_object *gobj)
  38. {
  39. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  40. if (robj) {
  41. radeon_bo_unref(&robj);
  42. }
  43. }
  44. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  45. int alignment, int initial_domain,
  46. bool discardable, bool kernel,
  47. struct drm_gem_object **obj)
  48. {
  49. struct radeon_bo *robj;
  50. int r;
  51. *obj = NULL;
  52. /* At least align on page size */
  53. if (alignment < PAGE_SIZE) {
  54. alignment = PAGE_SIZE;
  55. }
  56. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, &robj);
  57. if (r) {
  58. if (r != -ERESTARTSYS)
  59. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  60. size, initial_domain, alignment, r);
  61. return r;
  62. }
  63. *obj = &robj->gem_base;
  64. mutex_lock(&rdev->gem.mutex);
  65. list_add_tail(&robj->list, &rdev->gem.objects);
  66. mutex_unlock(&rdev->gem.mutex);
  67. return 0;
  68. }
  69. int radeon_gem_object_pin(struct drm_gem_object *obj, uint32_t pin_domain,
  70. uint64_t *gpu_addr)
  71. {
  72. struct radeon_bo *robj = gem_to_radeon_bo(obj);
  73. int r;
  74. r = radeon_bo_reserve(robj, false);
  75. if (unlikely(r != 0))
  76. return r;
  77. r = radeon_bo_pin(robj, pin_domain, gpu_addr);
  78. radeon_bo_unreserve(robj);
  79. return r;
  80. }
  81. void radeon_gem_object_unpin(struct drm_gem_object *obj)
  82. {
  83. struct radeon_bo *robj = gem_to_radeon_bo(obj);
  84. int r;
  85. r = radeon_bo_reserve(robj, false);
  86. if (likely(r == 0)) {
  87. radeon_bo_unpin(robj);
  88. radeon_bo_unreserve(robj);
  89. }
  90. }
  91. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  92. uint32_t rdomain, uint32_t wdomain)
  93. {
  94. struct radeon_bo *robj;
  95. uint32_t domain;
  96. int r;
  97. /* FIXME: reeimplement */
  98. robj = gem_to_radeon_bo(gobj);
  99. /* work out where to validate the buffer to */
  100. domain = wdomain;
  101. if (!domain) {
  102. domain = rdomain;
  103. }
  104. if (!domain) {
  105. /* Do nothings */
  106. printk(KERN_WARNING "Set domain withou domain !\n");
  107. return 0;
  108. }
  109. if (domain == RADEON_GEM_DOMAIN_CPU) {
  110. /* Asking for cpu access wait for object idle */
  111. r = radeon_bo_wait(robj, NULL, false);
  112. if (r) {
  113. printk(KERN_ERR "Failed to wait for object !\n");
  114. return r;
  115. }
  116. }
  117. return 0;
  118. }
  119. int radeon_gem_init(struct radeon_device *rdev)
  120. {
  121. INIT_LIST_HEAD(&rdev->gem.objects);
  122. return 0;
  123. }
  124. void radeon_gem_fini(struct radeon_device *rdev)
  125. {
  126. radeon_bo_force_delete(rdev);
  127. }
  128. /*
  129. * GEM ioctls.
  130. */
  131. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  132. struct drm_file *filp)
  133. {
  134. struct radeon_device *rdev = dev->dev_private;
  135. struct drm_radeon_gem_info *args = data;
  136. struct ttm_mem_type_manager *man;
  137. unsigned i;
  138. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  139. args->vram_size = rdev->mc.real_vram_size;
  140. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  141. if (rdev->stollen_vga_memory)
  142. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  143. args->vram_visible -= radeon_fbdev_total_size(rdev);
  144. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  145. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  146. args->gart_size -= rdev->ring[i].ring_size;
  147. return 0;
  148. }
  149. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  150. struct drm_file *filp)
  151. {
  152. /* TODO: implement */
  153. DRM_ERROR("unimplemented %s\n", __func__);
  154. return -ENOSYS;
  155. }
  156. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  157. struct drm_file *filp)
  158. {
  159. /* TODO: implement */
  160. DRM_ERROR("unimplemented %s\n", __func__);
  161. return -ENOSYS;
  162. }
  163. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  164. struct drm_file *filp)
  165. {
  166. struct radeon_device *rdev = dev->dev_private;
  167. struct drm_radeon_gem_create *args = data;
  168. struct drm_gem_object *gobj;
  169. uint32_t handle;
  170. int r;
  171. /* create a gem object to contain this object in */
  172. args->size = roundup(args->size, PAGE_SIZE);
  173. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  174. args->initial_domain, false,
  175. false, &gobj);
  176. if (r) {
  177. return r;
  178. }
  179. r = drm_gem_handle_create(filp, gobj, &handle);
  180. /* drop reference from allocate - handle holds it now */
  181. drm_gem_object_unreference_unlocked(gobj);
  182. if (r) {
  183. return r;
  184. }
  185. args->handle = handle;
  186. return 0;
  187. }
  188. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  189. struct drm_file *filp)
  190. {
  191. /* transition the BO to a domain -
  192. * just validate the BO into a certain domain */
  193. struct drm_radeon_gem_set_domain *args = data;
  194. struct drm_gem_object *gobj;
  195. struct radeon_bo *robj;
  196. int r;
  197. /* for now if someone requests domain CPU -
  198. * just make sure the buffer is finished with */
  199. /* just do a BO wait for now */
  200. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  201. if (gobj == NULL) {
  202. return -ENOENT;
  203. }
  204. robj = gem_to_radeon_bo(gobj);
  205. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  206. drm_gem_object_unreference_unlocked(gobj);
  207. return r;
  208. }
  209. int radeon_mode_dumb_mmap(struct drm_file *filp,
  210. struct drm_device *dev,
  211. uint32_t handle, uint64_t *offset_p)
  212. {
  213. struct drm_gem_object *gobj;
  214. struct radeon_bo *robj;
  215. gobj = drm_gem_object_lookup(dev, filp, handle);
  216. if (gobj == NULL) {
  217. return -ENOENT;
  218. }
  219. robj = gem_to_radeon_bo(gobj);
  220. *offset_p = radeon_bo_mmap_offset(robj);
  221. drm_gem_object_unreference_unlocked(gobj);
  222. return 0;
  223. }
  224. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  225. struct drm_file *filp)
  226. {
  227. struct drm_radeon_gem_mmap *args = data;
  228. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  229. }
  230. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  231. struct drm_file *filp)
  232. {
  233. struct drm_radeon_gem_busy *args = data;
  234. struct drm_gem_object *gobj;
  235. struct radeon_bo *robj;
  236. int r;
  237. uint32_t cur_placement = 0;
  238. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  239. if (gobj == NULL) {
  240. return -ENOENT;
  241. }
  242. robj = gem_to_radeon_bo(gobj);
  243. r = radeon_bo_wait(robj, &cur_placement, true);
  244. switch (cur_placement) {
  245. case TTM_PL_VRAM:
  246. args->domain = RADEON_GEM_DOMAIN_VRAM;
  247. break;
  248. case TTM_PL_TT:
  249. args->domain = RADEON_GEM_DOMAIN_GTT;
  250. break;
  251. case TTM_PL_SYSTEM:
  252. args->domain = RADEON_GEM_DOMAIN_CPU;
  253. default:
  254. break;
  255. }
  256. drm_gem_object_unreference_unlocked(gobj);
  257. return r;
  258. }
  259. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  260. struct drm_file *filp)
  261. {
  262. struct drm_radeon_gem_wait_idle *args = data;
  263. struct drm_gem_object *gobj;
  264. struct radeon_bo *robj;
  265. int r;
  266. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  267. if (gobj == NULL) {
  268. return -ENOENT;
  269. }
  270. robj = gem_to_radeon_bo(gobj);
  271. r = radeon_bo_wait(robj, NULL, false);
  272. /* callback hw specific functions if any */
  273. if (robj->rdev->asic->ioctl_wait_idle)
  274. robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
  275. drm_gem_object_unreference_unlocked(gobj);
  276. return r;
  277. }
  278. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  279. struct drm_file *filp)
  280. {
  281. struct drm_radeon_gem_set_tiling *args = data;
  282. struct drm_gem_object *gobj;
  283. struct radeon_bo *robj;
  284. int r = 0;
  285. DRM_DEBUG("%d \n", args->handle);
  286. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  287. if (gobj == NULL)
  288. return -ENOENT;
  289. robj = gem_to_radeon_bo(gobj);
  290. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  291. drm_gem_object_unreference_unlocked(gobj);
  292. return r;
  293. }
  294. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  295. struct drm_file *filp)
  296. {
  297. struct drm_radeon_gem_get_tiling *args = data;
  298. struct drm_gem_object *gobj;
  299. struct radeon_bo *rbo;
  300. int r = 0;
  301. DRM_DEBUG("\n");
  302. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  303. if (gobj == NULL)
  304. return -ENOENT;
  305. rbo = gem_to_radeon_bo(gobj);
  306. r = radeon_bo_reserve(rbo, false);
  307. if (unlikely(r != 0))
  308. goto out;
  309. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  310. radeon_bo_unreserve(rbo);
  311. out:
  312. drm_gem_object_unreference_unlocked(gobj);
  313. return r;
  314. }
  315. int radeon_mode_dumb_create(struct drm_file *file_priv,
  316. struct drm_device *dev,
  317. struct drm_mode_create_dumb *args)
  318. {
  319. struct radeon_device *rdev = dev->dev_private;
  320. struct drm_gem_object *gobj;
  321. uint32_t handle;
  322. int r;
  323. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  324. args->size = args->pitch * args->height;
  325. args->size = ALIGN(args->size, PAGE_SIZE);
  326. r = radeon_gem_object_create(rdev, args->size, 0,
  327. RADEON_GEM_DOMAIN_VRAM,
  328. false, ttm_bo_type_device,
  329. &gobj);
  330. if (r)
  331. return -ENOMEM;
  332. r = drm_gem_handle_create(file_priv, gobj, &handle);
  333. /* drop reference from allocate - handle holds it now */
  334. drm_gem_object_unreference_unlocked(gobj);
  335. if (r) {
  336. return r;
  337. }
  338. args->handle = handle;
  339. return 0;
  340. }
  341. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  342. struct drm_device *dev,
  343. uint32_t handle)
  344. {
  345. return drm_gem_handle_delete(file_priv, handle);
  346. }