cx18-queue.c 11 KB

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  1. /*
  2. * cx18 buffer queues
  3. *
  4. * Derived from ivtv-queue.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@radix.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-queue.h"
  26. #include "cx18-streams.h"
  27. #include "cx18-scb.h"
  28. #include "cx18-io.h"
  29. void cx18_buf_swap(struct cx18_buffer *buf)
  30. {
  31. int i;
  32. for (i = 0; i < buf->bytesused; i += 4)
  33. swab32s((u32 *)(buf->buf + i));
  34. }
  35. void _cx18_mdl_swap(struct cx18_mdl *mdl)
  36. {
  37. struct cx18_buffer *buf;
  38. list_for_each_entry(buf, &mdl->buf_list, list) {
  39. if (buf->bytesused == 0)
  40. break;
  41. cx18_buf_swap(buf);
  42. }
  43. }
  44. void cx18_queue_init(struct cx18_queue *q)
  45. {
  46. INIT_LIST_HEAD(&q->list);
  47. atomic_set(&q->depth, 0);
  48. q->bytesused = 0;
  49. }
  50. struct cx18_queue *_cx18_enqueue(struct cx18_stream *s, struct cx18_mdl *mdl,
  51. struct cx18_queue *q, int to_front)
  52. {
  53. /* clear the mdl if it is not to be enqueued to the full queue */
  54. if (q != &s->q_full) {
  55. mdl->bytesused = 0;
  56. mdl->readpos = 0;
  57. mdl->m_flags = 0;
  58. mdl->skipped = 0;
  59. mdl->curr_buf = NULL;
  60. }
  61. /* q_busy is restricted to a max buffer count imposed by firmware */
  62. if (q == &s->q_busy &&
  63. atomic_read(&q->depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  64. q = &s->q_free;
  65. spin_lock(&q->lock);
  66. if (to_front)
  67. list_add(&mdl->list, &q->list); /* LIFO */
  68. else
  69. list_add_tail(&mdl->list, &q->list); /* FIFO */
  70. q->bytesused += mdl->bytesused - mdl->readpos;
  71. atomic_inc(&q->depth);
  72. spin_unlock(&q->lock);
  73. return q;
  74. }
  75. struct cx18_mdl *cx18_dequeue(struct cx18_stream *s, struct cx18_queue *q)
  76. {
  77. struct cx18_mdl *mdl = NULL;
  78. spin_lock(&q->lock);
  79. if (!list_empty(&q->list)) {
  80. mdl = list_first_entry(&q->list, struct cx18_mdl, list);
  81. list_del_init(&mdl->list);
  82. q->bytesused -= mdl->bytesused - mdl->readpos;
  83. mdl->skipped = 0;
  84. atomic_dec(&q->depth);
  85. }
  86. spin_unlock(&q->lock);
  87. return mdl;
  88. }
  89. static void _cx18_mdl_set_buf_bytesused(struct cx18_stream *s,
  90. struct cx18_mdl *mdl)
  91. {
  92. struct cx18_buffer *buf;
  93. u32 buf_size = s->buf_size;
  94. u32 bytesused = mdl->bytesused;
  95. list_for_each_entry(buf, &mdl->buf_list, list) {
  96. buf->readpos = 0;
  97. if (bytesused >= buf_size) {
  98. buf->bytesused = buf_size;
  99. bytesused -= buf_size;
  100. } else {
  101. buf->bytesused = bytesused;
  102. bytesused = 0;
  103. }
  104. }
  105. }
  106. static inline void cx18_mdl_set_buf_bytesused(struct cx18_stream *s,
  107. struct cx18_mdl *mdl)
  108. {
  109. struct cx18_buffer *buf;
  110. if (list_is_singular(&mdl->buf_list)) {
  111. buf = list_first_entry(&mdl->buf_list, struct cx18_buffer,
  112. list);
  113. buf->bytesused = mdl->bytesused;
  114. buf->readpos = 0;
  115. } else {
  116. _cx18_mdl_set_buf_bytesused(s, mdl);
  117. }
  118. }
  119. struct cx18_mdl *cx18_queue_get_mdl(struct cx18_stream *s, u32 id,
  120. u32 bytesused)
  121. {
  122. struct cx18 *cx = s->cx;
  123. struct cx18_mdl *mdl;
  124. struct cx18_mdl *tmp;
  125. struct cx18_mdl *ret = NULL;
  126. LIST_HEAD(sweep_up);
  127. /*
  128. * We don't have to acquire multiple q locks here, because we are
  129. * serialized by the single threaded work handler.
  130. * MDLs from the firmware will thus remain in order as
  131. * they are moved from q_busy to q_full or to the dvb ring buffer.
  132. */
  133. spin_lock(&s->q_busy.lock);
  134. list_for_each_entry_safe(mdl, tmp, &s->q_busy.list, list) {
  135. /*
  136. * We should find what the firmware told us is done,
  137. * right at the front of the queue. If we don't, we likely have
  138. * missed an mdl done message from the firmware.
  139. * Once we skip an mdl repeatedly, relative to the size of
  140. * q_busy, we have high confidence we've missed it.
  141. */
  142. if (mdl->id != id) {
  143. mdl->skipped++;
  144. if (mdl->skipped >= atomic_read(&s->q_busy.depth)-1) {
  145. /* mdl must have fallen out of rotation */
  146. CX18_WARN("Skipped %s, MDL %d, %d "
  147. "times - it must have dropped out of "
  148. "rotation\n", s->name, mdl->id,
  149. mdl->skipped);
  150. /* Sweep it up to put it back into rotation */
  151. list_move_tail(&mdl->list, &sweep_up);
  152. atomic_dec(&s->q_busy.depth);
  153. }
  154. continue;
  155. }
  156. /*
  157. * We pull the desired mdl off of the queue here. Something
  158. * will have to put it back on a queue later.
  159. */
  160. list_del_init(&mdl->list);
  161. atomic_dec(&s->q_busy.depth);
  162. ret = mdl;
  163. break;
  164. }
  165. spin_unlock(&s->q_busy.lock);
  166. /*
  167. * We found the mdl for which we were looking. Get it ready for
  168. * the caller to put on q_full or in the dvb ring buffer.
  169. */
  170. if (ret != NULL) {
  171. ret->bytesused = bytesused;
  172. ret->skipped = 0;
  173. /* 0'ed readpos, m_flags & curr_buf when mdl went on q_busy */
  174. cx18_mdl_set_buf_bytesused(s, ret);
  175. cx18_mdl_sync_for_cpu(s, ret);
  176. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  177. set_bit(CX18_F_M_NEED_SWAP, &ret->m_flags);
  178. }
  179. /* Put any mdls the firmware is ignoring back into normal rotation */
  180. list_for_each_entry_safe(mdl, tmp, &sweep_up, list) {
  181. list_del_init(&mdl->list);
  182. cx18_enqueue(s, mdl, &s->q_free);
  183. }
  184. return ret;
  185. }
  186. /* Move all mdls of a queue, while flushing the mdl */
  187. static void cx18_queue_flush(struct cx18_stream *s,
  188. struct cx18_queue *q_src, struct cx18_queue *q_dst)
  189. {
  190. struct cx18_mdl *mdl;
  191. /* It only makes sense to flush to q_free or q_idle */
  192. if (q_src == q_dst || q_dst == &s->q_full || q_dst == &s->q_busy)
  193. return;
  194. spin_lock(&q_src->lock);
  195. spin_lock(&q_dst->lock);
  196. while (!list_empty(&q_src->list)) {
  197. mdl = list_first_entry(&q_src->list, struct cx18_mdl, list);
  198. list_move_tail(&mdl->list, &q_dst->list);
  199. mdl->bytesused = 0;
  200. mdl->readpos = 0;
  201. mdl->m_flags = 0;
  202. mdl->skipped = 0;
  203. mdl->curr_buf = NULL;
  204. atomic_inc(&q_dst->depth);
  205. }
  206. cx18_queue_init(q_src);
  207. spin_unlock(&q_src->lock);
  208. spin_unlock(&q_dst->lock);
  209. }
  210. void cx18_flush_queues(struct cx18_stream *s)
  211. {
  212. cx18_queue_flush(s, &s->q_busy, &s->q_free);
  213. cx18_queue_flush(s, &s->q_full, &s->q_free);
  214. }
  215. /*
  216. * Note, s->buf_pool is not protected by a lock,
  217. * the stream better not have *anything* going on when calling this
  218. */
  219. void cx18_unload_queues(struct cx18_stream *s)
  220. {
  221. struct cx18_queue *q_idle = &s->q_idle;
  222. struct cx18_mdl *mdl;
  223. struct cx18_buffer *buf;
  224. /* Move all MDLS to q_idle */
  225. cx18_queue_flush(s, &s->q_busy, q_idle);
  226. cx18_queue_flush(s, &s->q_full, q_idle);
  227. cx18_queue_flush(s, &s->q_free, q_idle);
  228. /* Reset MDL id's and move all buffers back to the stream's buf_pool */
  229. spin_lock(&q_idle->lock);
  230. list_for_each_entry(mdl, &q_idle->list, list) {
  231. while (!list_empty(&mdl->buf_list)) {
  232. buf = list_first_entry(&mdl->buf_list,
  233. struct cx18_buffer, list);
  234. list_move_tail(&buf->list, &s->buf_pool);
  235. buf->bytesused = 0;
  236. buf->readpos = 0;
  237. }
  238. mdl->id = s->mdl_base_idx; /* reset id to a "safe" value */
  239. /* all other mdl fields were cleared by cx18_queue_flush() */
  240. }
  241. spin_unlock(&q_idle->lock);
  242. }
  243. /*
  244. * Note, s->buf_pool is not protected by a lock,
  245. * the stream better not have *anything* going on when calling this
  246. */
  247. void cx18_load_queues(struct cx18_stream *s)
  248. {
  249. struct cx18 *cx = s->cx;
  250. struct cx18_mdl *mdl;
  251. struct cx18_buffer *buf;
  252. int mdl_id;
  253. int i;
  254. /*
  255. * Attach buffers to MDLs, give the MDLs ids, and add MDLs to q_free
  256. * Excess MDLs are left on q_idle
  257. * Excess buffers are left in buf_pool and/or on an MDL in q_idle
  258. */
  259. mdl_id = s->mdl_base_idx;
  260. for (mdl = cx18_dequeue(s, &s->q_idle), i = s->bufs_per_mdl;
  261. mdl != NULL && i == s->bufs_per_mdl;
  262. mdl = cx18_dequeue(s, &s->q_idle)) {
  263. mdl->id = mdl_id;
  264. for (i = 0; i < s->bufs_per_mdl; i++) {
  265. if (list_empty(&s->buf_pool))
  266. break;
  267. buf = list_first_entry(&s->buf_pool, struct cx18_buffer,
  268. list);
  269. list_move_tail(&buf->list, &mdl->buf_list);
  270. /* update the firmware's MDL array with this buffer */
  271. cx18_writel(cx, buf->dma_handle,
  272. &cx->scb->cpu_mdl[mdl_id + i].paddr);
  273. cx18_writel(cx, s->buf_size,
  274. &cx->scb->cpu_mdl[mdl_id + i].length);
  275. }
  276. if (i == s->bufs_per_mdl)
  277. cx18_enqueue(s, mdl, &s->q_free);
  278. else
  279. cx18_push(s, mdl, &s->q_idle); /* not enough buffers */
  280. mdl_id += i;
  281. }
  282. }
  283. void _cx18_mdl_sync_for_cpu(struct cx18_stream *s, struct cx18_mdl *mdl)
  284. {
  285. int dma = s->dma;
  286. u32 buf_size = s->buf_size;
  287. struct pci_dev *pci_dev = s->cx->pci_dev;
  288. struct cx18_buffer *buf;
  289. list_for_each_entry(buf, &mdl->buf_list, list)
  290. pci_dma_sync_single_for_cpu(pci_dev, buf->dma_handle,
  291. buf_size, dma);
  292. }
  293. void _cx18_mdl_sync_for_device(struct cx18_stream *s, struct cx18_mdl *mdl)
  294. {
  295. int dma = s->dma;
  296. u32 buf_size = s->buf_size;
  297. struct pci_dev *pci_dev = s->cx->pci_dev;
  298. struct cx18_buffer *buf;
  299. list_for_each_entry(buf, &mdl->buf_list, list)
  300. pci_dma_sync_single_for_device(pci_dev, buf->dma_handle,
  301. buf_size, dma);
  302. }
  303. int cx18_stream_alloc(struct cx18_stream *s)
  304. {
  305. struct cx18 *cx = s->cx;
  306. int i;
  307. if (s->buffers == 0)
  308. return 0;
  309. CX18_DEBUG_INFO("Allocate %s stream: %d x %d buffers "
  310. "(%d.%02d kB total)\n",
  311. s->name, s->buffers, s->buf_size,
  312. s->buffers * s->buf_size / 1024,
  313. (s->buffers * s->buf_size * 100 / 1024) % 100);
  314. if (((char __iomem *)&cx->scb->cpu_mdl[cx->free_mdl_idx + s->buffers] -
  315. (char __iomem *)cx->scb) > SCB_RESERVED_SIZE) {
  316. unsigned bufsz = (((char __iomem *)cx->scb) + SCB_RESERVED_SIZE -
  317. ((char __iomem *)cx->scb->cpu_mdl));
  318. CX18_ERR("Too many buffers, cannot fit in SCB area\n");
  319. CX18_ERR("Max buffers = %zd\n",
  320. bufsz / sizeof(struct cx18_mdl_ent));
  321. return -ENOMEM;
  322. }
  323. s->mdl_base_idx = cx->free_mdl_idx;
  324. /* allocate stream buffers and MDLs */
  325. for (i = 0; i < s->buffers; i++) {
  326. struct cx18_mdl *mdl;
  327. struct cx18_buffer *buf;
  328. /* 1 MDL per buffer to handle the worst & also default case */
  329. mdl = kzalloc(sizeof(struct cx18_mdl), GFP_KERNEL|__GFP_NOWARN);
  330. if (mdl == NULL)
  331. break;
  332. buf = kzalloc(sizeof(struct cx18_buffer),
  333. GFP_KERNEL|__GFP_NOWARN);
  334. if (buf == NULL) {
  335. kfree(mdl);
  336. break;
  337. }
  338. buf->buf = kmalloc(s->buf_size, GFP_KERNEL|__GFP_NOWARN);
  339. if (buf->buf == NULL) {
  340. kfree(mdl);
  341. kfree(buf);
  342. break;
  343. }
  344. INIT_LIST_HEAD(&mdl->list);
  345. INIT_LIST_HEAD(&mdl->buf_list);
  346. mdl->id = s->mdl_base_idx; /* a somewhat safe value */
  347. cx18_enqueue(s, mdl, &s->q_idle);
  348. INIT_LIST_HEAD(&buf->list);
  349. buf->dma_handle = pci_map_single(s->cx->pci_dev,
  350. buf->buf, s->buf_size, s->dma);
  351. cx18_buf_sync_for_cpu(s, buf);
  352. list_add_tail(&buf->list, &s->buf_pool);
  353. }
  354. if (i == s->buffers) {
  355. cx->free_mdl_idx += s->buffers;
  356. return 0;
  357. }
  358. CX18_ERR("Couldn't allocate buffers for %s stream\n", s->name);
  359. cx18_stream_free(s);
  360. return -ENOMEM;
  361. }
  362. void cx18_stream_free(struct cx18_stream *s)
  363. {
  364. struct cx18_mdl *mdl;
  365. struct cx18_buffer *buf;
  366. /* move all buffers to buf_pool and all MDLs to q_idle */
  367. cx18_unload_queues(s);
  368. /* empty q_idle */
  369. while ((mdl = cx18_dequeue(s, &s->q_idle)))
  370. kfree(mdl);
  371. /* empty buf_pool */
  372. while (!list_empty(&s->buf_pool)) {
  373. buf = list_first_entry(&s->buf_pool, struct cx18_buffer, list);
  374. list_del_init(&buf->list);
  375. pci_unmap_single(s->cx->pci_dev, buf->dma_handle,
  376. s->buf_size, s->dma);
  377. kfree(buf->buf);
  378. kfree(buf);
  379. }
  380. }