devs.c 10 KB

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  1. /* linux/arch/arm/plat-s3c24xx/devs.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Base S3C24XX platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach/irq.h>
  25. #include <mach/fb.h>
  26. #include <mach/hardware.h>
  27. #include <mach/dma.h>
  28. #include <mach/irqs.h>
  29. #include <asm/irq.h>
  30. #include <plat/regs-serial.h>
  31. #include <plat/udc.h>
  32. #include <plat/mci.h>
  33. #include <plat/devs.h>
  34. #include <plat/cpu.h>
  35. #include <plat/regs-spi.h>
  36. #include <mach/ts.h>
  37. /* Serial port registrations */
  38. static struct resource s3c2410_uart0_resource[] = {
  39. [0] = {
  40. .start = S3C2410_PA_UART0,
  41. .end = S3C2410_PA_UART0 + 0x3fff,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = IRQ_S3CUART_RX0,
  46. .end = IRQ_S3CUART_ERR0,
  47. .flags = IORESOURCE_IRQ,
  48. }
  49. };
  50. static struct resource s3c2410_uart1_resource[] = {
  51. [0] = {
  52. .start = S3C2410_PA_UART1,
  53. .end = S3C2410_PA_UART1 + 0x3fff,
  54. .flags = IORESOURCE_MEM,
  55. },
  56. [1] = {
  57. .start = IRQ_S3CUART_RX1,
  58. .end = IRQ_S3CUART_ERR1,
  59. .flags = IORESOURCE_IRQ,
  60. }
  61. };
  62. static struct resource s3c2410_uart2_resource[] = {
  63. [0] = {
  64. .start = S3C2410_PA_UART2,
  65. .end = S3C2410_PA_UART2 + 0x3fff,
  66. .flags = IORESOURCE_MEM,
  67. },
  68. [1] = {
  69. .start = IRQ_S3CUART_RX2,
  70. .end = IRQ_S3CUART_ERR2,
  71. .flags = IORESOURCE_IRQ,
  72. }
  73. };
  74. static struct resource s3c2410_uart3_resource[] = {
  75. [0] = {
  76. .start = S3C2443_PA_UART3,
  77. .end = S3C2443_PA_UART3 + 0x3fff,
  78. .flags = IORESOURCE_MEM,
  79. },
  80. [1] = {
  81. .start = IRQ_S3CUART_RX3,
  82. .end = IRQ_S3CUART_ERR3,
  83. .flags = IORESOURCE_IRQ,
  84. },
  85. };
  86. struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
  87. [0] = {
  88. .resources = s3c2410_uart0_resource,
  89. .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
  90. },
  91. [1] = {
  92. .resources = s3c2410_uart1_resource,
  93. .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
  94. },
  95. [2] = {
  96. .resources = s3c2410_uart2_resource,
  97. .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
  98. },
  99. [3] = {
  100. .resources = s3c2410_uart3_resource,
  101. .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
  102. },
  103. };
  104. /* LCD Controller */
  105. static struct resource s3c_lcd_resource[] = {
  106. [0] = {
  107. .start = S3C24XX_PA_LCD,
  108. .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
  109. .flags = IORESOURCE_MEM,
  110. },
  111. [1] = {
  112. .start = IRQ_LCD,
  113. .end = IRQ_LCD,
  114. .flags = IORESOURCE_IRQ,
  115. }
  116. };
  117. static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
  118. struct platform_device s3c_device_lcd = {
  119. .name = "s3c2410-lcd",
  120. .id = -1,
  121. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  122. .resource = s3c_lcd_resource,
  123. .dev = {
  124. .dma_mask = &s3c_device_lcd_dmamask,
  125. .coherent_dma_mask = 0xffffffffUL
  126. }
  127. };
  128. EXPORT_SYMBOL(s3c_device_lcd);
  129. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  130. {
  131. struct s3c2410fb_mach_info *npd;
  132. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  133. if (npd) {
  134. memcpy(npd, pd, sizeof(*npd));
  135. s3c_device_lcd.dev.platform_data = npd;
  136. } else {
  137. printk(KERN_ERR "no memory for LCD platform data\n");
  138. }
  139. }
  140. /* Touchscreen */
  141. struct platform_device s3c_device_ts = {
  142. .name = "s3c2410-ts",
  143. .id = -1,
  144. };
  145. EXPORT_SYMBOL(s3c_device_ts);
  146. static struct s3c2410_ts_mach_info s3c2410ts_info;
  147. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  148. {
  149. memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info));
  150. s3c_device_ts.dev.platform_data = &s3c2410ts_info;
  151. }
  152. EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
  153. /* USB Device (Gadget)*/
  154. static struct resource s3c_usbgadget_resource[] = {
  155. [0] = {
  156. .start = S3C24XX_PA_USBDEV,
  157. .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
  158. .flags = IORESOURCE_MEM,
  159. },
  160. [1] = {
  161. .start = IRQ_USBD,
  162. .end = IRQ_USBD,
  163. .flags = IORESOURCE_IRQ,
  164. }
  165. };
  166. struct platform_device s3c_device_usbgadget = {
  167. .name = "s3c2410-usbgadget",
  168. .id = -1,
  169. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  170. .resource = s3c_usbgadget_resource,
  171. };
  172. EXPORT_SYMBOL(s3c_device_usbgadget);
  173. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  174. {
  175. struct s3c2410_udc_mach_info *npd;
  176. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  177. if (npd) {
  178. memcpy(npd, pd, sizeof(*npd));
  179. s3c_device_usbgadget.dev.platform_data = npd;
  180. } else {
  181. printk(KERN_ERR "no memory for udc platform data\n");
  182. }
  183. }
  184. /* Watchdog */
  185. static struct resource s3c_wdt_resource[] = {
  186. [0] = {
  187. .start = S3C24XX_PA_WATCHDOG,
  188. .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
  189. .flags = IORESOURCE_MEM,
  190. },
  191. [1] = {
  192. .start = IRQ_WDT,
  193. .end = IRQ_WDT,
  194. .flags = IORESOURCE_IRQ,
  195. }
  196. };
  197. struct platform_device s3c_device_wdt = {
  198. .name = "s3c2410-wdt",
  199. .id = -1,
  200. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  201. .resource = s3c_wdt_resource,
  202. };
  203. EXPORT_SYMBOL(s3c_device_wdt);
  204. /* IIS */
  205. static struct resource s3c_iis_resource[] = {
  206. [0] = {
  207. .start = S3C24XX_PA_IIS,
  208. .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
  209. .flags = IORESOURCE_MEM,
  210. }
  211. };
  212. static u64 s3c_device_iis_dmamask = 0xffffffffUL;
  213. struct platform_device s3c_device_iis = {
  214. .name = "s3c2410-iis",
  215. .id = -1,
  216. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  217. .resource = s3c_iis_resource,
  218. .dev = {
  219. .dma_mask = &s3c_device_iis_dmamask,
  220. .coherent_dma_mask = 0xffffffffUL
  221. }
  222. };
  223. EXPORT_SYMBOL(s3c_device_iis);
  224. /* RTC */
  225. static struct resource s3c_rtc_resource[] = {
  226. [0] = {
  227. .start = S3C24XX_PA_RTC,
  228. .end = S3C24XX_PA_RTC + 0xff,
  229. .flags = IORESOURCE_MEM,
  230. },
  231. [1] = {
  232. .start = IRQ_RTC,
  233. .end = IRQ_RTC,
  234. .flags = IORESOURCE_IRQ,
  235. },
  236. [2] = {
  237. .start = IRQ_TICK,
  238. .end = IRQ_TICK,
  239. .flags = IORESOURCE_IRQ
  240. }
  241. };
  242. struct platform_device s3c_device_rtc = {
  243. .name = "s3c2410-rtc",
  244. .id = -1,
  245. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  246. .resource = s3c_rtc_resource,
  247. };
  248. EXPORT_SYMBOL(s3c_device_rtc);
  249. /* ADC */
  250. static struct resource s3c_adc_resource[] = {
  251. [0] = {
  252. .start = S3C24XX_PA_ADC,
  253. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  254. .flags = IORESOURCE_MEM,
  255. },
  256. [1] = {
  257. .start = IRQ_TC,
  258. .end = IRQ_TC,
  259. .flags = IORESOURCE_IRQ,
  260. },
  261. [2] = {
  262. .start = IRQ_ADC,
  263. .end = IRQ_ADC,
  264. .flags = IORESOURCE_IRQ,
  265. }
  266. };
  267. struct platform_device s3c_device_adc = {
  268. .name = "s3c24xx-adc",
  269. .id = -1,
  270. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  271. .resource = s3c_adc_resource,
  272. };
  273. /* HWMON */
  274. struct platform_device s3c_device_hwmon = {
  275. .name = "s3c-hwmon",
  276. .id = -1,
  277. .dev.parent = &s3c_device_adc.dev,
  278. };
  279. /* SDI */
  280. static struct resource s3c_sdi_resource[] = {
  281. [0] = {
  282. .start = S3C24XX_PA_SDI,
  283. .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
  284. .flags = IORESOURCE_MEM,
  285. },
  286. [1] = {
  287. .start = IRQ_SDI,
  288. .end = IRQ_SDI,
  289. .flags = IORESOURCE_IRQ,
  290. }
  291. };
  292. struct platform_device s3c_device_sdi = {
  293. .name = "s3c2410-sdi",
  294. .id = -1,
  295. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  296. .resource = s3c_sdi_resource,
  297. };
  298. EXPORT_SYMBOL(s3c_device_sdi);
  299. void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  300. {
  301. struct s3c24xx_mci_pdata *npd;
  302. npd = kmemdup(pdata, sizeof(struct s3c24xx_mci_pdata), GFP_KERNEL);
  303. if (!npd)
  304. printk(KERN_ERR "%s: no memory to copy pdata", __func__);
  305. s3c_device_sdi.dev.platform_data = npd;
  306. }
  307. /* SPI (0) */
  308. static struct resource s3c_spi0_resource[] = {
  309. [0] = {
  310. .start = S3C24XX_PA_SPI,
  311. .end = S3C24XX_PA_SPI + 0x1f,
  312. .flags = IORESOURCE_MEM,
  313. },
  314. [1] = {
  315. .start = IRQ_SPI0,
  316. .end = IRQ_SPI0,
  317. .flags = IORESOURCE_IRQ,
  318. }
  319. };
  320. static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
  321. struct platform_device s3c_device_spi0 = {
  322. .name = "s3c2410-spi",
  323. .id = 0,
  324. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  325. .resource = s3c_spi0_resource,
  326. .dev = {
  327. .dma_mask = &s3c_device_spi0_dmamask,
  328. .coherent_dma_mask = 0xffffffffUL
  329. }
  330. };
  331. EXPORT_SYMBOL(s3c_device_spi0);
  332. /* SPI (1) */
  333. static struct resource s3c_spi1_resource[] = {
  334. [0] = {
  335. .start = S3C24XX_PA_SPI + S3C2410_SPI1,
  336. .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
  337. .flags = IORESOURCE_MEM,
  338. },
  339. [1] = {
  340. .start = IRQ_SPI1,
  341. .end = IRQ_SPI1,
  342. .flags = IORESOURCE_IRQ,
  343. }
  344. };
  345. static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
  346. struct platform_device s3c_device_spi1 = {
  347. .name = "s3c2410-spi",
  348. .id = 1,
  349. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  350. .resource = s3c_spi1_resource,
  351. .dev = {
  352. .dma_mask = &s3c_device_spi1_dmamask,
  353. .coherent_dma_mask = 0xffffffffUL
  354. }
  355. };
  356. EXPORT_SYMBOL(s3c_device_spi1);
  357. #ifdef CONFIG_CPU_S3C2440
  358. /* Camif Controller */
  359. static struct resource s3c_camif_resource[] = {
  360. [0] = {
  361. .start = S3C2440_PA_CAMIF,
  362. .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
  363. .flags = IORESOURCE_MEM,
  364. },
  365. [1] = {
  366. .start = IRQ_CAM,
  367. .end = IRQ_CAM,
  368. .flags = IORESOURCE_IRQ,
  369. }
  370. };
  371. static u64 s3c_device_camif_dmamask = 0xffffffffUL;
  372. struct platform_device s3c_device_camif = {
  373. .name = "s3c2440-camif",
  374. .id = -1,
  375. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  376. .resource = s3c_camif_resource,
  377. .dev = {
  378. .dma_mask = &s3c_device_camif_dmamask,
  379. .coherent_dma_mask = 0xffffffffUL
  380. }
  381. };
  382. EXPORT_SYMBOL(s3c_device_camif);
  383. /* AC97 */
  384. static struct resource s3c_ac97_resource[] = {
  385. [0] = {
  386. .start = S3C2440_PA_AC97,
  387. .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 -1,
  388. .flags = IORESOURCE_MEM,
  389. },
  390. [1] = {
  391. .start = IRQ_S3C244x_AC97,
  392. .end = IRQ_S3C244x_AC97,
  393. .flags = IORESOURCE_IRQ,
  394. },
  395. [2] = {
  396. .name = "PCM out",
  397. .start = DMACH_PCM_OUT,
  398. .end = DMACH_PCM_OUT,
  399. .flags = IORESOURCE_DMA,
  400. },
  401. [3] = {
  402. .name = "PCM in",
  403. .start = DMACH_PCM_IN,
  404. .end = DMACH_PCM_IN,
  405. .flags = IORESOURCE_DMA,
  406. },
  407. [4] = {
  408. .name = "Mic in",
  409. .start = DMACH_MIC_IN,
  410. .end = DMACH_MIC_IN,
  411. .flags = IORESOURCE_DMA,
  412. },
  413. };
  414. static u64 s3c_device_ac97_dmamask = 0xffffffffUL;
  415. struct platform_device s3c_device_ac97 = {
  416. .name = "s3c-ac97",
  417. .id = -1,
  418. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  419. .resource = s3c_ac97_resource,
  420. .dev = {
  421. .dma_mask = &s3c_device_ac97_dmamask,
  422. .coherent_dma_mask = 0xffffffffUL
  423. }
  424. };
  425. EXPORT_SYMBOL(s3c_device_ac97);
  426. #endif // CONFIG_CPU_S32440