ezkit.c 30 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/irq.h>
  16. #include <linux/i2c.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/musb.h>
  19. #include <asm/bfin6xx_spi.h>
  20. #include <asm/dma.h>
  21. #include <asm/gpio.h>
  22. #include <asm/nand.h>
  23. #include <asm/dpmc.h>
  24. #include <asm/portmux.h>
  25. #include <asm/bfin_sdh.h>
  26. #include <linux/input.h>
  27. #include <linux/spi/ad7877.h>
  28. /*
  29. * Name the Board for the /proc/cpuinfo
  30. */
  31. const char bfin_board_name[] = "ADI BF609-EZKIT";
  32. /*
  33. * Driver needs to know address, irq and flag pin.
  34. */
  35. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  36. #include <linux/usb/isp1760.h>
  37. static struct resource bfin_isp1760_resources[] = {
  38. [0] = {
  39. .start = 0x2C0C0000,
  40. .end = 0x2C0C0000 + 0xfffff,
  41. .flags = IORESOURCE_MEM,
  42. },
  43. [1] = {
  44. .start = IRQ_PG7,
  45. .end = IRQ_PG7,
  46. .flags = IORESOURCE_IRQ,
  47. },
  48. };
  49. static struct isp1760_platform_data isp1760_priv = {
  50. .is_isp1761 = 0,
  51. .bus_width_16 = 1,
  52. .port1_otg = 0,
  53. .analog_oc = 0,
  54. .dack_polarity_high = 0,
  55. .dreq_polarity_high = 0,
  56. };
  57. static struct platform_device bfin_isp1760_device = {
  58. .name = "isp1760",
  59. .id = 0,
  60. .dev = {
  61. .platform_data = &isp1760_priv,
  62. },
  63. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  64. .resource = bfin_isp1760_resources,
  65. };
  66. #endif
  67. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  68. #include <asm/bfin_rotary.h>
  69. static struct bfin_rotary_platform_data bfin_rotary_data = {
  70. /*.rotary_up_key = KEY_UP,*/
  71. /*.rotary_down_key = KEY_DOWN,*/
  72. .rotary_rel_code = REL_WHEEL,
  73. .rotary_button_key = KEY_ENTER,
  74. .debounce = 10, /* 0..17 */
  75. .mode = ROT_QUAD_ENC | ROT_DEBE,
  76. };
  77. static struct resource bfin_rotary_resources[] = {
  78. {
  79. .start = IRQ_CNT,
  80. .end = IRQ_CNT,
  81. .flags = IORESOURCE_IRQ,
  82. },
  83. };
  84. static struct platform_device bfin_rotary_device = {
  85. .name = "bfin-rotary",
  86. .id = -1,
  87. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  88. .resource = bfin_rotary_resources,
  89. .dev = {
  90. .platform_data = &bfin_rotary_data,
  91. },
  92. };
  93. #endif
  94. #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
  95. #include <linux/stmmac.h>
  96. static struct stmmac_mdio_bus_data phy_private_data = {
  97. .bus_id = 0,
  98. .phy_mask = 1,
  99. };
  100. static struct plat_stmmacenet_data eth_private_data = {
  101. .bus_id = 0,
  102. .enh_desc = 1,
  103. .phy_addr = 1,
  104. .mdio_bus_data = &phy_private_data,
  105. };
  106. static struct platform_device bfin_eth_device = {
  107. .name = "stmmaceth",
  108. .id = 0,
  109. .num_resources = 2,
  110. .resource = (struct resource[]) {
  111. {
  112. .start = EMAC0_MACCFG,
  113. .end = EMAC0_MACCFG + 0x1274,
  114. .flags = IORESOURCE_MEM,
  115. },
  116. {
  117. .name = "macirq",
  118. .start = IRQ_EMAC0_STAT,
  119. .end = IRQ_EMAC0_STAT,
  120. .flags = IORESOURCE_IRQ,
  121. },
  122. },
  123. .dev = {
  124. .platform_data = &eth_private_data,
  125. }
  126. };
  127. #endif
  128. #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
  129. #include <linux/input/adxl34x.h>
  130. static const struct adxl34x_platform_data adxl34x_info = {
  131. .x_axis_offset = 0,
  132. .y_axis_offset = 0,
  133. .z_axis_offset = 0,
  134. .tap_threshold = 0x31,
  135. .tap_duration = 0x10,
  136. .tap_latency = 0x60,
  137. .tap_window = 0xF0,
  138. .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
  139. .act_axis_control = 0xFF,
  140. .activity_threshold = 5,
  141. .inactivity_threshold = 3,
  142. .inactivity_time = 4,
  143. .free_fall_threshold = 0x7,
  144. .free_fall_time = 0x20,
  145. .data_rate = 0x8,
  146. .data_range = ADXL_FULL_RES,
  147. .ev_type = EV_ABS,
  148. .ev_code_x = ABS_X, /* EV_REL */
  149. .ev_code_y = ABS_Y, /* EV_REL */
  150. .ev_code_z = ABS_Z, /* EV_REL */
  151. .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
  152. /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
  153. /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
  154. .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
  155. .fifo_mode = ADXL_FIFO_STREAM,
  156. .orientation_enable = ADXL_EN_ORIENTATION_3D,
  157. .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
  158. .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
  159. /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
  160. .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
  161. };
  162. #endif
  163. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  164. static struct platform_device rtc_device = {
  165. .name = "rtc-bfin",
  166. .id = -1,
  167. };
  168. #endif
  169. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  170. #ifdef CONFIG_SERIAL_BFIN_UART0
  171. static struct resource bfin_uart0_resources[] = {
  172. {
  173. .start = UART0_REVID,
  174. .end = UART0_RXDIV+4,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. {
  178. .start = IRQ_UART0_TX,
  179. .end = IRQ_UART0_TX,
  180. .flags = IORESOURCE_IRQ,
  181. },
  182. {
  183. .start = IRQ_UART0_RX,
  184. .end = IRQ_UART0_RX,
  185. .flags = IORESOURCE_IRQ,
  186. },
  187. {
  188. .start = IRQ_UART0_STAT,
  189. .end = IRQ_UART0_STAT,
  190. .flags = IORESOURCE_IRQ,
  191. },
  192. {
  193. .start = CH_UART0_TX,
  194. .end = CH_UART0_TX,
  195. .flags = IORESOURCE_DMA,
  196. },
  197. {
  198. .start = CH_UART0_RX,
  199. .end = CH_UART0_RX,
  200. .flags = IORESOURCE_DMA,
  201. },
  202. #ifdef CONFIG_BFIN_UART0_CTSRTS
  203. { /* CTS pin -- 0 means not supported */
  204. .start = GPIO_PD10,
  205. .end = GPIO_PD10,
  206. .flags = IORESOURCE_IO,
  207. },
  208. { /* RTS pin -- 0 means not supported */
  209. .start = GPIO_PD9,
  210. .end = GPIO_PD9,
  211. .flags = IORESOURCE_IO,
  212. },
  213. #endif
  214. };
  215. static unsigned short bfin_uart0_peripherals[] = {
  216. P_UART0_TX, P_UART0_RX,
  217. #ifdef CONFIG_BFIN_UART0_CTSRTS
  218. P_UART0_RTS, P_UART0_CTS,
  219. #endif
  220. 0
  221. };
  222. static struct platform_device bfin_uart0_device = {
  223. .name = "bfin-uart",
  224. .id = 0,
  225. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  226. .resource = bfin_uart0_resources,
  227. .dev = {
  228. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  229. },
  230. };
  231. #endif
  232. #ifdef CONFIG_SERIAL_BFIN_UART1
  233. static struct resource bfin_uart1_resources[] = {
  234. {
  235. .start = UART1_REVID,
  236. .end = UART1_RXDIV+4,
  237. .flags = IORESOURCE_MEM,
  238. },
  239. {
  240. .start = IRQ_UART1_TX,
  241. .end = IRQ_UART1_TX,
  242. .flags = IORESOURCE_IRQ,
  243. },
  244. {
  245. .start = IRQ_UART1_RX,
  246. .end = IRQ_UART1_RX,
  247. .flags = IORESOURCE_IRQ,
  248. },
  249. {
  250. .start = IRQ_UART1_STAT,
  251. .end = IRQ_UART1_STAT,
  252. .flags = IORESOURCE_IRQ,
  253. },
  254. {
  255. .start = CH_UART1_TX,
  256. .end = CH_UART1_TX,
  257. .flags = IORESOURCE_DMA,
  258. },
  259. {
  260. .start = CH_UART1_RX,
  261. .end = CH_UART1_RX,
  262. .flags = IORESOURCE_DMA,
  263. },
  264. #ifdef CONFIG_BFIN_UART1_CTSRTS
  265. { /* CTS pin -- 0 means not supported */
  266. .start = GPIO_PG13,
  267. .end = GPIO_PG13,
  268. .flags = IORESOURCE_IO,
  269. },
  270. { /* RTS pin -- 0 means not supported */
  271. .start = GPIO_PG10,
  272. .end = GPIO_PG10,
  273. .flags = IORESOURCE_IO,
  274. },
  275. #endif
  276. };
  277. static unsigned short bfin_uart1_peripherals[] = {
  278. P_UART1_TX, P_UART1_RX,
  279. #ifdef CONFIG_BFIN_UART1_CTSRTS
  280. P_UART1_RTS, P_UART1_CTS,
  281. #endif
  282. 0
  283. };
  284. static struct platform_device bfin_uart1_device = {
  285. .name = "bfin-uart",
  286. .id = 1,
  287. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  288. .resource = bfin_uart1_resources,
  289. .dev = {
  290. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  291. },
  292. };
  293. #endif
  294. #endif
  295. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  296. #ifdef CONFIG_BFIN_SIR0
  297. static struct resource bfin_sir0_resources[] = {
  298. {
  299. .start = 0xFFC00400,
  300. .end = 0xFFC004FF,
  301. .flags = IORESOURCE_MEM,
  302. },
  303. {
  304. .start = IRQ_UART0_TX,
  305. .end = IRQ_UART0_TX+1,
  306. .flags = IORESOURCE_IRQ,
  307. },
  308. {
  309. .start = CH_UART0_TX,
  310. .end = CH_UART0_TX+1,
  311. .flags = IORESOURCE_DMA,
  312. },
  313. };
  314. static struct platform_device bfin_sir0_device = {
  315. .name = "bfin_sir",
  316. .id = 0,
  317. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  318. .resource = bfin_sir0_resources,
  319. };
  320. #endif
  321. #ifdef CONFIG_BFIN_SIR1
  322. static struct resource bfin_sir1_resources[] = {
  323. {
  324. .start = 0xFFC02000,
  325. .end = 0xFFC020FF,
  326. .flags = IORESOURCE_MEM,
  327. },
  328. {
  329. .start = IRQ_UART1_TX,
  330. .end = IRQ_UART1_TX+1,
  331. .flags = IORESOURCE_IRQ,
  332. },
  333. {
  334. .start = CH_UART1_TX,
  335. .end = CH_UART1_TX+1,
  336. .flags = IORESOURCE_DMA,
  337. },
  338. };
  339. static struct platform_device bfin_sir1_device = {
  340. .name = "bfin_sir",
  341. .id = 1,
  342. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  343. .resource = bfin_sir1_resources,
  344. };
  345. #endif
  346. #endif
  347. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  348. static struct resource musb_resources[] = {
  349. [0] = {
  350. .start = 0xFFCC1000,
  351. .end = 0xFFCC1398,
  352. .flags = IORESOURCE_MEM,
  353. },
  354. [1] = { /* general IRQ */
  355. .start = IRQ_USB_STAT,
  356. .end = IRQ_USB_STAT,
  357. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  358. .name = "mc"
  359. },
  360. [2] = { /* DMA IRQ */
  361. .start = IRQ_USB_DMA,
  362. .end = IRQ_USB_DMA,
  363. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  364. .name = "dma"
  365. },
  366. };
  367. static struct musb_hdrc_config musb_config = {
  368. .multipoint = 1,
  369. .dyn_fifo = 0,
  370. .dma = 1,
  371. .num_eps = 16,
  372. .dma_channels = 8,
  373. .clkin = 48, /* musb CLKIN in MHZ */
  374. };
  375. static struct musb_hdrc_platform_data musb_plat = {
  376. #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
  377. .mode = MUSB_OTG,
  378. #elif defined(CONFIG_USB_MUSB_HDRC)
  379. .mode = MUSB_HOST,
  380. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  381. .mode = MUSB_PERIPHERAL,
  382. #endif
  383. .config = &musb_config,
  384. };
  385. static u64 musb_dmamask = ~(u32)0;
  386. static struct platform_device musb_device = {
  387. .name = "musb-blackfin",
  388. .id = 0,
  389. .dev = {
  390. .dma_mask = &musb_dmamask,
  391. .coherent_dma_mask = 0xffffffff,
  392. .platform_data = &musb_plat,
  393. },
  394. .num_resources = ARRAY_SIZE(musb_resources),
  395. .resource = musb_resources,
  396. };
  397. #endif
  398. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  399. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  400. static struct resource bfin_sport0_uart_resources[] = {
  401. {
  402. .start = SPORT0_TCR1,
  403. .end = SPORT0_MRCS3+4,
  404. .flags = IORESOURCE_MEM,
  405. },
  406. {
  407. .start = IRQ_SPORT0_RX,
  408. .end = IRQ_SPORT0_RX+1,
  409. .flags = IORESOURCE_IRQ,
  410. },
  411. {
  412. .start = IRQ_SPORT0_ERROR,
  413. .end = IRQ_SPORT0_ERROR,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. };
  417. static unsigned short bfin_sport0_peripherals[] = {
  418. P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
  419. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
  420. };
  421. static struct platform_device bfin_sport0_uart_device = {
  422. .name = "bfin-sport-uart",
  423. .id = 0,
  424. .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
  425. .resource = bfin_sport0_uart_resources,
  426. .dev = {
  427. .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
  428. },
  429. };
  430. #endif
  431. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  432. static struct resource bfin_sport1_uart_resources[] = {
  433. {
  434. .start = SPORT1_TCR1,
  435. .end = SPORT1_MRCS3+4,
  436. .flags = IORESOURCE_MEM,
  437. },
  438. {
  439. .start = IRQ_SPORT1_RX,
  440. .end = IRQ_SPORT1_RX+1,
  441. .flags = IORESOURCE_IRQ,
  442. },
  443. {
  444. .start = IRQ_SPORT1_ERROR,
  445. .end = IRQ_SPORT1_ERROR,
  446. .flags = IORESOURCE_IRQ,
  447. },
  448. };
  449. static unsigned short bfin_sport1_peripherals[] = {
  450. P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
  451. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
  452. };
  453. static struct platform_device bfin_sport1_uart_device = {
  454. .name = "bfin-sport-uart",
  455. .id = 1,
  456. .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
  457. .resource = bfin_sport1_uart_resources,
  458. .dev = {
  459. .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
  460. },
  461. };
  462. #endif
  463. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  464. static struct resource bfin_sport2_uart_resources[] = {
  465. {
  466. .start = SPORT2_TCR1,
  467. .end = SPORT2_MRCS3+4,
  468. .flags = IORESOURCE_MEM,
  469. },
  470. {
  471. .start = IRQ_SPORT2_RX,
  472. .end = IRQ_SPORT2_RX+1,
  473. .flags = IORESOURCE_IRQ,
  474. },
  475. {
  476. .start = IRQ_SPORT2_ERROR,
  477. .end = IRQ_SPORT2_ERROR,
  478. .flags = IORESOURCE_IRQ,
  479. },
  480. };
  481. static unsigned short bfin_sport2_peripherals[] = {
  482. P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
  483. P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
  484. };
  485. static struct platform_device bfin_sport2_uart_device = {
  486. .name = "bfin-sport-uart",
  487. .id = 2,
  488. .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
  489. .resource = bfin_sport2_uart_resources,
  490. .dev = {
  491. .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
  492. },
  493. };
  494. #endif
  495. #endif
  496. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  497. static unsigned short bfin_can0_peripherals[] = {
  498. P_CAN0_RX, P_CAN0_TX, 0
  499. };
  500. static struct resource bfin_can0_resources[] = {
  501. {
  502. .start = 0xFFC00A00,
  503. .end = 0xFFC00FFF,
  504. .flags = IORESOURCE_MEM,
  505. },
  506. {
  507. .start = IRQ_CAN0_RX,
  508. .end = IRQ_CAN0_RX,
  509. .flags = IORESOURCE_IRQ,
  510. },
  511. {
  512. .start = IRQ_CAN0_TX,
  513. .end = IRQ_CAN0_TX,
  514. .flags = IORESOURCE_IRQ,
  515. },
  516. {
  517. .start = IRQ_CAN0_STAT,
  518. .end = IRQ_CAN0_STAT,
  519. .flags = IORESOURCE_IRQ,
  520. },
  521. };
  522. static struct platform_device bfin_can0_device = {
  523. .name = "bfin_can",
  524. .id = 0,
  525. .num_resources = ARRAY_SIZE(bfin_can0_resources),
  526. .resource = bfin_can0_resources,
  527. .dev = {
  528. .platform_data = &bfin_can0_peripherals, /* Passed to driver */
  529. },
  530. };
  531. #endif
  532. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  533. static struct mtd_partition partition_info[] = {
  534. {
  535. .name = "bootloader(nand)",
  536. .offset = 0,
  537. .size = 0x80000,
  538. }, {
  539. .name = "linux kernel(nand)",
  540. .offset = MTDPART_OFS_APPEND,
  541. .size = 4 * 1024 * 1024,
  542. },
  543. {
  544. .name = "file system(nand)",
  545. .offset = MTDPART_OFS_APPEND,
  546. .size = MTDPART_SIZ_FULL,
  547. },
  548. };
  549. static struct bf5xx_nand_platform bfin_nand_platform = {
  550. .data_width = NFC_NWIDTH_8,
  551. .partitions = partition_info,
  552. .nr_partitions = ARRAY_SIZE(partition_info),
  553. .rd_dly = 3,
  554. .wr_dly = 3,
  555. };
  556. static struct resource bfin_nand_resources[] = {
  557. {
  558. .start = 0xFFC03B00,
  559. .end = 0xFFC03B4F,
  560. .flags = IORESOURCE_MEM,
  561. },
  562. {
  563. .start = CH_NFC,
  564. .end = CH_NFC,
  565. .flags = IORESOURCE_IRQ,
  566. },
  567. };
  568. static struct platform_device bfin_nand_device = {
  569. .name = "bfin-nand",
  570. .id = 0,
  571. .num_resources = ARRAY_SIZE(bfin_nand_resources),
  572. .resource = bfin_nand_resources,
  573. .dev = {
  574. .platform_data = &bfin_nand_platform,
  575. },
  576. };
  577. #endif
  578. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  579. static struct bfin_sd_host bfin_sdh_data = {
  580. .dma_chan = CH_RSI,
  581. .irq_int0 = IRQ_RSI_INT0,
  582. .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
  583. };
  584. static struct platform_device bfin_sdh_device = {
  585. .name = "bfin-sdh",
  586. .id = 0,
  587. .dev = {
  588. .platform_data = &bfin_sdh_data,
  589. },
  590. };
  591. #endif
  592. #if defined(CONFIG_MTD_BFIN_BF60x) || defined(CONFIG_MTD_BFIN_BF60x_MODULE)
  593. static struct mtd_partition ezkit_partitions[] = {
  594. {
  595. .name = "bootloader(nor)",
  596. .size = 0x80000,
  597. .offset = 0,
  598. }, {
  599. .name = "linux kernel(nor)",
  600. .size = 0x400000,
  601. .offset = MTDPART_OFS_APPEND,
  602. }, {
  603. .name = "file system(nor)",
  604. .size = 0x1000000 - 0x80000 - 0x400000,
  605. .offset = MTDPART_OFS_APPEND,
  606. },
  607. };
  608. int bf609_nor_flash_init(struct platform_device *dev)
  609. {
  610. #define CONFIG_SMC_GCTL_VAL 0x00000010
  611. const unsigned short pins[] = {
  612. P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
  613. P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
  614. P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
  615. };
  616. peripheral_request_list(pins, "smc0");
  617. bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
  618. bfin_write32(SMC_B0CTL, 0x01002001);
  619. bfin_write32(SMC_B0TIM, 0x08170977);
  620. bfin_write32(SMC_B0ETIM, 0x00092231);
  621. return 0;
  622. }
  623. static struct physmap_flash_data ezkit_flash_data = {
  624. .width = 2,
  625. .parts = ezkit_partitions,
  626. .init = bf609_nor_flash_init,
  627. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  628. };
  629. static struct resource ezkit_flash_resource = {
  630. .start = 0xb0000000,
  631. .end = 0xb0ffffff,
  632. .flags = IORESOURCE_MEM,
  633. };
  634. static struct platform_device ezkit_flash_device = {
  635. .name = "bf60x-flash",
  636. .id = 0,
  637. .dev = {
  638. .platform_data = &ezkit_flash_data,
  639. },
  640. .num_resources = 1,
  641. .resource = &ezkit_flash_resource,
  642. };
  643. #endif
  644. #if defined(CONFIG_MTD_M25P80) \
  645. || defined(CONFIG_MTD_M25P80_MODULE)
  646. /* SPI flash chip (w25q32) */
  647. static struct mtd_partition bfin_spi_flash_partitions[] = {
  648. {
  649. .name = "bootloader(spi)",
  650. .size = 0x00080000,
  651. .offset = 0,
  652. .mask_flags = MTD_CAP_ROM
  653. }, {
  654. .name = "linux kernel(spi)",
  655. .size = 0x00180000,
  656. .offset = MTDPART_OFS_APPEND,
  657. }, {
  658. .name = "file system(spi)",
  659. .size = MTDPART_SIZ_FULL,
  660. .offset = MTDPART_OFS_APPEND,
  661. }
  662. };
  663. static struct flash_platform_data bfin_spi_flash_data = {
  664. .name = "m25p80",
  665. .parts = bfin_spi_flash_partitions,
  666. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  667. .type = "w25q32",
  668. };
  669. static struct bfin6xx_spi_chip spi_flash_chip_info = {
  670. .enable_dma = true, /* use dma transfer with this chip*/
  671. };
  672. #endif
  673. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  674. static struct bfin6xx_spi_chip spidev_chip_info = {
  675. .enable_dma = true,
  676. };
  677. #endif
  678. #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
  679. static struct platform_device bfin_i2s_pcm = {
  680. .name = "bfin-i2s-pcm-audio",
  681. .id = -1,
  682. };
  683. #endif
  684. #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
  685. defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
  686. #include <asm/bfin_sport3.h>
  687. static struct resource bfin_snd_resources[] = {
  688. {
  689. .start = SPORT0_CTL_A,
  690. .end = SPORT0_CTL_A,
  691. .flags = IORESOURCE_MEM,
  692. },
  693. {
  694. .start = SPORT0_CTL_B,
  695. .end = SPORT0_CTL_B,
  696. .flags = IORESOURCE_MEM,
  697. },
  698. {
  699. .start = CH_SPORT0_TX,
  700. .end = CH_SPORT0_TX,
  701. .flags = IORESOURCE_DMA,
  702. },
  703. {
  704. .start = CH_SPORT0_RX,
  705. .end = CH_SPORT0_RX,
  706. .flags = IORESOURCE_DMA,
  707. },
  708. {
  709. .start = IRQ_SPORT0_TX_STAT,
  710. .end = IRQ_SPORT0_TX_STAT,
  711. .flags = IORESOURCE_IRQ,
  712. },
  713. {
  714. .start = IRQ_SPORT0_RX_STAT,
  715. .end = IRQ_SPORT0_RX_STAT,
  716. .flags = IORESOURCE_IRQ,
  717. },
  718. };
  719. static const unsigned short bfin_snd_pin[] = {
  720. P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
  721. P_SPORT0_BFS, P_SPORT0_BD0, 0,
  722. };
  723. static struct bfin_snd_platform_data bfin_snd_data = {
  724. .pin_req = bfin_snd_pin,
  725. };
  726. static struct platform_device bfin_i2s = {
  727. .name = "bfin-i2s",
  728. .num_resources = ARRAY_SIZE(bfin_snd_resources),
  729. .resource = bfin_snd_resources,
  730. .dev = {
  731. .platform_data = &bfin_snd_data,
  732. },
  733. };
  734. #endif
  735. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
  736. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
  737. static struct platform_device adau1761_device = {
  738. .name = "bfin-eval-adau1x61",
  739. };
  740. #endif
  741. #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
  742. #include <sound/adau17x1.h>
  743. static struct adau1761_platform_data adau1761_info = {
  744. .lineout_mode = ADAU1761_OUTPUT_MODE_LINE,
  745. .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
  746. };
  747. #endif
  748. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  749. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  750. #include <linux/videodev2.h>
  751. #include <media/blackfin/bfin_capture.h>
  752. #include <media/blackfin/ppi.h>
  753. static const unsigned short ppi_req[] = {
  754. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
  755. P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
  756. P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  757. 0,
  758. };
  759. static const struct ppi_info ppi_info = {
  760. .type = PPI_TYPE_EPPI3,
  761. .dma_ch = CH_EPPI0_CH0,
  762. .irq_err = IRQ_EPPI0_STAT,
  763. .base = (void __iomem *)EPPI0_STAT,
  764. .pin_req = ppi_req,
  765. };
  766. #if defined(CONFIG_VIDEO_VS6624) \
  767. || defined(CONFIG_VIDEO_VS6624_MODULE)
  768. static struct v4l2_input vs6624_inputs[] = {
  769. {
  770. .index = 0,
  771. .name = "Camera",
  772. .type = V4L2_INPUT_TYPE_CAMERA,
  773. .std = V4L2_STD_UNKNOWN,
  774. },
  775. };
  776. static struct bcap_route vs6624_routes[] = {
  777. {
  778. .input = 0,
  779. .output = 0,
  780. },
  781. };
  782. static const unsigned vs6624_ce_pin = GPIO_PD1;
  783. static struct bfin_capture_config bfin_capture_data = {
  784. .card_name = "BF609",
  785. .inputs = vs6624_inputs,
  786. .num_inputs = ARRAY_SIZE(vs6624_inputs),
  787. .routes = vs6624_routes,
  788. .i2c_adapter_id = 0,
  789. .board_info = {
  790. .type = "vs6624",
  791. .addr = 0x10,
  792. .platform_data = (void *)&vs6624_ce_pin,
  793. },
  794. .ppi_info = &ppi_info,
  795. .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI
  796. | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
  797. .blank_clocks = 8,
  798. };
  799. #endif
  800. static struct platform_device bfin_capture_device = {
  801. .name = "bfin_capture",
  802. .dev = {
  803. .platform_data = &bfin_capture_data,
  804. },
  805. };
  806. #endif
  807. #if defined(CONFIG_BFIN_CRC)
  808. #define BFIN_CRC_NAME "bfin-crc"
  809. static struct resource bfin_crc0_resources[] = {
  810. {
  811. .start = REG_CRC0_CTL,
  812. .end = REG_CRC0_REVID+4,
  813. .flags = IORESOURCE_MEM,
  814. },
  815. {
  816. .start = IRQ_CRC0_DCNTEXP,
  817. .end = IRQ_CRC0_DCNTEXP,
  818. .flags = IORESOURCE_IRQ,
  819. },
  820. {
  821. .start = CH_MEM_STREAM0_SRC_CRC0,
  822. .end = CH_MEM_STREAM0_SRC_CRC0,
  823. .flags = IORESOURCE_DMA,
  824. },
  825. {
  826. .start = CH_MEM_STREAM0_DEST_CRC0,
  827. .end = CH_MEM_STREAM0_DEST_CRC0,
  828. .flags = IORESOURCE_DMA,
  829. },
  830. };
  831. static struct platform_device bfin_crc0_device = {
  832. .name = BFIN_CRC_NAME,
  833. .id = 0,
  834. .num_resources = ARRAY_SIZE(bfin_crc0_resources),
  835. .resource = bfin_crc0_resources,
  836. };
  837. static struct resource bfin_crc1_resources[] = {
  838. {
  839. .start = REG_CRC1_CTL,
  840. .end = REG_CRC1_REVID+4,
  841. .flags = IORESOURCE_MEM,
  842. },
  843. {
  844. .start = IRQ_CRC1_DCNTEXP,
  845. .end = IRQ_CRC1_DCNTEXP,
  846. .flags = IORESOURCE_IRQ,
  847. },
  848. {
  849. .start = CH_MEM_STREAM1_SRC_CRC1,
  850. .end = CH_MEM_STREAM1_SRC_CRC1,
  851. .flags = IORESOURCE_DMA,
  852. },
  853. {
  854. .start = CH_MEM_STREAM1_DEST_CRC1,
  855. .end = CH_MEM_STREAM1_DEST_CRC1,
  856. .flags = IORESOURCE_DMA,
  857. },
  858. };
  859. static struct platform_device bfin_crc1_device = {
  860. .name = BFIN_CRC_NAME,
  861. .id = 1,
  862. .num_resources = ARRAY_SIZE(bfin_crc1_resources),
  863. .resource = bfin_crc1_resources,
  864. };
  865. #endif
  866. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  867. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  868. .model = 7877,
  869. .vref_delay_usecs = 50, /* internal, no capacitor */
  870. .x_plate_ohms = 419,
  871. .y_plate_ohms = 486,
  872. .pressure_max = 1000,
  873. .pressure_min = 0,
  874. .stopacq_polarity = 1,
  875. .first_conversion_delay = 3,
  876. .acquisition_time = 1,
  877. .averaging = 1,
  878. .pen_down_acc_interval = 1,
  879. };
  880. #endif
  881. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  882. #if defined(CONFIG_MTD_M25P80) \
  883. || defined(CONFIG_MTD_M25P80_MODULE)
  884. {
  885. /* the modalias must be the same as spi device driver name */
  886. .modalias = "m25p80", /* Name of spi_driver for this device */
  887. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  888. .bus_num = 0, /* Framework bus number */
  889. .chip_select = 1, /* SPI_SSEL1*/
  890. .platform_data = &bfin_spi_flash_data,
  891. .controller_data = &spi_flash_chip_info,
  892. .mode = SPI_MODE_3,
  893. },
  894. #endif
  895. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  896. {
  897. .modalias = "ad7877",
  898. .platform_data = &bfin_ad7877_ts_info,
  899. .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
  900. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  901. .bus_num = 0,
  902. .chip_select = 2,
  903. },
  904. #endif
  905. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  906. {
  907. .modalias = "spidev",
  908. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  909. .bus_num = 0,
  910. .chip_select = 1,
  911. .controller_data = &spidev_chip_info,
  912. },
  913. #endif
  914. #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
  915. {
  916. .modalias = "adxl34x",
  917. .platform_data = &adxl34x_info,
  918. .irq = IRQ_PC5,
  919. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  920. .bus_num = 1,
  921. .chip_select = 2,
  922. .mode = SPI_MODE_3,
  923. },
  924. #endif
  925. };
  926. #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
  927. /* SPI (0) */
  928. static struct resource bfin_spi0_resource[] = {
  929. {
  930. .start = SPI0_REGBASE,
  931. .end = SPI0_REGBASE + 0xFF,
  932. .flags = IORESOURCE_MEM,
  933. },
  934. {
  935. .start = CH_SPI0_TX,
  936. .end = CH_SPI0_TX,
  937. .flags = IORESOURCE_DMA,
  938. },
  939. {
  940. .start = CH_SPI0_RX,
  941. .end = CH_SPI0_RX,
  942. .flags = IORESOURCE_DMA,
  943. },
  944. };
  945. /* SPI (1) */
  946. static struct resource bfin_spi1_resource[] = {
  947. {
  948. .start = SPI1_REGBASE,
  949. .end = SPI1_REGBASE + 0xFF,
  950. .flags = IORESOURCE_MEM,
  951. },
  952. {
  953. .start = CH_SPI1_TX,
  954. .end = CH_SPI1_TX,
  955. .flags = IORESOURCE_DMA,
  956. },
  957. {
  958. .start = CH_SPI1_RX,
  959. .end = CH_SPI1_RX,
  960. .flags = IORESOURCE_DMA,
  961. },
  962. };
  963. /* SPI controller data */
  964. static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
  965. .num_chipselect = 4,
  966. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  967. };
  968. static struct platform_device bf60x_spi_master0 = {
  969. .name = "bfin-spi",
  970. .id = 0, /* Bus number */
  971. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  972. .resource = bfin_spi0_resource,
  973. .dev = {
  974. .platform_data = &bf60x_spi_master_info0, /* Passed to driver */
  975. },
  976. };
  977. static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
  978. .num_chipselect = 4,
  979. .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
  980. };
  981. static struct platform_device bf60x_spi_master1 = {
  982. .name = "bfin-spi",
  983. .id = 1, /* Bus number */
  984. .num_resources = ARRAY_SIZE(bfin_spi1_resource),
  985. .resource = bfin_spi1_resource,
  986. .dev = {
  987. .platform_data = &bf60x_spi_master_info1, /* Passed to driver */
  988. },
  989. };
  990. #endif /* spi master and devices */
  991. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  992. static struct resource bfin_twi0_resource[] = {
  993. [0] = {
  994. .start = TWI0_CLKDIV,
  995. .end = TWI0_CLKDIV + 0xFF,
  996. .flags = IORESOURCE_MEM,
  997. },
  998. [1] = {
  999. .start = IRQ_TWI0,
  1000. .end = IRQ_TWI0,
  1001. .flags = IORESOURCE_IRQ,
  1002. },
  1003. };
  1004. static struct platform_device i2c_bfin_twi0_device = {
  1005. .name = "i2c-bfin-twi",
  1006. .id = 0,
  1007. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  1008. .resource = bfin_twi0_resource,
  1009. };
  1010. static struct resource bfin_twi1_resource[] = {
  1011. [0] = {
  1012. .start = TWI1_CLKDIV,
  1013. .end = TWI1_CLKDIV + 0xFF,
  1014. .flags = IORESOURCE_MEM,
  1015. },
  1016. [1] = {
  1017. .start = IRQ_TWI1,
  1018. .end = IRQ_TWI1,
  1019. .flags = IORESOURCE_IRQ,
  1020. },
  1021. };
  1022. static struct platform_device i2c_bfin_twi1_device = {
  1023. .name = "i2c-bfin-twi",
  1024. .id = 1,
  1025. .num_resources = ARRAY_SIZE(bfin_twi1_resource),
  1026. .resource = bfin_twi1_resource,
  1027. };
  1028. #endif
  1029. static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
  1030. #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
  1031. {
  1032. I2C_BOARD_INFO("adxl34x", 0x53),
  1033. .irq = IRQ_PC5,
  1034. .platform_data = (void *)&adxl34x_info,
  1035. },
  1036. #endif
  1037. #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
  1038. {
  1039. I2C_BOARD_INFO("adau1761", 0x38),
  1040. .platform_data = (void *)&adau1761_info
  1041. },
  1042. #endif
  1043. };
  1044. static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
  1045. };
  1046. static const unsigned int cclk_vlev_datasheet[] =
  1047. {
  1048. /*
  1049. * Internal VLEV BF54XSBBC1533
  1050. ****temporarily using these values until data sheet is updated
  1051. */
  1052. VRPAIR(VLEV_085, 150000000),
  1053. VRPAIR(VLEV_090, 250000000),
  1054. VRPAIR(VLEV_110, 276000000),
  1055. VRPAIR(VLEV_115, 301000000),
  1056. VRPAIR(VLEV_120, 525000000),
  1057. VRPAIR(VLEV_125, 550000000),
  1058. VRPAIR(VLEV_130, 600000000),
  1059. };
  1060. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  1061. .tuple_tab = cclk_vlev_datasheet,
  1062. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  1063. .vr_settling_time = 25 /* us */,
  1064. };
  1065. static struct platform_device bfin_dpmc = {
  1066. .name = "bfin dpmc",
  1067. .dev = {
  1068. .platform_data = &bfin_dmpc_vreg_data,
  1069. },
  1070. };
  1071. static struct platform_device *ezkit_devices[] __initdata = {
  1072. &bfin_dpmc,
  1073. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  1074. &rtc_device,
  1075. #endif
  1076. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  1077. #ifdef CONFIG_SERIAL_BFIN_UART0
  1078. &bfin_uart0_device,
  1079. #endif
  1080. #ifdef CONFIG_SERIAL_BFIN_UART1
  1081. &bfin_uart1_device,
  1082. #endif
  1083. #endif
  1084. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  1085. #ifdef CONFIG_BFIN_SIR0
  1086. &bfin_sir0_device,
  1087. #endif
  1088. #ifdef CONFIG_BFIN_SIR1
  1089. &bfin_sir1_device,
  1090. #endif
  1091. #endif
  1092. #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
  1093. &bfin_eth_device,
  1094. #endif
  1095. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  1096. &musb_device,
  1097. #endif
  1098. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  1099. &bfin_isp1760_device,
  1100. #endif
  1101. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  1102. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1103. &bfin_sport0_uart_device,
  1104. #endif
  1105. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1106. &bfin_sport1_uart_device,
  1107. #endif
  1108. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1109. &bfin_sport2_uart_device,
  1110. #endif
  1111. #endif
  1112. #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
  1113. &bfin_can0_device,
  1114. #endif
  1115. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  1116. &bfin_nand_device,
  1117. #endif
  1118. #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
  1119. &bfin_sdh_device,
  1120. #endif
  1121. #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
  1122. &bf60x_spi_master0,
  1123. &bf60x_spi_master1,
  1124. #endif
  1125. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  1126. &bfin_rotary_device,
  1127. #endif
  1128. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  1129. &i2c_bfin_twi0_device,
  1130. #if !defined(CONFIG_BF542)
  1131. &i2c_bfin_twi1_device,
  1132. #endif
  1133. #endif
  1134. #if defined(CONFIG_BFIN_CRC)
  1135. &bfin_crc0_device,
  1136. &bfin_crc1_device,
  1137. #endif
  1138. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  1139. &bfin_device_gpiokeys,
  1140. #endif
  1141. #if defined(CONFIG_MTD_BFIN_BF60x) || defined(CONFIG_MTD_BFIN_BF60x_MODULE)
  1142. &ezkit_flash_device,
  1143. #endif
  1144. #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
  1145. &bfin_i2s_pcm,
  1146. #endif
  1147. #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
  1148. defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
  1149. &bfin_i2s,
  1150. #endif
  1151. #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
  1152. defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
  1153. &adau1761_device,
  1154. #endif
  1155. #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
  1156. || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
  1157. &bfin_capture_device,
  1158. #endif
  1159. };
  1160. static int __init ezkit_init(void)
  1161. {
  1162. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  1163. i2c_register_board_info(0, bfin_i2c_board_info0,
  1164. ARRAY_SIZE(bfin_i2c_board_info0));
  1165. i2c_register_board_info(1, bfin_i2c_board_info1,
  1166. ARRAY_SIZE(bfin_i2c_board_info1));
  1167. #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
  1168. unsigned short pins[] = P_RMII0;
  1169. if (!peripheral_request_list(pins, "emac0"))
  1170. printk(KERN_ERR "%s(): request emac pins failed\n", __func__);
  1171. #endif
  1172. platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
  1173. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  1174. return 0;
  1175. }
  1176. arch_initcall(ezkit_init);
  1177. static struct platform_device *ezkit_early_devices[] __initdata = {
  1178. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  1179. #ifdef CONFIG_SERIAL_BFIN_UART0
  1180. &bfin_uart0_device,
  1181. #endif
  1182. #ifdef CONFIG_SERIAL_BFIN_UART1
  1183. &bfin_uart1_device,
  1184. #endif
  1185. #endif
  1186. #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
  1187. #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
  1188. &bfin_sport0_uart_device,
  1189. #endif
  1190. #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
  1191. &bfin_sport1_uart_device,
  1192. #endif
  1193. #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
  1194. &bfin_sport2_uart_device,
  1195. #endif
  1196. #endif
  1197. };
  1198. void __init native_machine_early_platform_add_devices(void)
  1199. {
  1200. printk(KERN_INFO "register early platform devices\n");
  1201. early_platform_add_devices(ezkit_early_devices,
  1202. ARRAY_SIZE(ezkit_early_devices));
  1203. }