dma-mapping_32.h 4.0 KB

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  1. #ifndef _ASM_I386_DMA_MAPPING_H
  2. #define _ASM_I386_DMA_MAPPING_H
  3. #include <linux/mm.h>
  4. #include <linux/scatterlist.h>
  5. #include <asm/cache.h>
  6. #include <asm/io.h>
  7. #include <asm/bug.h>
  8. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  9. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  10. void *dma_alloc_coherent(struct device *dev, size_t size,
  11. dma_addr_t *dma_handle, gfp_t flag);
  12. void dma_free_coherent(struct device *dev, size_t size,
  13. void *vaddr, dma_addr_t dma_handle);
  14. static inline void
  15. dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
  16. enum dma_data_direction direction)
  17. {
  18. BUG_ON(!valid_dma_direction(direction));
  19. }
  20. static inline int
  21. dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
  22. enum dma_data_direction direction)
  23. {
  24. struct scatterlist *sg;
  25. int i;
  26. BUG_ON(!valid_dma_direction(direction));
  27. WARN_ON(nents == 0 || sglist[0].length == 0);
  28. for_each_sg(sglist, sg, nents, i) {
  29. BUG_ON(!sg_page(sg));
  30. sg->dma_address = sg_phys(sg);
  31. }
  32. flush_write_buffers();
  33. return nents;
  34. }
  35. static inline dma_addr_t
  36. dma_map_page(struct device *dev, struct page *page, unsigned long offset,
  37. size_t size, enum dma_data_direction direction)
  38. {
  39. BUG_ON(!valid_dma_direction(direction));
  40. return page_to_phys(page) + offset;
  41. }
  42. static inline void
  43. dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
  44. enum dma_data_direction direction)
  45. {
  46. BUG_ON(!valid_dma_direction(direction));
  47. }
  48. static inline void
  49. dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
  50. enum dma_data_direction direction)
  51. {
  52. BUG_ON(!valid_dma_direction(direction));
  53. }
  54. static inline void
  55. dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
  56. enum dma_data_direction direction)
  57. {
  58. }
  59. static inline void
  60. dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
  61. enum dma_data_direction direction)
  62. {
  63. flush_write_buffers();
  64. }
  65. static inline void
  66. dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
  67. unsigned long offset, size_t size,
  68. enum dma_data_direction direction)
  69. {
  70. }
  71. static inline void
  72. dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
  73. unsigned long offset, size_t size,
  74. enum dma_data_direction direction)
  75. {
  76. flush_write_buffers();
  77. }
  78. static inline void
  79. dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
  80. enum dma_data_direction direction)
  81. {
  82. }
  83. static inline void
  84. dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
  85. enum dma_data_direction direction)
  86. {
  87. flush_write_buffers();
  88. }
  89. static inline int
  90. dma_mapping_error(dma_addr_t dma_addr)
  91. {
  92. return 0;
  93. }
  94. extern int forbid_dac;
  95. static inline int
  96. dma_supported(struct device *dev, u64 mask)
  97. {
  98. /*
  99. * we fall back to GFP_DMA when the mask isn't all 1s,
  100. * so we can't guarantee allocations that must be
  101. * within a tighter range than GFP_DMA..
  102. */
  103. if(mask < 0x00ffffff)
  104. return 0;
  105. /* Work around chipset bugs */
  106. if (forbid_dac > 0 && mask > 0xffffffffULL)
  107. return 0;
  108. return 1;
  109. }
  110. static inline int
  111. dma_set_mask(struct device *dev, u64 mask)
  112. {
  113. if(!dev->dma_mask || !dma_supported(dev, mask))
  114. return -EIO;
  115. *dev->dma_mask = mask;
  116. return 0;
  117. }
  118. static inline int
  119. dma_get_cache_alignment(void)
  120. {
  121. /* no easy way to get cache size on all x86, so return the
  122. * maximum possible, to be safe */
  123. return (1 << INTERNODE_CACHE_SHIFT);
  124. }
  125. #define dma_is_consistent(d, h) (1)
  126. static inline void
  127. dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  128. enum dma_data_direction direction)
  129. {
  130. flush_write_buffers();
  131. }
  132. #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
  133. extern int
  134. dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
  135. dma_addr_t device_addr, size_t size, int flags);
  136. extern void
  137. dma_release_declared_memory(struct device *dev);
  138. extern void *
  139. dma_mark_declared_memory_occupied(struct device *dev,
  140. dma_addr_t device_addr, size_t size);
  141. #endif