ioc4.h 4.9 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (c) 2005 Silicon Graphics, Inc. All Rights Reserved.
  7. */
  8. #ifndef _LINUX_IOC4_H
  9. #define _LINUX_IOC4_H
  10. #include <linux/interrupt.h>
  11. /***********************************
  12. * Structures needed by subdrivers *
  13. ***********************************/
  14. /* This structure fully describes the IOC4 miscellaneous registers which
  15. * appear at bar[0]+0x00000 through bar[0]+0x0005c. The corresponding
  16. * PCI resource is managed by the main IOC4 driver because it contains
  17. * registers of interest to many different IOC4 subdrivers.
  18. */
  19. struct ioc4_misc_regs {
  20. /* Miscellaneous IOC4 registers */
  21. union ioc4_pci_err_addr_l {
  22. uint32_t raw;
  23. struct {
  24. uint32_t valid:1; /* Address captured */
  25. uint32_t master_id:4; /* Unit causing error
  26. * 0/1: Serial port 0 TX/RX
  27. * 2/3: Serial port 1 TX/RX
  28. * 4/5: Serial port 2 TX/RX
  29. * 6/7: Serial port 3 TX/RX
  30. * 8: ATA/ATAPI
  31. * 9-15: Undefined
  32. */
  33. uint32_t mul_err:1; /* Multiple errors occurred */
  34. uint32_t addr:26; /* Bits 31-6 of error addr */
  35. } fields;
  36. } pci_err_addr_l;
  37. uint32_t pci_err_addr_h; /* Bits 63-32 of error addr */
  38. union ioc4_sio_int {
  39. uint32_t raw;
  40. struct {
  41. uint8_t tx_mt:1; /* TX ring buffer empty */
  42. uint8_t rx_full:1; /* RX ring buffer full */
  43. uint8_t rx_high:1; /* RX high-water exceeded */
  44. uint8_t rx_timer:1; /* RX timer has triggered */
  45. uint8_t delta_dcd:1; /* DELTA_DCD seen */
  46. uint8_t delta_cts:1; /* DELTA_CTS seen */
  47. uint8_t intr_pass:1; /* Interrupt pass-through */
  48. uint8_t tx_explicit:1; /* TX, MCW, or delay complete */
  49. } fields[4];
  50. } sio_ir; /* Serial interrupt state */
  51. union ioc4_other_int {
  52. uint32_t raw;
  53. struct {
  54. uint32_t ata_int:1; /* ATA port passthru */
  55. uint32_t ata_memerr:1; /* ATA halted by mem error */
  56. uint32_t memerr:4; /* Serial halted by mem err */
  57. uint32_t kbd_int:1; /* kbd/mouse intr asserted */
  58. uint32_t reserved:16; /* zero */
  59. uint32_t rt_int:1; /* INT_OUT section latch */
  60. uint32_t gen_int:8; /* Intr. from generic pins */
  61. } fields;
  62. } other_ir; /* Other interrupt state */
  63. union ioc4_sio_int sio_ies; /* Serial interrupt enable set */
  64. union ioc4_other_int other_ies; /* Other interrupt enable set */
  65. union ioc4_sio_int sio_iec; /* Serial interrupt enable clear */
  66. union ioc4_other_int other_iec; /* Other interrupt enable clear */
  67. union ioc4_sio_cr {
  68. uint32_t raw;
  69. struct {
  70. uint32_t cmd_pulse:4; /* Bytebus strobe width */
  71. uint32_t arb_diag:3; /* PCI bus requester */
  72. uint32_t sio_diag_idle:1; /* Active ser req? */
  73. uint32_t ata_diag_idle:1; /* Active ATA req? */
  74. uint32_t ata_diag_active:1; /* ATA req is winner */
  75. uint32_t reserved:22; /* zero */
  76. } fields;
  77. } sio_cr;
  78. uint32_t unused1;
  79. union ioc4_int_out {
  80. uint32_t raw;
  81. struct {
  82. uint32_t count:16; /* Period control */
  83. uint32_t mode:3; /* Output signal shape */
  84. uint32_t reserved:11; /* zero */
  85. uint32_t diag:1; /* Timebase control */
  86. uint32_t int_out:1; /* Current value */
  87. } fields;
  88. } int_out; /* External interrupt output control */
  89. uint32_t unused2;
  90. union ioc4_gpcr {
  91. uint32_t raw;
  92. struct {
  93. uint32_t dir:8; /* Pin direction */
  94. uint32_t edge:8; /* Edge/level mode */
  95. uint32_t reserved1:4; /* zero */
  96. uint32_t int_out_en:1; /* INT_OUT enable */
  97. uint32_t reserved2:11; /* zero */
  98. } fields;
  99. } gpcr_s; /* Generic PIO control set */
  100. union ioc4_gpcr gpcr_c; /* Generic PIO control clear */
  101. union ioc4_gpdr {
  102. uint32_t raw;
  103. struct {
  104. uint32_t gen_pin:8; /* State of pins */
  105. uint32_t reserved:24;
  106. } fields;
  107. } gpdr; /* Generic PIO data */
  108. uint32_t unused3;
  109. union ioc4_gppr {
  110. uint32_t raw;
  111. struct {
  112. uint32_t gen_pin:1; /* Single pin state */
  113. uint32_t reserved:31;
  114. } fields;
  115. } gppr[8]; /* Generic PIO pins */
  116. };
  117. /* One of these per IOC4
  118. *
  119. * The idd_serial_data field is present here, even though it's used
  120. * solely by the serial subdriver, because the main IOC4 module
  121. * properly owns pci_{get,set}_drvdata functionality. This field
  122. * allows that subdriver to stash its own drvdata somewhere.
  123. */
  124. struct ioc4_driver_data {
  125. struct list_head idd_list;
  126. unsigned long idd_bar0;
  127. struct pci_dev *idd_pdev;
  128. const struct pci_device_id *idd_pci_id;
  129. struct __iomem ioc4_misc_regs *idd_misc_regs;
  130. void *idd_serial_data;
  131. };
  132. /* One per submodule */
  133. struct ioc4_submodule {
  134. struct list_head is_list;
  135. char *is_name;
  136. struct module *is_owner;
  137. int (*is_probe) (struct ioc4_driver_data *);
  138. int (*is_remove) (struct ioc4_driver_data *);
  139. };
  140. #define IOC4_NUM_CARDS 8 /* max cards per partition */
  141. /**********************************
  142. * Functions needed by submodules *
  143. **********************************/
  144. extern int ioc4_register_submodule(struct ioc4_submodule *);
  145. extern void ioc4_unregister_submodule(struct ioc4_submodule *);
  146. #endif /* _LINUX_IOC4_H */