at91sam9g20.dtsi 3.2 KB

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  1. /*
  2. * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
  3. *
  4. * Copyright (C) 2011 Atmel,
  5. * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
  6. * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  7. *
  8. * Licensed under GPLv2 or later.
  9. */
  10. /include/ "skeleton.dtsi"
  11. / {
  12. model = "Atmel AT91SAM9G20 family SoC";
  13. compatible = "atmel,at91sam9g20";
  14. interrupt-parent = <&aic>;
  15. aliases {
  16. serial0 = &dbgu;
  17. serial1 = &usart0;
  18. serial2 = &usart1;
  19. serial3 = &usart2;
  20. serial4 = &usart3;
  21. serial5 = &usart4;
  22. serial6 = &usart5;
  23. gpio0 = &pioA;
  24. gpio1 = &pioB;
  25. gpio2 = &pioC;
  26. };
  27. cpus {
  28. cpu@0 {
  29. compatible = "arm,arm926ejs";
  30. };
  31. };
  32. memory@20000000 {
  33. reg = <0x20000000 0x08000000>;
  34. };
  35. ahb {
  36. compatible = "simple-bus";
  37. #address-cells = <1>;
  38. #size-cells = <1>;
  39. ranges;
  40. apb {
  41. compatible = "simple-bus";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. ranges;
  45. aic: interrupt-controller@fffff000 {
  46. #interrupt-cells = <2>;
  47. compatible = "atmel,at91rm9200-aic";
  48. interrupt-controller;
  49. interrupt-parent;
  50. reg = <0xfffff000 0x200>;
  51. };
  52. pioA: gpio@fffff400 {
  53. compatible = "atmel,at91rm9200-gpio";
  54. reg = <0xfffff400 0x100>;
  55. interrupts = <2 4>;
  56. #gpio-cells = <2>;
  57. gpio-controller;
  58. interrupt-controller;
  59. };
  60. pioB: gpio@fffff600 {
  61. compatible = "atmel,at91rm9200-gpio";
  62. reg = <0xfffff600 0x100>;
  63. interrupts = <3 4>;
  64. #gpio-cells = <2>;
  65. gpio-controller;
  66. interrupt-controller;
  67. };
  68. pioC: gpio@fffff800 {
  69. compatible = "atmel,at91rm9200-gpio";
  70. reg = <0xfffff800 0x100>;
  71. interrupts = <4 4>;
  72. #gpio-cells = <2>;
  73. gpio-controller;
  74. interrupt-controller;
  75. };
  76. dbgu: serial@fffff200 {
  77. compatible = "atmel,at91sam9260-usart";
  78. reg = <0xfffff200 0x200>;
  79. interrupts = <1 4>;
  80. status = "disabled";
  81. };
  82. usart0: serial@fffb0000 {
  83. compatible = "atmel,at91sam9260-usart";
  84. reg = <0xfffb0000 0x200>;
  85. interrupts = <6 4>;
  86. atmel,use-dma-rx;
  87. atmel,use-dma-tx;
  88. status = "disabled";
  89. };
  90. usart1: serial@fffb4000 {
  91. compatible = "atmel,at91sam9260-usart";
  92. reg = <0xfffb4000 0x200>;
  93. interrupts = <7 4>;
  94. atmel,use-dma-rx;
  95. atmel,use-dma-tx;
  96. status = "disabled";
  97. };
  98. usart2: serial@fffb8000 {
  99. compatible = "atmel,at91sam9260-usart";
  100. reg = <0xfffb8000 0x200>;
  101. interrupts = <8 4>;
  102. atmel,use-dma-rx;
  103. atmel,use-dma-tx;
  104. status = "disabled";
  105. };
  106. usart3: serial@fffd0000 {
  107. compatible = "atmel,at91sam9260-usart";
  108. reg = <0xfffd0000 0x200>;
  109. interrupts = <23 4>;
  110. atmel,use-dma-rx;
  111. atmel,use-dma-tx;
  112. status = "disabled";
  113. };
  114. usart4: serial@fffd4000 {
  115. compatible = "atmel,at91sam9260-usart";
  116. reg = <0xfffd4000 0x200>;
  117. interrupts = <24 4>;
  118. atmel,use-dma-rx;
  119. atmel,use-dma-tx;
  120. status = "disabled";
  121. };
  122. usart5: serial@fffd8000 {
  123. compatible = "atmel,at91sam9260-usart";
  124. reg = <0xfffd8000 0x200>;
  125. interrupts = <25 4>;
  126. atmel,use-dma-rx;
  127. atmel,use-dma-tx;
  128. status = "disabled";
  129. };
  130. macb0: ethernet@fffc4000 {
  131. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  132. reg = <0xfffc4000 0x100>;
  133. interrupts = <21 4>;
  134. status = "disabled";
  135. };
  136. };
  137. };
  138. };