apply.c 30 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. };
  84. static struct {
  85. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  86. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  87. bool fifo_merge_dirty;
  88. bool fifo_merge;
  89. bool irq_enabled;
  90. } dss_data;
  91. /* protects dss_data */
  92. static spinlock_t data_lock;
  93. /* lock for blocking functions */
  94. static DEFINE_MUTEX(apply_lock);
  95. static DECLARE_COMPLETION(extra_updated_completion);
  96. static void dss_register_vsync_isr(void);
  97. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  98. {
  99. return &dss_data.ovl_priv_data_array[ovl->id];
  100. }
  101. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  102. {
  103. return &dss_data.mgr_priv_data_array[mgr->id];
  104. }
  105. void dss_apply_init(void)
  106. {
  107. const int num_ovls = dss_feat_get_num_ovls();
  108. int i;
  109. spin_lock_init(&data_lock);
  110. for (i = 0; i < num_ovls; ++i) {
  111. struct ovl_priv_data *op;
  112. op = &dss_data.ovl_priv_data_array[i];
  113. op->info.global_alpha = 255;
  114. switch (i) {
  115. case 0:
  116. op->info.zorder = 0;
  117. break;
  118. case 1:
  119. op->info.zorder =
  120. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  121. break;
  122. case 2:
  123. op->info.zorder =
  124. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  125. break;
  126. case 3:
  127. op->info.zorder =
  128. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  129. break;
  130. }
  131. op->user_info = op->info;
  132. }
  133. }
  134. static bool ovl_manual_update(struct omap_overlay *ovl)
  135. {
  136. return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  137. }
  138. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  139. {
  140. return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  141. }
  142. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  143. struct omap_dss_device *dssdev, bool applying)
  144. {
  145. struct omap_overlay_info *oi;
  146. struct omap_overlay_manager_info *mi;
  147. struct omap_overlay *ovl;
  148. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  149. struct ovl_priv_data *op;
  150. struct mgr_priv_data *mp;
  151. mp = get_mgr_priv(mgr);
  152. if (applying && mp->user_info_dirty)
  153. mi = &mp->user_info;
  154. else
  155. mi = &mp->info;
  156. /* collect the infos to be tested into the array */
  157. list_for_each_entry(ovl, &mgr->overlays, list) {
  158. op = get_ovl_priv(ovl);
  159. if (!op->enabled && !op->enabling)
  160. oi = NULL;
  161. else if (applying && op->user_info_dirty)
  162. oi = &op->user_info;
  163. else
  164. oi = &op->info;
  165. ois[ovl->id] = oi;
  166. }
  167. return dss_mgr_check(mgr, dssdev, mi, ois);
  168. }
  169. /*
  170. * check manager and overlay settings using overlay_info from data->info
  171. */
  172. static int dss_check_settings(struct omap_overlay_manager *mgr,
  173. struct omap_dss_device *dssdev)
  174. {
  175. return dss_check_settings_low(mgr, dssdev, false);
  176. }
  177. /*
  178. * check manager and overlay settings using overlay_info from ovl->info if
  179. * dirty and from data->info otherwise
  180. */
  181. static int dss_check_settings_apply(struct omap_overlay_manager *mgr,
  182. struct omap_dss_device *dssdev)
  183. {
  184. return dss_check_settings_low(mgr, dssdev, true);
  185. }
  186. static bool need_isr(void)
  187. {
  188. const int num_mgrs = dss_feat_get_num_mgrs();
  189. int i;
  190. for (i = 0; i < num_mgrs; ++i) {
  191. struct omap_overlay_manager *mgr;
  192. struct mgr_priv_data *mp;
  193. struct omap_overlay *ovl;
  194. mgr = omap_dss_get_overlay_manager(i);
  195. mp = get_mgr_priv(mgr);
  196. if (!mp->enabled)
  197. continue;
  198. if (mgr_manual_update(mgr)) {
  199. /* to catch FRAMEDONE */
  200. if (mp->updating)
  201. return true;
  202. } else {
  203. /* to catch GO bit going down */
  204. if (mp->busy)
  205. return true;
  206. /* to write new values to registers */
  207. if (mp->info_dirty)
  208. return true;
  209. /* to set GO bit */
  210. if (mp->shadow_info_dirty)
  211. return true;
  212. list_for_each_entry(ovl, &mgr->overlays, list) {
  213. struct ovl_priv_data *op;
  214. op = get_ovl_priv(ovl);
  215. /*
  216. * NOTE: we check extra_info flags even for
  217. * disabled overlays, as extra_infos need to be
  218. * always written.
  219. */
  220. /* to write new values to registers */
  221. if (op->extra_info_dirty)
  222. return true;
  223. /* to set GO bit */
  224. if (op->shadow_extra_info_dirty)
  225. return true;
  226. if (!op->enabled)
  227. continue;
  228. /* to write new values to registers */
  229. if (op->info_dirty)
  230. return true;
  231. /* to set GO bit */
  232. if (op->shadow_info_dirty)
  233. return true;
  234. }
  235. }
  236. }
  237. return false;
  238. }
  239. static bool need_go(struct omap_overlay_manager *mgr)
  240. {
  241. struct omap_overlay *ovl;
  242. struct mgr_priv_data *mp;
  243. struct ovl_priv_data *op;
  244. mp = get_mgr_priv(mgr);
  245. if (mp->shadow_info_dirty)
  246. return true;
  247. list_for_each_entry(ovl, &mgr->overlays, list) {
  248. op = get_ovl_priv(ovl);
  249. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  250. return true;
  251. }
  252. return false;
  253. }
  254. /* returns true if an extra_info field is currently being updated */
  255. static bool extra_info_update_ongoing(void)
  256. {
  257. const int num_ovls = omap_dss_get_num_overlays();
  258. struct ovl_priv_data *op;
  259. struct omap_overlay *ovl;
  260. struct mgr_priv_data *mp;
  261. int i;
  262. for (i = 0; i < num_ovls; ++i) {
  263. ovl = omap_dss_get_overlay(i);
  264. op = get_ovl_priv(ovl);
  265. if (!ovl->manager)
  266. continue;
  267. mp = get_mgr_priv(ovl->manager);
  268. if (!mp->enabled)
  269. continue;
  270. if (!mp->updating)
  271. continue;
  272. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  273. return true;
  274. }
  275. return false;
  276. }
  277. /* wait until no extra_info updates are pending */
  278. static void wait_pending_extra_info_updates(void)
  279. {
  280. bool updating;
  281. unsigned long flags;
  282. unsigned long t;
  283. spin_lock_irqsave(&data_lock, flags);
  284. updating = extra_info_update_ongoing();
  285. if (!updating) {
  286. spin_unlock_irqrestore(&data_lock, flags);
  287. return;
  288. }
  289. init_completion(&extra_updated_completion);
  290. spin_unlock_irqrestore(&data_lock, flags);
  291. t = msecs_to_jiffies(500);
  292. wait_for_completion_timeout(&extra_updated_completion, t);
  293. updating = extra_info_update_ongoing();
  294. WARN_ON(updating);
  295. }
  296. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  297. {
  298. unsigned long timeout = msecs_to_jiffies(500);
  299. struct mgr_priv_data *mp;
  300. u32 irq;
  301. int r;
  302. int i;
  303. struct omap_dss_device *dssdev = mgr->device;
  304. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  305. return 0;
  306. if (mgr_manual_update(mgr))
  307. return 0;
  308. r = dispc_runtime_get();
  309. if (r)
  310. return r;
  311. irq = dispc_mgr_get_vsync_irq(mgr->id);
  312. mp = get_mgr_priv(mgr);
  313. i = 0;
  314. while (1) {
  315. unsigned long flags;
  316. bool shadow_dirty, dirty;
  317. spin_lock_irqsave(&data_lock, flags);
  318. dirty = mp->info_dirty;
  319. shadow_dirty = mp->shadow_info_dirty;
  320. spin_unlock_irqrestore(&data_lock, flags);
  321. if (!dirty && !shadow_dirty) {
  322. r = 0;
  323. break;
  324. }
  325. /* 4 iterations is the worst case:
  326. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  327. * 2 - first VSYNC, dirty = true
  328. * 3 - dirty = false, shadow_dirty = true
  329. * 4 - shadow_dirty = false */
  330. if (i++ == 3) {
  331. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  332. mgr->id);
  333. r = 0;
  334. break;
  335. }
  336. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  337. if (r == -ERESTARTSYS)
  338. break;
  339. if (r) {
  340. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  341. break;
  342. }
  343. }
  344. dispc_runtime_put();
  345. return r;
  346. }
  347. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  348. {
  349. unsigned long timeout = msecs_to_jiffies(500);
  350. struct ovl_priv_data *op;
  351. struct omap_dss_device *dssdev;
  352. u32 irq;
  353. int r;
  354. int i;
  355. if (!ovl->manager)
  356. return 0;
  357. dssdev = ovl->manager->device;
  358. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  359. return 0;
  360. if (ovl_manual_update(ovl))
  361. return 0;
  362. r = dispc_runtime_get();
  363. if (r)
  364. return r;
  365. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  366. op = get_ovl_priv(ovl);
  367. i = 0;
  368. while (1) {
  369. unsigned long flags;
  370. bool shadow_dirty, dirty;
  371. spin_lock_irqsave(&data_lock, flags);
  372. dirty = op->info_dirty;
  373. shadow_dirty = op->shadow_info_dirty;
  374. spin_unlock_irqrestore(&data_lock, flags);
  375. if (!dirty && !shadow_dirty) {
  376. r = 0;
  377. break;
  378. }
  379. /* 4 iterations is the worst case:
  380. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  381. * 2 - first VSYNC, dirty = true
  382. * 3 - dirty = false, shadow_dirty = true
  383. * 4 - shadow_dirty = false */
  384. if (i++ == 3) {
  385. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  386. ovl->id);
  387. r = 0;
  388. break;
  389. }
  390. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  391. if (r == -ERESTARTSYS)
  392. break;
  393. if (r) {
  394. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  395. break;
  396. }
  397. }
  398. dispc_runtime_put();
  399. return r;
  400. }
  401. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  402. {
  403. struct ovl_priv_data *op = get_ovl_priv(ovl);
  404. struct omap_overlay_info *oi;
  405. bool ilace, replication;
  406. struct mgr_priv_data *mp;
  407. int r;
  408. DSSDBGF("%d", ovl->id);
  409. if (!op->enabled || !op->info_dirty)
  410. return;
  411. oi = &op->info;
  412. replication = dss_use_replication(ovl->manager->device, oi->color_mode);
  413. ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
  414. r = dispc_ovl_setup(ovl->id, oi, ilace, replication);
  415. if (r) {
  416. /*
  417. * We can't do much here, as this function can be called from
  418. * vsync interrupt.
  419. */
  420. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  421. /* This will leave fifo configurations in a nonoptimal state */
  422. op->enabled = false;
  423. dispc_ovl_enable(ovl->id, false);
  424. return;
  425. }
  426. mp = get_mgr_priv(ovl->manager);
  427. op->info_dirty = false;
  428. if (mp->updating)
  429. op->shadow_info_dirty = true;
  430. }
  431. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  432. {
  433. struct ovl_priv_data *op = get_ovl_priv(ovl);
  434. struct mgr_priv_data *mp;
  435. DSSDBGF("%d", ovl->id);
  436. if (!op->extra_info_dirty)
  437. return;
  438. /* note: write also when op->enabled == false, so that the ovl gets
  439. * disabled */
  440. dispc_ovl_enable(ovl->id, op->enabled);
  441. dispc_ovl_set_channel_out(ovl->id, op->channel);
  442. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  443. mp = get_mgr_priv(ovl->manager);
  444. op->extra_info_dirty = false;
  445. if (mp->updating)
  446. op->shadow_extra_info_dirty = true;
  447. }
  448. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  449. {
  450. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  451. struct omap_overlay *ovl;
  452. DSSDBGF("%d", mgr->id);
  453. if (!mp->enabled)
  454. return;
  455. WARN_ON(mp->busy);
  456. /* Commit overlay settings */
  457. list_for_each_entry(ovl, &mgr->overlays, list) {
  458. dss_ovl_write_regs(ovl);
  459. dss_ovl_write_regs_extra(ovl);
  460. }
  461. if (mp->info_dirty) {
  462. dispc_mgr_setup(mgr->id, &mp->info);
  463. mp->info_dirty = false;
  464. if (mp->updating)
  465. mp->shadow_info_dirty = true;
  466. }
  467. }
  468. static void dss_write_regs_common(void)
  469. {
  470. const int num_mgrs = omap_dss_get_num_overlay_managers();
  471. int i;
  472. if (!dss_data.fifo_merge_dirty)
  473. return;
  474. for (i = 0; i < num_mgrs; ++i) {
  475. struct omap_overlay_manager *mgr;
  476. struct mgr_priv_data *mp;
  477. mgr = omap_dss_get_overlay_manager(i);
  478. mp = get_mgr_priv(mgr);
  479. if (mp->enabled) {
  480. if (dss_data.fifo_merge_dirty) {
  481. dispc_enable_fifomerge(dss_data.fifo_merge);
  482. dss_data.fifo_merge_dirty = false;
  483. }
  484. if (mp->updating)
  485. mp->shadow_info_dirty = true;
  486. }
  487. }
  488. }
  489. static void dss_write_regs(void)
  490. {
  491. const int num_mgrs = omap_dss_get_num_overlay_managers();
  492. int i;
  493. dss_write_regs_common();
  494. for (i = 0; i < num_mgrs; ++i) {
  495. struct omap_overlay_manager *mgr;
  496. struct mgr_priv_data *mp;
  497. int r;
  498. mgr = omap_dss_get_overlay_manager(i);
  499. mp = get_mgr_priv(mgr);
  500. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  501. continue;
  502. r = dss_check_settings(mgr, mgr->device);
  503. if (r) {
  504. DSSERR("cannot write registers for manager %s: "
  505. "illegal configuration\n", mgr->name);
  506. continue;
  507. }
  508. dss_mgr_write_regs(mgr);
  509. }
  510. }
  511. static void dss_set_go_bits(void)
  512. {
  513. const int num_mgrs = omap_dss_get_num_overlay_managers();
  514. int i;
  515. for (i = 0; i < num_mgrs; ++i) {
  516. struct omap_overlay_manager *mgr;
  517. struct mgr_priv_data *mp;
  518. mgr = omap_dss_get_overlay_manager(i);
  519. mp = get_mgr_priv(mgr);
  520. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  521. continue;
  522. if (!need_go(mgr))
  523. continue;
  524. mp->busy = true;
  525. if (!dss_data.irq_enabled && need_isr())
  526. dss_register_vsync_isr();
  527. dispc_mgr_go(mgr->id);
  528. }
  529. }
  530. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  531. {
  532. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  533. unsigned long flags;
  534. int r;
  535. spin_lock_irqsave(&data_lock, flags);
  536. WARN_ON(mp->updating);
  537. r = dss_check_settings(mgr, mgr->device);
  538. if (r) {
  539. DSSERR("cannot start manual update: illegal configuration\n");
  540. spin_unlock_irqrestore(&data_lock, flags);
  541. return;
  542. }
  543. dss_mgr_write_regs(mgr);
  544. dss_write_regs_common();
  545. mp->updating = true;
  546. if (!dss_data.irq_enabled && need_isr())
  547. dss_register_vsync_isr();
  548. dispc_mgr_enable(mgr->id, true);
  549. spin_unlock_irqrestore(&data_lock, flags);
  550. }
  551. static void dss_apply_irq_handler(void *data, u32 mask);
  552. static void dss_register_vsync_isr(void)
  553. {
  554. const int num_mgrs = dss_feat_get_num_mgrs();
  555. u32 mask;
  556. int r, i;
  557. mask = 0;
  558. for (i = 0; i < num_mgrs; ++i)
  559. mask |= dispc_mgr_get_vsync_irq(i);
  560. for (i = 0; i < num_mgrs; ++i)
  561. mask |= dispc_mgr_get_framedone_irq(i);
  562. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  563. WARN_ON(r);
  564. dss_data.irq_enabled = true;
  565. }
  566. static void dss_unregister_vsync_isr(void)
  567. {
  568. const int num_mgrs = dss_feat_get_num_mgrs();
  569. u32 mask;
  570. int r, i;
  571. mask = 0;
  572. for (i = 0; i < num_mgrs; ++i)
  573. mask |= dispc_mgr_get_vsync_irq(i);
  574. for (i = 0; i < num_mgrs; ++i)
  575. mask |= dispc_mgr_get_framedone_irq(i);
  576. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  577. WARN_ON(r);
  578. dss_data.irq_enabled = false;
  579. }
  580. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  581. {
  582. struct omap_overlay *ovl;
  583. struct mgr_priv_data *mp;
  584. struct ovl_priv_data *op;
  585. mp = get_mgr_priv(mgr);
  586. mp->shadow_info_dirty = false;
  587. list_for_each_entry(ovl, &mgr->overlays, list) {
  588. op = get_ovl_priv(ovl);
  589. op->shadow_info_dirty = false;
  590. op->shadow_extra_info_dirty = false;
  591. }
  592. }
  593. static void dss_apply_irq_handler(void *data, u32 mask)
  594. {
  595. const int num_mgrs = dss_feat_get_num_mgrs();
  596. int i;
  597. bool extra_updating;
  598. spin_lock(&data_lock);
  599. /* clear busy, updating flags, shadow_dirty flags */
  600. for (i = 0; i < num_mgrs; i++) {
  601. struct omap_overlay_manager *mgr;
  602. struct mgr_priv_data *mp;
  603. bool was_updating;
  604. mgr = omap_dss_get_overlay_manager(i);
  605. mp = get_mgr_priv(mgr);
  606. if (!mp->enabled)
  607. continue;
  608. was_updating = mp->updating;
  609. mp->updating = dispc_mgr_is_enabled(i);
  610. if (!mgr_manual_update(mgr)) {
  611. bool was_busy = mp->busy;
  612. mp->busy = dispc_mgr_go_busy(i);
  613. if (was_busy && !mp->busy)
  614. mgr_clear_shadow_dirty(mgr);
  615. } else {
  616. if (was_updating && !mp->updating)
  617. mgr_clear_shadow_dirty(mgr);
  618. }
  619. }
  620. dss_write_regs();
  621. dss_set_go_bits();
  622. extra_updating = extra_info_update_ongoing();
  623. if (!extra_updating)
  624. complete_all(&extra_updated_completion);
  625. if (!need_isr())
  626. dss_unregister_vsync_isr();
  627. spin_unlock(&data_lock);
  628. }
  629. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  630. {
  631. struct ovl_priv_data *op;
  632. op = get_ovl_priv(ovl);
  633. if (!op->user_info_dirty)
  634. return;
  635. op->user_info_dirty = false;
  636. op->info_dirty = true;
  637. op->info = op->user_info;
  638. }
  639. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  640. {
  641. struct mgr_priv_data *mp;
  642. mp = get_mgr_priv(mgr);
  643. if (!mp->user_info_dirty)
  644. return;
  645. mp->user_info_dirty = false;
  646. mp->info_dirty = true;
  647. mp->info = mp->user_info;
  648. }
  649. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  650. {
  651. unsigned long flags;
  652. struct omap_overlay *ovl;
  653. int r;
  654. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  655. spin_lock_irqsave(&data_lock, flags);
  656. r = dss_check_settings_apply(mgr, mgr->device);
  657. if (r) {
  658. spin_unlock_irqrestore(&data_lock, flags);
  659. DSSERR("failed to apply settings: illegal configuration.\n");
  660. return r;
  661. }
  662. /* Configure overlays */
  663. list_for_each_entry(ovl, &mgr->overlays, list)
  664. omap_dss_mgr_apply_ovl(ovl);
  665. /* Configure manager */
  666. omap_dss_mgr_apply_mgr(mgr);
  667. dss_write_regs();
  668. dss_set_go_bits();
  669. spin_unlock_irqrestore(&data_lock, flags);
  670. return 0;
  671. }
  672. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  673. {
  674. struct ovl_priv_data *op;
  675. op = get_ovl_priv(ovl);
  676. if (op->enabled == enable)
  677. return;
  678. op->enabled = enable;
  679. op->extra_info_dirty = true;
  680. }
  681. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  682. u32 fifo_low, u32 fifo_high)
  683. {
  684. struct ovl_priv_data *op = get_ovl_priv(ovl);
  685. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  686. return;
  687. op->fifo_low = fifo_low;
  688. op->fifo_high = fifo_high;
  689. op->extra_info_dirty = true;
  690. }
  691. static void dss_apply_fifo_merge(bool use_fifo_merge)
  692. {
  693. if (dss_data.fifo_merge == use_fifo_merge)
  694. return;
  695. dss_data.fifo_merge = use_fifo_merge;
  696. dss_data.fifo_merge_dirty = true;
  697. }
  698. static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
  699. bool use_fifo_merge)
  700. {
  701. struct ovl_priv_data *op = get_ovl_priv(ovl);
  702. struct omap_dss_device *dssdev;
  703. u32 fifo_low, fifo_high;
  704. if (!op->enabled && !op->enabling)
  705. return;
  706. dssdev = ovl->manager->device;
  707. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  708. use_fifo_merge);
  709. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  710. }
  711. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr,
  712. bool use_fifo_merge)
  713. {
  714. struct omap_overlay *ovl;
  715. struct mgr_priv_data *mp;
  716. mp = get_mgr_priv(mgr);
  717. if (!mp->enabled)
  718. return;
  719. list_for_each_entry(ovl, &mgr->overlays, list)
  720. dss_ovl_setup_fifo(ovl, use_fifo_merge);
  721. }
  722. static void dss_setup_fifos(bool use_fifo_merge)
  723. {
  724. const int num_mgrs = omap_dss_get_num_overlay_managers();
  725. struct omap_overlay_manager *mgr;
  726. int i;
  727. for (i = 0; i < num_mgrs; ++i) {
  728. mgr = omap_dss_get_overlay_manager(i);
  729. dss_mgr_setup_fifos(mgr, use_fifo_merge);
  730. }
  731. }
  732. static int get_num_used_managers(void)
  733. {
  734. const int num_mgrs = omap_dss_get_num_overlay_managers();
  735. struct omap_overlay_manager *mgr;
  736. struct mgr_priv_data *mp;
  737. int i;
  738. int enabled_mgrs;
  739. enabled_mgrs = 0;
  740. for (i = 0; i < num_mgrs; ++i) {
  741. mgr = omap_dss_get_overlay_manager(i);
  742. mp = get_mgr_priv(mgr);
  743. if (!mp->enabled)
  744. continue;
  745. enabled_mgrs++;
  746. }
  747. return enabled_mgrs;
  748. }
  749. static int get_num_used_overlays(void)
  750. {
  751. const int num_ovls = omap_dss_get_num_overlays();
  752. struct omap_overlay *ovl;
  753. struct ovl_priv_data *op;
  754. struct mgr_priv_data *mp;
  755. int i;
  756. int enabled_ovls;
  757. enabled_ovls = 0;
  758. for (i = 0; i < num_ovls; ++i) {
  759. ovl = omap_dss_get_overlay(i);
  760. op = get_ovl_priv(ovl);
  761. if (!op->enabled && !op->enabling)
  762. continue;
  763. mp = get_mgr_priv(ovl->manager);
  764. if (!mp->enabled)
  765. continue;
  766. enabled_ovls++;
  767. }
  768. return enabled_ovls;
  769. }
  770. static bool get_use_fifo_merge(void)
  771. {
  772. int enabled_mgrs = get_num_used_managers();
  773. int enabled_ovls = get_num_used_overlays();
  774. if (!dss_has_feature(FEAT_FIFO_MERGE))
  775. return false;
  776. /*
  777. * In theory the only requirement for fifomerge is enabled_ovls <= 1.
  778. * However, if we have two managers enabled and set/unset the fifomerge,
  779. * we need to set the GO bits in particular sequence for the managers,
  780. * and wait in between.
  781. *
  782. * This is rather difficult as new apply calls can happen at any time,
  783. * so we simplify the problem by requiring also that enabled_mgrs <= 1.
  784. * In practice this shouldn't matter, because when only one overlay is
  785. * enabled, most likely only one output is enabled.
  786. */
  787. return enabled_mgrs <= 1 && enabled_ovls <= 1;
  788. }
  789. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  790. {
  791. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  792. unsigned long flags;
  793. int r;
  794. bool fifo_merge;
  795. mutex_lock(&apply_lock);
  796. if (mp->enabled)
  797. goto out;
  798. spin_lock_irqsave(&data_lock, flags);
  799. mp->enabled = true;
  800. r = dss_check_settings(mgr, mgr->device);
  801. if (r) {
  802. DSSERR("failed to enable manager %d: check_settings failed\n",
  803. mgr->id);
  804. goto err;
  805. }
  806. /* step 1: setup fifos/fifomerge before enabling the manager */
  807. fifo_merge = get_use_fifo_merge();
  808. dss_setup_fifos(fifo_merge);
  809. dss_apply_fifo_merge(fifo_merge);
  810. dss_write_regs();
  811. dss_set_go_bits();
  812. spin_unlock_irqrestore(&data_lock, flags);
  813. /* wait until fifo config is in */
  814. wait_pending_extra_info_updates();
  815. /* step 2: enable the manager */
  816. spin_lock_irqsave(&data_lock, flags);
  817. if (!mgr_manual_update(mgr))
  818. mp->updating = true;
  819. spin_unlock_irqrestore(&data_lock, flags);
  820. if (!mgr_manual_update(mgr))
  821. dispc_mgr_enable(mgr->id, true);
  822. out:
  823. mutex_unlock(&apply_lock);
  824. return 0;
  825. err:
  826. mp->enabled = false;
  827. spin_unlock_irqrestore(&data_lock, flags);
  828. mutex_unlock(&apply_lock);
  829. return r;
  830. }
  831. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  832. {
  833. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  834. unsigned long flags;
  835. bool fifo_merge;
  836. mutex_lock(&apply_lock);
  837. if (!mp->enabled)
  838. goto out;
  839. if (!mgr_manual_update(mgr))
  840. dispc_mgr_enable(mgr->id, false);
  841. spin_lock_irqsave(&data_lock, flags);
  842. mp->updating = false;
  843. mp->enabled = false;
  844. fifo_merge = get_use_fifo_merge();
  845. dss_setup_fifos(fifo_merge);
  846. dss_apply_fifo_merge(fifo_merge);
  847. dss_write_regs();
  848. dss_set_go_bits();
  849. spin_unlock_irqrestore(&data_lock, flags);
  850. wait_pending_extra_info_updates();
  851. out:
  852. mutex_unlock(&apply_lock);
  853. }
  854. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  855. struct omap_overlay_manager_info *info)
  856. {
  857. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  858. unsigned long flags;
  859. int r;
  860. r = dss_mgr_simple_check(mgr, info);
  861. if (r)
  862. return r;
  863. spin_lock_irqsave(&data_lock, flags);
  864. mp->user_info = *info;
  865. mp->user_info_dirty = true;
  866. spin_unlock_irqrestore(&data_lock, flags);
  867. return 0;
  868. }
  869. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  870. struct omap_overlay_manager_info *info)
  871. {
  872. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  873. unsigned long flags;
  874. spin_lock_irqsave(&data_lock, flags);
  875. *info = mp->user_info;
  876. spin_unlock_irqrestore(&data_lock, flags);
  877. }
  878. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  879. struct omap_dss_device *dssdev)
  880. {
  881. int r;
  882. mutex_lock(&apply_lock);
  883. if (dssdev->manager) {
  884. DSSERR("display '%s' already has a manager '%s'\n",
  885. dssdev->name, dssdev->manager->name);
  886. r = -EINVAL;
  887. goto err;
  888. }
  889. if ((mgr->supported_displays & dssdev->type) == 0) {
  890. DSSERR("display '%s' does not support manager '%s'\n",
  891. dssdev->name, mgr->name);
  892. r = -EINVAL;
  893. goto err;
  894. }
  895. dssdev->manager = mgr;
  896. mgr->device = dssdev;
  897. mutex_unlock(&apply_lock);
  898. return 0;
  899. err:
  900. mutex_unlock(&apply_lock);
  901. return r;
  902. }
  903. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  904. {
  905. int r;
  906. mutex_lock(&apply_lock);
  907. if (!mgr->device) {
  908. DSSERR("failed to unset display, display not set.\n");
  909. r = -EINVAL;
  910. goto err;
  911. }
  912. /*
  913. * Don't allow currently enabled displays to have the overlay manager
  914. * pulled out from underneath them
  915. */
  916. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  917. r = -EINVAL;
  918. goto err;
  919. }
  920. mgr->device->manager = NULL;
  921. mgr->device = NULL;
  922. mutex_unlock(&apply_lock);
  923. return 0;
  924. err:
  925. mutex_unlock(&apply_lock);
  926. return r;
  927. }
  928. int dss_ovl_set_info(struct omap_overlay *ovl,
  929. struct omap_overlay_info *info)
  930. {
  931. struct ovl_priv_data *op = get_ovl_priv(ovl);
  932. unsigned long flags;
  933. int r;
  934. r = dss_ovl_simple_check(ovl, info);
  935. if (r)
  936. return r;
  937. spin_lock_irqsave(&data_lock, flags);
  938. op->user_info = *info;
  939. op->user_info_dirty = true;
  940. spin_unlock_irqrestore(&data_lock, flags);
  941. return 0;
  942. }
  943. void dss_ovl_get_info(struct omap_overlay *ovl,
  944. struct omap_overlay_info *info)
  945. {
  946. struct ovl_priv_data *op = get_ovl_priv(ovl);
  947. unsigned long flags;
  948. spin_lock_irqsave(&data_lock, flags);
  949. *info = op->user_info;
  950. spin_unlock_irqrestore(&data_lock, flags);
  951. }
  952. int dss_ovl_set_manager(struct omap_overlay *ovl,
  953. struct omap_overlay_manager *mgr)
  954. {
  955. struct ovl_priv_data *op = get_ovl_priv(ovl);
  956. unsigned long flags;
  957. int r;
  958. if (!mgr)
  959. return -EINVAL;
  960. mutex_lock(&apply_lock);
  961. if (ovl->manager) {
  962. DSSERR("overlay '%s' already has a manager '%s'\n",
  963. ovl->name, ovl->manager->name);
  964. r = -EINVAL;
  965. goto err;
  966. }
  967. spin_lock_irqsave(&data_lock, flags);
  968. if (op->enabled) {
  969. spin_unlock_irqrestore(&data_lock, flags);
  970. DSSERR("overlay has to be disabled to change the manager\n");
  971. r = -EINVAL;
  972. goto err;
  973. }
  974. op->channel = mgr->id;
  975. op->extra_info_dirty = true;
  976. ovl->manager = mgr;
  977. list_add_tail(&ovl->list, &mgr->overlays);
  978. spin_unlock_irqrestore(&data_lock, flags);
  979. /* XXX: When there is an overlay on a DSI manual update display, and
  980. * the overlay is first disabled, then moved to tv, and enabled, we
  981. * seem to get SYNC_LOST_DIGIT error.
  982. *
  983. * Waiting doesn't seem to help, but updating the manual update display
  984. * after disabling the overlay seems to fix this. This hints that the
  985. * overlay is perhaps somehow tied to the LCD output until the output
  986. * is updated.
  987. *
  988. * Userspace workaround for this is to update the LCD after disabling
  989. * the overlay, but before moving the overlay to TV.
  990. */
  991. mutex_unlock(&apply_lock);
  992. return 0;
  993. err:
  994. mutex_unlock(&apply_lock);
  995. return r;
  996. }
  997. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  998. {
  999. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1000. unsigned long flags;
  1001. int r;
  1002. mutex_lock(&apply_lock);
  1003. if (!ovl->manager) {
  1004. DSSERR("failed to detach overlay: manager not set\n");
  1005. r = -EINVAL;
  1006. goto err;
  1007. }
  1008. spin_lock_irqsave(&data_lock, flags);
  1009. if (op->enabled) {
  1010. spin_unlock_irqrestore(&data_lock, flags);
  1011. DSSERR("overlay has to be disabled to unset the manager\n");
  1012. r = -EINVAL;
  1013. goto err;
  1014. }
  1015. op->channel = -1;
  1016. ovl->manager = NULL;
  1017. list_del(&ovl->list);
  1018. spin_unlock_irqrestore(&data_lock, flags);
  1019. mutex_unlock(&apply_lock);
  1020. return 0;
  1021. err:
  1022. mutex_unlock(&apply_lock);
  1023. return r;
  1024. }
  1025. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1026. {
  1027. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1028. unsigned long flags;
  1029. bool e;
  1030. spin_lock_irqsave(&data_lock, flags);
  1031. e = op->enabled;
  1032. spin_unlock_irqrestore(&data_lock, flags);
  1033. return e;
  1034. }
  1035. int dss_ovl_enable(struct omap_overlay *ovl)
  1036. {
  1037. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1038. unsigned long flags;
  1039. bool fifo_merge;
  1040. int r;
  1041. mutex_lock(&apply_lock);
  1042. if (op->enabled) {
  1043. r = 0;
  1044. goto err1;
  1045. }
  1046. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1047. r = -EINVAL;
  1048. goto err1;
  1049. }
  1050. spin_lock_irqsave(&data_lock, flags);
  1051. op->enabling = true;
  1052. r = dss_check_settings(ovl->manager, ovl->manager->device);
  1053. if (r) {
  1054. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1055. ovl->id);
  1056. goto err2;
  1057. }
  1058. /* step 1: configure fifos/fifomerge for currently enabled ovls */
  1059. fifo_merge = get_use_fifo_merge();
  1060. dss_setup_fifos(fifo_merge);
  1061. dss_apply_fifo_merge(fifo_merge);
  1062. dss_write_regs();
  1063. dss_set_go_bits();
  1064. spin_unlock_irqrestore(&data_lock, flags);
  1065. /* wait for fifo configs to go in */
  1066. wait_pending_extra_info_updates();
  1067. /* step 2: enable the overlay */
  1068. spin_lock_irqsave(&data_lock, flags);
  1069. op->enabling = false;
  1070. dss_apply_ovl_enable(ovl, true);
  1071. dss_write_regs();
  1072. dss_set_go_bits();
  1073. spin_unlock_irqrestore(&data_lock, flags);
  1074. /* wait for overlay to be enabled */
  1075. wait_pending_extra_info_updates();
  1076. mutex_unlock(&apply_lock);
  1077. return 0;
  1078. err2:
  1079. op->enabling = false;
  1080. spin_unlock_irqrestore(&data_lock, flags);
  1081. err1:
  1082. mutex_unlock(&apply_lock);
  1083. return r;
  1084. }
  1085. int dss_ovl_disable(struct omap_overlay *ovl)
  1086. {
  1087. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1088. unsigned long flags;
  1089. bool fifo_merge;
  1090. int r;
  1091. mutex_lock(&apply_lock);
  1092. if (!op->enabled) {
  1093. r = 0;
  1094. goto err;
  1095. }
  1096. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1097. r = -EINVAL;
  1098. goto err;
  1099. }
  1100. /* step 1: disable the overlay */
  1101. spin_lock_irqsave(&data_lock, flags);
  1102. dss_apply_ovl_enable(ovl, false);
  1103. dss_write_regs();
  1104. dss_set_go_bits();
  1105. spin_unlock_irqrestore(&data_lock, flags);
  1106. /* wait for the overlay to be disabled */
  1107. wait_pending_extra_info_updates();
  1108. /* step 2: configure fifos/fifomerge */
  1109. spin_lock_irqsave(&data_lock, flags);
  1110. fifo_merge = get_use_fifo_merge();
  1111. dss_setup_fifos(fifo_merge);
  1112. dss_apply_fifo_merge(fifo_merge);
  1113. dss_write_regs();
  1114. dss_set_go_bits();
  1115. spin_unlock_irqrestore(&data_lock, flags);
  1116. /* wait for fifo config to go in */
  1117. wait_pending_extra_info_updates();
  1118. mutex_unlock(&apply_lock);
  1119. return 0;
  1120. err:
  1121. mutex_unlock(&apply_lock);
  1122. return r;
  1123. }