rtl8187_dev.c 24 KB

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  1. /*
  2. * Linux device driver for RTL8187
  3. *
  4. * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5. * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
  6. *
  7. * Based on the r8187 driver, which is:
  8. * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
  9. *
  10. * Magic delays and register offsets below are taken from the original
  11. * r8187 driver sources. Thanks to Realtek for their support!
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. */
  17. #include <linux/init.h>
  18. #include <linux/usb.h>
  19. #include <linux/delay.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/eeprom_93cx6.h>
  22. #include <net/mac80211.h>
  23. #include "rtl8187.h"
  24. #include "rtl8187_rtl8225.h"
  25. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  26. MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  27. MODULE_DESCRIPTION("RTL8187 USB wireless driver");
  28. MODULE_LICENSE("GPL");
  29. static struct usb_device_id rtl8187_table[] __devinitdata = {
  30. /* Realtek */
  31. {USB_DEVICE(0x0bda, 0x8187)},
  32. /* Netgear */
  33. {USB_DEVICE(0x0846, 0x6100)},
  34. {USB_DEVICE(0x0846, 0x6a00)},
  35. /* HP */
  36. {USB_DEVICE(0x03f0, 0xca02)},
  37. /* Sitecom */
  38. {USB_DEVICE(0x0df6, 0x000d)},
  39. {}
  40. };
  41. MODULE_DEVICE_TABLE(usb, rtl8187_table);
  42. static const struct ieee80211_rate rtl818x_rates[] = {
  43. { .bitrate = 10, .hw_value = 0, },
  44. { .bitrate = 20, .hw_value = 1, },
  45. { .bitrate = 55, .hw_value = 2, },
  46. { .bitrate = 110, .hw_value = 3, },
  47. { .bitrate = 60, .hw_value = 4, },
  48. { .bitrate = 90, .hw_value = 5, },
  49. { .bitrate = 120, .hw_value = 6, },
  50. { .bitrate = 180, .hw_value = 7, },
  51. { .bitrate = 240, .hw_value = 8, },
  52. { .bitrate = 360, .hw_value = 9, },
  53. { .bitrate = 480, .hw_value = 10, },
  54. { .bitrate = 540, .hw_value = 11, },
  55. };
  56. static const struct ieee80211_channel rtl818x_channels[] = {
  57. { .center_freq = 2412 },
  58. { .center_freq = 2417 },
  59. { .center_freq = 2422 },
  60. { .center_freq = 2427 },
  61. { .center_freq = 2432 },
  62. { .center_freq = 2437 },
  63. { .center_freq = 2442 },
  64. { .center_freq = 2447 },
  65. { .center_freq = 2452 },
  66. { .center_freq = 2457 },
  67. { .center_freq = 2462 },
  68. { .center_freq = 2467 },
  69. { .center_freq = 2472 },
  70. { .center_freq = 2484 },
  71. };
  72. static void rtl8187_iowrite_async_cb(struct urb *urb)
  73. {
  74. kfree(urb->context);
  75. usb_free_urb(urb);
  76. }
  77. static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  78. void *data, u16 len)
  79. {
  80. struct usb_ctrlrequest *dr;
  81. struct urb *urb;
  82. struct rtl8187_async_write_data {
  83. u8 data[4];
  84. struct usb_ctrlrequest dr;
  85. } *buf;
  86. buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
  87. if (!buf)
  88. return;
  89. urb = usb_alloc_urb(0, GFP_ATOMIC);
  90. if (!urb) {
  91. kfree(buf);
  92. return;
  93. }
  94. dr = &buf->dr;
  95. dr->bRequestType = RTL8187_REQT_WRITE;
  96. dr->bRequest = RTL8187_REQ_SET_REG;
  97. dr->wValue = addr;
  98. dr->wIndex = 0;
  99. dr->wLength = cpu_to_le16(len);
  100. memcpy(buf, data, len);
  101. usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
  102. (unsigned char *)dr, buf, len,
  103. rtl8187_iowrite_async_cb, buf);
  104. usb_submit_urb(urb, GFP_ATOMIC);
  105. }
  106. static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
  107. __le32 *addr, u32 val)
  108. {
  109. __le32 buf = cpu_to_le32(val);
  110. rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
  111. &buf, sizeof(buf));
  112. }
  113. void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  114. {
  115. struct rtl8187_priv *priv = dev->priv;
  116. data <<= 8;
  117. data |= addr | 0x80;
  118. rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
  119. rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
  120. rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
  121. rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
  122. msleep(1);
  123. }
  124. static void rtl8187_tx_cb(struct urb *urb)
  125. {
  126. struct ieee80211_tx_status status;
  127. struct sk_buff *skb = (struct sk_buff *)urb->context;
  128. struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
  129. memset(&status, 0, sizeof(status));
  130. usb_free_urb(info->urb);
  131. if (info->control)
  132. memcpy(&status.control, info->control, sizeof(status.control));
  133. kfree(info->control);
  134. skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
  135. status.flags |= IEEE80211_TX_STATUS_ACK;
  136. ieee80211_tx_status_irqsafe(info->dev, skb, &status);
  137. }
  138. static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
  139. struct ieee80211_tx_control *control)
  140. {
  141. struct rtl8187_priv *priv = dev->priv;
  142. struct rtl8187_tx_hdr *hdr;
  143. struct rtl8187_tx_info *info;
  144. struct urb *urb;
  145. __le16 rts_dur = 0;
  146. u32 flags;
  147. urb = usb_alloc_urb(0, GFP_ATOMIC);
  148. if (!urb) {
  149. kfree_skb(skb);
  150. return 0;
  151. }
  152. flags = skb->len;
  153. flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
  154. BUG_ON(!control->tx_rate);
  155. flags |= control->tx_rate->hw_value << 24;
  156. if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
  157. flags |= RTL8187_TX_FLAG_MORE_FRAG;
  158. if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  159. BUG_ON(!control->rts_cts_rate);
  160. flags |= RTL8187_TX_FLAG_RTS;
  161. flags |= control->rts_cts_rate->hw_value << 19;
  162. rts_dur = ieee80211_rts_duration(dev, priv->vif,
  163. skb->len, control);
  164. } else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  165. BUG_ON(!control->rts_cts_rate);
  166. flags |= RTL8187_TX_FLAG_CTS;
  167. flags |= control->rts_cts_rate->hw_value << 19;
  168. }
  169. hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
  170. hdr->flags = cpu_to_le32(flags);
  171. hdr->len = 0;
  172. hdr->rts_duration = rts_dur;
  173. hdr->retry = cpu_to_le32(control->retry_limit << 8);
  174. info = (struct rtl8187_tx_info *)skb->cb;
  175. info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
  176. info->urb = urb;
  177. info->dev = dev;
  178. usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
  179. hdr, skb->len, rtl8187_tx_cb, skb);
  180. usb_submit_urb(urb, GFP_ATOMIC);
  181. return 0;
  182. }
  183. static void rtl8187_rx_cb(struct urb *urb)
  184. {
  185. struct sk_buff *skb = (struct sk_buff *)urb->context;
  186. struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
  187. struct ieee80211_hw *dev = info->dev;
  188. struct rtl8187_priv *priv = dev->priv;
  189. struct rtl8187_rx_hdr *hdr;
  190. struct ieee80211_rx_status rx_status = { 0 };
  191. int rate, signal;
  192. u32 flags;
  193. spin_lock(&priv->rx_queue.lock);
  194. if (skb->next)
  195. __skb_unlink(skb, &priv->rx_queue);
  196. else {
  197. spin_unlock(&priv->rx_queue.lock);
  198. return;
  199. }
  200. spin_unlock(&priv->rx_queue.lock);
  201. if (unlikely(urb->status)) {
  202. usb_free_urb(urb);
  203. dev_kfree_skb_irq(skb);
  204. return;
  205. }
  206. skb_put(skb, urb->actual_length);
  207. hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
  208. flags = le32_to_cpu(hdr->flags);
  209. skb_trim(skb, flags & 0x0FFF);
  210. signal = hdr->agc >> 1;
  211. rate = (flags >> 20) & 0xF;
  212. if (rate > 3) { /* OFDM rate */
  213. if (signal > 90)
  214. signal = 90;
  215. else if (signal < 25)
  216. signal = 25;
  217. signal = 90 - signal;
  218. } else { /* CCK rate */
  219. if (signal > 95)
  220. signal = 95;
  221. else if (signal < 30)
  222. signal = 30;
  223. signal = 95 - signal;
  224. }
  225. rx_status.antenna = (hdr->signal >> 7) & 1;
  226. rx_status.signal = 64 - min(hdr->noise, (u8)64);
  227. rx_status.ssi = signal;
  228. rx_status.rate_idx = rate;
  229. rx_status.freq = dev->conf.channel->center_freq;
  230. rx_status.band = dev->conf.channel->band;
  231. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  232. rx_status.flag |= RX_FLAG_TSFT;
  233. if (flags & (1 << 13))
  234. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  235. ieee80211_rx_irqsafe(dev, skb, &rx_status);
  236. skb = dev_alloc_skb(RTL8187_MAX_RX);
  237. if (unlikely(!skb)) {
  238. usb_free_urb(urb);
  239. /* TODO check rx queue length and refill *somewhere* */
  240. return;
  241. }
  242. info = (struct rtl8187_rx_info *)skb->cb;
  243. info->urb = urb;
  244. info->dev = dev;
  245. urb->transfer_buffer = skb_tail_pointer(skb);
  246. urb->context = skb;
  247. skb_queue_tail(&priv->rx_queue, skb);
  248. usb_submit_urb(urb, GFP_ATOMIC);
  249. }
  250. static int rtl8187_init_urbs(struct ieee80211_hw *dev)
  251. {
  252. struct rtl8187_priv *priv = dev->priv;
  253. struct urb *entry;
  254. struct sk_buff *skb;
  255. struct rtl8187_rx_info *info;
  256. while (skb_queue_len(&priv->rx_queue) < 8) {
  257. skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
  258. if (!skb)
  259. break;
  260. entry = usb_alloc_urb(0, GFP_KERNEL);
  261. if (!entry) {
  262. kfree_skb(skb);
  263. break;
  264. }
  265. usb_fill_bulk_urb(entry, priv->udev,
  266. usb_rcvbulkpipe(priv->udev, 1),
  267. skb_tail_pointer(skb),
  268. RTL8187_MAX_RX, rtl8187_rx_cb, skb);
  269. info = (struct rtl8187_rx_info *)skb->cb;
  270. info->urb = entry;
  271. info->dev = dev;
  272. skb_queue_tail(&priv->rx_queue, skb);
  273. usb_submit_urb(entry, GFP_KERNEL);
  274. }
  275. return 0;
  276. }
  277. static int rtl8187_init_hw(struct ieee80211_hw *dev)
  278. {
  279. struct rtl8187_priv *priv = dev->priv;
  280. u8 reg;
  281. int i;
  282. /* reset */
  283. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  284. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  285. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  286. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  287. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  288. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  289. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  290. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  291. msleep(200);
  292. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
  293. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
  294. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
  295. msleep(200);
  296. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  297. reg &= (1 << 1);
  298. reg |= RTL818X_CMD_RESET;
  299. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  300. i = 10;
  301. do {
  302. msleep(2);
  303. if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
  304. RTL818X_CMD_RESET))
  305. break;
  306. } while (--i);
  307. if (!i) {
  308. printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
  309. return -ETIMEDOUT;
  310. }
  311. /* reload registers from eeprom */
  312. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
  313. i = 10;
  314. do {
  315. msleep(4);
  316. if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
  317. RTL818X_EEPROM_CMD_CONFIG))
  318. break;
  319. } while (--i);
  320. if (!i) {
  321. printk(KERN_ERR "%s: eeprom reset timeout!\n",
  322. wiphy_name(dev->wiphy));
  323. return -ETIMEDOUT;
  324. }
  325. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  326. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  327. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
  328. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
  329. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
  330. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
  331. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  332. /* setup card */
  333. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  334. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  335. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  336. rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
  337. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  338. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  339. rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
  340. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  341. reg &= 0x3F;
  342. reg |= 0x80;
  343. rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
  344. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  345. rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
  346. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  347. rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
  348. // TODO: set RESP_RATE and BRSR properly
  349. rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
  350. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  351. /* host_usb_init */
  352. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  353. rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
  354. reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
  355. rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
  356. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  357. rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
  358. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  359. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
  360. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
  361. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
  362. msleep(100);
  363. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
  364. rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
  365. rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
  366. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  367. rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
  368. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  369. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
  370. msleep(100);
  371. priv->rf->init(dev);
  372. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  373. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  374. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  375. rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
  376. rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
  377. rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
  378. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  379. return 0;
  380. }
  381. static int rtl8187_start(struct ieee80211_hw *dev)
  382. {
  383. struct rtl8187_priv *priv = dev->priv;
  384. u32 reg;
  385. int ret;
  386. ret = rtl8187_init_hw(dev);
  387. if (ret)
  388. return ret;
  389. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  390. rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
  391. rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
  392. rtl8187_init_urbs(dev);
  393. reg = RTL818X_RX_CONF_ONLYERLPKT |
  394. RTL818X_RX_CONF_RX_AUTORESETPHY |
  395. RTL818X_RX_CONF_BSSID |
  396. RTL818X_RX_CONF_MGMT |
  397. RTL818X_RX_CONF_DATA |
  398. (7 << 13 /* RX FIFO threshold NONE */) |
  399. (7 << 10 /* MAX RX DMA */) |
  400. RTL818X_RX_CONF_BROADCAST |
  401. RTL818X_RX_CONF_NICMAC;
  402. priv->rx_conf = reg;
  403. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  404. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  405. reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
  406. reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
  407. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  408. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  409. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
  410. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
  411. reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
  412. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  413. reg = RTL818X_TX_CONF_CW_MIN |
  414. (7 << 21 /* MAX TX DMA */) |
  415. RTL818X_TX_CONF_NO_ICV;
  416. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  417. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  418. reg |= RTL818X_CMD_TX_ENABLE;
  419. reg |= RTL818X_CMD_RX_ENABLE;
  420. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  421. return 0;
  422. }
  423. static void rtl8187_stop(struct ieee80211_hw *dev)
  424. {
  425. struct rtl8187_priv *priv = dev->priv;
  426. struct rtl8187_rx_info *info;
  427. struct sk_buff *skb;
  428. u32 reg;
  429. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  430. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  431. reg &= ~RTL818X_CMD_TX_ENABLE;
  432. reg &= ~RTL818X_CMD_RX_ENABLE;
  433. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  434. priv->rf->stop(dev);
  435. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  436. reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
  437. rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
  438. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  439. while ((skb = skb_dequeue(&priv->rx_queue))) {
  440. info = (struct rtl8187_rx_info *)skb->cb;
  441. usb_kill_urb(info->urb);
  442. kfree_skb(skb);
  443. }
  444. return;
  445. }
  446. static int rtl8187_add_interface(struct ieee80211_hw *dev,
  447. struct ieee80211_if_init_conf *conf)
  448. {
  449. struct rtl8187_priv *priv = dev->priv;
  450. int i;
  451. if (priv->mode != IEEE80211_IF_TYPE_MNTR)
  452. return -EOPNOTSUPP;
  453. switch (conf->type) {
  454. case IEEE80211_IF_TYPE_STA:
  455. priv->mode = conf->type;
  456. break;
  457. default:
  458. return -EOPNOTSUPP;
  459. }
  460. priv->vif = conf->vif;
  461. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  462. for (i = 0; i < ETH_ALEN; i++)
  463. rtl818x_iowrite8(priv, &priv->map->MAC[i],
  464. ((u8 *)conf->mac_addr)[i]);
  465. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  466. return 0;
  467. }
  468. static void rtl8187_remove_interface(struct ieee80211_hw *dev,
  469. struct ieee80211_if_init_conf *conf)
  470. {
  471. struct rtl8187_priv *priv = dev->priv;
  472. priv->mode = IEEE80211_IF_TYPE_MNTR;
  473. priv->vif = NULL;
  474. }
  475. static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
  476. {
  477. struct rtl8187_priv *priv = dev->priv;
  478. u32 reg;
  479. reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  480. /* Enable TX loopback on MAC level to avoid TX during channel
  481. * changes, as this has be seen to causes problems and the
  482. * card will stop work until next reset
  483. */
  484. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  485. reg | RTL818X_TX_CONF_LOOPBACK_MAC);
  486. msleep(10);
  487. priv->rf->set_chan(dev, conf);
  488. msleep(10);
  489. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  490. rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
  491. if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
  492. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
  493. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
  494. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
  495. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
  496. } else {
  497. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
  498. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
  499. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
  500. rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
  501. }
  502. rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
  503. rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
  504. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
  505. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
  506. return 0;
  507. }
  508. static int rtl8187_config_interface(struct ieee80211_hw *dev,
  509. struct ieee80211_vif *vif,
  510. struct ieee80211_if_conf *conf)
  511. {
  512. struct rtl8187_priv *priv = dev->priv;
  513. int i;
  514. for (i = 0; i < ETH_ALEN; i++)
  515. rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
  516. if (is_valid_ether_addr(conf->bssid))
  517. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
  518. else
  519. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
  520. return 0;
  521. }
  522. static void rtl8187_configure_filter(struct ieee80211_hw *dev,
  523. unsigned int changed_flags,
  524. unsigned int *total_flags,
  525. int mc_count, struct dev_addr_list *mclist)
  526. {
  527. struct rtl8187_priv *priv = dev->priv;
  528. if (changed_flags & FIF_FCSFAIL)
  529. priv->rx_conf ^= RTL818X_RX_CONF_FCS;
  530. if (changed_flags & FIF_CONTROL)
  531. priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
  532. if (changed_flags & FIF_OTHER_BSS)
  533. priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
  534. if (*total_flags & FIF_ALLMULTI || mc_count > 0)
  535. priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
  536. else
  537. priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
  538. *total_flags = 0;
  539. if (priv->rx_conf & RTL818X_RX_CONF_FCS)
  540. *total_flags |= FIF_FCSFAIL;
  541. if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
  542. *total_flags |= FIF_CONTROL;
  543. if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
  544. *total_flags |= FIF_OTHER_BSS;
  545. if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
  546. *total_flags |= FIF_ALLMULTI;
  547. rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
  548. }
  549. static const struct ieee80211_ops rtl8187_ops = {
  550. .tx = rtl8187_tx,
  551. .start = rtl8187_start,
  552. .stop = rtl8187_stop,
  553. .add_interface = rtl8187_add_interface,
  554. .remove_interface = rtl8187_remove_interface,
  555. .config = rtl8187_config,
  556. .config_interface = rtl8187_config_interface,
  557. .configure_filter = rtl8187_configure_filter,
  558. };
  559. static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
  560. {
  561. struct ieee80211_hw *dev = eeprom->data;
  562. struct rtl8187_priv *priv = dev->priv;
  563. u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
  564. eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
  565. eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
  566. eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
  567. eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
  568. }
  569. static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
  570. {
  571. struct ieee80211_hw *dev = eeprom->data;
  572. struct rtl8187_priv *priv = dev->priv;
  573. u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
  574. if (eeprom->reg_data_in)
  575. reg |= RTL818X_EEPROM_CMD_WRITE;
  576. if (eeprom->reg_data_out)
  577. reg |= RTL818X_EEPROM_CMD_READ;
  578. if (eeprom->reg_data_clock)
  579. reg |= RTL818X_EEPROM_CMD_CK;
  580. if (eeprom->reg_chip_select)
  581. reg |= RTL818X_EEPROM_CMD_CS;
  582. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
  583. udelay(10);
  584. }
  585. static int __devinit rtl8187_probe(struct usb_interface *intf,
  586. const struct usb_device_id *id)
  587. {
  588. struct usb_device *udev = interface_to_usbdev(intf);
  589. struct ieee80211_hw *dev;
  590. struct rtl8187_priv *priv;
  591. struct eeprom_93cx6 eeprom;
  592. struct ieee80211_channel *channel;
  593. u16 txpwr, reg;
  594. int err, i;
  595. DECLARE_MAC_BUF(mac);
  596. dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
  597. if (!dev) {
  598. printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
  599. return -ENOMEM;
  600. }
  601. priv = dev->priv;
  602. SET_IEEE80211_DEV(dev, &intf->dev);
  603. usb_set_intfdata(intf, dev);
  604. priv->udev = udev;
  605. usb_get_dev(udev);
  606. skb_queue_head_init(&priv->rx_queue);
  607. BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
  608. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
  609. memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
  610. memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
  611. priv->map = (struct rtl818x_csr *)0xFF00;
  612. priv->band.band = IEEE80211_BAND_2GHZ;
  613. priv->band.channels = priv->channels;
  614. priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
  615. priv->band.bitrates = priv->rates;
  616. priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
  617. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  618. priv->mode = IEEE80211_IF_TYPE_MNTR;
  619. dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
  620. IEEE80211_HW_RX_INCLUDES_FCS;
  621. dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
  622. dev->queues = 1;
  623. dev->max_rssi = 65;
  624. dev->max_signal = 64;
  625. eeprom.data = dev;
  626. eeprom.register_read = rtl8187_eeprom_register_read;
  627. eeprom.register_write = rtl8187_eeprom_register_write;
  628. if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
  629. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  630. else
  631. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  632. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  633. udelay(10);
  634. eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
  635. (__le16 __force *)dev->wiphy->perm_addr, 3);
  636. if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
  637. printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
  638. "generated MAC address\n");
  639. random_ether_addr(dev->wiphy->perm_addr);
  640. }
  641. channel = priv->channels;
  642. for (i = 0; i < 3; i++) {
  643. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
  644. &txpwr);
  645. (*channel++).hw_value = txpwr & 0xFF;
  646. (*channel++).hw_value = txpwr >> 8;
  647. }
  648. for (i = 0; i < 2; i++) {
  649. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
  650. &txpwr);
  651. (*channel++).hw_value = txpwr & 0xFF;
  652. (*channel++).hw_value = txpwr >> 8;
  653. }
  654. for (i = 0; i < 2; i++) {
  655. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
  656. &txpwr);
  657. (*channel++).hw_value = txpwr & 0xFF;
  658. (*channel++).hw_value = txpwr >> 8;
  659. }
  660. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
  661. &priv->txpwr_base);
  662. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  663. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  664. /* 0 means asic B-cut, we should use SW 3 wire
  665. * bit-by-bit banging for radio. 1 means we can use
  666. * USB specific request to write radio registers */
  667. priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
  668. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  669. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  670. priv->rf = rtl8187_detect_rf(dev);
  671. err = ieee80211_register_hw(dev);
  672. if (err) {
  673. printk(KERN_ERR "rtl8187: Cannot register device\n");
  674. goto err_free_dev;
  675. }
  676. printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
  677. wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
  678. priv->asic_rev, priv->rf->name);
  679. return 0;
  680. err_free_dev:
  681. ieee80211_free_hw(dev);
  682. usb_set_intfdata(intf, NULL);
  683. usb_put_dev(udev);
  684. return err;
  685. }
  686. static void __devexit rtl8187_disconnect(struct usb_interface *intf)
  687. {
  688. struct ieee80211_hw *dev = usb_get_intfdata(intf);
  689. struct rtl8187_priv *priv;
  690. if (!dev)
  691. return;
  692. ieee80211_unregister_hw(dev);
  693. priv = dev->priv;
  694. usb_put_dev(interface_to_usbdev(intf));
  695. ieee80211_free_hw(dev);
  696. }
  697. static struct usb_driver rtl8187_driver = {
  698. .name = KBUILD_MODNAME,
  699. .id_table = rtl8187_table,
  700. .probe = rtl8187_probe,
  701. .disconnect = rtl8187_disconnect,
  702. };
  703. static int __init rtl8187_init(void)
  704. {
  705. return usb_register(&rtl8187_driver);
  706. }
  707. static void __exit rtl8187_exit(void)
  708. {
  709. usb_deregister(&rtl8187_driver);
  710. }
  711. module_init(rtl8187_init);
  712. module_exit(rtl8187_exit);