rt2x00reg.h 4.6 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00
  19. Abstract: rt2x00 generic register information.
  20. */
  21. #ifndef RT2X00REG_H
  22. #define RT2X00REG_H
  23. /*
  24. * TX result flags.
  25. */
  26. enum tx_status {
  27. TX_SUCCESS = 0,
  28. TX_SUCCESS_RETRY = 1,
  29. TX_FAIL_RETRY = 2,
  30. TX_FAIL_INVALID = 3,
  31. TX_FAIL_OTHER = 4,
  32. };
  33. /*
  34. * Antenna values
  35. */
  36. enum antenna {
  37. ANTENNA_SW_DIVERSITY = 0,
  38. ANTENNA_A = 1,
  39. ANTENNA_B = 2,
  40. ANTENNA_HW_DIVERSITY = 3,
  41. };
  42. /*
  43. * Led mode values.
  44. */
  45. enum led_mode {
  46. LED_MODE_DEFAULT = 0,
  47. LED_MODE_TXRX_ACTIVITY = 1,
  48. LED_MODE_SIGNAL_STRENGTH = 2,
  49. LED_MODE_ASUS = 3,
  50. LED_MODE_ALPHA = 4,
  51. };
  52. /*
  53. * TSF sync values
  54. */
  55. enum tsf_sync {
  56. TSF_SYNC_NONE = 0,
  57. TSF_SYNC_INFRA = 1,
  58. TSF_SYNC_BEACON = 2,
  59. };
  60. /*
  61. * Device states
  62. */
  63. enum dev_state {
  64. STATE_DEEP_SLEEP = 0,
  65. STATE_SLEEP = 1,
  66. STATE_STANDBY = 2,
  67. STATE_AWAKE = 3,
  68. /*
  69. * Additional device states, these values are
  70. * not strict since they are not directly passed
  71. * into the device.
  72. */
  73. STATE_RADIO_ON,
  74. STATE_RADIO_OFF,
  75. STATE_RADIO_RX_ON,
  76. STATE_RADIO_RX_OFF,
  77. STATE_RADIO_RX_ON_LINK,
  78. STATE_RADIO_RX_OFF_LINK,
  79. STATE_RADIO_IRQ_ON,
  80. STATE_RADIO_IRQ_OFF,
  81. };
  82. /*
  83. * IFS backoff values
  84. */
  85. enum ifs {
  86. IFS_BACKOFF = 0,
  87. IFS_SIFS = 1,
  88. IFS_NEW_BACKOFF = 2,
  89. IFS_NONE = 3,
  90. };
  91. /*
  92. * Cipher types for hardware encryption
  93. */
  94. enum cipher {
  95. CIPHER_NONE = 0,
  96. CIPHER_WEP64 = 1,
  97. CIPHER_WEP128 = 2,
  98. CIPHER_TKIP = 3,
  99. CIPHER_AES = 4,
  100. /*
  101. * The following fields were added by rt61pci and rt73usb.
  102. */
  103. CIPHER_CKIP64 = 5,
  104. CIPHER_CKIP128 = 6,
  105. CIPHER_TKIP_NO_MIC = 7,
  106. };
  107. /*
  108. * Register handlers.
  109. * We store the position of a register field inside a field structure,
  110. * This will simplify the process of setting and reading a certain field
  111. * inside the register while making sure the process remains byte order safe.
  112. */
  113. struct rt2x00_field8 {
  114. u8 bit_offset;
  115. u8 bit_mask;
  116. };
  117. struct rt2x00_field16 {
  118. u16 bit_offset;
  119. u16 bit_mask;
  120. };
  121. struct rt2x00_field32 {
  122. u32 bit_offset;
  123. u32 bit_mask;
  124. };
  125. /*
  126. * Power of two check, this will check
  127. * if the mask that has been given contains
  128. * and contiguous set of bits.
  129. */
  130. #define is_power_of_two(x) ( !((x) & ((x)-1)) )
  131. #define low_bit_mask(x) ( ((x)-1) & ~(x) )
  132. #define is_valid_mask(x) is_power_of_two(1 + (x) + low_bit_mask(x))
  133. #define FIELD8(__mask) \
  134. ({ \
  135. BUILD_BUG_ON(!(__mask) || \
  136. !is_valid_mask(__mask) || \
  137. (__mask) != (u8)(__mask)); \
  138. (struct rt2x00_field8) { \
  139. __ffs(__mask), (__mask) \
  140. }; \
  141. })
  142. #define FIELD16(__mask) \
  143. ({ \
  144. BUILD_BUG_ON(!(__mask) || \
  145. !is_valid_mask(__mask) || \
  146. (__mask) != (u16)(__mask));\
  147. (struct rt2x00_field16) { \
  148. __ffs(__mask), (__mask) \
  149. }; \
  150. })
  151. #define FIELD32(__mask) \
  152. ({ \
  153. BUILD_BUG_ON(!(__mask) || \
  154. !is_valid_mask(__mask) || \
  155. (__mask) != (u32)(__mask));\
  156. (struct rt2x00_field32) { \
  157. __ffs(__mask), (__mask) \
  158. }; \
  159. })
  160. static inline void rt2x00_set_field32(u32 *reg,
  161. const struct rt2x00_field32 field,
  162. const u32 value)
  163. {
  164. *reg &= ~(field.bit_mask);
  165. *reg |= (value << field.bit_offset) & field.bit_mask;
  166. }
  167. static inline u32 rt2x00_get_field32(const u32 reg,
  168. const struct rt2x00_field32 field)
  169. {
  170. return (reg & field.bit_mask) >> field.bit_offset;
  171. }
  172. static inline void rt2x00_set_field16(u16 *reg,
  173. const struct rt2x00_field16 field,
  174. const u16 value)
  175. {
  176. *reg &= ~(field.bit_mask);
  177. *reg |= (value << field.bit_offset) & field.bit_mask;
  178. }
  179. static inline u16 rt2x00_get_field16(const u16 reg,
  180. const struct rt2x00_field16 field)
  181. {
  182. return (reg & field.bit_mask) >> field.bit_offset;
  183. }
  184. static inline void rt2x00_set_field8(u8 *reg,
  185. const struct rt2x00_field8 field,
  186. const u8 value)
  187. {
  188. *reg &= ~(field.bit_mask);
  189. *reg |= (value << field.bit_offset) & field.bit_mask;
  190. }
  191. static inline u8 rt2x00_get_field8(const u8 reg,
  192. const struct rt2x00_field8 field)
  193. {
  194. return (reg & field.bit_mask) >> field.bit_offset;
  195. }
  196. #endif /* RT2X00REG_H */