rt2500usb.c 60 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2500usb
  19. Abstract: rt2500usb device specific routines.
  20. Supported chipsets: RT2570.
  21. */
  22. #include <linux/delay.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/init.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/usb.h>
  28. #include "rt2x00.h"
  29. #include "rt2x00usb.h"
  30. #include "rt2500usb.h"
  31. /*
  32. * Register access.
  33. * All access to the CSR registers will go through the methods
  34. * rt2500usb_register_read and rt2500usb_register_write.
  35. * BBP and RF register require indirect register access,
  36. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  37. * These indirect registers work with busy bits,
  38. * and we will try maximal REGISTER_BUSY_COUNT times to access
  39. * the register while taking a REGISTER_BUSY_DELAY us delay
  40. * between each attampt. When the busy bit is still set at that time,
  41. * the access attempt is considered to have failed,
  42. * and we will print an error.
  43. * If the usb_cache_mutex is already held then the _lock variants must
  44. * be used instead.
  45. */
  46. static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  47. const unsigned int offset,
  48. u16 *value)
  49. {
  50. __le16 reg;
  51. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  52. USB_VENDOR_REQUEST_IN, offset,
  53. &reg, sizeof(u16), REGISTER_TIMEOUT);
  54. *value = le16_to_cpu(reg);
  55. }
  56. static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  57. const unsigned int offset,
  58. u16 *value)
  59. {
  60. __le16 reg;
  61. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  62. USB_VENDOR_REQUEST_IN, offset,
  63. &reg, sizeof(u16), REGISTER_TIMEOUT);
  64. *value = le16_to_cpu(reg);
  65. }
  66. static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  67. const unsigned int offset,
  68. void *value, const u16 length)
  69. {
  70. int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
  71. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  72. USB_VENDOR_REQUEST_IN, offset,
  73. value, length, timeout);
  74. }
  75. static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  76. const unsigned int offset,
  77. u16 value)
  78. {
  79. __le16 reg = cpu_to_le16(value);
  80. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  81. USB_VENDOR_REQUEST_OUT, offset,
  82. &reg, sizeof(u16), REGISTER_TIMEOUT);
  83. }
  84. static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  85. const unsigned int offset,
  86. u16 value)
  87. {
  88. __le16 reg = cpu_to_le16(value);
  89. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  90. USB_VENDOR_REQUEST_OUT, offset,
  91. &reg, sizeof(u16), REGISTER_TIMEOUT);
  92. }
  93. static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
  94. const unsigned int offset,
  95. void *value, const u16 length)
  96. {
  97. int timeout = REGISTER_TIMEOUT * (length / sizeof(u16));
  98. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  99. USB_VENDOR_REQUEST_OUT, offset,
  100. value, length, timeout);
  101. }
  102. static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev)
  103. {
  104. u16 reg;
  105. unsigned int i;
  106. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  107. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR8, &reg);
  108. if (!rt2x00_get_field16(reg, PHY_CSR8_BUSY))
  109. break;
  110. udelay(REGISTER_BUSY_DELAY);
  111. }
  112. return reg;
  113. }
  114. static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
  115. const unsigned int word, const u8 value)
  116. {
  117. u16 reg;
  118. mutex_lock(&rt2x00dev->usb_cache_mutex);
  119. /*
  120. * Wait until the BBP becomes ready.
  121. */
  122. reg = rt2500usb_bbp_check(rt2x00dev);
  123. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  124. ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n");
  125. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  126. return;
  127. }
  128. /*
  129. * Write the data into the BBP.
  130. */
  131. reg = 0;
  132. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  133. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  134. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  135. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  136. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  137. }
  138. static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
  139. const unsigned int word, u8 *value)
  140. {
  141. u16 reg;
  142. mutex_lock(&rt2x00dev->usb_cache_mutex);
  143. /*
  144. * Wait until the BBP becomes ready.
  145. */
  146. reg = rt2500usb_bbp_check(rt2x00dev);
  147. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  148. ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
  149. return;
  150. }
  151. /*
  152. * Write the request into the BBP.
  153. */
  154. reg = 0;
  155. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  156. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  157. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  158. /*
  159. * Wait until the BBP becomes ready.
  160. */
  161. reg = rt2500usb_bbp_check(rt2x00dev);
  162. if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) {
  163. ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n");
  164. *value = 0xff;
  165. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  166. return;
  167. }
  168. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
  169. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  170. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  171. }
  172. static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
  173. const unsigned int word, const u32 value)
  174. {
  175. u16 reg;
  176. unsigned int i;
  177. if (!word)
  178. return;
  179. mutex_lock(&rt2x00dev->usb_cache_mutex);
  180. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  181. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR10, &reg);
  182. if (!rt2x00_get_field16(reg, PHY_CSR10_RF_BUSY))
  183. goto rf_write;
  184. udelay(REGISTER_BUSY_DELAY);
  185. }
  186. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  187. ERROR(rt2x00dev, "PHY_CSR10 register busy. Write failed.\n");
  188. return;
  189. rf_write:
  190. reg = 0;
  191. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  192. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
  193. reg = 0;
  194. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  195. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  196. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  197. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  198. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
  199. rt2x00_rf_write(rt2x00dev, word, value);
  200. mutex_unlock(&rt2x00dev->usb_cache_mutex);
  201. }
  202. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  203. #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) )
  204. static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev,
  205. const unsigned int word, u32 *data)
  206. {
  207. rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data);
  208. }
  209. static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev,
  210. const unsigned int word, u32 data)
  211. {
  212. rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
  213. }
  214. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  215. .owner = THIS_MODULE,
  216. .csr = {
  217. .read = rt2500usb_read_csr,
  218. .write = rt2500usb_write_csr,
  219. .word_size = sizeof(u16),
  220. .word_count = CSR_REG_SIZE / sizeof(u16),
  221. },
  222. .eeprom = {
  223. .read = rt2x00_eeprom_read,
  224. .write = rt2x00_eeprom_write,
  225. .word_size = sizeof(u16),
  226. .word_count = EEPROM_SIZE / sizeof(u16),
  227. },
  228. .bbp = {
  229. .read = rt2500usb_bbp_read,
  230. .write = rt2500usb_bbp_write,
  231. .word_size = sizeof(u8),
  232. .word_count = BBP_SIZE / sizeof(u8),
  233. },
  234. .rf = {
  235. .read = rt2x00_rf_read,
  236. .write = rt2500usb_rf_write,
  237. .word_size = sizeof(u32),
  238. .word_count = RF_SIZE / sizeof(u32),
  239. },
  240. };
  241. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  242. #ifdef CONFIG_RT2500USB_LEDS
  243. static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
  244. enum led_brightness brightness)
  245. {
  246. struct rt2x00_led *led =
  247. container_of(led_cdev, struct rt2x00_led, led_dev);
  248. unsigned int enabled = brightness != LED_OFF;
  249. u16 reg;
  250. rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
  251. if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
  252. rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
  253. else if (led->type == LED_TYPE_ACTIVITY)
  254. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
  255. rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
  256. }
  257. static int rt2500usb_blink_set(struct led_classdev *led_cdev,
  258. unsigned long *delay_on,
  259. unsigned long *delay_off)
  260. {
  261. struct rt2x00_led *led =
  262. container_of(led_cdev, struct rt2x00_led, led_dev);
  263. u16 reg;
  264. rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
  265. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
  266. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
  267. rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
  268. return 0;
  269. }
  270. #endif /* CONFIG_RT2500USB_LEDS */
  271. /*
  272. * Configuration handlers.
  273. */
  274. static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
  275. const unsigned int filter_flags)
  276. {
  277. u16 reg;
  278. /*
  279. * Start configuration steps.
  280. * Note that the version error will always be dropped
  281. * and broadcast frames will always be accepted since
  282. * there is no filter for it at this time.
  283. */
  284. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  285. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  286. !(filter_flags & FIF_FCSFAIL));
  287. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  288. !(filter_flags & FIF_PLCPFAIL));
  289. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  290. !(filter_flags & FIF_CONTROL));
  291. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
  292. !(filter_flags & FIF_PROMISC_IN_BSS));
  293. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  294. !(filter_flags & FIF_PROMISC_IN_BSS) &&
  295. !rt2x00dev->intf_ap_count);
  296. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  297. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  298. !(filter_flags & FIF_ALLMULTI));
  299. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  300. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  301. }
  302. static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
  303. struct rt2x00_intf *intf,
  304. struct rt2x00intf_conf *conf,
  305. const unsigned int flags)
  306. {
  307. unsigned int bcn_preload;
  308. u16 reg;
  309. if (flags & CONFIG_UPDATE_TYPE) {
  310. /*
  311. * Enable beacon config
  312. */
  313. bcn_preload = PREAMBLE + get_duration(IEEE80211_HEADER, 20);
  314. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  315. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
  316. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
  317. 2 * (conf->type != IEEE80211_IF_TYPE_STA));
  318. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  319. /*
  320. * Enable synchronisation.
  321. */
  322. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  323. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  324. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  325. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  326. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  327. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
  328. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  329. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  330. }
  331. if (flags & CONFIG_UPDATE_MAC)
  332. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
  333. (3 * sizeof(__le16)));
  334. if (flags & CONFIG_UPDATE_BSSID)
  335. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
  336. (3 * sizeof(__le16)));
  337. }
  338. static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
  339. struct rt2x00lib_erp *erp)
  340. {
  341. u16 reg;
  342. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  343. rt2x00_set_field16(&reg, TXRX_CSR1_ACK_TIMEOUT, erp->ack_timeout);
  344. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  345. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  346. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
  347. !!erp->short_preamble);
  348. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  349. }
  350. static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
  351. const int basic_rate_mask)
  352. {
  353. rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
  354. }
  355. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  356. struct rf_channel *rf, const int txpower)
  357. {
  358. /*
  359. * Set TXpower.
  360. */
  361. rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  362. /*
  363. * For RT2525E we should first set the channel to half band higher.
  364. */
  365. if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  366. static const u32 vals[] = {
  367. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  368. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  369. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  370. 0x00000902, 0x00000906
  371. };
  372. rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
  373. if (rf->rf4)
  374. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  375. }
  376. rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
  377. rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
  378. rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
  379. if (rf->rf4)
  380. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  381. }
  382. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  383. const int txpower)
  384. {
  385. u32 rf3;
  386. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  387. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  388. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  389. }
  390. static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
  391. struct antenna_setup *ant)
  392. {
  393. u8 r2;
  394. u8 r14;
  395. u16 csr5;
  396. u16 csr6;
  397. /*
  398. * We should never come here because rt2x00lib is supposed
  399. * to catch this and send us the correct antenna explicitely.
  400. */
  401. BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
  402. ant->tx == ANTENNA_SW_DIVERSITY);
  403. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  404. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  405. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  406. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  407. /*
  408. * Configure the TX antenna.
  409. */
  410. switch (ant->tx) {
  411. case ANTENNA_HW_DIVERSITY:
  412. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  413. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  414. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  415. break;
  416. case ANTENNA_A:
  417. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  418. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  419. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  420. break;
  421. case ANTENNA_B:
  422. default:
  423. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  424. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  425. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  426. break;
  427. }
  428. /*
  429. * Configure the RX antenna.
  430. */
  431. switch (ant->rx) {
  432. case ANTENNA_HW_DIVERSITY:
  433. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  434. break;
  435. case ANTENNA_A:
  436. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  437. break;
  438. case ANTENNA_B:
  439. default:
  440. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  441. break;
  442. }
  443. /*
  444. * RT2525E and RT5222 need to flip TX I/Q
  445. */
  446. if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
  447. rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  448. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  449. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  450. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  451. /*
  452. * RT2525E does not need RX I/Q Flip.
  453. */
  454. if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
  455. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  456. } else {
  457. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  458. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  459. }
  460. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  461. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  462. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  463. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  464. }
  465. static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
  466. struct rt2x00lib_conf *libconf)
  467. {
  468. u16 reg;
  469. rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
  470. rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
  471. rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
  472. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  473. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
  474. libconf->conf->beacon_int * 4);
  475. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  476. }
  477. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  478. struct rt2x00lib_conf *libconf,
  479. const unsigned int flags)
  480. {
  481. if (flags & CONFIG_UPDATE_PHYMODE)
  482. rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
  483. if (flags & CONFIG_UPDATE_CHANNEL)
  484. rt2500usb_config_channel(rt2x00dev, &libconf->rf,
  485. libconf->conf->power_level);
  486. if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
  487. rt2500usb_config_txpower(rt2x00dev,
  488. libconf->conf->power_level);
  489. if (flags & CONFIG_UPDATE_ANTENNA)
  490. rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
  491. if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
  492. rt2500usb_config_duration(rt2x00dev, libconf);
  493. }
  494. /*
  495. * Link tuning
  496. */
  497. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
  498. struct link_qual *qual)
  499. {
  500. u16 reg;
  501. /*
  502. * Update FCS error count from register.
  503. */
  504. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  505. qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  506. /*
  507. * Update False CCA count from register.
  508. */
  509. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  510. qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  511. }
  512. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
  513. {
  514. u16 eeprom;
  515. u16 value;
  516. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  517. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  518. rt2500usb_bbp_write(rt2x00dev, 24, value);
  519. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  520. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  521. rt2500usb_bbp_write(rt2x00dev, 25, value);
  522. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  523. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  524. rt2500usb_bbp_write(rt2x00dev, 61, value);
  525. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  526. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  527. rt2500usb_bbp_write(rt2x00dev, 17, value);
  528. rt2x00dev->link.vgc_level = value;
  529. }
  530. static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
  531. {
  532. int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
  533. u16 bbp_thresh;
  534. u16 vgc_bound;
  535. u16 sens;
  536. u16 r24;
  537. u16 r25;
  538. u16 r61;
  539. u16 r17_sens;
  540. u8 r17;
  541. u8 up_bound;
  542. u8 low_bound;
  543. /*
  544. * Read current r17 value, as well as the sensitivity values
  545. * for the r17 register.
  546. */
  547. rt2500usb_bbp_read(rt2x00dev, 17, &r17);
  548. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
  549. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
  550. up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
  551. low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
  552. /*
  553. * If we are not associated, we should go straight to the
  554. * dynamic CCA tuning.
  555. */
  556. if (!rt2x00dev->intf_associated)
  557. goto dynamic_cca_tune;
  558. /*
  559. * Determine the BBP tuning threshold and correctly
  560. * set BBP 24, 25 and 61.
  561. */
  562. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
  563. bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
  564. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
  565. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
  566. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
  567. if ((rssi + bbp_thresh) > 0) {
  568. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
  569. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
  570. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
  571. } else {
  572. r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
  573. r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
  574. r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
  575. }
  576. rt2500usb_bbp_write(rt2x00dev, 24, r24);
  577. rt2500usb_bbp_write(rt2x00dev, 25, r25);
  578. rt2500usb_bbp_write(rt2x00dev, 61, r61);
  579. /*
  580. * A too low RSSI will cause too much false CCA which will
  581. * then corrupt the R17 tuning. To remidy this the tuning should
  582. * be stopped (While making sure the R17 value will not exceed limits)
  583. */
  584. if (rssi >= -40) {
  585. if (r17 != 0x60)
  586. rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
  587. return;
  588. }
  589. /*
  590. * Special big-R17 for short distance
  591. */
  592. if (rssi >= -58) {
  593. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
  594. if (r17 != sens)
  595. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  596. return;
  597. }
  598. /*
  599. * Special mid-R17 for middle distance
  600. */
  601. if (rssi >= -74) {
  602. sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
  603. if (r17 != sens)
  604. rt2500usb_bbp_write(rt2x00dev, 17, sens);
  605. return;
  606. }
  607. /*
  608. * Leave short or middle distance condition, restore r17
  609. * to the dynamic tuning range.
  610. */
  611. low_bound = 0x32;
  612. if (rssi < -77)
  613. up_bound -= (-77 - rssi);
  614. if (up_bound < low_bound)
  615. up_bound = low_bound;
  616. if (r17 > up_bound) {
  617. rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
  618. rt2x00dev->link.vgc_level = up_bound;
  619. return;
  620. }
  621. dynamic_cca_tune:
  622. /*
  623. * R17 is inside the dynamic tuning range,
  624. * start tuning the link based on the false cca counter.
  625. */
  626. if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
  627. rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
  628. rt2x00dev->link.vgc_level = r17;
  629. } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
  630. rt2500usb_bbp_write(rt2x00dev, 17, --r17);
  631. rt2x00dev->link.vgc_level = r17;
  632. }
  633. }
  634. /*
  635. * Initialization functions.
  636. */
  637. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  638. {
  639. u16 reg;
  640. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  641. USB_MODE_TEST, REGISTER_TIMEOUT);
  642. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  643. 0x00f0, REGISTER_TIMEOUT);
  644. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  645. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  646. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  647. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  648. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  649. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  650. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  651. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  652. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  653. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  654. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  655. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  656. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  657. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  658. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  659. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  660. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  661. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  662. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  663. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  664. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  665. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  666. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  667. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  668. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  669. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  670. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  671. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  672. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  673. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  674. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  675. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  676. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  677. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  678. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  679. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  680. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  681. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  682. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  683. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  684. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  685. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  686. return -EBUSY;
  687. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  688. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  689. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  690. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  691. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  692. if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) {
  693. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  694. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
  695. } else {
  696. reg = 0;
  697. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
  698. rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
  699. }
  700. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  701. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  702. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  703. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  704. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  705. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  706. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  707. rt2x00dev->rx->data_size);
  708. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  709. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  710. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  711. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0xff);
  712. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  713. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  714. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  715. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  716. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  717. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  718. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  719. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  720. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  721. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  722. return 0;
  723. }
  724. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  725. {
  726. unsigned int i;
  727. u16 eeprom;
  728. u8 value;
  729. u8 reg_id;
  730. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  731. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  732. if ((value != 0xff) && (value != 0x00))
  733. goto continue_csr_init;
  734. NOTICE(rt2x00dev, "Waiting for BBP register.\n");
  735. udelay(REGISTER_BUSY_DELAY);
  736. }
  737. ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
  738. return -EACCES;
  739. continue_csr_init:
  740. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  741. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  742. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  743. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  744. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  745. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  746. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  747. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  748. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  749. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  750. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  751. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  752. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  753. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  754. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  755. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  756. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  757. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  758. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  759. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  760. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  761. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  762. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  763. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  764. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  765. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  766. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  767. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  768. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  769. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  770. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  771. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  772. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  773. if (eeprom != 0xffff && eeprom != 0x0000) {
  774. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  775. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  776. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  777. }
  778. }
  779. return 0;
  780. }
  781. /*
  782. * Device state switch handlers.
  783. */
  784. static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
  785. enum dev_state state)
  786. {
  787. u16 reg;
  788. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  789. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX,
  790. state == STATE_RADIO_RX_OFF);
  791. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  792. }
  793. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  794. {
  795. /*
  796. * Initialize all registers.
  797. */
  798. if (rt2500usb_init_registers(rt2x00dev) ||
  799. rt2500usb_init_bbp(rt2x00dev)) {
  800. ERROR(rt2x00dev, "Register initialization failed.\n");
  801. return -EIO;
  802. }
  803. return 0;
  804. }
  805. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  806. {
  807. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  808. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  809. /*
  810. * Disable synchronisation.
  811. */
  812. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  813. rt2x00usb_disable_radio(rt2x00dev);
  814. }
  815. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  816. enum dev_state state)
  817. {
  818. u16 reg;
  819. u16 reg2;
  820. unsigned int i;
  821. char put_to_sleep;
  822. char bbp_state;
  823. char rf_state;
  824. put_to_sleep = (state != STATE_AWAKE);
  825. reg = 0;
  826. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  827. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  828. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  829. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  830. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  831. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  832. /*
  833. * Device is not guaranteed to be in the requested state yet.
  834. * We must wait until the register indicates that the
  835. * device has entered the correct state.
  836. */
  837. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  838. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  839. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  840. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  841. if (bbp_state == state && rf_state == state)
  842. return 0;
  843. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  844. msleep(30);
  845. }
  846. NOTICE(rt2x00dev, "Device failed to enter state %d, "
  847. "current device state: bbp %d and rf %d.\n",
  848. state, bbp_state, rf_state);
  849. return -EBUSY;
  850. }
  851. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  852. enum dev_state state)
  853. {
  854. int retval = 0;
  855. switch (state) {
  856. case STATE_RADIO_ON:
  857. retval = rt2500usb_enable_radio(rt2x00dev);
  858. break;
  859. case STATE_RADIO_OFF:
  860. rt2500usb_disable_radio(rt2x00dev);
  861. break;
  862. case STATE_RADIO_RX_ON:
  863. case STATE_RADIO_RX_ON_LINK:
  864. rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
  865. break;
  866. case STATE_RADIO_RX_OFF:
  867. case STATE_RADIO_RX_OFF_LINK:
  868. rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF);
  869. break;
  870. case STATE_DEEP_SLEEP:
  871. case STATE_SLEEP:
  872. case STATE_STANDBY:
  873. case STATE_AWAKE:
  874. retval = rt2500usb_set_state(rt2x00dev, state);
  875. break;
  876. default:
  877. retval = -ENOTSUPP;
  878. break;
  879. }
  880. return retval;
  881. }
  882. /*
  883. * TX descriptor initialization
  884. */
  885. static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
  886. struct sk_buff *skb,
  887. struct txentry_desc *txdesc,
  888. struct ieee80211_tx_control *control)
  889. {
  890. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  891. __le32 *txd = skbdesc->desc;
  892. u32 word;
  893. /*
  894. * Start writing the descriptor words.
  895. */
  896. rt2x00_desc_read(txd, 1, &word);
  897. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
  898. rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs);
  899. rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
  900. rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
  901. rt2x00_desc_write(txd, 1, word);
  902. rt2x00_desc_read(txd, 2, &word);
  903. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
  904. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
  905. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
  906. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
  907. rt2x00_desc_write(txd, 2, word);
  908. rt2x00_desc_read(txd, 0, &word);
  909. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit);
  910. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  911. test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
  912. rt2x00_set_field32(&word, TXD_W0_ACK,
  913. test_bit(ENTRY_TXD_ACK, &txdesc->flags));
  914. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  915. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
  916. rt2x00_set_field32(&word, TXD_W0_OFDM,
  917. test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
  918. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  919. !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT));
  920. rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
  921. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len);
  922. rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE);
  923. rt2x00_desc_write(txd, 0, word);
  924. }
  925. static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
  926. struct sk_buff *skb)
  927. {
  928. int length;
  929. /*
  930. * The length _must_ be a multiple of 2,
  931. * but it must _not_ be a multiple of the USB packet size.
  932. */
  933. length = roundup(skb->len, 2);
  934. length += (2 * !(length % rt2x00dev->usb_maxpacket));
  935. return length;
  936. }
  937. /*
  938. * TX data initialization
  939. */
  940. static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
  941. const unsigned int queue)
  942. {
  943. u16 reg;
  944. if (queue != RT2X00_BCN_QUEUE_BEACON)
  945. return;
  946. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  947. if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) {
  948. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  949. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  950. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  951. /*
  952. * Beacon generation will fail initially.
  953. * To prevent this we need to register the TXRX_CSR19
  954. * register several times.
  955. */
  956. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  957. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  958. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  959. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  960. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  961. }
  962. }
  963. /*
  964. * RX control handlers
  965. */
  966. static void rt2500usb_fill_rxdone(struct queue_entry *entry,
  967. struct rxdone_entry_desc *rxdesc)
  968. {
  969. struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data;
  970. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  971. __le32 *rxd =
  972. (__le32 *)(entry->skb->data +
  973. (priv_rx->urb->actual_length - entry->queue->desc_size));
  974. unsigned int offset = entry->queue->desc_size + 2;
  975. u32 word0;
  976. u32 word1;
  977. /*
  978. * Copy descriptor to the available headroom inside the skbuffer.
  979. */
  980. skb_push(entry->skb, offset);
  981. memcpy(entry->skb->data, rxd, entry->queue->desc_size);
  982. rxd = (__le32 *)entry->skb->data;
  983. /*
  984. * The descriptor is now aligned to 4 bytes and thus it is
  985. * now safe to read it on all architectures.
  986. */
  987. rt2x00_desc_read(rxd, 0, &word0);
  988. rt2x00_desc_read(rxd, 1, &word1);
  989. rxdesc->flags = 0;
  990. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  991. rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
  992. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  993. rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  994. /*
  995. * Obtain the status about this packet.
  996. * When frame was received with an OFDM bitrate,
  997. * the signal is the PLCP value. If it was received with
  998. * a CCK bitrate the signal is the rate in 100kbit/s.
  999. */
  1000. rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  1001. rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) -
  1002. entry->queue->rt2x00dev->rssi_offset;
  1003. rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  1004. rxdesc->dev_flags = 0;
  1005. if (rt2x00_get_field32(word0, RXD_W0_OFDM))
  1006. rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
  1007. if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
  1008. rxdesc->dev_flags |= RXDONE_MY_BSS;
  1009. /*
  1010. * Adjust the skb memory window to the frame boundaries.
  1011. */
  1012. skb_pull(entry->skb, offset);
  1013. skb_trim(entry->skb, rxdesc->size);
  1014. /*
  1015. * Set descriptor and data pointer.
  1016. */
  1017. skbdesc->data = entry->skb->data;
  1018. skbdesc->data_len = rxdesc->size;
  1019. skbdesc->desc = rxd;
  1020. skbdesc->desc_len = entry->queue->desc_size;
  1021. }
  1022. /*
  1023. * Interrupt functions.
  1024. */
  1025. static void rt2500usb_beacondone(struct urb *urb)
  1026. {
  1027. struct queue_entry *entry = (struct queue_entry *)urb->context;
  1028. struct queue_entry_priv_usb_bcn *priv_bcn = entry->priv_data;
  1029. if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
  1030. return;
  1031. /*
  1032. * Check if this was the guardian beacon,
  1033. * if that was the case we need to send the real beacon now.
  1034. * Otherwise we should free the sk_buffer, the device
  1035. * should be doing the rest of the work now.
  1036. */
  1037. if (priv_bcn->guardian_urb == urb) {
  1038. usb_submit_urb(priv_bcn->urb, GFP_ATOMIC);
  1039. } else if (priv_bcn->urb == urb) {
  1040. dev_kfree_skb(entry->skb);
  1041. entry->skb = NULL;
  1042. }
  1043. }
  1044. /*
  1045. * Device probe functions.
  1046. */
  1047. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  1048. {
  1049. u16 word;
  1050. u8 *mac;
  1051. u8 bbp;
  1052. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1053. /*
  1054. * Start validation of the data that has been read.
  1055. */
  1056. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1057. if (!is_valid_ether_addr(mac)) {
  1058. DECLARE_MAC_BUF(macbuf);
  1059. random_ether_addr(mac);
  1060. EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
  1061. }
  1062. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1063. if (word == 0xffff) {
  1064. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1065. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
  1066. ANTENNA_SW_DIVERSITY);
  1067. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
  1068. ANTENNA_SW_DIVERSITY);
  1069. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
  1070. LED_MODE_DEFAULT);
  1071. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1072. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1073. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1074. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1075. EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
  1076. }
  1077. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1078. if (word == 0xffff) {
  1079. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1080. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1081. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1082. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1083. EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
  1084. }
  1085. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1086. if (word == 0xffff) {
  1087. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1088. DEFAULT_RSSI_OFFSET);
  1089. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1090. EEPROM(rt2x00dev, "Calibrate offset: 0x%04x\n", word);
  1091. }
  1092. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1093. if (word == 0xffff) {
  1094. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1095. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1096. EEPROM(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1097. }
  1098. /*
  1099. * Switch lower vgc bound to current BBP R17 value,
  1100. * lower the value a bit for better quality.
  1101. */
  1102. rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
  1103. bbp -= 6;
  1104. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1105. if (word == 0xffff) {
  1106. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1107. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1108. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1109. EEPROM(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1110. }
  1111. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1112. if (word == 0xffff) {
  1113. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1114. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1115. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1116. EEPROM(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1117. } else {
  1118. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1119. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1120. }
  1121. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1122. if (word == 0xffff) {
  1123. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1124. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1125. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1126. EEPROM(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1127. }
  1128. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1129. if (word == 0xffff) {
  1130. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1131. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1132. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1133. EEPROM(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1134. }
  1135. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1136. if (word == 0xffff) {
  1137. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1138. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1139. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1140. EEPROM(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1141. }
  1142. return 0;
  1143. }
  1144. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1145. {
  1146. u16 reg;
  1147. u16 value;
  1148. u16 eeprom;
  1149. /*
  1150. * Read EEPROM word for configuration.
  1151. */
  1152. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1153. /*
  1154. * Identify RF chipset.
  1155. */
  1156. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1157. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1158. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1159. if (!rt2x00_check_rev(&rt2x00dev->chip, 0)) {
  1160. ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
  1161. return -ENODEV;
  1162. }
  1163. if (!rt2x00_rf(&rt2x00dev->chip, RF2522) &&
  1164. !rt2x00_rf(&rt2x00dev->chip, RF2523) &&
  1165. !rt2x00_rf(&rt2x00dev->chip, RF2524) &&
  1166. !rt2x00_rf(&rt2x00dev->chip, RF2525) &&
  1167. !rt2x00_rf(&rt2x00dev->chip, RF2525E) &&
  1168. !rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1169. ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
  1170. return -ENODEV;
  1171. }
  1172. /*
  1173. * Identify default antenna configuration.
  1174. */
  1175. rt2x00dev->default_ant.tx =
  1176. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1177. rt2x00dev->default_ant.rx =
  1178. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1179. /*
  1180. * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
  1181. * I am not 100% sure about this, but the legacy drivers do not
  1182. * indicate antenna swapping in software is required when
  1183. * diversity is enabled.
  1184. */
  1185. if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
  1186. rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
  1187. if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
  1188. rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
  1189. /*
  1190. * Store led mode, for correct led behaviour.
  1191. */
  1192. #ifdef CONFIG_RT2500USB_LEDS
  1193. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1194. rt2x00dev->led_radio.rt2x00dev = rt2x00dev;
  1195. rt2x00dev->led_radio.type = LED_TYPE_RADIO;
  1196. rt2x00dev->led_radio.led_dev.brightness_set =
  1197. rt2500usb_brightness_set;
  1198. rt2x00dev->led_radio.led_dev.blink_set =
  1199. rt2500usb_blink_set;
  1200. rt2x00dev->led_radio.flags = LED_INITIALIZED;
  1201. if (value == LED_MODE_TXRX_ACTIVITY) {
  1202. rt2x00dev->led_qual.rt2x00dev = rt2x00dev;
  1203. rt2x00dev->led_radio.type = LED_TYPE_ACTIVITY;
  1204. rt2x00dev->led_qual.led_dev.brightness_set =
  1205. rt2500usb_brightness_set;
  1206. rt2x00dev->led_qual.led_dev.blink_set =
  1207. rt2500usb_blink_set;
  1208. rt2x00dev->led_qual.flags = LED_INITIALIZED;
  1209. }
  1210. #endif /* CONFIG_RT2500USB_LEDS */
  1211. /*
  1212. * Check if the BBP tuning should be disabled.
  1213. */
  1214. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
  1215. if (rt2x00_get_field16(eeprom, EEPROM_NIC_DYN_BBP_TUNE))
  1216. __set_bit(CONFIG_DISABLE_LINK_TUNING, &rt2x00dev->flags);
  1217. /*
  1218. * Read the RSSI <-> dBm offset information.
  1219. */
  1220. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1221. rt2x00dev->rssi_offset =
  1222. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1223. return 0;
  1224. }
  1225. /*
  1226. * RF value list for RF2522
  1227. * Supports: 2.4 GHz
  1228. */
  1229. static const struct rf_channel rf_vals_bg_2522[] = {
  1230. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1231. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1232. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1233. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1234. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1235. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1236. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1237. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1238. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1239. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1240. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1241. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1242. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1243. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1244. };
  1245. /*
  1246. * RF value list for RF2523
  1247. * Supports: 2.4 GHz
  1248. */
  1249. static const struct rf_channel rf_vals_bg_2523[] = {
  1250. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1251. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1252. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1253. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1254. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1255. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1256. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1257. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1258. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1259. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1260. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1261. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1262. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1263. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1264. };
  1265. /*
  1266. * RF value list for RF2524
  1267. * Supports: 2.4 GHz
  1268. */
  1269. static const struct rf_channel rf_vals_bg_2524[] = {
  1270. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1271. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1272. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1273. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1274. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1275. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1276. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1277. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1278. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1279. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1280. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1281. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1282. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1283. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1284. };
  1285. /*
  1286. * RF value list for RF2525
  1287. * Supports: 2.4 GHz
  1288. */
  1289. static const struct rf_channel rf_vals_bg_2525[] = {
  1290. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1291. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1292. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1293. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1294. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1295. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1296. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1297. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1298. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1299. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1300. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1301. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1302. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1303. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1304. };
  1305. /*
  1306. * RF value list for RF2525e
  1307. * Supports: 2.4 GHz
  1308. */
  1309. static const struct rf_channel rf_vals_bg_2525e[] = {
  1310. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1311. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1312. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1313. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1314. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1315. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1316. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1317. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1318. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1319. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1320. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1321. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1322. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1323. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1324. };
  1325. /*
  1326. * RF value list for RF5222
  1327. * Supports: 2.4 GHz & 5.2 GHz
  1328. */
  1329. static const struct rf_channel rf_vals_5222[] = {
  1330. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1331. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1332. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1333. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1334. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1335. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1336. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1337. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1338. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1339. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1340. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1341. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1342. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1343. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1344. /* 802.11 UNI / HyperLan 2 */
  1345. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1346. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1347. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1348. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1349. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1350. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1351. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1352. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1353. /* 802.11 HyperLan 2 */
  1354. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1355. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1356. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1357. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1358. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1359. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1360. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1361. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1362. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1363. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1364. /* 802.11 UNII */
  1365. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1366. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1367. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1368. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1369. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1370. };
  1371. static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1372. {
  1373. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1374. u8 *txpower;
  1375. unsigned int i;
  1376. /*
  1377. * Initialize all hw fields.
  1378. */
  1379. rt2x00dev->hw->flags =
  1380. IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
  1381. IEEE80211_HW_RX_INCLUDES_FCS |
  1382. IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
  1383. rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
  1384. rt2x00dev->hw->max_signal = MAX_SIGNAL;
  1385. rt2x00dev->hw->max_rssi = MAX_RX_SSI;
  1386. rt2x00dev->hw->queues = 2;
  1387. SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
  1388. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1389. rt2x00_eeprom_addr(rt2x00dev,
  1390. EEPROM_MAC_ADDR_0));
  1391. /*
  1392. * Convert tx_power array in eeprom.
  1393. */
  1394. txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1395. for (i = 0; i < 14; i++)
  1396. txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
  1397. /*
  1398. * Initialize hw_mode information.
  1399. */
  1400. spec->supported_bands = SUPPORT_BAND_2GHZ;
  1401. spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
  1402. spec->tx_power_a = NULL;
  1403. spec->tx_power_bg = txpower;
  1404. spec->tx_power_default = DEFAULT_TXPOWER;
  1405. if (rt2x00_rf(&rt2x00dev->chip, RF2522)) {
  1406. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1407. spec->channels = rf_vals_bg_2522;
  1408. } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) {
  1409. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1410. spec->channels = rf_vals_bg_2523;
  1411. } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) {
  1412. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1413. spec->channels = rf_vals_bg_2524;
  1414. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) {
  1415. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1416. spec->channels = rf_vals_bg_2525;
  1417. } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
  1418. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1419. spec->channels = rf_vals_bg_2525e;
  1420. } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) {
  1421. spec->supported_bands |= SUPPORT_BAND_5GHZ;
  1422. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1423. spec->channels = rf_vals_5222;
  1424. }
  1425. }
  1426. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1427. {
  1428. int retval;
  1429. /*
  1430. * Allocate eeprom data.
  1431. */
  1432. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1433. if (retval)
  1434. return retval;
  1435. retval = rt2500usb_init_eeprom(rt2x00dev);
  1436. if (retval)
  1437. return retval;
  1438. /*
  1439. * Initialize hw specifications.
  1440. */
  1441. rt2500usb_probe_hw_mode(rt2x00dev);
  1442. /*
  1443. * This device requires the atim queue
  1444. */
  1445. __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  1446. __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags);
  1447. __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
  1448. /*
  1449. * Set the rssi offset.
  1450. */
  1451. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1452. return 0;
  1453. }
  1454. /*
  1455. * IEEE80211 stack callback functions.
  1456. */
  1457. static int rt2500usb_beacon_update(struct ieee80211_hw *hw,
  1458. struct sk_buff *skb,
  1459. struct ieee80211_tx_control *control)
  1460. {
  1461. struct rt2x00_dev *rt2x00dev = hw->priv;
  1462. struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev);
  1463. struct rt2x00_intf *intf = vif_to_intf(control->vif);
  1464. struct queue_entry_priv_usb_bcn *priv_bcn;
  1465. struct skb_frame_desc *skbdesc;
  1466. int pipe = usb_sndbulkpipe(usb_dev, 1);
  1467. int length;
  1468. u16 reg;
  1469. if (unlikely(!intf->beacon))
  1470. return -ENOBUFS;
  1471. priv_bcn = intf->beacon->priv_data;
  1472. /*
  1473. * Add the descriptor in front of the skb.
  1474. */
  1475. skb_push(skb, intf->beacon->queue->desc_size);
  1476. memset(skb->data, 0, intf->beacon->queue->desc_size);
  1477. /*
  1478. * Fill in skb descriptor
  1479. */
  1480. skbdesc = get_skb_frame_desc(skb);
  1481. memset(skbdesc, 0, sizeof(*skbdesc));
  1482. skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED;
  1483. skbdesc->data = skb->data + intf->beacon->queue->desc_size;
  1484. skbdesc->data_len = skb->len - intf->beacon->queue->desc_size;
  1485. skbdesc->desc = skb->data;
  1486. skbdesc->desc_len = intf->beacon->queue->desc_size;
  1487. skbdesc->entry = intf->beacon;
  1488. /*
  1489. * Disable beaconing while we are reloading the beacon data,
  1490. * otherwise we might be sending out invalid data.
  1491. */
  1492. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  1493. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  1494. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  1495. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  1496. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1497. /*
  1498. * mac80211 doesn't provide the control->queue variable
  1499. * for beacons. Set our own queue identification so
  1500. * it can be used during descriptor initialization.
  1501. */
  1502. control->queue = RT2X00_BCN_QUEUE_BEACON;
  1503. rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
  1504. /*
  1505. * USB devices cannot blindly pass the skb->len as the
  1506. * length of the data to usb_fill_bulk_urb. Pass the skb
  1507. * to the driver to determine what the length should be.
  1508. */
  1509. length = rt2500usb_get_tx_data_len(rt2x00dev, skb);
  1510. usb_fill_bulk_urb(priv_bcn->urb, usb_dev, pipe,
  1511. skb->data, length, rt2500usb_beacondone,
  1512. intf->beacon);
  1513. /*
  1514. * Second we need to create the guardian byte.
  1515. * We only need a single byte, so lets recycle
  1516. * the 'flags' field we are not using for beacons.
  1517. */
  1518. priv_bcn->guardian_data = 0;
  1519. usb_fill_bulk_urb(priv_bcn->guardian_urb, usb_dev, pipe,
  1520. &priv_bcn->guardian_data, 1, rt2500usb_beacondone,
  1521. intf->beacon);
  1522. /*
  1523. * Send out the guardian byte.
  1524. */
  1525. usb_submit_urb(priv_bcn->guardian_urb, GFP_ATOMIC);
  1526. /*
  1527. * Enable beacon generation.
  1528. */
  1529. rt2500usb_kick_tx_queue(rt2x00dev, control->queue);
  1530. return 0;
  1531. }
  1532. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1533. .tx = rt2x00mac_tx,
  1534. .start = rt2x00mac_start,
  1535. .stop = rt2x00mac_stop,
  1536. .add_interface = rt2x00mac_add_interface,
  1537. .remove_interface = rt2x00mac_remove_interface,
  1538. .config = rt2x00mac_config,
  1539. .config_interface = rt2x00mac_config_interface,
  1540. .configure_filter = rt2x00mac_configure_filter,
  1541. .get_stats = rt2x00mac_get_stats,
  1542. .bss_info_changed = rt2x00mac_bss_info_changed,
  1543. .conf_tx = rt2x00mac_conf_tx,
  1544. .get_tx_stats = rt2x00mac_get_tx_stats,
  1545. .beacon_update = rt2500usb_beacon_update,
  1546. };
  1547. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1548. .probe_hw = rt2500usb_probe_hw,
  1549. .initialize = rt2x00usb_initialize,
  1550. .uninitialize = rt2x00usb_uninitialize,
  1551. .init_rxentry = rt2x00usb_init_rxentry,
  1552. .init_txentry = rt2x00usb_init_txentry,
  1553. .set_device_state = rt2500usb_set_device_state,
  1554. .link_stats = rt2500usb_link_stats,
  1555. .reset_tuner = rt2500usb_reset_tuner,
  1556. .link_tuner = rt2500usb_link_tuner,
  1557. .write_tx_desc = rt2500usb_write_tx_desc,
  1558. .write_tx_data = rt2x00usb_write_tx_data,
  1559. .get_tx_data_len = rt2500usb_get_tx_data_len,
  1560. .kick_tx_queue = rt2500usb_kick_tx_queue,
  1561. .fill_rxdone = rt2500usb_fill_rxdone,
  1562. .config_filter = rt2500usb_config_filter,
  1563. .config_intf = rt2500usb_config_intf,
  1564. .config_erp = rt2500usb_config_erp,
  1565. .config = rt2500usb_config,
  1566. };
  1567. static const struct data_queue_desc rt2500usb_queue_rx = {
  1568. .entry_num = RX_ENTRIES,
  1569. .data_size = DATA_FRAME_SIZE,
  1570. .desc_size = RXD_DESC_SIZE,
  1571. .priv_size = sizeof(struct queue_entry_priv_usb_rx),
  1572. };
  1573. static const struct data_queue_desc rt2500usb_queue_tx = {
  1574. .entry_num = TX_ENTRIES,
  1575. .data_size = DATA_FRAME_SIZE,
  1576. .desc_size = TXD_DESC_SIZE,
  1577. .priv_size = sizeof(struct queue_entry_priv_usb_tx),
  1578. };
  1579. static const struct data_queue_desc rt2500usb_queue_bcn = {
  1580. .entry_num = BEACON_ENTRIES,
  1581. .data_size = MGMT_FRAME_SIZE,
  1582. .desc_size = TXD_DESC_SIZE,
  1583. .priv_size = sizeof(struct queue_entry_priv_usb_bcn),
  1584. };
  1585. static const struct data_queue_desc rt2500usb_queue_atim = {
  1586. .entry_num = ATIM_ENTRIES,
  1587. .data_size = DATA_FRAME_SIZE,
  1588. .desc_size = TXD_DESC_SIZE,
  1589. .priv_size = sizeof(struct queue_entry_priv_usb_tx),
  1590. };
  1591. static const struct rt2x00_ops rt2500usb_ops = {
  1592. .name = KBUILD_MODNAME,
  1593. .max_sta_intf = 1,
  1594. .max_ap_intf = 1,
  1595. .eeprom_size = EEPROM_SIZE,
  1596. .rf_size = RF_SIZE,
  1597. .rx = &rt2500usb_queue_rx,
  1598. .tx = &rt2500usb_queue_tx,
  1599. .bcn = &rt2500usb_queue_bcn,
  1600. .atim = &rt2500usb_queue_atim,
  1601. .lib = &rt2500usb_rt2x00_ops,
  1602. .hw = &rt2500usb_mac80211_ops,
  1603. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1604. .debugfs = &rt2500usb_rt2x00debug,
  1605. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1606. };
  1607. /*
  1608. * rt2500usb module information.
  1609. */
  1610. static struct usb_device_id rt2500usb_device_table[] = {
  1611. /* ASUS */
  1612. { USB_DEVICE(0x0b05, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1613. { USB_DEVICE(0x0b05, 0x1707), USB_DEVICE_DATA(&rt2500usb_ops) },
  1614. /* Belkin */
  1615. { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt2500usb_ops) },
  1616. { USB_DEVICE(0x050d, 0x7051), USB_DEVICE_DATA(&rt2500usb_ops) },
  1617. { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1618. /* Cisco Systems */
  1619. { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
  1620. { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
  1621. { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
  1622. /* Conceptronic */
  1623. { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
  1624. /* D-LINK */
  1625. { USB_DEVICE(0x2001, 0x3c00), USB_DEVICE_DATA(&rt2500usb_ops) },
  1626. /* Gigabyte */
  1627. { USB_DEVICE(0x1044, 0x8001), USB_DEVICE_DATA(&rt2500usb_ops) },
  1628. { USB_DEVICE(0x1044, 0x8007), USB_DEVICE_DATA(&rt2500usb_ops) },
  1629. /* Hercules */
  1630. { USB_DEVICE(0x06f8, 0xe000), USB_DEVICE_DATA(&rt2500usb_ops) },
  1631. /* Melco */
  1632. { USB_DEVICE(0x0411, 0x005e), USB_DEVICE_DATA(&rt2500usb_ops) },
  1633. { USB_DEVICE(0x0411, 0x0066), USB_DEVICE_DATA(&rt2500usb_ops) },
  1634. { USB_DEVICE(0x0411, 0x0067), USB_DEVICE_DATA(&rt2500usb_ops) },
  1635. { USB_DEVICE(0x0411, 0x008b), USB_DEVICE_DATA(&rt2500usb_ops) },
  1636. { USB_DEVICE(0x0411, 0x0097), USB_DEVICE_DATA(&rt2500usb_ops) },
  1637. /* MSI */
  1638. { USB_DEVICE(0x0db0, 0x6861), USB_DEVICE_DATA(&rt2500usb_ops) },
  1639. { USB_DEVICE(0x0db0, 0x6865), USB_DEVICE_DATA(&rt2500usb_ops) },
  1640. { USB_DEVICE(0x0db0, 0x6869), USB_DEVICE_DATA(&rt2500usb_ops) },
  1641. /* Ralink */
  1642. { USB_DEVICE(0x148f, 0x1706), USB_DEVICE_DATA(&rt2500usb_ops) },
  1643. { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
  1644. { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
  1645. { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1646. /* Siemens */
  1647. { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
  1648. /* SMC */
  1649. { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
  1650. /* Spairon */
  1651. { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
  1652. /* Trust */
  1653. { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
  1654. /* Zinwell */
  1655. { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
  1656. { 0, }
  1657. };
  1658. MODULE_AUTHOR(DRV_PROJECT);
  1659. MODULE_VERSION(DRV_VERSION);
  1660. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1661. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1662. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1663. MODULE_LICENSE("GPL");
  1664. static struct usb_driver rt2500usb_driver = {
  1665. .name = KBUILD_MODNAME,
  1666. .id_table = rt2500usb_device_table,
  1667. .probe = rt2x00usb_probe,
  1668. .disconnect = rt2x00usb_disconnect,
  1669. .suspend = rt2x00usb_suspend,
  1670. .resume = rt2x00usb_resume,
  1671. };
  1672. static int __init rt2500usb_init(void)
  1673. {
  1674. return usb_register(&rt2500usb_driver);
  1675. }
  1676. static void __exit rt2500usb_exit(void)
  1677. {
  1678. usb_deregister(&rt2500usb_driver);
  1679. }
  1680. module_init(rt2500usb_init);
  1681. module_exit(rt2500usb_exit);