mcbsp.h 3.1 KB

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  1. /*
  2. * arch/arm/plat-omap/include/mach/mcbsp.h
  3. *
  4. * Defines for Multi-Channel Buffered Serial Port
  5. *
  6. * Copyright (C) 2002 RidgeRun, Inc.
  7. * Author: Steve Johnson
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #ifndef __ASM_ARCH_OMAP_MCBSP_H
  25. #define __ASM_ARCH_OMAP_MCBSP_H
  26. #include <linux/spinlock.h>
  27. #include <linux/clk.h>
  28. /* macro for building platform_device for McBSP ports */
  29. #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \
  30. static struct platform_device omap_mcbsp##port_nr = { \
  31. .name = "omap-mcbsp-dai", \
  32. .id = port_nr - 1, \
  33. }
  34. #define MCBSP_CONFIG_TYPE2 0x2
  35. #define MCBSP_CONFIG_TYPE3 0x3
  36. #define MCBSP_CONFIG_TYPE4 0x4
  37. /* CLKR signal muxing options */
  38. #define CLKR_SRC_CLKR 0
  39. #define CLKR_SRC_CLKX 1
  40. /* FSR signal muxing options */
  41. #define FSR_SRC_FSR 0
  42. #define FSR_SRC_FSX 1
  43. /* McBSP functional clock sources */
  44. #define MCBSP_CLKS_PRCM_SRC 0
  45. #define MCBSP_CLKS_PAD_SRC 1
  46. /* Platform specific configuration */
  47. struct omap_mcbsp_ops {
  48. void (*request)(unsigned int);
  49. void (*free)(unsigned int);
  50. };
  51. struct omap_mcbsp_platform_data {
  52. struct omap_mcbsp_ops *ops;
  53. u16 buffer_size;
  54. u8 reg_size;
  55. u8 reg_step;
  56. /* McBSP platform and instance specific features */
  57. bool has_wakeup; /* Wakeup capability */
  58. bool has_ccr; /* Transceiver has configuration control registers */
  59. int (*enable_st_clock)(unsigned int, bool);
  60. int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src);
  61. int (*mux_signal)(struct device *dev, const char *signal, const char *src);
  62. };
  63. struct omap_mcbsp_st_data {
  64. void __iomem *io_base_st;
  65. bool running;
  66. bool enabled;
  67. s16 taps[128]; /* Sidetone filter coefficients */
  68. int nr_taps; /* Number of filter coefficients in use */
  69. s16 ch0gain;
  70. s16 ch1gain;
  71. };
  72. struct omap_mcbsp {
  73. struct device *dev;
  74. unsigned long phys_base;
  75. unsigned long phys_dma_base;
  76. void __iomem *io_base;
  77. u8 id;
  78. u8 free;
  79. int rx_irq;
  80. int tx_irq;
  81. /* DMA stuff */
  82. u8 dma_rx_sync;
  83. u8 dma_tx_sync;
  84. /* Protect the field .free, while checking if the mcbsp is in use */
  85. spinlock_t lock;
  86. struct omap_mcbsp_platform_data *pdata;
  87. struct clk *fclk;
  88. struct omap_mcbsp_st_data *st_data;
  89. int dma_op_mode;
  90. u16 max_tx_thres;
  91. u16 max_rx_thres;
  92. void *reg_cache;
  93. int reg_cache_size;
  94. };
  95. /**
  96. * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod
  97. * @sidetone: name of the sidetone device
  98. */
  99. struct omap_mcbsp_dev_attr {
  100. const char *sidetone;
  101. };
  102. extern struct omap_mcbsp **mcbsp_ptr;
  103. extern int omap_mcbsp_count;
  104. #endif