wm8988.c 25 KB

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  1. /*
  2. * wm8988.c -- WM8988 ALSA SoC audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. * Copyright 2005 Openedhand Ltd.
  6. *
  7. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/slab.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/tlv.h>
  25. #include <sound/soc.h>
  26. #include <sound/initval.h>
  27. #include "wm8988.h"
  28. /*
  29. * wm8988 register cache
  30. * We can't read the WM8988 register space when we
  31. * are using 2 wire for device control, so we cache them instead.
  32. */
  33. static const u16 wm8988_reg[] = {
  34. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  35. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  36. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  37. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  38. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  39. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  40. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  41. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  42. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  43. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  44. 0x0079, 0x0079, 0x0079, /* 40 */
  45. };
  46. /* codec private data */
  47. struct wm8988_priv {
  48. unsigned int sysclk;
  49. enum snd_soc_control_type control_type;
  50. struct snd_pcm_hw_constraint_list *sysclk_constraints;
  51. };
  52. #define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0)
  53. /*
  54. * WM8988 Controls
  55. */
  56. static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"};
  57. static const struct soc_enum bass_boost =
  58. SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt);
  59. static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  60. static const struct soc_enum bass_filter =
  61. SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt);
  62. static const char *treble_txt[] = {"8kHz", "4kHz"};
  63. static const struct soc_enum treble =
  64. SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt);
  65. static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"};
  66. static const struct soc_enum stereo_3d_lc =
  67. SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt);
  68. static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"};
  69. static const struct soc_enum stereo_3d_uc =
  70. SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt);
  71. static const char *stereo_3d_func_txt[] = {"Capture", "Playback"};
  72. static const struct soc_enum stereo_3d_func =
  73. SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt);
  74. static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"};
  75. static const struct soc_enum alc_func =
  76. SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt);
  77. static const char *ng_type_txt[] = {"Constant PGA Gain",
  78. "Mute ADC Output"};
  79. static const struct soc_enum ng_type =
  80. SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt);
  81. static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  82. static const struct soc_enum deemph =
  83. SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt);
  84. static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert",
  85. "L + R Invert"};
  86. static const struct soc_enum adcpol =
  87. SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt);
  88. static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
  89. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  90. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  91. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  92. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
  93. static const struct snd_kcontrol_new wm8988_snd_controls[] = {
  94. SOC_ENUM("Bass Boost", bass_boost),
  95. SOC_ENUM("Bass Filter", bass_filter),
  96. SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1),
  97. SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0),
  98. SOC_ENUM("Treble Cut-off", treble),
  99. SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0),
  100. SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0),
  101. SOC_ENUM("3D Lower Cut-off", stereo_3d_lc),
  102. SOC_ENUM("3D Upper Cut-off", stereo_3d_uc),
  103. SOC_ENUM("3D Mode", stereo_3d_func),
  104. SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0),
  105. SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0),
  106. SOC_ENUM("ALC Capture Function", alc_func),
  107. SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0),
  108. SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0),
  109. SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0),
  110. SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0),
  111. SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0),
  112. SOC_ENUM("ALC Capture NG Type", ng_type),
  113. SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0),
  114. SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0),
  115. SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC,
  116. 0, 255, 0, adc_tlv),
  117. SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL,
  118. 0, 63, 0, pga_tlv),
  119. SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0),
  120. SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1),
  121. SOC_ENUM("Playback De-emphasis", deemph),
  122. SOC_ENUM("Capture Polarity", adcpol),
  123. SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0),
  124. SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0),
  125. SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv),
  126. SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1,
  127. bypass_tlv),
  128. SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1,
  129. bypass_tlv),
  130. SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1,
  131. bypass_tlv),
  132. SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1,
  133. bypass_tlv),
  134. SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V,
  135. WM8988_ROUT1V, 7, 1, 0),
  136. SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V,
  137. 0, 127, 0, out_tlv),
  138. SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V,
  139. WM8988_ROUT2V, 7, 1, 0),
  140. SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V,
  141. 0, 127, 0, out_tlv),
  142. };
  143. /*
  144. * DAPM Controls
  145. */
  146. static int wm8988_lrc_control(struct snd_soc_dapm_widget *w,
  147. struct snd_kcontrol *kcontrol, int event)
  148. {
  149. struct snd_soc_codec *codec = w->codec;
  150. u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2);
  151. /* Use the DAC to gate LRC if active, otherwise use ADC */
  152. if (snd_soc_read(codec, WM8988_PWR2) & 0x180)
  153. adctl2 &= ~0x4;
  154. else
  155. adctl2 |= 0x4;
  156. return snd_soc_write(codec, WM8988_ADCTL2, adctl2);
  157. }
  158. static const char *wm8988_line_texts[] = {
  159. "Line 1", "Line 2", "PGA", "Differential"};
  160. static const unsigned int wm8988_line_values[] = {
  161. 0, 1, 3, 4};
  162. static const struct soc_enum wm8988_lline_enum =
  163. SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7,
  164. ARRAY_SIZE(wm8988_line_texts),
  165. wm8988_line_texts,
  166. wm8988_line_values);
  167. static const struct snd_kcontrol_new wm8988_left_line_controls =
  168. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  169. static const struct soc_enum wm8988_rline_enum =
  170. SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7,
  171. ARRAY_SIZE(wm8988_line_texts),
  172. wm8988_line_texts,
  173. wm8988_line_values);
  174. static const struct snd_kcontrol_new wm8988_right_line_controls =
  175. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  176. /* Left Mixer */
  177. static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = {
  178. SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0),
  179. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0),
  180. SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0),
  181. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0),
  182. };
  183. /* Right Mixer */
  184. static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = {
  185. SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0),
  186. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0),
  187. SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0),
  188. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0),
  189. };
  190. static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"};
  191. static const unsigned int wm8988_pga_val[] = { 0, 1, 3 };
  192. /* Left PGA Mux */
  193. static const struct soc_enum wm8988_lpga_enum =
  194. SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3,
  195. ARRAY_SIZE(wm8988_pga_sel),
  196. wm8988_pga_sel,
  197. wm8988_pga_val);
  198. static const struct snd_kcontrol_new wm8988_left_pga_controls =
  199. SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum);
  200. /* Right PGA Mux */
  201. static const struct soc_enum wm8988_rpga_enum =
  202. SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3,
  203. ARRAY_SIZE(wm8988_pga_sel),
  204. wm8988_pga_sel,
  205. wm8988_pga_val);
  206. static const struct snd_kcontrol_new wm8988_right_pga_controls =
  207. SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum);
  208. /* Differential Mux */
  209. static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"};
  210. static const struct soc_enum diffmux =
  211. SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel);
  212. static const struct snd_kcontrol_new wm8988_diffmux_controls =
  213. SOC_DAPM_ENUM("Route", diffmux);
  214. /* Mono ADC Mux */
  215. static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)",
  216. "Mono (Right)", "Digital Mono"};
  217. static const struct soc_enum monomux =
  218. SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux);
  219. static const struct snd_kcontrol_new wm8988_monomux_controls =
  220. SOC_DAPM_ENUM("Route", monomux);
  221. static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = {
  222. SND_SOC_DAPM_SUPPLY("Mic Bias", WM8988_PWR1, 1, 0, NULL, 0),
  223. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  224. &wm8988_diffmux_controls),
  225. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  226. &wm8988_monomux_controls),
  227. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  228. &wm8988_monomux_controls),
  229. SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0,
  230. &wm8988_left_pga_controls),
  231. SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0,
  232. &wm8988_right_pga_controls),
  233. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  234. &wm8988_left_line_controls),
  235. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  236. &wm8988_right_line_controls),
  237. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0),
  238. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0),
  239. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0),
  240. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0),
  241. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  242. &wm8988_left_mixer_controls[0],
  243. ARRAY_SIZE(wm8988_left_mixer_controls)),
  244. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  245. &wm8988_right_mixer_controls[0],
  246. ARRAY_SIZE(wm8988_right_mixer_controls)),
  247. SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0),
  248. SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0),
  249. SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0),
  250. SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0),
  251. SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control),
  252. SND_SOC_DAPM_OUTPUT("LOUT1"),
  253. SND_SOC_DAPM_OUTPUT("ROUT1"),
  254. SND_SOC_DAPM_OUTPUT("LOUT2"),
  255. SND_SOC_DAPM_OUTPUT("ROUT2"),
  256. SND_SOC_DAPM_OUTPUT("VREF"),
  257. SND_SOC_DAPM_INPUT("LINPUT1"),
  258. SND_SOC_DAPM_INPUT("LINPUT2"),
  259. SND_SOC_DAPM_INPUT("RINPUT1"),
  260. SND_SOC_DAPM_INPUT("RINPUT2"),
  261. };
  262. static const struct snd_soc_dapm_route audio_map[] = {
  263. { "Left Line Mux", "Line 1", "LINPUT1" },
  264. { "Left Line Mux", "Line 2", "LINPUT2" },
  265. { "Left Line Mux", "PGA", "Left PGA Mux" },
  266. { "Left Line Mux", "Differential", "Differential Mux" },
  267. { "Right Line Mux", "Line 1", "RINPUT1" },
  268. { "Right Line Mux", "Line 2", "RINPUT2" },
  269. { "Right Line Mux", "PGA", "Right PGA Mux" },
  270. { "Right Line Mux", "Differential", "Differential Mux" },
  271. { "Left PGA Mux", "Line 1", "LINPUT1" },
  272. { "Left PGA Mux", "Line 2", "LINPUT2" },
  273. { "Left PGA Mux", "Differential", "Differential Mux" },
  274. { "Right PGA Mux", "Line 1", "RINPUT1" },
  275. { "Right PGA Mux", "Line 2", "RINPUT2" },
  276. { "Right PGA Mux", "Differential", "Differential Mux" },
  277. { "Differential Mux", "Line 1", "LINPUT1" },
  278. { "Differential Mux", "Line 1", "RINPUT1" },
  279. { "Differential Mux", "Line 2", "LINPUT2" },
  280. { "Differential Mux", "Line 2", "RINPUT2" },
  281. { "Left ADC Mux", "Stereo", "Left PGA Mux" },
  282. { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" },
  283. { "Left ADC Mux", "Digital Mono", "Left PGA Mux" },
  284. { "Right ADC Mux", "Stereo", "Right PGA Mux" },
  285. { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" },
  286. { "Right ADC Mux", "Digital Mono", "Right PGA Mux" },
  287. { "Left ADC", NULL, "Left ADC Mux" },
  288. { "Right ADC", NULL, "Right ADC Mux" },
  289. { "Left Line Mux", "Line 1", "LINPUT1" },
  290. { "Left Line Mux", "Line 2", "LINPUT2" },
  291. { "Left Line Mux", "PGA", "Left PGA Mux" },
  292. { "Left Line Mux", "Differential", "Differential Mux" },
  293. { "Right Line Mux", "Line 1", "RINPUT1" },
  294. { "Right Line Mux", "Line 2", "RINPUT2" },
  295. { "Right Line Mux", "PGA", "Right PGA Mux" },
  296. { "Right Line Mux", "Differential", "Differential Mux" },
  297. { "Left Mixer", "Playback Switch", "Left DAC" },
  298. { "Left Mixer", "Left Bypass Switch", "Left Line Mux" },
  299. { "Left Mixer", "Right Playback Switch", "Right DAC" },
  300. { "Left Mixer", "Right Bypass Switch", "Right Line Mux" },
  301. { "Right Mixer", "Left Playback Switch", "Left DAC" },
  302. { "Right Mixer", "Left Bypass Switch", "Left Line Mux" },
  303. { "Right Mixer", "Playback Switch", "Right DAC" },
  304. { "Right Mixer", "Right Bypass Switch", "Right Line Mux" },
  305. { "Left Out 1", NULL, "Left Mixer" },
  306. { "LOUT1", NULL, "Left Out 1" },
  307. { "Right Out 1", NULL, "Right Mixer" },
  308. { "ROUT1", NULL, "Right Out 1" },
  309. { "Left Out 2", NULL, "Left Mixer" },
  310. { "LOUT2", NULL, "Left Out 2" },
  311. { "Right Out 2", NULL, "Right Mixer" },
  312. { "ROUT2", NULL, "Right Out 2" },
  313. };
  314. struct _coeff_div {
  315. u32 mclk;
  316. u32 rate;
  317. u16 fs;
  318. u8 sr:5;
  319. u8 usb:1;
  320. };
  321. /* codec hifi mclk clock divider coefficients */
  322. static const struct _coeff_div coeff_div[] = {
  323. /* 8k */
  324. {12288000, 8000, 1536, 0x6, 0x0},
  325. {11289600, 8000, 1408, 0x16, 0x0},
  326. {18432000, 8000, 2304, 0x7, 0x0},
  327. {16934400, 8000, 2112, 0x17, 0x0},
  328. {12000000, 8000, 1500, 0x6, 0x1},
  329. /* 11.025k */
  330. {11289600, 11025, 1024, 0x18, 0x0},
  331. {16934400, 11025, 1536, 0x19, 0x0},
  332. {12000000, 11025, 1088, 0x19, 0x1},
  333. /* 16k */
  334. {12288000, 16000, 768, 0xa, 0x0},
  335. {18432000, 16000, 1152, 0xb, 0x0},
  336. {12000000, 16000, 750, 0xa, 0x1},
  337. /* 22.05k */
  338. {11289600, 22050, 512, 0x1a, 0x0},
  339. {16934400, 22050, 768, 0x1b, 0x0},
  340. {12000000, 22050, 544, 0x1b, 0x1},
  341. /* 32k */
  342. {12288000, 32000, 384, 0xc, 0x0},
  343. {18432000, 32000, 576, 0xd, 0x0},
  344. {12000000, 32000, 375, 0xa, 0x1},
  345. /* 44.1k */
  346. {11289600, 44100, 256, 0x10, 0x0},
  347. {16934400, 44100, 384, 0x11, 0x0},
  348. {12000000, 44100, 272, 0x11, 0x1},
  349. /* 48k */
  350. {12288000, 48000, 256, 0x0, 0x0},
  351. {18432000, 48000, 384, 0x1, 0x0},
  352. {12000000, 48000, 250, 0x0, 0x1},
  353. /* 88.2k */
  354. {11289600, 88200, 128, 0x1e, 0x0},
  355. {16934400, 88200, 192, 0x1f, 0x0},
  356. {12000000, 88200, 136, 0x1f, 0x1},
  357. /* 96k */
  358. {12288000, 96000, 128, 0xe, 0x0},
  359. {18432000, 96000, 192, 0xf, 0x0},
  360. {12000000, 96000, 125, 0xe, 0x1},
  361. };
  362. static inline int get_coeff(int mclk, int rate)
  363. {
  364. int i;
  365. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  366. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  367. return i;
  368. }
  369. return -EINVAL;
  370. }
  371. /* The set of rates we can generate from the above for each SYSCLK */
  372. static unsigned int rates_12288[] = {
  373. 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
  374. };
  375. static struct snd_pcm_hw_constraint_list constraints_12288 = {
  376. .count = ARRAY_SIZE(rates_12288),
  377. .list = rates_12288,
  378. };
  379. static unsigned int rates_112896[] = {
  380. 8000, 11025, 22050, 44100,
  381. };
  382. static struct snd_pcm_hw_constraint_list constraints_112896 = {
  383. .count = ARRAY_SIZE(rates_112896),
  384. .list = rates_112896,
  385. };
  386. static unsigned int rates_12[] = {
  387. 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
  388. 48000, 88235, 96000,
  389. };
  390. static struct snd_pcm_hw_constraint_list constraints_12 = {
  391. .count = ARRAY_SIZE(rates_12),
  392. .list = rates_12,
  393. };
  394. /*
  395. * Note that this should be called from init rather than from hw_params.
  396. */
  397. static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  398. int clk_id, unsigned int freq, int dir)
  399. {
  400. struct snd_soc_codec *codec = codec_dai->codec;
  401. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  402. switch (freq) {
  403. case 11289600:
  404. case 18432000:
  405. case 22579200:
  406. case 36864000:
  407. wm8988->sysclk_constraints = &constraints_112896;
  408. wm8988->sysclk = freq;
  409. return 0;
  410. case 12288000:
  411. case 16934400:
  412. case 24576000:
  413. case 33868800:
  414. wm8988->sysclk_constraints = &constraints_12288;
  415. wm8988->sysclk = freq;
  416. return 0;
  417. case 12000000:
  418. case 24000000:
  419. wm8988->sysclk_constraints = &constraints_12;
  420. wm8988->sysclk = freq;
  421. return 0;
  422. }
  423. return -EINVAL;
  424. }
  425. static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai,
  426. unsigned int fmt)
  427. {
  428. struct snd_soc_codec *codec = codec_dai->codec;
  429. u16 iface = 0;
  430. /* set master/slave audio interface */
  431. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  432. case SND_SOC_DAIFMT_CBM_CFM:
  433. iface = 0x0040;
  434. break;
  435. case SND_SOC_DAIFMT_CBS_CFS:
  436. break;
  437. default:
  438. return -EINVAL;
  439. }
  440. /* interface format */
  441. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  442. case SND_SOC_DAIFMT_I2S:
  443. iface |= 0x0002;
  444. break;
  445. case SND_SOC_DAIFMT_RIGHT_J:
  446. break;
  447. case SND_SOC_DAIFMT_LEFT_J:
  448. iface |= 0x0001;
  449. break;
  450. case SND_SOC_DAIFMT_DSP_A:
  451. iface |= 0x0003;
  452. break;
  453. case SND_SOC_DAIFMT_DSP_B:
  454. iface |= 0x0013;
  455. break;
  456. default:
  457. return -EINVAL;
  458. }
  459. /* clock inversion */
  460. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  461. case SND_SOC_DAIFMT_NB_NF:
  462. break;
  463. case SND_SOC_DAIFMT_IB_IF:
  464. iface |= 0x0090;
  465. break;
  466. case SND_SOC_DAIFMT_IB_NF:
  467. iface |= 0x0080;
  468. break;
  469. case SND_SOC_DAIFMT_NB_IF:
  470. iface |= 0x0010;
  471. break;
  472. default:
  473. return -EINVAL;
  474. }
  475. snd_soc_write(codec, WM8988_IFACE, iface);
  476. return 0;
  477. }
  478. static int wm8988_pcm_startup(struct snd_pcm_substream *substream,
  479. struct snd_soc_dai *dai)
  480. {
  481. struct snd_soc_codec *codec = dai->codec;
  482. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  483. /* The set of sample rates that can be supported depends on the
  484. * MCLK supplied to the CODEC - enforce this.
  485. */
  486. if (!wm8988->sysclk) {
  487. dev_err(codec->dev,
  488. "No MCLK configured, call set_sysclk() on init\n");
  489. return -EINVAL;
  490. }
  491. snd_pcm_hw_constraint_list(substream->runtime, 0,
  492. SNDRV_PCM_HW_PARAM_RATE,
  493. wm8988->sysclk_constraints);
  494. return 0;
  495. }
  496. static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
  497. struct snd_pcm_hw_params *params,
  498. struct snd_soc_dai *dai)
  499. {
  500. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  501. struct snd_soc_codec *codec = rtd->codec;
  502. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  503. u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3;
  504. u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180;
  505. int coeff;
  506. coeff = get_coeff(wm8988->sysclk, params_rate(params));
  507. if (coeff < 0) {
  508. coeff = get_coeff(wm8988->sysclk / 2, params_rate(params));
  509. srate |= 0x40;
  510. }
  511. if (coeff < 0) {
  512. dev_err(codec->dev,
  513. "Unable to configure sample rate %dHz with %dHz MCLK\n",
  514. params_rate(params), wm8988->sysclk);
  515. return coeff;
  516. }
  517. /* bit size */
  518. switch (params_format(params)) {
  519. case SNDRV_PCM_FORMAT_S16_LE:
  520. break;
  521. case SNDRV_PCM_FORMAT_S20_3LE:
  522. iface |= 0x0004;
  523. break;
  524. case SNDRV_PCM_FORMAT_S24_LE:
  525. iface |= 0x0008;
  526. break;
  527. case SNDRV_PCM_FORMAT_S32_LE:
  528. iface |= 0x000c;
  529. break;
  530. }
  531. /* set iface & srate */
  532. snd_soc_write(codec, WM8988_IFACE, iface);
  533. if (coeff >= 0)
  534. snd_soc_write(codec, WM8988_SRATE, srate |
  535. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  536. return 0;
  537. }
  538. static int wm8988_mute(struct snd_soc_dai *dai, int mute)
  539. {
  540. struct snd_soc_codec *codec = dai->codec;
  541. u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7;
  542. if (mute)
  543. snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8);
  544. else
  545. snd_soc_write(codec, WM8988_ADCDAC, mute_reg);
  546. return 0;
  547. }
  548. static int wm8988_set_bias_level(struct snd_soc_codec *codec,
  549. enum snd_soc_bias_level level)
  550. {
  551. u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1;
  552. switch (level) {
  553. case SND_SOC_BIAS_ON:
  554. break;
  555. case SND_SOC_BIAS_PREPARE:
  556. /* VREF, VMID=2x50k, digital enabled */
  557. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0);
  558. break;
  559. case SND_SOC_BIAS_STANDBY:
  560. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  561. snd_soc_cache_sync(codec);
  562. /* VREF, VMID=2x5k */
  563. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1);
  564. /* Charge caps */
  565. msleep(100);
  566. }
  567. /* VREF, VMID=2*500k, digital stopped */
  568. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141);
  569. break;
  570. case SND_SOC_BIAS_OFF:
  571. snd_soc_write(codec, WM8988_PWR1, 0x0000);
  572. break;
  573. }
  574. codec->dapm.bias_level = level;
  575. return 0;
  576. }
  577. #define WM8988_RATES SNDRV_PCM_RATE_8000_96000
  578. #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  579. SNDRV_PCM_FMTBIT_S24_LE)
  580. static const struct snd_soc_dai_ops wm8988_ops = {
  581. .startup = wm8988_pcm_startup,
  582. .hw_params = wm8988_pcm_hw_params,
  583. .set_fmt = wm8988_set_dai_fmt,
  584. .set_sysclk = wm8988_set_dai_sysclk,
  585. .digital_mute = wm8988_mute,
  586. };
  587. static struct snd_soc_dai_driver wm8988_dai = {
  588. .name = "wm8988-hifi",
  589. .playback = {
  590. .stream_name = "Playback",
  591. .channels_min = 1,
  592. .channels_max = 2,
  593. .rates = WM8988_RATES,
  594. .formats = WM8988_FORMATS,
  595. },
  596. .capture = {
  597. .stream_name = "Capture",
  598. .channels_min = 1,
  599. .channels_max = 2,
  600. .rates = WM8988_RATES,
  601. .formats = WM8988_FORMATS,
  602. },
  603. .ops = &wm8988_ops,
  604. .symmetric_rates = 1,
  605. };
  606. static int wm8988_suspend(struct snd_soc_codec *codec)
  607. {
  608. wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
  609. return 0;
  610. }
  611. static int wm8988_resume(struct snd_soc_codec *codec)
  612. {
  613. wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  614. return 0;
  615. }
  616. static int wm8988_probe(struct snd_soc_codec *codec)
  617. {
  618. struct wm8988_priv *wm8988 = snd_soc_codec_get_drvdata(codec);
  619. struct snd_soc_dapm_context *dapm = &codec->dapm;
  620. int ret = 0;
  621. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8988->control_type);
  622. if (ret < 0) {
  623. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  624. return ret;
  625. }
  626. ret = wm8988_reset(codec);
  627. if (ret < 0) {
  628. dev_err(codec->dev, "Failed to issue reset\n");
  629. return ret;
  630. }
  631. /* set the update bits (we always update left then right) */
  632. snd_soc_update_bits(codec, WM8988_RADC, 0x0100, 0x0100);
  633. snd_soc_update_bits(codec, WM8988_RDAC, 0x0100, 0x0100);
  634. snd_soc_update_bits(codec, WM8988_ROUT1V, 0x0100, 0x0100);
  635. snd_soc_update_bits(codec, WM8988_ROUT2V, 0x0100, 0x0100);
  636. snd_soc_update_bits(codec, WM8988_RINVOL, 0x0100, 0x0100);
  637. wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  638. snd_soc_add_controls(codec, wm8988_snd_controls,
  639. ARRAY_SIZE(wm8988_snd_controls));
  640. snd_soc_dapm_new_controls(dapm, wm8988_dapm_widgets,
  641. ARRAY_SIZE(wm8988_dapm_widgets));
  642. snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
  643. return 0;
  644. }
  645. static int wm8988_remove(struct snd_soc_codec *codec)
  646. {
  647. wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
  648. return 0;
  649. }
  650. static struct snd_soc_codec_driver soc_codec_dev_wm8988 = {
  651. .probe = wm8988_probe,
  652. .remove = wm8988_remove,
  653. .suspend = wm8988_suspend,
  654. .resume = wm8988_resume,
  655. .set_bias_level = wm8988_set_bias_level,
  656. .reg_cache_size = ARRAY_SIZE(wm8988_reg),
  657. .reg_word_size = sizeof(u16),
  658. .reg_cache_default = wm8988_reg,
  659. };
  660. #if defined(CONFIG_SPI_MASTER)
  661. static int __devinit wm8988_spi_probe(struct spi_device *spi)
  662. {
  663. struct wm8988_priv *wm8988;
  664. int ret;
  665. wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
  666. if (wm8988 == NULL)
  667. return -ENOMEM;
  668. wm8988->control_type = SND_SOC_SPI;
  669. spi_set_drvdata(spi, wm8988);
  670. ret = snd_soc_register_codec(&spi->dev,
  671. &soc_codec_dev_wm8988, &wm8988_dai, 1);
  672. if (ret < 0)
  673. kfree(wm8988);
  674. return ret;
  675. }
  676. static int __devexit wm8988_spi_remove(struct spi_device *spi)
  677. {
  678. snd_soc_unregister_codec(&spi->dev);
  679. kfree(spi_get_drvdata(spi));
  680. return 0;
  681. }
  682. static struct spi_driver wm8988_spi_driver = {
  683. .driver = {
  684. .name = "wm8988",
  685. .owner = THIS_MODULE,
  686. },
  687. .probe = wm8988_spi_probe,
  688. .remove = __devexit_p(wm8988_spi_remove),
  689. };
  690. #endif /* CONFIG_SPI_MASTER */
  691. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  692. static __devinit int wm8988_i2c_probe(struct i2c_client *i2c,
  693. const struct i2c_device_id *id)
  694. {
  695. struct wm8988_priv *wm8988;
  696. int ret;
  697. wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
  698. if (wm8988 == NULL)
  699. return -ENOMEM;
  700. i2c_set_clientdata(i2c, wm8988);
  701. wm8988->control_type = SND_SOC_I2C;
  702. ret = snd_soc_register_codec(&i2c->dev,
  703. &soc_codec_dev_wm8988, &wm8988_dai, 1);
  704. if (ret < 0)
  705. kfree(wm8988);
  706. return ret;
  707. }
  708. static __devexit int wm8988_i2c_remove(struct i2c_client *client)
  709. {
  710. snd_soc_unregister_codec(&client->dev);
  711. kfree(i2c_get_clientdata(client));
  712. return 0;
  713. }
  714. static const struct i2c_device_id wm8988_i2c_id[] = {
  715. { "wm8988", 0 },
  716. { }
  717. };
  718. MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id);
  719. static struct i2c_driver wm8988_i2c_driver = {
  720. .driver = {
  721. .name = "wm8988-codec",
  722. .owner = THIS_MODULE,
  723. },
  724. .probe = wm8988_i2c_probe,
  725. .remove = __devexit_p(wm8988_i2c_remove),
  726. .id_table = wm8988_i2c_id,
  727. };
  728. #endif
  729. static int __init wm8988_modinit(void)
  730. {
  731. int ret = 0;
  732. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  733. ret = i2c_add_driver(&wm8988_i2c_driver);
  734. if (ret != 0) {
  735. printk(KERN_ERR "Failed to register WM8988 I2C driver: %d\n",
  736. ret);
  737. }
  738. #endif
  739. #if defined(CONFIG_SPI_MASTER)
  740. ret = spi_register_driver(&wm8988_spi_driver);
  741. if (ret != 0) {
  742. printk(KERN_ERR "Failed to register WM8988 SPI driver: %d\n",
  743. ret);
  744. }
  745. #endif
  746. return ret;
  747. }
  748. module_init(wm8988_modinit);
  749. static void __exit wm8988_exit(void)
  750. {
  751. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  752. i2c_del_driver(&wm8988_i2c_driver);
  753. #endif
  754. #if defined(CONFIG_SPI_MASTER)
  755. spi_unregister_driver(&wm8988_spi_driver);
  756. #endif
  757. }
  758. module_exit(wm8988_exit);
  759. MODULE_DESCRIPTION("ASoC WM8988 driver");
  760. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  761. MODULE_LICENSE("GPL");