via_wdt.c 7.6 KB

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  1. /*
  2. * VIA Chipset Watchdog Driver
  3. *
  4. * Copyright (C) 2011 Sigfox
  5. * License terms: GNU General Public License (GPL) version 2
  6. * Author: Marc Vertes <marc.vertes@sigfox.com>
  7. * Based on a preliminary version from Harald Welte <HaraldWelte@viatech.com>
  8. * Timer code by Wim Van Sebroeck <wim@iguana.be>
  9. *
  10. * Caveat: PnP must be enabled in BIOS to allow full access to watchdog
  11. * control registers. If not, the watchdog must be configured in BIOS manually.
  12. */
  13. #include <linux/device.h>
  14. #include <linux/io.h>
  15. #include <linux/jiffies.h>
  16. #include <linux/module.h>
  17. #include <linux/pci.h>
  18. #include <linux/timer.h>
  19. #include <linux/watchdog.h>
  20. /* Configuration registers relative to the pci device */
  21. #define VIA_WDT_MMIO_BASE 0xe8 /* MMIO region base address */
  22. #define VIA_WDT_CONF 0xec /* watchdog enable state */
  23. /* Relevant bits for the VIA_WDT_CONF register */
  24. #define VIA_WDT_CONF_ENABLE 0x01 /* 1: enable watchdog */
  25. #define VIA_WDT_CONF_MMIO 0x02 /* 1: enable watchdog MMIO */
  26. /*
  27. * The MMIO region contains the watchog control register and the
  28. * hardware timer counter.
  29. */
  30. #define VIA_WDT_MMIO_LEN 8 /* MMIO region length in bytes */
  31. #define VIA_WDT_CTL 0 /* MMIO addr+0: state/control reg. */
  32. #define VIA_WDT_COUNT 4 /* MMIO addr+4: timer counter reg. */
  33. /* Bits for the VIA_WDT_CTL register */
  34. #define VIA_WDT_RUNNING 0x01 /* 0: stop, 1: running */
  35. #define VIA_WDT_FIRED 0x02 /* 1: restarted by expired watchdog */
  36. #define VIA_WDT_PWROFF 0x04 /* 0: reset, 1: poweroff */
  37. #define VIA_WDT_DISABLED 0x08 /* 1: timer is disabled */
  38. #define VIA_WDT_TRIGGER 0x80 /* 1: start a new countdown */
  39. /* Hardware heartbeat in seconds */
  40. #define WDT_HW_HEARTBEAT 1
  41. /* Timer heartbeat (500ms) */
  42. #define WDT_HEARTBEAT (HZ/2) /* should be <= ((WDT_HW_HEARTBEAT*HZ)/2) */
  43. /* User space timeout in seconds */
  44. #define WDT_TIMEOUT_MAX 1023 /* approx. 17 min. */
  45. #define WDT_TIMEOUT 60
  46. static int timeout = WDT_TIMEOUT;
  47. module_param(timeout, int, 0);
  48. MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, between 1 and 1023 "
  49. "(default = " __MODULE_STRING(WDT_TIMEOUT) ")");
  50. static int nowayout = WATCHDOG_NOWAYOUT;
  51. module_param(nowayout, int, 0);
  52. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  53. "(default = " __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  54. static struct watchdog_device wdt_dev;
  55. static struct resource wdt_res;
  56. static void __iomem *wdt_mem;
  57. static unsigned int mmio;
  58. static void wdt_timer_tick(unsigned long data);
  59. static DEFINE_TIMER(timer, wdt_timer_tick, 0, 0);
  60. /* The timer that pings the watchdog */
  61. static unsigned long next_heartbeat; /* the next_heartbeat for the timer */
  62. static inline void wdt_reset(void)
  63. {
  64. unsigned int ctl = readl(wdt_mem);
  65. writel(ctl | VIA_WDT_TRIGGER, wdt_mem);
  66. }
  67. /*
  68. * Timer tick: the timer will make sure that the watchdog timer hardware
  69. * is being reset in time. The conditions to do this are:
  70. * 1) the watchog timer has been started and /dev/watchdog is open
  71. * and there is still time left before userspace should send the
  72. * next heartbeat/ping. (note: the internal heartbeat is much smaller
  73. * then the external/userspace heartbeat).
  74. * 2) the watchdog timer has been stopped by userspace.
  75. */
  76. static void wdt_timer_tick(unsigned long data)
  77. {
  78. if (time_before(jiffies, next_heartbeat) ||
  79. (!test_bit(WDOG_ACTIVE, &wdt_dev.status))) {
  80. wdt_reset();
  81. mod_timer(&timer, jiffies + WDT_HEARTBEAT);
  82. } else
  83. pr_crit("I will reboot your machine !\n");
  84. }
  85. static int wdt_ping(struct watchdog_device *wdd)
  86. {
  87. /* calculate when the next userspace timeout will be */
  88. next_heartbeat = jiffies + timeout * HZ;
  89. return 0;
  90. }
  91. static int wdt_start(struct watchdog_device *wdd)
  92. {
  93. unsigned int ctl = readl(wdt_mem);
  94. writel(timeout, wdt_mem + VIA_WDT_COUNT);
  95. writel(ctl | VIA_WDT_RUNNING | VIA_WDT_TRIGGER, wdt_mem);
  96. wdt_ping(wdd);
  97. mod_timer(&timer, jiffies + WDT_HEARTBEAT);
  98. return 0;
  99. }
  100. static int wdt_stop(struct watchdog_device *wdd)
  101. {
  102. unsigned int ctl = readl(wdt_mem);
  103. writel(ctl & ~VIA_WDT_RUNNING, wdt_mem);
  104. return 0;
  105. }
  106. static int wdt_set_timeout(struct watchdog_device *wdd,
  107. unsigned int new_timeout)
  108. {
  109. writel(new_timeout, wdt_mem + VIA_WDT_COUNT);
  110. timeout = new_timeout;
  111. return 0;
  112. }
  113. static const struct watchdog_info wdt_info = {
  114. .identity = "VIA watchdog",
  115. .options = WDIOF_CARDRESET |
  116. WDIOF_SETTIMEOUT |
  117. WDIOF_MAGICCLOSE |
  118. WDIOF_KEEPALIVEPING,
  119. };
  120. static const struct watchdog_ops wdt_ops = {
  121. .owner = THIS_MODULE,
  122. .start = wdt_start,
  123. .stop = wdt_stop,
  124. .ping = wdt_ping,
  125. .set_timeout = wdt_set_timeout,
  126. };
  127. static struct watchdog_device wdt_dev = {
  128. .info = &wdt_info,
  129. .ops = &wdt_ops,
  130. .min_timeout = 1,
  131. .max_timeout = WDT_TIMEOUT_MAX,
  132. };
  133. static int __devinit wdt_probe(struct pci_dev *pdev,
  134. const struct pci_device_id *ent)
  135. {
  136. unsigned char conf;
  137. int ret = -ENODEV;
  138. if (pci_enable_device(pdev)) {
  139. dev_err(&pdev->dev, "cannot enable PCI device\n");
  140. return -ENODEV;
  141. }
  142. /*
  143. * Allocate a MMIO region which contains watchdog control register
  144. * and counter, then configure the watchdog to use this region.
  145. * This is possible only if PnP is properly enabled in BIOS.
  146. * If not, the watchdog must be configured in BIOS manually.
  147. */
  148. if (allocate_resource(&iomem_resource, &wdt_res, VIA_WDT_MMIO_LEN,
  149. 0xf0000000, 0xffffff00, 0xff, NULL, NULL)) {
  150. dev_err(&pdev->dev, "MMIO allocation failed\n");
  151. goto err_out_disable_device;
  152. }
  153. pci_write_config_dword(pdev, VIA_WDT_MMIO_BASE, wdt_res.start);
  154. pci_read_config_byte(pdev, VIA_WDT_CONF, &conf);
  155. conf |= VIA_WDT_CONF_ENABLE | VIA_WDT_CONF_MMIO;
  156. pci_write_config_byte(pdev, VIA_WDT_CONF, conf);
  157. pci_read_config_dword(pdev, VIA_WDT_MMIO_BASE, &mmio);
  158. if (mmio) {
  159. dev_info(&pdev->dev, "VIA Chipset watchdog MMIO: %x\n", mmio);
  160. } else {
  161. dev_err(&pdev->dev, "MMIO setting failed. Check BIOS.\n");
  162. goto err_out_resource;
  163. }
  164. if (!request_mem_region(mmio, VIA_WDT_MMIO_LEN, "via_wdt")) {
  165. dev_err(&pdev->dev, "MMIO region busy\n");
  166. goto err_out_resource;
  167. }
  168. wdt_mem = ioremap(mmio, VIA_WDT_MMIO_LEN);
  169. if (wdt_mem == NULL) {
  170. dev_err(&pdev->dev, "cannot remap VIA wdt MMIO registers\n");
  171. goto err_out_release;
  172. }
  173. wdt_dev.timeout = timeout;
  174. watchdog_set_nowayout(&wdt_dev, nowayout);
  175. if (readl(wdt_mem) & VIA_WDT_FIRED)
  176. wdt_dev.bootstatus |= WDIOF_CARDRESET;
  177. ret = watchdog_register_device(&wdt_dev);
  178. if (ret)
  179. goto err_out_iounmap;
  180. /* start triggering, in case of watchdog already enabled by BIOS */
  181. mod_timer(&timer, jiffies + WDT_HEARTBEAT);
  182. return 0;
  183. err_out_iounmap:
  184. iounmap(wdt_mem);
  185. err_out_release:
  186. release_mem_region(mmio, VIA_WDT_MMIO_LEN);
  187. err_out_resource:
  188. release_resource(&wdt_res);
  189. err_out_disable_device:
  190. pci_disable_device(pdev);
  191. return ret;
  192. }
  193. static void __devexit wdt_remove(struct pci_dev *pdev)
  194. {
  195. watchdog_unregister_device(&wdt_dev);
  196. del_timer(&timer);
  197. iounmap(wdt_mem);
  198. release_mem_region(mmio, VIA_WDT_MMIO_LEN);
  199. release_resource(&wdt_res);
  200. pci_disable_device(pdev);
  201. }
  202. static DEFINE_PCI_DEVICE_TABLE(wdt_pci_table) = {
  203. { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_CX700) },
  204. { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX800) },
  205. { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VX855) },
  206. { 0 }
  207. };
  208. static struct pci_driver wdt_driver = {
  209. .name = "via_wdt",
  210. .id_table = wdt_pci_table,
  211. .probe = wdt_probe,
  212. .remove = __devexit_p(wdt_remove),
  213. };
  214. static int __init wdt_init(void)
  215. {
  216. if (timeout < 1 || timeout > WDT_TIMEOUT_MAX)
  217. timeout = WDT_TIMEOUT;
  218. return pci_register_driver(&wdt_driver);
  219. }
  220. static void __exit wdt_exit(void)
  221. {
  222. pci_unregister_driver(&wdt_driver);
  223. }
  224. module_init(wdt_init);
  225. module_exit(wdt_exit);
  226. MODULE_AUTHOR("Marc Vertes");
  227. MODULE_DESCRIPTION("Driver for watchdog timer on VIA chipset");
  228. MODULE_LICENSE("GPL");