iwl-pci.c 20 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22. * USA
  23. *
  24. * The full GNU General Public License is included in this distribution
  25. * in the file called LICENSE.GPL.
  26. *
  27. * Contact Information:
  28. * Intel Linux Wireless <ilw@linux.intel.com>
  29. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30. *
  31. * BSD LICENSE
  32. *
  33. * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
  34. * All rights reserved.
  35. *
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. *
  40. * * Redistributions of source code must retain the above copyright
  41. * notice, this list of conditions and the following disclaimer.
  42. * * Redistributions in binary form must reproduce the above copyright
  43. * notice, this list of conditions and the following disclaimer in
  44. * the documentation and/or other materials provided with the
  45. * distribution.
  46. * * Neither the name Intel Corporation nor the names of its
  47. * contributors may be used to endorse or promote products derived
  48. * from this software without specific prior written permission.
  49. *
  50. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *
  62. *****************************************************************************/
  63. #include <linux/module.h>
  64. #include <linux/pci.h>
  65. #include <linux/pci-aspm.h>
  66. #include "iwl-bus.h"
  67. #include "iwl-io.h"
  68. #include "iwl-shared.h"
  69. #include "iwl-trans.h"
  70. #include "iwl-csr.h"
  71. #include "iwl-cfg.h"
  72. /* PCI registers */
  73. #define PCI_CFG_RETRY_TIMEOUT 0x041
  74. #define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
  75. #define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
  76. struct iwl_pci_bus {
  77. /* basic pci-network driver stuff */
  78. struct pci_dev *pci_dev;
  79. /* pci hardware address support */
  80. void __iomem *hw_base;
  81. };
  82. #define IWL_BUS_GET_PCI_BUS(_iwl_bus) \
  83. ((struct iwl_pci_bus *) ((_iwl_bus)->bus_specific))
  84. #define IWL_BUS_GET_PCI_DEV(_iwl_bus) \
  85. ((IWL_BUS_GET_PCI_BUS(_iwl_bus))->pci_dev)
  86. static u16 iwl_pciexp_link_ctrl(struct iwl_bus *bus)
  87. {
  88. int pos;
  89. u16 pci_lnk_ctl;
  90. struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
  91. pos = pci_pcie_cap(pci_dev);
  92. pci_read_config_word(pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
  93. return pci_lnk_ctl;
  94. }
  95. static bool iwl_pci_is_pm_supported(struct iwl_bus *bus)
  96. {
  97. u16 lctl = iwl_pciexp_link_ctrl(bus);
  98. return !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
  99. }
  100. static void iwl_pci_apm_config(struct iwl_bus *bus)
  101. {
  102. /*
  103. * HW bug W/A for instability in PCIe bus L0S->L1 transition.
  104. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  105. * If so (likely), disable L0S, so device moves directly L0->L1;
  106. * costs negligible amount of power savings.
  107. * If not (unlikely), enable L0S, so there is at least some
  108. * power savings, even without L1.
  109. */
  110. u16 lctl = iwl_pciexp_link_ctrl(bus);
  111. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  112. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  113. /* L1-ASPM enabled; disable(!) L0S */
  114. iwl_set_bit(bus, CSR_GIO_REG,
  115. CSR_GIO_REG_VAL_L0S_ENABLED);
  116. dev_printk(KERN_INFO, bus->dev, "L1 Enabled; Disabling L0S\n");
  117. } else {
  118. /* L1-ASPM disabled; enable(!) L0S */
  119. iwl_clear_bit(bus, CSR_GIO_REG,
  120. CSR_GIO_REG_VAL_L0S_ENABLED);
  121. dev_printk(KERN_INFO, bus->dev, "L1 Disabled; Enabling L0S\n");
  122. }
  123. }
  124. static void iwl_pci_get_hw_id_string(struct iwl_bus *bus, char buf[],
  125. int buf_len)
  126. {
  127. struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
  128. snprintf(buf, buf_len, "PCI ID: 0x%04X:0x%04X", pci_dev->device,
  129. pci_dev->subsystem_device);
  130. }
  131. static u32 iwl_pci_get_hw_id(struct iwl_bus *bus)
  132. {
  133. struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
  134. return (pci_dev->device << 16) + pci_dev->subsystem_device;
  135. }
  136. static void iwl_pci_write8(struct iwl_bus *bus, u32 ofs, u8 val)
  137. {
  138. iowrite8(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
  139. }
  140. static void iwl_pci_write32(struct iwl_bus *bus, u32 ofs, u32 val)
  141. {
  142. iowrite32(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
  143. }
  144. static u32 iwl_pci_read32(struct iwl_bus *bus, u32 ofs)
  145. {
  146. u32 val = ioread32(IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
  147. return val;
  148. }
  149. static const struct iwl_bus_ops bus_ops_pci = {
  150. .get_pm_support = iwl_pci_is_pm_supported,
  151. .apm_config = iwl_pci_apm_config,
  152. .get_hw_id_string = iwl_pci_get_hw_id_string,
  153. .get_hw_id = iwl_pci_get_hw_id,
  154. .write8 = iwl_pci_write8,
  155. .write32 = iwl_pci_write32,
  156. .read32 = iwl_pci_read32,
  157. };
  158. #define IWL_PCI_DEVICE(dev, subdev, cfg) \
  159. .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
  160. .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
  161. .driver_data = (kernel_ulong_t)&(cfg)
  162. /* Hardware specific file defines the PCI IDs table for that hardware module */
  163. static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
  164. {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
  165. {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
  166. {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
  167. {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
  168. {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
  169. {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
  170. {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
  171. {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
  172. {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
  173. {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
  174. {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
  175. {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
  176. {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
  177. {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
  178. {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
  179. {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
  180. {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
  181. {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
  182. {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
  183. {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
  184. {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
  185. {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
  186. {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
  187. {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
  188. /* 5300 Series WiFi */
  189. {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
  190. {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
  191. {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
  192. {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
  193. {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
  194. {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
  195. {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
  196. {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
  197. {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
  198. {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
  199. {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
  200. {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
  201. /* 5350 Series WiFi/WiMax */
  202. {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
  203. {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
  204. {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
  205. /* 5150 Series Wifi/WiMax */
  206. {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
  207. {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
  208. {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
  209. {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
  210. {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
  211. {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
  212. {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
  213. {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
  214. {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
  215. {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
  216. /* 6x00 Series */
  217. {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
  218. {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
  219. {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
  220. {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
  221. {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
  222. {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
  223. {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
  224. {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
  225. {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
  226. {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
  227. /* 6x05 Series */
  228. {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
  229. {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
  230. {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
  231. {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
  232. {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
  233. {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
  234. {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
  235. {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)},
  236. {IWL_PCI_DEVICE(0x0085, 0xC220, iwl6005_2agn_sff_cfg)},
  237. {IWL_PCI_DEVICE(0x0082, 0x1341, iwl6005_2agn_d_cfg)},
  238. {IWL_PCI_DEVICE(0x0082, 0x1304, iwl6005_2agn_cfg)},/* low 5GHz active */
  239. {IWL_PCI_DEVICE(0x0082, 0x1305, iwl6005_2agn_cfg)},/* high 5GHz active */
  240. /* 6x30 Series */
  241. {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
  242. {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
  243. {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
  244. {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
  245. {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
  246. {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
  247. {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
  248. {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
  249. {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
  250. {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
  251. {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
  252. {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
  253. {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
  254. {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
  255. {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
  256. {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
  257. /* 6x50 WiFi/WiMax Series */
  258. {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
  259. {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
  260. {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
  261. {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
  262. {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
  263. {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
  264. /* 6150 WiFi/WiMax Series */
  265. {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
  266. {IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
  267. {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
  268. {IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
  269. {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
  270. {IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
  271. /* 1000 Series WiFi */
  272. {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
  273. {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
  274. {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
  275. {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
  276. {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
  277. {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
  278. {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
  279. {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
  280. {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
  281. {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
  282. {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
  283. {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
  284. /* 100 Series WiFi */
  285. {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
  286. {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
  287. {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
  288. {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
  289. {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
  290. {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
  291. /* 130 Series WiFi */
  292. {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
  293. {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
  294. {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
  295. {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
  296. {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
  297. {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
  298. /* 2x00 Series */
  299. {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
  300. {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
  301. {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
  302. {IWL_PCI_DEVICE(0x0890, 0x4822, iwl2000_2bgn_d_cfg)},
  303. /* 2x30 Series */
  304. {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
  305. {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
  306. {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
  307. /* 6x35 Series */
  308. {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
  309. {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
  310. {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
  311. /* 105 Series */
  312. {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
  313. {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
  314. {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
  315. {IWL_PCI_DEVICE(0x0894, 0x0822, iwl105_bgn_d_cfg)},
  316. /* 135 Series */
  317. {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
  318. {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
  319. {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
  320. {0}
  321. };
  322. MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
  323. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  324. {
  325. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  326. struct iwl_bus *bus;
  327. struct iwl_pci_bus *pci_bus;
  328. u16 pci_cmd;
  329. int err;
  330. bus = kzalloc(sizeof(*bus) + sizeof(*pci_bus), GFP_KERNEL);
  331. if (!bus) {
  332. dev_printk(KERN_ERR, &pdev->dev,
  333. "Couldn't allocate iwl_pci_bus");
  334. err = -ENOMEM;
  335. goto out_no_pci;
  336. }
  337. pci_bus = IWL_BUS_GET_PCI_BUS(bus);
  338. pci_bus->pci_dev = pdev;
  339. pci_set_drvdata(pdev, bus);
  340. /* W/A - seems to solve weird behavior. We need to remove this if we
  341. * don't want to stay in L1 all the time. This wastes a lot of power */
  342. pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  343. PCIE_LINK_STATE_CLKPM);
  344. if (pci_enable_device(pdev)) {
  345. err = -ENODEV;
  346. goto out_no_pci;
  347. }
  348. pci_set_master(pdev);
  349. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
  350. if (!err)
  351. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
  352. if (err) {
  353. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  354. if (!err)
  355. err = pci_set_consistent_dma_mask(pdev,
  356. DMA_BIT_MASK(32));
  357. /* both attempts failed: */
  358. if (err) {
  359. dev_printk(KERN_ERR, bus->dev,
  360. "No suitable DMA available.\n");
  361. goto out_pci_disable_device;
  362. }
  363. }
  364. err = pci_request_regions(pdev, DRV_NAME);
  365. if (err) {
  366. dev_printk(KERN_ERR, bus->dev, "pci_request_regions failed");
  367. goto out_pci_disable_device;
  368. }
  369. pci_bus->hw_base = pci_iomap(pdev, 0, 0);
  370. if (!pci_bus->hw_base) {
  371. dev_printk(KERN_ERR, bus->dev, "pci_iomap failed");
  372. err = -ENODEV;
  373. goto out_pci_release_regions;
  374. }
  375. dev_printk(KERN_INFO, &pdev->dev,
  376. "pci_resource_len = 0x%08llx\n",
  377. (unsigned long long) pci_resource_len(pdev, 0));
  378. dev_printk(KERN_INFO, &pdev->dev,
  379. "pci_resource_base = %p\n", pci_bus->hw_base);
  380. dev_printk(KERN_INFO, &pdev->dev,
  381. "HW Revision ID = 0x%X\n", pdev->revision);
  382. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  383. * PCI Tx retries from interfering with C3 CPU state */
  384. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  385. err = pci_enable_msi(pdev);
  386. if (err)
  387. dev_printk(KERN_ERR, &pdev->dev,
  388. "pci_enable_msi failed(0X%x)", err);
  389. /* TODO: Move this away, not needed if not MSI */
  390. /* enable rfkill interrupt: hw bug w/a */
  391. pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
  392. if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
  393. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  394. pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
  395. }
  396. bus->dev = &pdev->dev;
  397. bus->irq = pdev->irq;
  398. bus->ops = &bus_ops_pci;
  399. err = iwl_probe(bus, &trans_ops_pcie, cfg);
  400. if (err)
  401. goto out_disable_msi;
  402. return 0;
  403. out_disable_msi:
  404. pci_disable_msi(pdev);
  405. pci_iounmap(pdev, pci_bus->hw_base);
  406. out_pci_release_regions:
  407. pci_set_drvdata(pdev, NULL);
  408. pci_release_regions(pdev);
  409. out_pci_disable_device:
  410. pci_disable_device(pdev);
  411. out_no_pci:
  412. kfree(bus);
  413. return err;
  414. }
  415. static void __devexit iwl_pci_remove(struct pci_dev *pdev)
  416. {
  417. struct iwl_bus *bus = pci_get_drvdata(pdev);
  418. struct iwl_pci_bus *pci_bus = IWL_BUS_GET_PCI_BUS(bus);
  419. struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
  420. struct iwl_shared *shrd = bus->shrd;
  421. iwl_remove(shrd->priv);
  422. pci_disable_msi(pci_dev);
  423. pci_iounmap(pci_dev, pci_bus->hw_base);
  424. pci_release_regions(pci_dev);
  425. pci_disable_device(pci_dev);
  426. pci_set_drvdata(pci_dev, NULL);
  427. kfree(bus);
  428. }
  429. #ifdef CONFIG_PM_SLEEP
  430. static int iwl_pci_suspend(struct device *device)
  431. {
  432. struct pci_dev *pdev = to_pci_dev(device);
  433. struct iwl_bus *bus = pci_get_drvdata(pdev);
  434. struct iwl_shared *shrd = bus->shrd;
  435. /* Before you put code here, think about WoWLAN. You cannot check here
  436. * whether WoWLAN is enabled or not, and your code will run even if
  437. * WoWLAN is enabled - don't kill the NIC, someone may need it in Sx.
  438. */
  439. return iwl_trans_suspend(shrd->trans);
  440. }
  441. static int iwl_pci_resume(struct device *device)
  442. {
  443. struct pci_dev *pdev = to_pci_dev(device);
  444. struct iwl_bus *bus = pci_get_drvdata(pdev);
  445. struct iwl_shared *shrd = bus->shrd;
  446. /* Before you put code here, think about WoWLAN. You cannot check here
  447. * whether WoWLAN is enabled or not, and your code will run even if
  448. * WoWLAN is enabled - the NIC may be alive.
  449. */
  450. /*
  451. * We disable the RETRY_TIMEOUT register (0x41) to keep
  452. * PCI Tx retries from interfering with C3 CPU state.
  453. */
  454. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  455. return iwl_trans_resume(shrd->trans);
  456. }
  457. static SIMPLE_DEV_PM_OPS(iwl_dev_pm_ops, iwl_pci_suspend, iwl_pci_resume);
  458. #define IWL_PM_OPS (&iwl_dev_pm_ops)
  459. #else
  460. #define IWL_PM_OPS NULL
  461. #endif
  462. static struct pci_driver iwl_pci_driver = {
  463. .name = DRV_NAME,
  464. .id_table = iwl_hw_card_ids,
  465. .probe = iwl_pci_probe,
  466. .remove = __devexit_p(iwl_pci_remove),
  467. .driver.pm = IWL_PM_OPS,
  468. };
  469. int __must_check iwl_pci_register_driver(void)
  470. {
  471. int ret;
  472. ret = pci_register_driver(&iwl_pci_driver);
  473. if (ret)
  474. pr_err("Unable to initialize PCI module\n");
  475. return ret;
  476. }
  477. void iwl_pci_unregister_driver(void)
  478. {
  479. pci_unregister_driver(&iwl_pci_driver);
  480. }