iwl-core.c 44 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-debug.h"
  36. #include "iwl-core.h"
  37. #include "iwl-io.h"
  38. #include "iwl-power.h"
  39. #include "iwl-agn.h"
  40. #include "iwl-shared.h"
  41. #include "iwl-agn.h"
  42. #include "iwl-trans.h"
  43. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  44. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  45. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  46. static void iwl_init_ht_hw_capab(const struct iwl_priv *priv,
  47. struct ieee80211_sta_ht_cap *ht_info,
  48. enum ieee80211_band band)
  49. {
  50. u16 max_bit_rate = 0;
  51. u8 rx_chains_num = hw_params(priv).rx_chains_num;
  52. u8 tx_chains_num = hw_params(priv).tx_chains_num;
  53. ht_info->cap = 0;
  54. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  55. ht_info->ht_supported = true;
  56. if (cfg(priv)->ht_params &&
  57. cfg(priv)->ht_params->ht_greenfield_support)
  58. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  59. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  60. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  61. if (hw_params(priv).ht40_channel & BIT(band)) {
  62. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  63. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  64. ht_info->mcs.rx_mask[4] = 0x01;
  65. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  66. }
  67. if (iwlagn_mod_params.amsdu_size_8K)
  68. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  69. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  70. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  71. ht_info->mcs.rx_mask[0] = 0xFF;
  72. if (rx_chains_num >= 2)
  73. ht_info->mcs.rx_mask[1] = 0xFF;
  74. if (rx_chains_num >= 3)
  75. ht_info->mcs.rx_mask[2] = 0xFF;
  76. /* Highest supported Rx data rate */
  77. max_bit_rate *= rx_chains_num;
  78. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  79. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  80. /* Tx MCS capabilities */
  81. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  82. if (tx_chains_num != rx_chains_num) {
  83. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  84. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  85. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  86. }
  87. }
  88. /**
  89. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  90. */
  91. int iwl_init_geos(struct iwl_priv *priv)
  92. {
  93. struct iwl_channel_info *ch;
  94. struct ieee80211_supported_band *sband;
  95. struct ieee80211_channel *channels;
  96. struct ieee80211_channel *geo_ch;
  97. struct ieee80211_rate *rates;
  98. int i = 0;
  99. s8 max_tx_power = IWLAGN_TX_POWER_TARGET_POWER_MIN;
  100. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  101. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  102. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  103. set_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
  104. return 0;
  105. }
  106. channels = kcalloc(priv->channel_count,
  107. sizeof(struct ieee80211_channel), GFP_KERNEL);
  108. if (!channels)
  109. return -ENOMEM;
  110. rates = kcalloc(IWL_RATE_COUNT_LEGACY, sizeof(struct ieee80211_rate),
  111. GFP_KERNEL);
  112. if (!rates) {
  113. kfree(channels);
  114. return -ENOMEM;
  115. }
  116. /* 5.2GHz channels start after the 2.4GHz channels */
  117. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  118. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  119. /* just OFDM */
  120. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  121. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  122. if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
  123. iwl_init_ht_hw_capab(priv, &sband->ht_cap,
  124. IEEE80211_BAND_5GHZ);
  125. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  126. sband->channels = channels;
  127. /* OFDM & CCK */
  128. sband->bitrates = rates;
  129. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  130. if (cfg(priv)->sku & EEPROM_SKU_CAP_11N_ENABLE)
  131. iwl_init_ht_hw_capab(priv, &sband->ht_cap,
  132. IEEE80211_BAND_2GHZ);
  133. priv->ieee_channels = channels;
  134. priv->ieee_rates = rates;
  135. for (i = 0; i < priv->channel_count; i++) {
  136. ch = &priv->channel_info[i];
  137. /* FIXME: might be removed if scan is OK */
  138. if (!is_channel_valid(ch))
  139. continue;
  140. sband = &priv->bands[ch->band];
  141. geo_ch = &sband->channels[sband->n_channels++];
  142. geo_ch->center_freq =
  143. ieee80211_channel_to_frequency(ch->channel, ch->band);
  144. geo_ch->max_power = ch->max_power_avg;
  145. geo_ch->max_antenna_gain = 0xff;
  146. geo_ch->hw_value = ch->channel;
  147. if (is_channel_valid(ch)) {
  148. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  149. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  150. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  151. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  152. if (ch->flags & EEPROM_CHANNEL_RADAR)
  153. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  154. geo_ch->flags |= ch->ht40_extension_channel;
  155. if (ch->max_power_avg > max_tx_power)
  156. max_tx_power = ch->max_power_avg;
  157. } else {
  158. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  159. }
  160. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  161. ch->channel, geo_ch->center_freq,
  162. is_channel_a_band(ch) ? "5.2" : "2.4",
  163. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  164. "restricted" : "valid",
  165. geo_ch->flags);
  166. }
  167. priv->tx_power_device_lmt = max_tx_power;
  168. priv->tx_power_user_lmt = max_tx_power;
  169. priv->tx_power_next = max_tx_power;
  170. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  171. cfg(priv)->sku & EEPROM_SKU_CAP_BAND_52GHZ) {
  172. char buf[32];
  173. bus_get_hw_id_string(bus(priv), buf, sizeof(buf));
  174. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  175. "Please send your %s to maintainer.\n", buf);
  176. cfg(priv)->sku &= ~EEPROM_SKU_CAP_BAND_52GHZ;
  177. }
  178. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  179. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  180. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  181. set_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
  182. return 0;
  183. }
  184. /*
  185. * iwl_free_geos - undo allocations in iwl_init_geos
  186. */
  187. void iwl_free_geos(struct iwl_priv *priv)
  188. {
  189. kfree(priv->ieee_channels);
  190. kfree(priv->ieee_rates);
  191. clear_bit(STATUS_GEO_CONFIGURED, &priv->shrd->status);
  192. }
  193. static bool iwl_is_channel_extension(struct iwl_priv *priv,
  194. enum ieee80211_band band,
  195. u16 channel, u8 extension_chan_offset)
  196. {
  197. const struct iwl_channel_info *ch_info;
  198. ch_info = iwl_get_channel_info(priv, band, channel);
  199. if (!is_channel_valid(ch_info))
  200. return false;
  201. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  202. return !(ch_info->ht40_extension_channel &
  203. IEEE80211_CHAN_NO_HT40PLUS);
  204. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  205. return !(ch_info->ht40_extension_channel &
  206. IEEE80211_CHAN_NO_HT40MINUS);
  207. return false;
  208. }
  209. bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  210. struct iwl_rxon_context *ctx,
  211. struct ieee80211_sta_ht_cap *ht_cap)
  212. {
  213. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  214. return false;
  215. /*
  216. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  217. * the bit will not set if it is pure 40MHz case
  218. */
  219. if (ht_cap && !ht_cap->ht_supported)
  220. return false;
  221. #ifdef CONFIG_IWLWIFI_DEBUGFS
  222. if (priv->disable_ht40)
  223. return false;
  224. #endif
  225. return iwl_is_channel_extension(priv, priv->band,
  226. le16_to_cpu(ctx->staging.channel),
  227. ctx->ht.extension_chan_offset);
  228. }
  229. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  230. {
  231. u16 new_val;
  232. u16 beacon_factor;
  233. /*
  234. * If mac80211 hasn't given us a beacon interval, program
  235. * the default into the device (not checking this here
  236. * would cause the adjustment below to return the maximum
  237. * value, which may break PAN.)
  238. */
  239. if (!beacon_val)
  240. return DEFAULT_BEACON_INTERVAL;
  241. /*
  242. * If the beacon interval we obtained from the peer
  243. * is too large, we'll have to wake up more often
  244. * (and in IBSS case, we'll beacon too much)
  245. *
  246. * For example, if max_beacon_val is 4096, and the
  247. * requested beacon interval is 7000, we'll have to
  248. * use 3500 to be able to wake up on the beacons.
  249. *
  250. * This could badly influence beacon detection stats.
  251. */
  252. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  253. new_val = beacon_val / beacon_factor;
  254. if (!new_val)
  255. new_val = max_beacon_val;
  256. return new_val;
  257. }
  258. int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  259. {
  260. u64 tsf;
  261. s32 interval_tm, rem;
  262. struct ieee80211_conf *conf = NULL;
  263. u16 beacon_int;
  264. struct ieee80211_vif *vif = ctx->vif;
  265. conf = &priv->hw->conf;
  266. lockdep_assert_held(&priv->shrd->mutex);
  267. memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
  268. ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
  269. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  270. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  271. /*
  272. * TODO: For IBSS we need to get atim_window from mac80211,
  273. * for now just always use 0
  274. */
  275. ctx->timing.atim_window = 0;
  276. if (ctx->ctxid == IWL_RXON_CTX_PAN &&
  277. (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
  278. iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
  279. priv->contexts[IWL_RXON_CTX_BSS].vif &&
  280. priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
  281. ctx->timing.beacon_interval =
  282. priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
  283. beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
  284. } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
  285. iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
  286. priv->contexts[IWL_RXON_CTX_PAN].vif &&
  287. priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
  288. (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
  289. !ctx->vif->bss_conf.beacon_int)) {
  290. ctx->timing.beacon_interval =
  291. priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
  292. beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
  293. } else {
  294. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  295. IWL_MAX_UCODE_BEACON_INTERVAL * TIME_UNIT);
  296. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  297. }
  298. ctx->beacon_int = beacon_int;
  299. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  300. interval_tm = beacon_int * TIME_UNIT;
  301. rem = do_div(tsf, interval_tm);
  302. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  303. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  304. IWL_DEBUG_ASSOC(priv,
  305. "beacon interval %d beacon timer %d beacon tim %d\n",
  306. le16_to_cpu(ctx->timing.beacon_interval),
  307. le32_to_cpu(ctx->timing.beacon_init_val),
  308. le16_to_cpu(ctx->timing.atim_window));
  309. return iwl_trans_send_cmd_pdu(trans(priv), ctx->rxon_timing_cmd,
  310. CMD_SYNC, sizeof(ctx->timing), &ctx->timing);
  311. }
  312. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
  313. int hw_decrypt)
  314. {
  315. struct iwl_rxon_cmd *rxon = &ctx->staging;
  316. if (hw_decrypt)
  317. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  318. else
  319. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  320. }
  321. /* validate RXON structure is valid */
  322. int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  323. {
  324. struct iwl_rxon_cmd *rxon = &ctx->staging;
  325. u32 errors = 0;
  326. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  327. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  328. IWL_WARN(priv, "check 2.4G: wrong narrow\n");
  329. errors |= BIT(0);
  330. }
  331. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  332. IWL_WARN(priv, "check 2.4G: wrong radar\n");
  333. errors |= BIT(1);
  334. }
  335. } else {
  336. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  337. IWL_WARN(priv, "check 5.2G: not short slot!\n");
  338. errors |= BIT(2);
  339. }
  340. if (rxon->flags & RXON_FLG_CCK_MSK) {
  341. IWL_WARN(priv, "check 5.2G: CCK!\n");
  342. errors |= BIT(3);
  343. }
  344. }
  345. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  346. IWL_WARN(priv, "mac/bssid mcast!\n");
  347. errors |= BIT(4);
  348. }
  349. /* make sure basic rates 6Mbps and 1Mbps are supported */
  350. if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
  351. (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
  352. IWL_WARN(priv, "neither 1 nor 6 are basic\n");
  353. errors |= BIT(5);
  354. }
  355. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  356. IWL_WARN(priv, "aid > 2007\n");
  357. errors |= BIT(6);
  358. }
  359. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  360. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  361. IWL_WARN(priv, "CCK and short slot\n");
  362. errors |= BIT(7);
  363. }
  364. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  365. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  366. IWL_WARN(priv, "CCK and auto detect");
  367. errors |= BIT(8);
  368. }
  369. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  370. RXON_FLG_TGG_PROTECT_MSK)) ==
  371. RXON_FLG_TGG_PROTECT_MSK) {
  372. IWL_WARN(priv, "TGg but no auto-detect\n");
  373. errors |= BIT(9);
  374. }
  375. if (rxon->channel == 0) {
  376. IWL_WARN(priv, "zero channel is invalid\n");
  377. errors |= BIT(10);
  378. }
  379. WARN(errors, "Invalid RXON (%#x), channel %d",
  380. errors, le16_to_cpu(rxon->channel));
  381. return errors ? -EINVAL : 0;
  382. }
  383. /**
  384. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  385. * @priv: staging_rxon is compared to active_rxon
  386. *
  387. * If the RXON structure is changing enough to require a new tune,
  388. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  389. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  390. */
  391. int iwl_full_rxon_required(struct iwl_priv *priv,
  392. struct iwl_rxon_context *ctx)
  393. {
  394. const struct iwl_rxon_cmd *staging = &ctx->staging;
  395. const struct iwl_rxon_cmd *active = &ctx->active;
  396. #define CHK(cond) \
  397. if ((cond)) { \
  398. IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
  399. return 1; \
  400. }
  401. #define CHK_NEQ(c1, c2) \
  402. if ((c1) != (c2)) { \
  403. IWL_DEBUG_INFO(priv, "need full RXON - " \
  404. #c1 " != " #c2 " - %d != %d\n", \
  405. (c1), (c2)); \
  406. return 1; \
  407. }
  408. /* These items are only settable from the full RXON command */
  409. CHK(!iwl_is_associated_ctx(ctx));
  410. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  411. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  412. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  413. active->wlap_bssid_addr));
  414. CHK_NEQ(staging->dev_type, active->dev_type);
  415. CHK_NEQ(staging->channel, active->channel);
  416. CHK_NEQ(staging->air_propagation, active->air_propagation);
  417. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  418. active->ofdm_ht_single_stream_basic_rates);
  419. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  420. active->ofdm_ht_dual_stream_basic_rates);
  421. CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
  422. active->ofdm_ht_triple_stream_basic_rates);
  423. CHK_NEQ(staging->assoc_id, active->assoc_id);
  424. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  425. * be updated with the RXON_ASSOC command -- however only some
  426. * flag transitions are allowed using RXON_ASSOC */
  427. /* Check if we are not switching bands */
  428. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  429. active->flags & RXON_FLG_BAND_24G_MSK);
  430. /* Check if we are switching association toggle */
  431. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  432. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  433. #undef CHK
  434. #undef CHK_NEQ
  435. return 0;
  436. }
  437. static void _iwl_set_rxon_ht(struct iwl_priv *priv,
  438. struct iwl_ht_config *ht_conf,
  439. struct iwl_rxon_context *ctx)
  440. {
  441. struct iwl_rxon_cmd *rxon = &ctx->staging;
  442. if (!ctx->ht.enabled) {
  443. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  444. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  445. RXON_FLG_HT40_PROT_MSK |
  446. RXON_FLG_HT_PROT_MSK);
  447. return;
  448. }
  449. /* FIXME: if the definition of ht.protection changed, the "translation"
  450. * will be needed for rxon->flags
  451. */
  452. rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
  453. /* Set up channel bandwidth:
  454. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  455. /* clear the HT channel mode before set the mode */
  456. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  457. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  458. if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
  459. /* pure ht40 */
  460. if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  461. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  462. /* Note: control channel is opposite of extension channel */
  463. switch (ctx->ht.extension_chan_offset) {
  464. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  465. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  466. break;
  467. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  468. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  469. break;
  470. }
  471. } else {
  472. /* Note: control channel is opposite of extension channel */
  473. switch (ctx->ht.extension_chan_offset) {
  474. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  475. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  476. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  477. break;
  478. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  479. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  480. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  481. break;
  482. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  483. default:
  484. /* channel location only valid if in Mixed mode */
  485. IWL_ERR(priv, "invalid extension channel offset\n");
  486. break;
  487. }
  488. }
  489. } else {
  490. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  491. }
  492. iwlagn_set_rxon_chain(priv, ctx);
  493. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  494. "extension channel offset 0x%x\n",
  495. le32_to_cpu(rxon->flags), ctx->ht.protection,
  496. ctx->ht.extension_chan_offset);
  497. }
  498. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  499. {
  500. struct iwl_rxon_context *ctx;
  501. for_each_context(priv, ctx)
  502. _iwl_set_rxon_ht(priv, ht_conf, ctx);
  503. }
  504. /* Return valid, unused, channel for a passive scan to reset the RF */
  505. u8 iwl_get_single_channel_number(struct iwl_priv *priv,
  506. enum ieee80211_band band)
  507. {
  508. const struct iwl_channel_info *ch_info;
  509. int i;
  510. u8 channel = 0;
  511. u8 min, max;
  512. struct iwl_rxon_context *ctx;
  513. if (band == IEEE80211_BAND_5GHZ) {
  514. min = 14;
  515. max = priv->channel_count;
  516. } else {
  517. min = 0;
  518. max = 14;
  519. }
  520. for (i = min; i < max; i++) {
  521. bool busy = false;
  522. for_each_context(priv, ctx) {
  523. busy = priv->channel_info[i].channel ==
  524. le16_to_cpu(ctx->staging.channel);
  525. if (busy)
  526. break;
  527. }
  528. if (busy)
  529. continue;
  530. channel = priv->channel_info[i].channel;
  531. ch_info = iwl_get_channel_info(priv, band, channel);
  532. if (is_channel_valid(ch_info))
  533. break;
  534. }
  535. return channel;
  536. }
  537. /**
  538. * iwl_set_rxon_channel - Set the band and channel values in staging RXON
  539. * @ch: requested channel as a pointer to struct ieee80211_channel
  540. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  541. * in the staging RXON flag structure based on the ch->band
  542. */
  543. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
  544. struct iwl_rxon_context *ctx)
  545. {
  546. enum ieee80211_band band = ch->band;
  547. u16 channel = ch->hw_value;
  548. if ((le16_to_cpu(ctx->staging.channel) == channel) &&
  549. (priv->band == band))
  550. return 0;
  551. ctx->staging.channel = cpu_to_le16(channel);
  552. if (band == IEEE80211_BAND_5GHZ)
  553. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  554. else
  555. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  556. priv->band = band;
  557. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  558. return 0;
  559. }
  560. void iwl_set_flags_for_band(struct iwl_priv *priv,
  561. struct iwl_rxon_context *ctx,
  562. enum ieee80211_band band,
  563. struct ieee80211_vif *vif)
  564. {
  565. if (band == IEEE80211_BAND_5GHZ) {
  566. ctx->staging.flags &=
  567. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  568. | RXON_FLG_CCK_MSK);
  569. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  570. } else {
  571. /* Copied from iwl_post_associate() */
  572. if (vif && vif->bss_conf.use_short_slot)
  573. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  574. else
  575. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  576. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  577. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  578. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  579. }
  580. }
  581. /*
  582. * initialize rxon structure with default values from eeprom
  583. */
  584. void iwl_connection_init_rx_config(struct iwl_priv *priv,
  585. struct iwl_rxon_context *ctx)
  586. {
  587. const struct iwl_channel_info *ch_info;
  588. memset(&ctx->staging, 0, sizeof(ctx->staging));
  589. if (!ctx->vif) {
  590. ctx->staging.dev_type = ctx->unused_devtype;
  591. } else switch (ctx->vif->type) {
  592. case NL80211_IFTYPE_AP:
  593. ctx->staging.dev_type = ctx->ap_devtype;
  594. break;
  595. case NL80211_IFTYPE_STATION:
  596. ctx->staging.dev_type = ctx->station_devtype;
  597. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  598. break;
  599. case NL80211_IFTYPE_ADHOC:
  600. ctx->staging.dev_type = ctx->ibss_devtype;
  601. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  602. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  603. RXON_FILTER_ACCEPT_GRP_MSK;
  604. break;
  605. default:
  606. IWL_ERR(priv, "Unsupported interface type %d\n",
  607. ctx->vif->type);
  608. break;
  609. }
  610. #if 0
  611. /* TODO: Figure out when short_preamble would be set and cache from
  612. * that */
  613. if (!hw_to_local(priv->hw)->short_preamble)
  614. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  615. else
  616. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  617. #endif
  618. ch_info = iwl_get_channel_info(priv, priv->band,
  619. le16_to_cpu(ctx->active.channel));
  620. if (!ch_info)
  621. ch_info = &priv->channel_info[0];
  622. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  623. priv->band = ch_info->band;
  624. iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
  625. ctx->staging.ofdm_basic_rates =
  626. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  627. ctx->staging.cck_basic_rates =
  628. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  629. /* clear both MIX and PURE40 mode flag */
  630. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  631. RXON_FLG_CHANNEL_MODE_PURE_40);
  632. if (ctx->vif)
  633. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  634. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  635. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  636. ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
  637. }
  638. void iwl_set_rate(struct iwl_priv *priv)
  639. {
  640. const struct ieee80211_supported_band *hw = NULL;
  641. struct ieee80211_rate *rate;
  642. struct iwl_rxon_context *ctx;
  643. int i;
  644. hw = iwl_get_hw_mode(priv, priv->band);
  645. if (!hw) {
  646. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  647. return;
  648. }
  649. priv->active_rate = 0;
  650. for (i = 0; i < hw->n_bitrates; i++) {
  651. rate = &(hw->bitrates[i]);
  652. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  653. priv->active_rate |= (1 << rate->hw_value);
  654. }
  655. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  656. for_each_context(priv, ctx) {
  657. ctx->staging.cck_basic_rates =
  658. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  659. ctx->staging.ofdm_basic_rates =
  660. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  661. }
  662. }
  663. void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
  664. {
  665. /*
  666. * MULTI-FIXME
  667. * See iwlagn_mac_channel_switch.
  668. */
  669. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  670. if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
  671. return;
  672. if (test_and_clear_bit(STATUS_CHANNEL_SWITCH_PENDING,
  673. &priv->shrd->status))
  674. ieee80211_chswitch_done(ctx->vif, is_success);
  675. }
  676. #ifdef CONFIG_IWLWIFI_DEBUG
  677. void iwl_print_rx_config_cmd(struct iwl_priv *priv,
  678. enum iwl_rxon_context_id ctxid)
  679. {
  680. struct iwl_rxon_context *ctx = &priv->contexts[ctxid];
  681. struct iwl_rxon_cmd *rxon = &ctx->staging;
  682. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  683. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  684. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  685. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  686. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  687. le32_to_cpu(rxon->filter_flags));
  688. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  689. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  690. rxon->ofdm_basic_rates);
  691. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  692. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  693. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  694. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  695. }
  696. #endif
  697. void iwlagn_fw_error(struct iwl_priv *priv, bool ondemand)
  698. {
  699. unsigned int reload_msec;
  700. unsigned long reload_jiffies;
  701. /* Set the FW error flag -- cleared on iwl_down */
  702. set_bit(STATUS_FW_ERROR, &priv->shrd->status);
  703. /* Cancel currently queued command. */
  704. clear_bit(STATUS_HCMD_ACTIVE, &priv->shrd->status);
  705. iwl_abort_notification_waits(priv->shrd);
  706. /* Keep the restart process from trying to send host
  707. * commands by clearing the ready bit */
  708. clear_bit(STATUS_READY, &priv->shrd->status);
  709. wake_up(&priv->shrd->wait_command_queue);
  710. if (!ondemand) {
  711. /*
  712. * If firmware keep reloading, then it indicate something
  713. * serious wrong and firmware having problem to recover
  714. * from it. Instead of keep trying which will fill the syslog
  715. * and hang the system, let's just stop it
  716. */
  717. reload_jiffies = jiffies;
  718. reload_msec = jiffies_to_msecs((long) reload_jiffies -
  719. (long) priv->reload_jiffies);
  720. priv->reload_jiffies = reload_jiffies;
  721. if (reload_msec <= IWL_MIN_RELOAD_DURATION) {
  722. priv->reload_count++;
  723. if (priv->reload_count >= IWL_MAX_CONTINUE_RELOAD_CNT) {
  724. IWL_ERR(priv, "BUG_ON, Stop restarting\n");
  725. return;
  726. }
  727. } else
  728. priv->reload_count = 0;
  729. }
  730. if (!test_bit(STATUS_EXIT_PENDING, &priv->shrd->status)) {
  731. if (iwlagn_mod_params.restart_fw) {
  732. IWL_DEBUG_FW_ERRORS(priv,
  733. "Restarting adapter due to uCode error.\n");
  734. queue_work(priv->shrd->workqueue, &priv->restart);
  735. } else
  736. IWL_DEBUG_FW_ERRORS(priv,
  737. "Detected FW error, but not restarting\n");
  738. }
  739. }
  740. static int iwl_apm_stop_master(struct iwl_priv *priv)
  741. {
  742. int ret = 0;
  743. /* stop device's busmaster DMA activity */
  744. iwl_set_bit(bus(priv), CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  745. ret = iwl_poll_bit(bus(priv), CSR_RESET,
  746. CSR_RESET_REG_FLAG_MASTER_DISABLED,
  747. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  748. if (ret)
  749. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  750. IWL_DEBUG_INFO(priv, "stop master\n");
  751. return ret;
  752. }
  753. void iwl_apm_stop(struct iwl_priv *priv)
  754. {
  755. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  756. clear_bit(STATUS_DEVICE_ENABLED, &priv->shrd->status);
  757. /* Stop device's DMA activity */
  758. iwl_apm_stop_master(priv);
  759. /* Reset the entire device */
  760. iwl_set_bit(bus(priv), CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  761. udelay(10);
  762. /*
  763. * Clear "initialization complete" bit to move adapter from
  764. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  765. */
  766. iwl_clear_bit(bus(priv), CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  767. }
  768. /*
  769. * Start up NIC's basic functionality after it has been reset
  770. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  771. * NOTE: This does not load uCode nor start the embedded processor
  772. */
  773. int iwl_apm_init(struct iwl_priv *priv)
  774. {
  775. int ret = 0;
  776. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  777. /*
  778. * Use "set_bit" below rather than "write", to preserve any hardware
  779. * bits already set by default after reset.
  780. */
  781. /* Disable L0S exit timer (platform NMI Work/Around) */
  782. iwl_set_bit(bus(priv), CSR_GIO_CHICKEN_BITS,
  783. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  784. /*
  785. * Disable L0s without affecting L1;
  786. * don't wait for ICH L0s (ICH bug W/A)
  787. */
  788. iwl_set_bit(bus(priv), CSR_GIO_CHICKEN_BITS,
  789. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  790. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  791. iwl_set_bit(bus(priv), CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  792. /*
  793. * Enable HAP INTA (interrupt from management bus) to
  794. * wake device's PCI Express link L1a -> L0s
  795. */
  796. iwl_set_bit(bus(priv), CSR_HW_IF_CONFIG_REG,
  797. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  798. bus_apm_config(bus(priv));
  799. /* Configure analog phase-lock-loop before activating to D0A */
  800. if (cfg(priv)->base_params->pll_cfg_val)
  801. iwl_set_bit(bus(priv), CSR_ANA_PLL_CFG,
  802. cfg(priv)->base_params->pll_cfg_val);
  803. /*
  804. * Set "initialization complete" bit to move adapter from
  805. * D0U* --> D0A* (powered-up active) state.
  806. */
  807. iwl_set_bit(bus(priv), CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  808. /*
  809. * Wait for clock stabilization; once stabilized, access to
  810. * device-internal resources is supported, e.g. iwl_write_prph()
  811. * and accesses to uCode SRAM.
  812. */
  813. ret = iwl_poll_bit(bus(priv), CSR_GP_CNTRL,
  814. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  815. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  816. if (ret < 0) {
  817. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  818. goto out;
  819. }
  820. /*
  821. * Enable DMA clock and wait for it to stabilize.
  822. *
  823. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  824. * do not disable clocks. This preserves any hardware bits already
  825. * set by default in "CLK_CTRL_REG" after reset.
  826. */
  827. iwl_write_prph(bus(priv), APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  828. udelay(20);
  829. /* Disable L1-Active */
  830. iwl_set_bits_prph(bus(priv), APMG_PCIDEV_STT_REG,
  831. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  832. set_bit(STATUS_DEVICE_ENABLED, &priv->shrd->status);
  833. out:
  834. return ret;
  835. }
  836. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  837. {
  838. int ret;
  839. s8 prev_tx_power;
  840. bool defer;
  841. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  842. lockdep_assert_held(&priv->shrd->mutex);
  843. if (priv->tx_power_user_lmt == tx_power && !force)
  844. return 0;
  845. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  846. IWL_WARN(priv,
  847. "Requested user TXPOWER %d below lower limit %d.\n",
  848. tx_power,
  849. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  850. return -EINVAL;
  851. }
  852. if (tx_power > priv->tx_power_device_lmt) {
  853. IWL_WARN(priv,
  854. "Requested user TXPOWER %d above upper limit %d.\n",
  855. tx_power, priv->tx_power_device_lmt);
  856. return -EINVAL;
  857. }
  858. if (!iwl_is_ready_rf(priv->shrd))
  859. return -EIO;
  860. /* scan complete and commit_rxon use tx_power_next value,
  861. * it always need to be updated for newest request */
  862. priv->tx_power_next = tx_power;
  863. /* do not set tx power when scanning or channel changing */
  864. defer = test_bit(STATUS_SCANNING, &priv->shrd->status) ||
  865. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  866. if (defer && !force) {
  867. IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
  868. return 0;
  869. }
  870. prev_tx_power = priv->tx_power_user_lmt;
  871. priv->tx_power_user_lmt = tx_power;
  872. ret = iwlagn_send_tx_power(priv);
  873. /* if fail to set tx_power, restore the orig. tx power */
  874. if (ret) {
  875. priv->tx_power_user_lmt = prev_tx_power;
  876. priv->tx_power_next = prev_tx_power;
  877. }
  878. return ret;
  879. }
  880. void iwl_send_bt_config(struct iwl_priv *priv)
  881. {
  882. struct iwl_bt_cmd bt_cmd = {
  883. .lead_time = BT_LEAD_TIME_DEF,
  884. .max_kill = BT_MAX_KILL_DEF,
  885. .kill_ack_mask = 0,
  886. .kill_cts_mask = 0,
  887. };
  888. if (!iwlagn_mod_params.bt_coex_active)
  889. bt_cmd.flags = BT_COEX_DISABLE;
  890. else
  891. bt_cmd.flags = BT_COEX_ENABLE;
  892. priv->bt_enable_flag = bt_cmd.flags;
  893. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  894. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  895. if (iwl_trans_send_cmd_pdu(trans(priv), REPLY_BT_CONFIG,
  896. CMD_SYNC, sizeof(struct iwl_bt_cmd), &bt_cmd))
  897. IWL_ERR(priv, "failed to send BT Coex Config\n");
  898. }
  899. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  900. {
  901. struct iwl_statistics_cmd statistics_cmd = {
  902. .configuration_flags =
  903. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  904. };
  905. if (flags & CMD_ASYNC)
  906. return iwl_trans_send_cmd_pdu(trans(priv), REPLY_STATISTICS_CMD,
  907. CMD_ASYNC,
  908. sizeof(struct iwl_statistics_cmd),
  909. &statistics_cmd);
  910. else
  911. return iwl_trans_send_cmd_pdu(trans(priv), REPLY_STATISTICS_CMD,
  912. CMD_SYNC,
  913. sizeof(struct iwl_statistics_cmd),
  914. &statistics_cmd);
  915. }
  916. #ifdef CONFIG_IWLWIFI_DEBUGFS
  917. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  918. void iwl_reset_traffic_log(struct iwl_priv *priv)
  919. {
  920. priv->tx_traffic_idx = 0;
  921. priv->rx_traffic_idx = 0;
  922. if (priv->tx_traffic)
  923. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  924. if (priv->rx_traffic)
  925. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  926. }
  927. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  928. {
  929. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  930. if (iwl_get_debug_level(priv->shrd) & IWL_DL_TX) {
  931. if (!priv->tx_traffic) {
  932. priv->tx_traffic =
  933. kzalloc(traffic_size, GFP_KERNEL);
  934. if (!priv->tx_traffic)
  935. return -ENOMEM;
  936. }
  937. }
  938. if (iwl_get_debug_level(priv->shrd) & IWL_DL_RX) {
  939. if (!priv->rx_traffic) {
  940. priv->rx_traffic =
  941. kzalloc(traffic_size, GFP_KERNEL);
  942. if (!priv->rx_traffic)
  943. return -ENOMEM;
  944. }
  945. }
  946. iwl_reset_traffic_log(priv);
  947. return 0;
  948. }
  949. void iwl_free_traffic_mem(struct iwl_priv *priv)
  950. {
  951. kfree(priv->tx_traffic);
  952. priv->tx_traffic = NULL;
  953. kfree(priv->rx_traffic);
  954. priv->rx_traffic = NULL;
  955. }
  956. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  957. u16 length, struct ieee80211_hdr *header)
  958. {
  959. __le16 fc;
  960. u16 len;
  961. if (likely(!(iwl_get_debug_level(priv->shrd) & IWL_DL_TX)))
  962. return;
  963. if (!priv->tx_traffic)
  964. return;
  965. fc = header->frame_control;
  966. if (ieee80211_is_data(fc)) {
  967. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  968. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  969. memcpy((priv->tx_traffic +
  970. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  971. header, len);
  972. priv->tx_traffic_idx =
  973. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  974. }
  975. }
  976. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  977. u16 length, struct ieee80211_hdr *header)
  978. {
  979. __le16 fc;
  980. u16 len;
  981. if (likely(!(iwl_get_debug_level(priv->shrd) & IWL_DL_RX)))
  982. return;
  983. if (!priv->rx_traffic)
  984. return;
  985. fc = header->frame_control;
  986. if (ieee80211_is_data(fc)) {
  987. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  988. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  989. memcpy((priv->rx_traffic +
  990. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  991. header, len);
  992. priv->rx_traffic_idx =
  993. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  994. }
  995. }
  996. const char *get_mgmt_string(int cmd)
  997. {
  998. switch (cmd) {
  999. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  1000. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  1001. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  1002. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  1003. IWL_CMD(MANAGEMENT_PROBE_REQ);
  1004. IWL_CMD(MANAGEMENT_PROBE_RESP);
  1005. IWL_CMD(MANAGEMENT_BEACON);
  1006. IWL_CMD(MANAGEMENT_ATIM);
  1007. IWL_CMD(MANAGEMENT_DISASSOC);
  1008. IWL_CMD(MANAGEMENT_AUTH);
  1009. IWL_CMD(MANAGEMENT_DEAUTH);
  1010. IWL_CMD(MANAGEMENT_ACTION);
  1011. default:
  1012. return "UNKNOWN";
  1013. }
  1014. }
  1015. const char *get_ctrl_string(int cmd)
  1016. {
  1017. switch (cmd) {
  1018. IWL_CMD(CONTROL_BACK_REQ);
  1019. IWL_CMD(CONTROL_BACK);
  1020. IWL_CMD(CONTROL_PSPOLL);
  1021. IWL_CMD(CONTROL_RTS);
  1022. IWL_CMD(CONTROL_CTS);
  1023. IWL_CMD(CONTROL_ACK);
  1024. IWL_CMD(CONTROL_CFEND);
  1025. IWL_CMD(CONTROL_CFENDACK);
  1026. default:
  1027. return "UNKNOWN";
  1028. }
  1029. }
  1030. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  1031. {
  1032. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  1033. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  1034. }
  1035. /*
  1036. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  1037. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  1038. * Use debugFs to display the rx/rx_statistics
  1039. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  1040. * information will be recorded, but DATA pkt still will be recorded
  1041. * for the reason of iwl_led.c need to control the led blinking based on
  1042. * number of tx and rx data.
  1043. *
  1044. */
  1045. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  1046. {
  1047. struct traffic_stats *stats;
  1048. if (is_tx)
  1049. stats = &priv->tx_stats;
  1050. else
  1051. stats = &priv->rx_stats;
  1052. if (ieee80211_is_mgmt(fc)) {
  1053. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1054. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  1055. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  1056. break;
  1057. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  1058. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  1059. break;
  1060. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  1061. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  1062. break;
  1063. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  1064. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  1065. break;
  1066. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  1067. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  1068. break;
  1069. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  1070. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  1071. break;
  1072. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  1073. stats->mgmt[MANAGEMENT_BEACON]++;
  1074. break;
  1075. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  1076. stats->mgmt[MANAGEMENT_ATIM]++;
  1077. break;
  1078. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  1079. stats->mgmt[MANAGEMENT_DISASSOC]++;
  1080. break;
  1081. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  1082. stats->mgmt[MANAGEMENT_AUTH]++;
  1083. break;
  1084. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  1085. stats->mgmt[MANAGEMENT_DEAUTH]++;
  1086. break;
  1087. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  1088. stats->mgmt[MANAGEMENT_ACTION]++;
  1089. break;
  1090. }
  1091. } else if (ieee80211_is_ctl(fc)) {
  1092. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1093. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  1094. stats->ctrl[CONTROL_BACK_REQ]++;
  1095. break;
  1096. case cpu_to_le16(IEEE80211_STYPE_BACK):
  1097. stats->ctrl[CONTROL_BACK]++;
  1098. break;
  1099. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  1100. stats->ctrl[CONTROL_PSPOLL]++;
  1101. break;
  1102. case cpu_to_le16(IEEE80211_STYPE_RTS):
  1103. stats->ctrl[CONTROL_RTS]++;
  1104. break;
  1105. case cpu_to_le16(IEEE80211_STYPE_CTS):
  1106. stats->ctrl[CONTROL_CTS]++;
  1107. break;
  1108. case cpu_to_le16(IEEE80211_STYPE_ACK):
  1109. stats->ctrl[CONTROL_ACK]++;
  1110. break;
  1111. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  1112. stats->ctrl[CONTROL_CFEND]++;
  1113. break;
  1114. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  1115. stats->ctrl[CONTROL_CFENDACK]++;
  1116. break;
  1117. }
  1118. } else {
  1119. /* data */
  1120. stats->data_cnt++;
  1121. stats->data_bytes += len;
  1122. }
  1123. }
  1124. #endif
  1125. static void iwl_force_rf_reset(struct iwl_priv *priv)
  1126. {
  1127. if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
  1128. return;
  1129. if (!iwl_is_any_associated(priv)) {
  1130. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  1131. return;
  1132. }
  1133. /*
  1134. * There is no easy and better way to force reset the radio,
  1135. * the only known method is switching channel which will force to
  1136. * reset and tune the radio.
  1137. * Use internal short scan (single channel) operation to should
  1138. * achieve this objective.
  1139. * Driver should reset the radio when number of consecutive missed
  1140. * beacon, or any other uCode error condition detected.
  1141. */
  1142. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  1143. iwl_internal_short_hw_scan(priv);
  1144. }
  1145. int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
  1146. {
  1147. struct iwl_force_reset *force_reset;
  1148. if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
  1149. return -EINVAL;
  1150. if (mode >= IWL_MAX_FORCE_RESET) {
  1151. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  1152. return -EINVAL;
  1153. }
  1154. force_reset = &priv->force_reset[mode];
  1155. force_reset->reset_request_count++;
  1156. if (!external) {
  1157. if (force_reset->last_force_reset_jiffies &&
  1158. time_after(force_reset->last_force_reset_jiffies +
  1159. force_reset->reset_duration, jiffies)) {
  1160. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  1161. force_reset->reset_reject_count++;
  1162. return -EAGAIN;
  1163. }
  1164. }
  1165. force_reset->reset_success_count++;
  1166. force_reset->last_force_reset_jiffies = jiffies;
  1167. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  1168. switch (mode) {
  1169. case IWL_RF_RESET:
  1170. iwl_force_rf_reset(priv);
  1171. break;
  1172. case IWL_FW_RESET:
  1173. /*
  1174. * if the request is from external(ex: debugfs),
  1175. * then always perform the request in regardless the module
  1176. * parameter setting
  1177. * if the request is from internal (uCode error or driver
  1178. * detect failure), then fw_restart module parameter
  1179. * need to be check before performing firmware reload
  1180. */
  1181. if (!external && !iwlagn_mod_params.restart_fw) {
  1182. IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
  1183. "module parameter setting\n");
  1184. break;
  1185. }
  1186. IWL_ERR(priv, "On demand firmware reload\n");
  1187. iwlagn_fw_error(priv, true);
  1188. break;
  1189. }
  1190. return 0;
  1191. }
  1192. int iwl_cmd_echo_test(struct iwl_priv *priv)
  1193. {
  1194. int ret;
  1195. struct iwl_host_cmd cmd = {
  1196. .id = REPLY_ECHO,
  1197. .len = { 0 },
  1198. .flags = CMD_SYNC,
  1199. };
  1200. ret = iwl_trans_send_cmd(trans(priv), &cmd);
  1201. if (ret)
  1202. IWL_ERR(priv, "echo testing fail: 0X%x\n", ret);
  1203. else
  1204. IWL_DEBUG_INFO(priv, "echo testing pass\n");
  1205. return ret;
  1206. }
  1207. static inline int iwl_check_stuck_queue(struct iwl_priv *priv, int txq)
  1208. {
  1209. if (iwl_trans_check_stuck_queue(trans(priv), txq)) {
  1210. int ret;
  1211. ret = iwl_force_reset(priv, IWL_FW_RESET, false);
  1212. return (ret == -EAGAIN) ? 0 : 1;
  1213. }
  1214. return 0;
  1215. }
  1216. /*
  1217. * Making watchdog tick be a quarter of timeout assure we will
  1218. * discover the queue hung between timeout and 1.25*timeout
  1219. */
  1220. #define IWL_WD_TICK(timeout) ((timeout) / 4)
  1221. /*
  1222. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  1223. * we reset the firmware. If everything is fine just rearm the timer.
  1224. */
  1225. void iwl_bg_watchdog(unsigned long data)
  1226. {
  1227. struct iwl_priv *priv = (struct iwl_priv *)data;
  1228. int cnt;
  1229. unsigned long timeout;
  1230. if (test_bit(STATUS_EXIT_PENDING, &priv->shrd->status))
  1231. return;
  1232. if (iwl_is_rfkill(priv->shrd))
  1233. return;
  1234. timeout = cfg(priv)->base_params->wd_timeout;
  1235. if (timeout == 0)
  1236. return;
  1237. /* monitor and check for stuck cmd queue */
  1238. if (iwl_check_stuck_queue(priv, priv->shrd->cmd_queue))
  1239. return;
  1240. /* monitor and check for other stuck queues */
  1241. if (iwl_is_any_associated(priv)) {
  1242. for (cnt = 0; cnt < hw_params(priv).max_txq_num; cnt++) {
  1243. /* skip as we already checked the command queue */
  1244. if (cnt == priv->shrd->cmd_queue)
  1245. continue;
  1246. if (iwl_check_stuck_queue(priv, cnt))
  1247. return;
  1248. }
  1249. }
  1250. mod_timer(&priv->watchdog, jiffies +
  1251. msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1252. }
  1253. void iwl_setup_watchdog(struct iwl_priv *priv)
  1254. {
  1255. unsigned int timeout = cfg(priv)->base_params->wd_timeout;
  1256. if (!iwlagn_mod_params.wd_disable) {
  1257. /* use system default */
  1258. if (timeout && !cfg(priv)->base_params->wd_disable)
  1259. mod_timer(&priv->watchdog,
  1260. jiffies +
  1261. msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1262. else
  1263. del_timer(&priv->watchdog);
  1264. } else {
  1265. /* module parameter overwrite default configuration */
  1266. if (timeout && iwlagn_mod_params.wd_disable == 2)
  1267. mod_timer(&priv->watchdog,
  1268. jiffies +
  1269. msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1270. else
  1271. del_timer(&priv->watchdog);
  1272. }
  1273. }
  1274. /**
  1275. * iwl_beacon_time_mask_low - mask of lower 32 bit of beacon time
  1276. * @priv -- pointer to iwl_priv data structure
  1277. * @tsf_bits -- number of bits need to shift for masking)
  1278. */
  1279. static inline u32 iwl_beacon_time_mask_low(struct iwl_priv *priv,
  1280. u16 tsf_bits)
  1281. {
  1282. return (1 << tsf_bits) - 1;
  1283. }
  1284. /**
  1285. * iwl_beacon_time_mask_high - mask of higher 32 bit of beacon time
  1286. * @priv -- pointer to iwl_priv data structure
  1287. * @tsf_bits -- number of bits need to shift for masking)
  1288. */
  1289. static inline u32 iwl_beacon_time_mask_high(struct iwl_priv *priv,
  1290. u16 tsf_bits)
  1291. {
  1292. return ((1 << (32 - tsf_bits)) - 1) << tsf_bits;
  1293. }
  1294. /*
  1295. * extended beacon time format
  1296. * time in usec will be changed into a 32-bit value in extended:internal format
  1297. * the extended part is the beacon counts
  1298. * the internal part is the time in usec within one beacon interval
  1299. */
  1300. u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
  1301. {
  1302. u32 quot;
  1303. u32 rem;
  1304. u32 interval = beacon_interval * TIME_UNIT;
  1305. if (!interval || !usec)
  1306. return 0;
  1307. quot = (usec / interval) &
  1308. (iwl_beacon_time_mask_high(priv, IWLAGN_EXT_BEACON_TIME_POS) >>
  1309. IWLAGN_EXT_BEACON_TIME_POS);
  1310. rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
  1311. IWLAGN_EXT_BEACON_TIME_POS);
  1312. return (quot << IWLAGN_EXT_BEACON_TIME_POS) + rem;
  1313. }
  1314. /* base is usually what we get from ucode with each received frame,
  1315. * the same as HW timer counter counting down
  1316. */
  1317. __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
  1318. u32 addon, u32 beacon_interval)
  1319. {
  1320. u32 base_low = base & iwl_beacon_time_mask_low(priv,
  1321. IWLAGN_EXT_BEACON_TIME_POS);
  1322. u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
  1323. IWLAGN_EXT_BEACON_TIME_POS);
  1324. u32 interval = beacon_interval * TIME_UNIT;
  1325. u32 res = (base & iwl_beacon_time_mask_high(priv,
  1326. IWLAGN_EXT_BEACON_TIME_POS)) +
  1327. (addon & iwl_beacon_time_mask_high(priv,
  1328. IWLAGN_EXT_BEACON_TIME_POS));
  1329. if (base_low > addon_low)
  1330. res += base_low - addon_low;
  1331. else if (base_low < addon_low) {
  1332. res += interval + base_low - addon_low;
  1333. res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
  1334. } else
  1335. res += (1 << IWLAGN_EXT_BEACON_TIME_POS);
  1336. return cpu_to_le32(res);
  1337. }
  1338. void iwl_set_hw_rfkill_state(struct iwl_priv *priv, bool state)
  1339. {
  1340. wiphy_rfkill_set_hw_state(priv->hw->wiphy, state);
  1341. }
  1342. void iwl_nic_config(struct iwl_priv *priv)
  1343. {
  1344. cfg(priv)->lib->nic_config(priv);
  1345. }
  1346. void iwl_free_skb(struct iwl_priv *priv, struct sk_buff *skb)
  1347. {
  1348. struct ieee80211_tx_info *info;
  1349. info = IEEE80211_SKB_CB(skb);
  1350. kmem_cache_free(priv->tx_cmd_pool, (info->driver_data[1]));
  1351. dev_kfree_skb_any(skb);
  1352. }
  1353. void iwl_stop_sw_queue(struct iwl_priv *priv, u8 ac)
  1354. {
  1355. ieee80211_stop_queue(priv->hw, ac);
  1356. }
  1357. void iwl_wake_sw_queue(struct iwl_priv *priv, u8 ac)
  1358. {
  1359. ieee80211_wake_queue(priv->hw, ac);
  1360. }