ispccdc.c 64 KB

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  1. /*
  2. * ispccdc.c
  3. *
  4. * TI OMAP3 ISP - CCDC module
  5. *
  6. * Copyright (C) 2009-2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24. * 02110-1301 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/delay.h>
  29. #include <linux/device.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/mm.h>
  32. #include <linux/sched.h>
  33. #include <linux/slab.h>
  34. #include <media/v4l2-event.h>
  35. #include "isp.h"
  36. #include "ispreg.h"
  37. #include "ispccdc.h"
  38. static struct v4l2_mbus_framefmt *
  39. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  40. unsigned int pad, enum v4l2_subdev_format_whence which);
  41. static const unsigned int ccdc_fmts[] = {
  42. V4L2_MBUS_FMT_Y8_1X8,
  43. V4L2_MBUS_FMT_Y10_1X10,
  44. V4L2_MBUS_FMT_Y12_1X12,
  45. V4L2_MBUS_FMT_SGRBG8_1X8,
  46. V4L2_MBUS_FMT_SRGGB8_1X8,
  47. V4L2_MBUS_FMT_SBGGR8_1X8,
  48. V4L2_MBUS_FMT_SGBRG8_1X8,
  49. V4L2_MBUS_FMT_SGRBG10_1X10,
  50. V4L2_MBUS_FMT_SRGGB10_1X10,
  51. V4L2_MBUS_FMT_SBGGR10_1X10,
  52. V4L2_MBUS_FMT_SGBRG10_1X10,
  53. V4L2_MBUS_FMT_SGRBG12_1X12,
  54. V4L2_MBUS_FMT_SRGGB12_1X12,
  55. V4L2_MBUS_FMT_SBGGR12_1X12,
  56. V4L2_MBUS_FMT_SGBRG12_1X12,
  57. };
  58. /*
  59. * ccdc_print_status - Print current CCDC Module register values.
  60. * @ccdc: Pointer to ISP CCDC device.
  61. *
  62. * Also prints other debug information stored in the CCDC module.
  63. */
  64. #define CCDC_PRINT_REGISTER(isp, name)\
  65. dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
  66. isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
  67. static void ccdc_print_status(struct isp_ccdc_device *ccdc)
  68. {
  69. struct isp_device *isp = to_isp_device(ccdc);
  70. dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
  71. CCDC_PRINT_REGISTER(isp, PCR);
  72. CCDC_PRINT_REGISTER(isp, SYN_MODE);
  73. CCDC_PRINT_REGISTER(isp, HD_VD_WID);
  74. CCDC_PRINT_REGISTER(isp, PIX_LINES);
  75. CCDC_PRINT_REGISTER(isp, HORZ_INFO);
  76. CCDC_PRINT_REGISTER(isp, VERT_START);
  77. CCDC_PRINT_REGISTER(isp, VERT_LINES);
  78. CCDC_PRINT_REGISTER(isp, CULLING);
  79. CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
  80. CCDC_PRINT_REGISTER(isp, SDOFST);
  81. CCDC_PRINT_REGISTER(isp, SDR_ADDR);
  82. CCDC_PRINT_REGISTER(isp, CLAMP);
  83. CCDC_PRINT_REGISTER(isp, DCSUB);
  84. CCDC_PRINT_REGISTER(isp, COLPTN);
  85. CCDC_PRINT_REGISTER(isp, BLKCMP);
  86. CCDC_PRINT_REGISTER(isp, FPC);
  87. CCDC_PRINT_REGISTER(isp, FPC_ADDR);
  88. CCDC_PRINT_REGISTER(isp, VDINT);
  89. CCDC_PRINT_REGISTER(isp, ALAW);
  90. CCDC_PRINT_REGISTER(isp, REC656IF);
  91. CCDC_PRINT_REGISTER(isp, CFG);
  92. CCDC_PRINT_REGISTER(isp, FMTCFG);
  93. CCDC_PRINT_REGISTER(isp, FMT_HORZ);
  94. CCDC_PRINT_REGISTER(isp, FMT_VERT);
  95. CCDC_PRINT_REGISTER(isp, PRGEVEN0);
  96. CCDC_PRINT_REGISTER(isp, PRGEVEN1);
  97. CCDC_PRINT_REGISTER(isp, PRGODD0);
  98. CCDC_PRINT_REGISTER(isp, PRGODD1);
  99. CCDC_PRINT_REGISTER(isp, VP_OUT);
  100. CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
  101. CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
  102. CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
  103. CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
  104. dev_dbg(isp->dev, "--------------------------------------------\n");
  105. }
  106. /*
  107. * omap3isp_ccdc_busy - Get busy state of the CCDC.
  108. * @ccdc: Pointer to ISP CCDC device.
  109. */
  110. int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
  111. {
  112. struct isp_device *isp = to_isp_device(ccdc);
  113. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
  114. ISPCCDC_PCR_BUSY;
  115. }
  116. /* -----------------------------------------------------------------------------
  117. * Lens Shading Compensation
  118. */
  119. /*
  120. * ccdc_lsc_validate_config - Check that LSC configuration is valid.
  121. * @ccdc: Pointer to ISP CCDC device.
  122. * @lsc_cfg: the LSC configuration to check.
  123. *
  124. * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
  125. */
  126. static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
  127. struct omap3isp_ccdc_lsc_config *lsc_cfg)
  128. {
  129. struct isp_device *isp = to_isp_device(ccdc);
  130. struct v4l2_mbus_framefmt *format;
  131. unsigned int paxel_width, paxel_height;
  132. unsigned int paxel_shift_x, paxel_shift_y;
  133. unsigned int min_width, min_height, min_size;
  134. unsigned int input_width, input_height;
  135. paxel_shift_x = lsc_cfg->gain_mode_m;
  136. paxel_shift_y = lsc_cfg->gain_mode_n;
  137. if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
  138. (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
  139. dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
  140. return -EINVAL;
  141. }
  142. if (lsc_cfg->offset & 3) {
  143. dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
  144. "4\n");
  145. return -EINVAL;
  146. }
  147. if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
  148. dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
  149. return -EINVAL;
  150. }
  151. format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  152. V4L2_SUBDEV_FORMAT_ACTIVE);
  153. input_width = format->width;
  154. input_height = format->height;
  155. /* Calculate minimum bytesize for validation */
  156. paxel_width = 1 << paxel_shift_x;
  157. min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
  158. >> paxel_shift_x) + 1;
  159. paxel_height = 1 << paxel_shift_y;
  160. min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
  161. >> paxel_shift_y) + 1;
  162. min_size = 4 * min_width * min_height;
  163. if (min_size > lsc_cfg->size) {
  164. dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
  165. return -EINVAL;
  166. }
  167. if (lsc_cfg->offset < (min_width * 4)) {
  168. dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
  169. return -EINVAL;
  170. }
  171. if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
  172. dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
  173. return -EINVAL;
  174. }
  175. return 0;
  176. }
  177. /*
  178. * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
  179. * @ccdc: Pointer to ISP CCDC device.
  180. */
  181. static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
  182. {
  183. isp_reg_writel(to_isp_device(ccdc), addr,
  184. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
  185. }
  186. /*
  187. * ccdc_lsc_setup_regs - Configures the lens shading compensation module
  188. * @ccdc: Pointer to ISP CCDC device.
  189. */
  190. static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
  191. struct omap3isp_ccdc_lsc_config *cfg)
  192. {
  193. struct isp_device *isp = to_isp_device(ccdc);
  194. int reg;
  195. isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
  196. ISPCCDC_LSC_TABLE_OFFSET);
  197. reg = 0;
  198. reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
  199. reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
  200. reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
  201. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
  202. reg = 0;
  203. reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
  204. reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
  205. reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
  206. reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
  207. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
  208. ISPCCDC_LSC_INITIAL);
  209. }
  210. static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
  211. {
  212. struct isp_device *isp = to_isp_device(ccdc);
  213. unsigned int wait;
  214. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  215. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  216. /* timeout 1 ms */
  217. for (wait = 0; wait < 1000; wait++) {
  218. if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
  219. IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
  220. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  221. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  222. return 0;
  223. }
  224. rmb();
  225. udelay(1);
  226. }
  227. return -ETIMEDOUT;
  228. }
  229. /*
  230. * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
  231. * @ccdc: Pointer to ISP CCDC device.
  232. * @enable: 0 Disables LSC, 1 Enables LSC.
  233. */
  234. static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
  235. {
  236. struct isp_device *isp = to_isp_device(ccdc);
  237. const struct v4l2_mbus_framefmt *format =
  238. __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  239. V4L2_SUBDEV_FORMAT_ACTIVE);
  240. if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
  241. (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
  242. (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
  243. (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
  244. return -EINVAL;
  245. if (enable)
  246. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
  247. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  248. ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
  249. if (enable) {
  250. if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
  251. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
  252. ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
  253. ccdc->lsc.state = LSC_STATE_STOPPED;
  254. dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
  255. return -ETIMEDOUT;
  256. }
  257. ccdc->lsc.state = LSC_STATE_RUNNING;
  258. } else {
  259. ccdc->lsc.state = LSC_STATE_STOPPING;
  260. }
  261. return 0;
  262. }
  263. static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
  264. {
  265. struct isp_device *isp = to_isp_device(ccdc);
  266. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
  267. ISPCCDC_LSC_BUSY;
  268. }
  269. /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
  270. * @ccdc: Pointer to ISP CCDC device
  271. * @req: New configuration request
  272. *
  273. * context: in_interrupt()
  274. */
  275. static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
  276. struct ispccdc_lsc_config_req *req)
  277. {
  278. if (!req->enable)
  279. return -EINVAL;
  280. if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
  281. dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
  282. return -EINVAL;
  283. }
  284. if (ccdc_lsc_busy(ccdc))
  285. return -EBUSY;
  286. ccdc_lsc_setup_regs(ccdc, &req->config);
  287. ccdc_lsc_program_table(ccdc, req->table);
  288. return 0;
  289. }
  290. /*
  291. * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
  292. * @ccdc: Pointer to ISP CCDC device.
  293. *
  294. * Disables LSC, and defers enablement to shadow registers update time.
  295. */
  296. static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
  297. {
  298. struct isp_device *isp = to_isp_device(ccdc);
  299. /*
  300. * From OMAP3 TRM: When this event is pending, the module
  301. * goes into transparent mode (output =input). Normal
  302. * operation can be resumed at the start of the next frame
  303. * after:
  304. * 1) Clearing this event
  305. * 2) Disabling the LSC module
  306. * 3) Enabling it
  307. */
  308. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  309. ISPCCDC_LSC_ENABLE);
  310. ccdc->lsc.state = LSC_STATE_STOPPED;
  311. }
  312. static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
  313. struct ispccdc_lsc_config_req *req)
  314. {
  315. struct isp_device *isp = to_isp_device(ccdc);
  316. if (req == NULL)
  317. return;
  318. if (req->iovm)
  319. dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
  320. req->iovm->sgt->nents, DMA_TO_DEVICE);
  321. if (req->table)
  322. omap_iommu_vfree(isp->domain, isp->dev, req->table);
  323. kfree(req);
  324. }
  325. static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
  326. struct list_head *queue)
  327. {
  328. struct ispccdc_lsc_config_req *req, *n;
  329. unsigned long flags;
  330. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  331. list_for_each_entry_safe(req, n, queue, list) {
  332. list_del(&req->list);
  333. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  334. ccdc_lsc_free_request(ccdc, req);
  335. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  336. }
  337. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  338. }
  339. static void ccdc_lsc_free_table_work(struct work_struct *work)
  340. {
  341. struct isp_ccdc_device *ccdc;
  342. struct ispccdc_lsc *lsc;
  343. lsc = container_of(work, struct ispccdc_lsc, table_work);
  344. ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
  345. ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
  346. }
  347. /*
  348. * ccdc_lsc_config - Configure the LSC module from a userspace request
  349. *
  350. * Store the request LSC configuration in the LSC engine request pointer. The
  351. * configuration will be applied to the hardware when the CCDC will be enabled,
  352. * or at the next LSC interrupt if the CCDC is already running.
  353. */
  354. static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
  355. struct omap3isp_ccdc_update_config *config)
  356. {
  357. struct isp_device *isp = to_isp_device(ccdc);
  358. struct ispccdc_lsc_config_req *req;
  359. unsigned long flags;
  360. void *table;
  361. u16 update;
  362. int ret;
  363. update = config->update &
  364. (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
  365. if (!update)
  366. return 0;
  367. if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
  368. dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
  369. "need to be supplied\n", __func__);
  370. return -EINVAL;
  371. }
  372. req = kzalloc(sizeof(*req), GFP_KERNEL);
  373. if (req == NULL)
  374. return -ENOMEM;
  375. if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
  376. if (copy_from_user(&req->config, config->lsc_cfg,
  377. sizeof(req->config))) {
  378. ret = -EFAULT;
  379. goto done;
  380. }
  381. req->enable = 1;
  382. req->table = omap_iommu_vmalloc(isp->domain, isp->dev, 0,
  383. req->config.size, IOMMU_FLAG);
  384. if (IS_ERR_VALUE(req->table)) {
  385. req->table = 0;
  386. ret = -ENOMEM;
  387. goto done;
  388. }
  389. req->iovm = omap_find_iovm_area(isp->dev, req->table);
  390. if (req->iovm == NULL) {
  391. ret = -ENOMEM;
  392. goto done;
  393. }
  394. if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
  395. req->iovm->sgt->nents, DMA_TO_DEVICE)) {
  396. ret = -ENOMEM;
  397. req->iovm = NULL;
  398. goto done;
  399. }
  400. dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
  401. req->iovm->sgt->nents, DMA_TO_DEVICE);
  402. table = omap_da_to_va(isp->dev, req->table);
  403. if (copy_from_user(table, config->lsc, req->config.size)) {
  404. ret = -EFAULT;
  405. goto done;
  406. }
  407. dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
  408. req->iovm->sgt->nents, DMA_TO_DEVICE);
  409. }
  410. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  411. if (ccdc->lsc.request) {
  412. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  413. schedule_work(&ccdc->lsc.table_work);
  414. }
  415. ccdc->lsc.request = req;
  416. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  417. ret = 0;
  418. done:
  419. if (ret < 0)
  420. ccdc_lsc_free_request(ccdc, req);
  421. return ret;
  422. }
  423. static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
  424. {
  425. unsigned long flags;
  426. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  427. if (ccdc->lsc.active) {
  428. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  429. return 1;
  430. }
  431. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  432. return 0;
  433. }
  434. static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
  435. {
  436. struct ispccdc_lsc *lsc = &ccdc->lsc;
  437. if (lsc->state != LSC_STATE_STOPPED)
  438. return -EINVAL;
  439. if (lsc->active) {
  440. list_add_tail(&lsc->active->list, &lsc->free_queue);
  441. lsc->active = NULL;
  442. }
  443. if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
  444. omap3isp_sbl_disable(to_isp_device(ccdc),
  445. OMAP3_ISP_SBL_CCDC_LSC_READ);
  446. list_add_tail(&lsc->request->list, &lsc->free_queue);
  447. lsc->request = NULL;
  448. goto done;
  449. }
  450. lsc->active = lsc->request;
  451. lsc->request = NULL;
  452. __ccdc_lsc_enable(ccdc, 1);
  453. done:
  454. if (!list_empty(&lsc->free_queue))
  455. schedule_work(&lsc->table_work);
  456. return 0;
  457. }
  458. /* -----------------------------------------------------------------------------
  459. * Parameters configuration
  460. */
  461. /*
  462. * ccdc_configure_clamp - Configure optical-black or digital clamping
  463. * @ccdc: Pointer to ISP CCDC device.
  464. *
  465. * The CCDC performs either optical-black or digital clamp. Configure and enable
  466. * the selected clamp method.
  467. */
  468. static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
  469. {
  470. struct isp_device *isp = to_isp_device(ccdc);
  471. u32 clamp;
  472. if (ccdc->obclamp) {
  473. clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
  474. clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
  475. clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
  476. clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
  477. isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
  478. } else {
  479. isp_reg_writel(isp, ccdc->clamp.dcsubval,
  480. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
  481. }
  482. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
  483. ISPCCDC_CLAMP_CLAMPEN,
  484. ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
  485. }
  486. /*
  487. * ccdc_configure_fpc - Configure Faulty Pixel Correction
  488. * @ccdc: Pointer to ISP CCDC device.
  489. */
  490. static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
  491. {
  492. struct isp_device *isp = to_isp_device(ccdc);
  493. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
  494. if (!ccdc->fpc_en)
  495. return;
  496. isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
  497. ISPCCDC_FPC_ADDR);
  498. /* The FPNUM field must be set before enabling FPC. */
  499. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
  500. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  501. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
  502. ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  503. }
  504. /*
  505. * ccdc_configure_black_comp - Configure Black Level Compensation.
  506. * @ccdc: Pointer to ISP CCDC device.
  507. */
  508. static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
  509. {
  510. struct isp_device *isp = to_isp_device(ccdc);
  511. u32 blcomp;
  512. blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
  513. blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
  514. blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
  515. blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
  516. isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
  517. }
  518. /*
  519. * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
  520. * @ccdc: Pointer to ISP CCDC device.
  521. */
  522. static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
  523. {
  524. struct isp_device *isp = to_isp_device(ccdc);
  525. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
  526. ISPCCDC_SYN_MODE_LPF,
  527. ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
  528. }
  529. /*
  530. * ccdc_configure_alaw - Configure A-law compression.
  531. * @ccdc: Pointer to ISP CCDC device.
  532. */
  533. static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
  534. {
  535. struct isp_device *isp = to_isp_device(ccdc);
  536. u32 alaw = 0;
  537. switch (ccdc->syncif.datsz) {
  538. case 8:
  539. return;
  540. case 10:
  541. alaw = ISPCCDC_ALAW_GWDI_9_0;
  542. break;
  543. case 11:
  544. alaw = ISPCCDC_ALAW_GWDI_10_1;
  545. break;
  546. case 12:
  547. alaw = ISPCCDC_ALAW_GWDI_11_2;
  548. break;
  549. case 13:
  550. alaw = ISPCCDC_ALAW_GWDI_12_3;
  551. break;
  552. }
  553. if (ccdc->alaw)
  554. alaw |= ISPCCDC_ALAW_CCDTBL;
  555. isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
  556. }
  557. /*
  558. * ccdc_config_imgattr - Configure sensor image specific attributes.
  559. * @ccdc: Pointer to ISP CCDC device.
  560. * @colptn: Color pattern of the sensor.
  561. */
  562. static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
  563. {
  564. struct isp_device *isp = to_isp_device(ccdc);
  565. isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
  566. }
  567. /*
  568. * ccdc_config - Set CCDC configuration from userspace
  569. * @ccdc: Pointer to ISP CCDC device.
  570. * @userspace_add: Structure containing CCDC configuration sent from userspace.
  571. *
  572. * Returns 0 if successful, -EINVAL if the pointer to the configuration
  573. * structure is null, or the copy_from_user function fails to copy user space
  574. * memory to kernel space memory.
  575. */
  576. static int ccdc_config(struct isp_ccdc_device *ccdc,
  577. struct omap3isp_ccdc_update_config *ccdc_struct)
  578. {
  579. struct isp_device *isp = to_isp_device(ccdc);
  580. unsigned long flags;
  581. spin_lock_irqsave(&ccdc->lock, flags);
  582. ccdc->shadow_update = 1;
  583. spin_unlock_irqrestore(&ccdc->lock, flags);
  584. if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
  585. ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
  586. ccdc->update |= OMAP3ISP_CCDC_ALAW;
  587. }
  588. if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
  589. ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
  590. ccdc->update |= OMAP3ISP_CCDC_LPF;
  591. }
  592. if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
  593. if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
  594. sizeof(ccdc->clamp))) {
  595. ccdc->shadow_update = 0;
  596. return -EFAULT;
  597. }
  598. ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
  599. ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
  600. }
  601. if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
  602. if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
  603. sizeof(ccdc->blcomp))) {
  604. ccdc->shadow_update = 0;
  605. return -EFAULT;
  606. }
  607. ccdc->update |= OMAP3ISP_CCDC_BCOMP;
  608. }
  609. ccdc->shadow_update = 0;
  610. if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
  611. u32 table_old = 0;
  612. u32 table_new;
  613. u32 size;
  614. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  615. return -EBUSY;
  616. ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
  617. if (ccdc->fpc_en) {
  618. if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
  619. sizeof(ccdc->fpc)))
  620. return -EFAULT;
  621. /*
  622. * table_new must be 64-bytes aligned, but it's
  623. * already done by omap_iommu_vmalloc().
  624. */
  625. size = ccdc->fpc.fpnum * 4;
  626. table_new = omap_iommu_vmalloc(isp->domain, isp->dev,
  627. 0, size, IOMMU_FLAG);
  628. if (IS_ERR_VALUE(table_new))
  629. return -ENOMEM;
  630. if (copy_from_user(omap_da_to_va(isp->dev, table_new),
  631. (__force void __user *)
  632. ccdc->fpc.fpcaddr, size)) {
  633. omap_iommu_vfree(isp->domain, isp->dev,
  634. table_new);
  635. return -EFAULT;
  636. }
  637. table_old = ccdc->fpc.fpcaddr;
  638. ccdc->fpc.fpcaddr = table_new;
  639. }
  640. ccdc_configure_fpc(ccdc);
  641. if (table_old != 0)
  642. omap_iommu_vfree(isp->domain, isp->dev, table_old);
  643. }
  644. return ccdc_lsc_config(ccdc, ccdc_struct);
  645. }
  646. static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
  647. {
  648. if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
  649. ccdc_configure_alaw(ccdc);
  650. ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
  651. }
  652. if (ccdc->update & OMAP3ISP_CCDC_LPF) {
  653. ccdc_configure_lpf(ccdc);
  654. ccdc->update &= ~OMAP3ISP_CCDC_LPF;
  655. }
  656. if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
  657. ccdc_configure_clamp(ccdc);
  658. ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
  659. }
  660. if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
  661. ccdc_configure_black_comp(ccdc);
  662. ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
  663. }
  664. }
  665. /*
  666. * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
  667. * @dev: Pointer to ISP device
  668. */
  669. void omap3isp_ccdc_restore_context(struct isp_device *isp)
  670. {
  671. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  672. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
  673. ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
  674. | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
  675. ccdc_apply_controls(ccdc);
  676. ccdc_configure_fpc(ccdc);
  677. }
  678. /* -----------------------------------------------------------------------------
  679. * Format- and pipeline-related configuration helpers
  680. */
  681. /*
  682. * ccdc_config_vp - Configure the Video Port.
  683. * @ccdc: Pointer to ISP CCDC device.
  684. */
  685. static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
  686. {
  687. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  688. struct isp_device *isp = to_isp_device(ccdc);
  689. unsigned long l3_ick = pipe->l3_ick;
  690. unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
  691. unsigned int div = 0;
  692. u32 fmtcfg_vp;
  693. fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
  694. & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
  695. switch (ccdc->syncif.datsz) {
  696. case 8:
  697. case 10:
  698. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
  699. break;
  700. case 11:
  701. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
  702. break;
  703. case 12:
  704. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
  705. break;
  706. case 13:
  707. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
  708. break;
  709. };
  710. if (pipe->input)
  711. div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
  712. else if (ccdc->vpcfg.pixelclk)
  713. div = l3_ick / ccdc->vpcfg.pixelclk;
  714. div = clamp(div, 2U, max_div);
  715. fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
  716. isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
  717. }
  718. /*
  719. * ccdc_enable_vp - Enable Video Port.
  720. * @ccdc: Pointer to ISP CCDC device.
  721. * @enable: 0 Disables VP, 1 Enables VP
  722. *
  723. * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
  724. */
  725. static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
  726. {
  727. struct isp_device *isp = to_isp_device(ccdc);
  728. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
  729. ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
  730. }
  731. /*
  732. * ccdc_config_outlineoffset - Configure memory saving output line offset
  733. * @ccdc: Pointer to ISP CCDC device.
  734. * @offset: Address offset to start a new line. Must be twice the
  735. * Output width and aligned on 32 byte boundary
  736. * @oddeven: Specifies the odd/even line pattern to be chosen to store the
  737. * output.
  738. * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
  739. *
  740. * - Configures the output line offset when stored in memory
  741. * - Sets the odd/even line pattern to store the output
  742. * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
  743. * - Configures the number of even and odd line fields in case of rearranging
  744. * the lines.
  745. */
  746. static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
  747. u32 offset, u8 oddeven, u8 numlines)
  748. {
  749. struct isp_device *isp = to_isp_device(ccdc);
  750. isp_reg_writel(isp, offset & 0xffff,
  751. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
  752. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  753. ISPCCDC_SDOFST_FINV);
  754. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  755. ISPCCDC_SDOFST_FOFST_4L);
  756. switch (oddeven) {
  757. case EVENEVEN:
  758. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  759. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
  760. break;
  761. case ODDEVEN:
  762. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  763. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
  764. break;
  765. case EVENODD:
  766. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  767. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
  768. break;
  769. case ODDODD:
  770. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  771. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
  772. break;
  773. default:
  774. break;
  775. }
  776. }
  777. /*
  778. * ccdc_set_outaddr - Set memory address to save output image
  779. * @ccdc: Pointer to ISP CCDC device.
  780. * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
  781. *
  782. * Sets the memory address where the output will be saved.
  783. */
  784. static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
  785. {
  786. struct isp_device *isp = to_isp_device(ccdc);
  787. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
  788. }
  789. /*
  790. * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
  791. * @ccdc: Pointer to ISP CCDC device.
  792. * @max_rate: Maximum calculated data rate.
  793. *
  794. * Returns in *max_rate less value between calculated and passed
  795. */
  796. void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
  797. unsigned int *max_rate)
  798. {
  799. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  800. unsigned int rate;
  801. if (pipe == NULL)
  802. return;
  803. /*
  804. * TRM says that for parallel sensors the maximum data rate
  805. * should be 90% form L3/2 clock, otherwise just L3/2.
  806. */
  807. if (ccdc->input == CCDC_INPUT_PARALLEL)
  808. rate = pipe->l3_ick / 2 * 9 / 10;
  809. else
  810. rate = pipe->l3_ick / 2;
  811. *max_rate = min(*max_rate, rate);
  812. }
  813. /*
  814. * ccdc_config_sync_if - Set CCDC sync interface configuration
  815. * @ccdc: Pointer to ISP CCDC device.
  816. * @syncif: Structure containing the sync parameters like field state, CCDC in
  817. * master/slave mode, raw/yuv data, polarity of data, field, hs, vs
  818. * signals.
  819. */
  820. static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
  821. struct ispccdc_syncif *syncif)
  822. {
  823. struct isp_device *isp = to_isp_device(ccdc);
  824. u32 syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC,
  825. ISPCCDC_SYN_MODE);
  826. syn_mode |= ISPCCDC_SYN_MODE_VDHDEN;
  827. if (syncif->fldstat)
  828. syn_mode |= ISPCCDC_SYN_MODE_FLDSTAT;
  829. else
  830. syn_mode &= ~ISPCCDC_SYN_MODE_FLDSTAT;
  831. syn_mode &= ~ISPCCDC_SYN_MODE_DATSIZ_MASK;
  832. switch (syncif->datsz) {
  833. case 8:
  834. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
  835. break;
  836. case 10:
  837. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
  838. break;
  839. case 11:
  840. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
  841. break;
  842. case 12:
  843. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
  844. break;
  845. };
  846. if (syncif->fldmode)
  847. syn_mode |= ISPCCDC_SYN_MODE_FLDMODE;
  848. else
  849. syn_mode &= ~ISPCCDC_SYN_MODE_FLDMODE;
  850. if (syncif->datapol)
  851. syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
  852. else
  853. syn_mode &= ~ISPCCDC_SYN_MODE_DATAPOL;
  854. if (syncif->fldpol)
  855. syn_mode |= ISPCCDC_SYN_MODE_FLDPOL;
  856. else
  857. syn_mode &= ~ISPCCDC_SYN_MODE_FLDPOL;
  858. if (syncif->hdpol)
  859. syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
  860. else
  861. syn_mode &= ~ISPCCDC_SYN_MODE_HDPOL;
  862. if (syncif->vdpol)
  863. syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
  864. else
  865. syn_mode &= ~ISPCCDC_SYN_MODE_VDPOL;
  866. if (syncif->ccdc_mastermode) {
  867. syn_mode |= ISPCCDC_SYN_MODE_FLDOUT | ISPCCDC_SYN_MODE_VDHDOUT;
  868. isp_reg_writel(isp,
  869. syncif->hs_width << ISPCCDC_HD_VD_WID_HDW_SHIFT
  870. | syncif->vs_width << ISPCCDC_HD_VD_WID_VDW_SHIFT,
  871. OMAP3_ISP_IOMEM_CCDC,
  872. ISPCCDC_HD_VD_WID);
  873. isp_reg_writel(isp,
  874. syncif->ppln << ISPCCDC_PIX_LINES_PPLN_SHIFT
  875. | syncif->hlprf << ISPCCDC_PIX_LINES_HLPRF_SHIFT,
  876. OMAP3_ISP_IOMEM_CCDC,
  877. ISPCCDC_PIX_LINES);
  878. } else
  879. syn_mode &= ~(ISPCCDC_SYN_MODE_FLDOUT |
  880. ISPCCDC_SYN_MODE_VDHDOUT);
  881. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  882. if (!syncif->bt_r656_en)
  883. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
  884. ISPCCDC_REC656IF_R656ON);
  885. }
  886. /* CCDC formats descriptions */
  887. static const u32 ccdc_sgrbg_pattern =
  888. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  889. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  890. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  891. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  892. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  893. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  894. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  895. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  896. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  897. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  898. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  899. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  900. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  901. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  902. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  903. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  904. static const u32 ccdc_srggb_pattern =
  905. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  906. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  907. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  908. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  909. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  910. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  911. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  912. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  913. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  914. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  915. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  916. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  917. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  918. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  919. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  920. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  921. static const u32 ccdc_sbggr_pattern =
  922. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  923. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  924. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  925. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  926. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  927. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  928. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  929. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  930. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  931. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  932. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  933. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  934. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  935. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  936. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  937. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  938. static const u32 ccdc_sgbrg_pattern =
  939. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  940. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  941. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  942. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  943. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  944. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  945. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  946. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  947. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  948. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  949. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  950. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  951. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  952. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  953. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  954. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  955. static void ccdc_configure(struct isp_ccdc_device *ccdc)
  956. {
  957. struct isp_device *isp = to_isp_device(ccdc);
  958. struct isp_parallel_platform_data *pdata = NULL;
  959. struct v4l2_subdev *sensor;
  960. struct v4l2_mbus_framefmt *format;
  961. const struct isp_format_info *fmt_info;
  962. struct v4l2_subdev_format fmt_src;
  963. unsigned int depth_out;
  964. unsigned int depth_in = 0;
  965. struct media_pad *pad;
  966. unsigned long flags;
  967. unsigned int shift;
  968. u32 syn_mode;
  969. u32 ccdc_pattern;
  970. pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
  971. sensor = media_entity_to_v4l2_subdev(pad->entity);
  972. if (ccdc->input == CCDC_INPUT_PARALLEL)
  973. pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
  974. ->bus.parallel;
  975. /* Compute shift value for lane shifter to configure the bridge. */
  976. fmt_src.pad = pad->index;
  977. fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  978. if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
  979. fmt_info = omap3isp_video_format_info(fmt_src.format.code);
  980. depth_in = fmt_info->bpp;
  981. }
  982. fmt_info = omap3isp_video_format_info
  983. (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
  984. depth_out = fmt_info->bpp;
  985. shift = depth_in - depth_out;
  986. omap3isp_configure_bridge(isp, ccdc->input, pdata, shift);
  987. ccdc->syncif.datsz = depth_out;
  988. ccdc->syncif.hdpol = pdata ? pdata->hs_pol : 0;
  989. ccdc->syncif.vdpol = pdata ? pdata->vs_pol : 0;
  990. ccdc_config_sync_if(ccdc, &ccdc->syncif);
  991. /* CCDC_PAD_SINK */
  992. format = &ccdc->formats[CCDC_PAD_SINK];
  993. syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  994. /* Use the raw, unprocessed data when writing to memory. The H3A and
  995. * histogram modules are still fed with lens shading corrected data.
  996. */
  997. syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
  998. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  999. syn_mode |= ISPCCDC_SYN_MODE_WEN;
  1000. else
  1001. syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
  1002. if (ccdc->output & CCDC_OUTPUT_RESIZER)
  1003. syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
  1004. else
  1005. syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
  1006. /* Use PACK8 mode for 1byte per pixel formats. */
  1007. if (omap3isp_video_format_info(format->code)->bpp <= 8)
  1008. syn_mode |= ISPCCDC_SYN_MODE_PACK8;
  1009. else
  1010. syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
  1011. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  1012. /* Mosaic filter */
  1013. switch (format->code) {
  1014. case V4L2_MBUS_FMT_SRGGB10_1X10:
  1015. case V4L2_MBUS_FMT_SRGGB12_1X12:
  1016. ccdc_pattern = ccdc_srggb_pattern;
  1017. break;
  1018. case V4L2_MBUS_FMT_SBGGR10_1X10:
  1019. case V4L2_MBUS_FMT_SBGGR12_1X12:
  1020. ccdc_pattern = ccdc_sbggr_pattern;
  1021. break;
  1022. case V4L2_MBUS_FMT_SGBRG10_1X10:
  1023. case V4L2_MBUS_FMT_SGBRG12_1X12:
  1024. ccdc_pattern = ccdc_sgbrg_pattern;
  1025. break;
  1026. default:
  1027. /* Use GRBG */
  1028. ccdc_pattern = ccdc_sgrbg_pattern;
  1029. break;
  1030. }
  1031. ccdc_config_imgattr(ccdc, ccdc_pattern);
  1032. /* Generate VD0 on the last line of the image and VD1 on the
  1033. * 2/3 height line.
  1034. */
  1035. isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
  1036. ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
  1037. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
  1038. /* CCDC_PAD_SOURCE_OF */
  1039. format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
  1040. isp_reg_writel(isp, (0 << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
  1041. ((format->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
  1042. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
  1043. isp_reg_writel(isp, 0 << ISPCCDC_VERT_START_SLV0_SHIFT,
  1044. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
  1045. isp_reg_writel(isp, (format->height - 1)
  1046. << ISPCCDC_VERT_LINES_NLV_SHIFT,
  1047. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
  1048. ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
  1049. /* CCDC_PAD_SOURCE_VP */
  1050. format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
  1051. isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
  1052. (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
  1053. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
  1054. isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
  1055. ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
  1056. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
  1057. isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
  1058. (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
  1059. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
  1060. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1061. if (ccdc->lsc.request == NULL)
  1062. goto unlock;
  1063. WARN_ON(ccdc->lsc.active);
  1064. /* Get last good LSC configuration. If it is not supported for
  1065. * the current active resolution discard it.
  1066. */
  1067. if (ccdc->lsc.active == NULL &&
  1068. __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
  1069. ccdc->lsc.active = ccdc->lsc.request;
  1070. } else {
  1071. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  1072. schedule_work(&ccdc->lsc.table_work);
  1073. }
  1074. ccdc->lsc.request = NULL;
  1075. unlock:
  1076. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1077. ccdc_apply_controls(ccdc);
  1078. }
  1079. static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
  1080. {
  1081. struct isp_device *isp = to_isp_device(ccdc);
  1082. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
  1083. ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
  1084. }
  1085. static int ccdc_disable(struct isp_ccdc_device *ccdc)
  1086. {
  1087. unsigned long flags;
  1088. int ret = 0;
  1089. spin_lock_irqsave(&ccdc->lock, flags);
  1090. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
  1091. ccdc->stopping = CCDC_STOP_REQUEST;
  1092. spin_unlock_irqrestore(&ccdc->lock, flags);
  1093. ret = wait_event_timeout(ccdc->wait,
  1094. ccdc->stopping == CCDC_STOP_FINISHED,
  1095. msecs_to_jiffies(2000));
  1096. if (ret == 0) {
  1097. ret = -ETIMEDOUT;
  1098. dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
  1099. }
  1100. omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
  1101. mutex_lock(&ccdc->ioctl_lock);
  1102. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1103. ccdc->lsc.request = ccdc->lsc.active;
  1104. ccdc->lsc.active = NULL;
  1105. cancel_work_sync(&ccdc->lsc.table_work);
  1106. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1107. mutex_unlock(&ccdc->ioctl_lock);
  1108. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1109. return ret > 0 ? 0 : ret;
  1110. }
  1111. static void ccdc_enable(struct isp_ccdc_device *ccdc)
  1112. {
  1113. if (ccdc_lsc_is_configured(ccdc))
  1114. __ccdc_lsc_enable(ccdc, 1);
  1115. __ccdc_enable(ccdc, 1);
  1116. }
  1117. /* -----------------------------------------------------------------------------
  1118. * Interrupt handling
  1119. */
  1120. /*
  1121. * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
  1122. * @ccdc: Pointer to ISP CCDC device.
  1123. *
  1124. * Returns zero if the CCDC is idle and the image has been written to
  1125. * memory, too.
  1126. */
  1127. static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
  1128. {
  1129. struct isp_device *isp = to_isp_device(ccdc);
  1130. return omap3isp_ccdc_busy(ccdc)
  1131. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
  1132. ISPSBL_CCDC_WR_0_DATA_READY)
  1133. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
  1134. ISPSBL_CCDC_WR_0_DATA_READY)
  1135. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
  1136. ISPSBL_CCDC_WR_0_DATA_READY)
  1137. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
  1138. ISPSBL_CCDC_WR_0_DATA_READY);
  1139. }
  1140. /*
  1141. * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
  1142. * @ccdc: Pointer to ISP CCDC device.
  1143. * @max_wait: Max retry count in us for wait for idle/busy transition.
  1144. */
  1145. static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
  1146. unsigned int max_wait)
  1147. {
  1148. unsigned int wait = 0;
  1149. if (max_wait == 0)
  1150. max_wait = 10000; /* 10 ms */
  1151. for (wait = 0; wait <= max_wait; wait++) {
  1152. if (!ccdc_sbl_busy(ccdc))
  1153. return 0;
  1154. rmb();
  1155. udelay(1);
  1156. }
  1157. return -EBUSY;
  1158. }
  1159. /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
  1160. * @ccdc: Pointer to ISP CCDC device.
  1161. * @event: Pointing which event trigger handler
  1162. *
  1163. * Return 1 when the event and stopping request combination is satisfied,
  1164. * zero otherwise.
  1165. */
  1166. static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
  1167. {
  1168. int rval = 0;
  1169. switch ((ccdc->stopping & 3) | event) {
  1170. case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
  1171. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1172. __ccdc_lsc_enable(ccdc, 0);
  1173. __ccdc_enable(ccdc, 0);
  1174. ccdc->stopping = CCDC_STOP_EXECUTED;
  1175. return 1;
  1176. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
  1177. ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
  1178. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1179. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1180. rval = 1;
  1181. break;
  1182. case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
  1183. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1184. rval = 1;
  1185. break;
  1186. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
  1187. return 1;
  1188. }
  1189. if (ccdc->stopping == CCDC_STOP_FINISHED) {
  1190. wake_up(&ccdc->wait);
  1191. rval = 1;
  1192. }
  1193. return rval;
  1194. }
  1195. static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
  1196. {
  1197. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1198. struct video_device *vdev = ccdc->subdev.devnode;
  1199. struct v4l2_event event;
  1200. memset(&event, 0, sizeof(event));
  1201. event.type = V4L2_EVENT_FRAME_SYNC;
  1202. event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
  1203. v4l2_event_queue(vdev, &event);
  1204. }
  1205. /*
  1206. * ccdc_lsc_isr - Handle LSC events
  1207. * @ccdc: Pointer to ISP CCDC device.
  1208. * @events: LSC events
  1209. */
  1210. static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1211. {
  1212. unsigned long flags;
  1213. if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
  1214. struct isp_pipeline *pipe =
  1215. to_isp_pipeline(&ccdc->subdev.entity);
  1216. ccdc_lsc_error_handler(ccdc);
  1217. pipe->error = true;
  1218. dev_dbg(to_device(ccdc), "lsc prefetch error\n");
  1219. }
  1220. if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
  1221. return;
  1222. /* LSC_DONE interrupt occur, there are two cases
  1223. * 1. stopping for reconfiguration
  1224. * 2. stopping because of STREAM OFF command
  1225. */
  1226. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1227. if (ccdc->lsc.state == LSC_STATE_STOPPING)
  1228. ccdc->lsc.state = LSC_STATE_STOPPED;
  1229. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
  1230. goto done;
  1231. if (ccdc->lsc.state != LSC_STATE_RECONFIG)
  1232. goto done;
  1233. /* LSC is in STOPPING state, change to the new state */
  1234. ccdc->lsc.state = LSC_STATE_STOPPED;
  1235. /* This is an exception. Start of frame and LSC_DONE interrupt
  1236. * have been received on the same time. Skip this event and wait
  1237. * for better times.
  1238. */
  1239. if (events & IRQ0STATUS_HS_VS_IRQ)
  1240. goto done;
  1241. /* The LSC engine is stopped at this point. Enable it if there's a
  1242. * pending request.
  1243. */
  1244. if (ccdc->lsc.request == NULL)
  1245. goto done;
  1246. ccdc_lsc_enable(ccdc);
  1247. done:
  1248. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1249. }
  1250. static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
  1251. {
  1252. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1253. struct isp_device *isp = to_isp_device(ccdc);
  1254. struct isp_buffer *buffer;
  1255. int restart = 0;
  1256. /* The CCDC generates VD0 interrupts even when disabled (the datasheet
  1257. * doesn't explicitly state if that's supposed to happen or not, so it
  1258. * can be considered as a hardware bug or as a feature, but we have to
  1259. * deal with it anyway). Disabling the CCDC when no buffer is available
  1260. * would thus not be enough, we need to handle the situation explicitly.
  1261. */
  1262. if (list_empty(&ccdc->video_out.dmaqueue))
  1263. goto done;
  1264. /* We're in continuous mode, and memory writes were disabled due to a
  1265. * buffer underrun. Reenable them now that we have a buffer. The buffer
  1266. * address has been set in ccdc_video_queue.
  1267. */
  1268. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
  1269. restart = 1;
  1270. ccdc->underrun = 0;
  1271. goto done;
  1272. }
  1273. if (ccdc_sbl_wait_idle(ccdc, 1000)) {
  1274. dev_info(isp->dev, "CCDC won't become idle!\n");
  1275. goto done;
  1276. }
  1277. buffer = omap3isp_video_buffer_next(&ccdc->video_out);
  1278. if (buffer != NULL) {
  1279. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1280. restart = 1;
  1281. }
  1282. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  1283. if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1284. isp_pipeline_ready(pipe))
  1285. omap3isp_pipeline_set_stream(pipe,
  1286. ISP_PIPELINE_STREAM_SINGLESHOT);
  1287. done:
  1288. return restart;
  1289. }
  1290. /*
  1291. * ccdc_vd0_isr - Handle VD0 event
  1292. * @ccdc: Pointer to ISP CCDC device.
  1293. *
  1294. * Executes LSC deferred enablement before next frame starts.
  1295. */
  1296. static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
  1297. {
  1298. unsigned long flags;
  1299. int restart = 0;
  1300. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1301. restart = ccdc_isr_buffer(ccdc);
  1302. spin_lock_irqsave(&ccdc->lock, flags);
  1303. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
  1304. spin_unlock_irqrestore(&ccdc->lock, flags);
  1305. return;
  1306. }
  1307. if (!ccdc->shadow_update)
  1308. ccdc_apply_controls(ccdc);
  1309. spin_unlock_irqrestore(&ccdc->lock, flags);
  1310. if (restart)
  1311. ccdc_enable(ccdc);
  1312. }
  1313. /*
  1314. * ccdc_vd1_isr - Handle VD1 event
  1315. * @ccdc: Pointer to ISP CCDC device.
  1316. */
  1317. static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
  1318. {
  1319. unsigned long flags;
  1320. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1321. /*
  1322. * Depending on the CCDC pipeline state, CCDC stopping should be
  1323. * handled differently. In SINGLESHOT we emulate an internal CCDC
  1324. * stopping because the CCDC hw works only in continuous mode.
  1325. * When CONTINUOUS pipeline state is used and the CCDC writes it's
  1326. * data to memory the CCDC and LSC are stopped immediately but
  1327. * without change the CCDC stopping state machine. The CCDC
  1328. * stopping state machine should be used only when user request
  1329. * for stopping is received (SINGLESHOT is an exeption).
  1330. */
  1331. switch (ccdc->state) {
  1332. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1333. ccdc->stopping = CCDC_STOP_REQUEST;
  1334. break;
  1335. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1336. if (ccdc->output & CCDC_OUTPUT_MEMORY) {
  1337. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1338. __ccdc_lsc_enable(ccdc, 0);
  1339. __ccdc_enable(ccdc, 0);
  1340. }
  1341. break;
  1342. case ISP_PIPELINE_STREAM_STOPPED:
  1343. break;
  1344. }
  1345. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
  1346. goto done;
  1347. if (ccdc->lsc.request == NULL)
  1348. goto done;
  1349. /*
  1350. * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
  1351. * do the appropriate changes in registers
  1352. */
  1353. if (ccdc->lsc.state == LSC_STATE_RUNNING) {
  1354. __ccdc_lsc_enable(ccdc, 0);
  1355. ccdc->lsc.state = LSC_STATE_RECONFIG;
  1356. goto done;
  1357. }
  1358. /* LSC has been in STOPPED state, enable it */
  1359. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1360. ccdc_lsc_enable(ccdc);
  1361. done:
  1362. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1363. }
  1364. /*
  1365. * omap3isp_ccdc_isr - Configure CCDC during interframe time.
  1366. * @ccdc: Pointer to ISP CCDC device.
  1367. * @events: CCDC events
  1368. */
  1369. int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1370. {
  1371. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
  1372. return 0;
  1373. if (events & IRQ0STATUS_CCDC_VD1_IRQ)
  1374. ccdc_vd1_isr(ccdc);
  1375. ccdc_lsc_isr(ccdc, events);
  1376. if (events & IRQ0STATUS_CCDC_VD0_IRQ)
  1377. ccdc_vd0_isr(ccdc);
  1378. if (events & IRQ0STATUS_HS_VS_IRQ)
  1379. ccdc_hs_vs_isr(ccdc);
  1380. return 0;
  1381. }
  1382. /* -----------------------------------------------------------------------------
  1383. * ISP video operations
  1384. */
  1385. static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
  1386. {
  1387. struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
  1388. if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
  1389. return -ENODEV;
  1390. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1391. /* We now have a buffer queued on the output, restart the pipeline
  1392. * on the next CCDC interrupt if running in continuous mode (or when
  1393. * starting the stream).
  1394. */
  1395. ccdc->underrun = 1;
  1396. return 0;
  1397. }
  1398. static const struct isp_video_operations ccdc_video_ops = {
  1399. .queue = ccdc_video_queue,
  1400. };
  1401. /* -----------------------------------------------------------------------------
  1402. * V4L2 subdev operations
  1403. */
  1404. /*
  1405. * ccdc_ioctl - CCDC module private ioctl's
  1406. * @sd: ISP CCDC V4L2 subdevice
  1407. * @cmd: ioctl command
  1408. * @arg: ioctl argument
  1409. *
  1410. * Return 0 on success or a negative error code otherwise.
  1411. */
  1412. static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  1413. {
  1414. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1415. int ret;
  1416. switch (cmd) {
  1417. case VIDIOC_OMAP3ISP_CCDC_CFG:
  1418. mutex_lock(&ccdc->ioctl_lock);
  1419. ret = ccdc_config(ccdc, arg);
  1420. mutex_unlock(&ccdc->ioctl_lock);
  1421. break;
  1422. default:
  1423. return -ENOIOCTLCMD;
  1424. }
  1425. return ret;
  1426. }
  1427. static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1428. struct v4l2_event_subscription *sub)
  1429. {
  1430. if (sub->type != V4L2_EVENT_FRAME_SYNC)
  1431. return -EINVAL;
  1432. /* line number is zero at frame start */
  1433. if (sub->id != 0)
  1434. return -EINVAL;
  1435. return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS);
  1436. }
  1437. static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1438. struct v4l2_event_subscription *sub)
  1439. {
  1440. return v4l2_event_unsubscribe(fh, sub);
  1441. }
  1442. /*
  1443. * ccdc_set_stream - Enable/Disable streaming on the CCDC module
  1444. * @sd: ISP CCDC V4L2 subdevice
  1445. * @enable: Enable/disable stream
  1446. *
  1447. * When writing to memory, the CCDC hardware can't be enabled without a memory
  1448. * buffer to write to. As the s_stream operation is called in response to a
  1449. * STREAMON call without any buffer queued yet, just update the enabled field
  1450. * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
  1451. *
  1452. * When not writing to memory enable the CCDC immediately.
  1453. */
  1454. static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
  1455. {
  1456. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1457. struct isp_device *isp = to_isp_device(ccdc);
  1458. int ret = 0;
  1459. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
  1460. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1461. return 0;
  1462. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1463. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1464. ISPCCDC_CFG_VDLC);
  1465. ccdc_configure(ccdc);
  1466. /* TODO: Don't configure the video port if all of its output
  1467. * links are inactive.
  1468. */
  1469. ccdc_config_vp(ccdc);
  1470. ccdc_enable_vp(ccdc, 1);
  1471. ccdc_print_status(ccdc);
  1472. }
  1473. switch (enable) {
  1474. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1475. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1476. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1477. if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
  1478. ccdc_enable(ccdc);
  1479. ccdc->underrun = 0;
  1480. break;
  1481. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1482. if (ccdc->output & CCDC_OUTPUT_MEMORY &&
  1483. ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
  1484. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1485. ccdc_enable(ccdc);
  1486. break;
  1487. case ISP_PIPELINE_STREAM_STOPPED:
  1488. ret = ccdc_disable(ccdc);
  1489. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1490. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1491. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1492. ccdc->underrun = 0;
  1493. break;
  1494. }
  1495. ccdc->state = enable;
  1496. return ret;
  1497. }
  1498. static struct v4l2_mbus_framefmt *
  1499. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1500. unsigned int pad, enum v4l2_subdev_format_whence which)
  1501. {
  1502. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1503. return v4l2_subdev_get_try_format(fh, pad);
  1504. else
  1505. return &ccdc->formats[pad];
  1506. }
  1507. /*
  1508. * ccdc_try_format - Try video format on a pad
  1509. * @ccdc: ISP CCDC device
  1510. * @fh : V4L2 subdev file handle
  1511. * @pad: Pad number
  1512. * @fmt: Format
  1513. */
  1514. static void
  1515. ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1516. unsigned int pad, struct v4l2_mbus_framefmt *fmt,
  1517. enum v4l2_subdev_format_whence which)
  1518. {
  1519. struct v4l2_mbus_framefmt *format;
  1520. const struct isp_format_info *info;
  1521. unsigned int width = fmt->width;
  1522. unsigned int height = fmt->height;
  1523. unsigned int i;
  1524. switch (pad) {
  1525. case CCDC_PAD_SINK:
  1526. /* TODO: If the CCDC output formatter pad is connected directly
  1527. * to the resizer, only YUV formats can be used.
  1528. */
  1529. for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
  1530. if (fmt->code == ccdc_fmts[i])
  1531. break;
  1532. }
  1533. /* If not found, use SGRBG10 as default */
  1534. if (i >= ARRAY_SIZE(ccdc_fmts))
  1535. fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1536. /* Clamp the input size. */
  1537. fmt->width = clamp_t(u32, width, 32, 4096);
  1538. fmt->height = clamp_t(u32, height, 32, 4096);
  1539. break;
  1540. case CCDC_PAD_SOURCE_OF:
  1541. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1542. memcpy(fmt, format, sizeof(*fmt));
  1543. /* The data formatter truncates the number of horizontal output
  1544. * pixels to a multiple of 16. To avoid clipping data, allow
  1545. * callers to request an output size bigger than the input size
  1546. * up to the nearest multiple of 16.
  1547. */
  1548. fmt->width = clamp_t(u32, width, 32, fmt->width + 15);
  1549. fmt->width &= ~15;
  1550. fmt->height = clamp_t(u32, height, 32, fmt->height);
  1551. break;
  1552. case CCDC_PAD_SOURCE_VP:
  1553. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1554. memcpy(fmt, format, sizeof(*fmt));
  1555. /* The video port interface truncates the data to 10 bits. */
  1556. info = omap3isp_video_format_info(fmt->code);
  1557. fmt->code = info->truncated;
  1558. /* The number of lines that can be clocked out from the video
  1559. * port output must be at least one line less than the number
  1560. * of input lines.
  1561. */
  1562. fmt->width = clamp_t(u32, width, 32, fmt->width);
  1563. fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
  1564. break;
  1565. }
  1566. /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
  1567. * stored on 2 bytes.
  1568. */
  1569. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  1570. fmt->field = V4L2_FIELD_NONE;
  1571. }
  1572. /*
  1573. * ccdc_enum_mbus_code - Handle pixel format enumeration
  1574. * @sd : pointer to v4l2 subdev structure
  1575. * @fh : V4L2 subdev file handle
  1576. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1577. * return -EINVAL or zero on success
  1578. */
  1579. static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
  1580. struct v4l2_subdev_fh *fh,
  1581. struct v4l2_subdev_mbus_code_enum *code)
  1582. {
  1583. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1584. struct v4l2_mbus_framefmt *format;
  1585. switch (code->pad) {
  1586. case CCDC_PAD_SINK:
  1587. if (code->index >= ARRAY_SIZE(ccdc_fmts))
  1588. return -EINVAL;
  1589. code->code = ccdc_fmts[code->index];
  1590. break;
  1591. case CCDC_PAD_SOURCE_OF:
  1592. case CCDC_PAD_SOURCE_VP:
  1593. /* No format conversion inside CCDC */
  1594. if (code->index != 0)
  1595. return -EINVAL;
  1596. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK,
  1597. V4L2_SUBDEV_FORMAT_TRY);
  1598. code->code = format->code;
  1599. break;
  1600. default:
  1601. return -EINVAL;
  1602. }
  1603. return 0;
  1604. }
  1605. static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
  1606. struct v4l2_subdev_fh *fh,
  1607. struct v4l2_subdev_frame_size_enum *fse)
  1608. {
  1609. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1610. struct v4l2_mbus_framefmt format;
  1611. if (fse->index != 0)
  1612. return -EINVAL;
  1613. format.code = fse->code;
  1614. format.width = 1;
  1615. format.height = 1;
  1616. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1617. fse->min_width = format.width;
  1618. fse->min_height = format.height;
  1619. if (format.code != fse->code)
  1620. return -EINVAL;
  1621. format.code = fse->code;
  1622. format.width = -1;
  1623. format.height = -1;
  1624. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1625. fse->max_width = format.width;
  1626. fse->max_height = format.height;
  1627. return 0;
  1628. }
  1629. /*
  1630. * ccdc_get_format - Retrieve the video format on a pad
  1631. * @sd : ISP CCDC V4L2 subdevice
  1632. * @fh : V4L2 subdev file handle
  1633. * @fmt: Format
  1634. *
  1635. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1636. * to the format type.
  1637. */
  1638. static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1639. struct v4l2_subdev_format *fmt)
  1640. {
  1641. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1642. struct v4l2_mbus_framefmt *format;
  1643. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1644. if (format == NULL)
  1645. return -EINVAL;
  1646. fmt->format = *format;
  1647. return 0;
  1648. }
  1649. /*
  1650. * ccdc_set_format - Set the video format on a pad
  1651. * @sd : ISP CCDC V4L2 subdevice
  1652. * @fh : V4L2 subdev file handle
  1653. * @fmt: Format
  1654. *
  1655. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1656. * to the format type.
  1657. */
  1658. static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1659. struct v4l2_subdev_format *fmt)
  1660. {
  1661. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1662. struct v4l2_mbus_framefmt *format;
  1663. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1664. if (format == NULL)
  1665. return -EINVAL;
  1666. ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
  1667. *format = fmt->format;
  1668. /* Propagate the format from sink to source */
  1669. if (fmt->pad == CCDC_PAD_SINK) {
  1670. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
  1671. fmt->which);
  1672. *format = fmt->format;
  1673. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
  1674. fmt->which);
  1675. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
  1676. fmt->which);
  1677. *format = fmt->format;
  1678. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
  1679. fmt->which);
  1680. }
  1681. return 0;
  1682. }
  1683. /*
  1684. * ccdc_init_formats - Initialize formats on all pads
  1685. * @sd: ISP CCDC V4L2 subdevice
  1686. * @fh: V4L2 subdev file handle
  1687. *
  1688. * Initialize all pad formats with default values. If fh is not NULL, try
  1689. * formats are initialized on the file handle. Otherwise active formats are
  1690. * initialized on the device.
  1691. */
  1692. static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1693. {
  1694. struct v4l2_subdev_format format;
  1695. memset(&format, 0, sizeof(format));
  1696. format.pad = CCDC_PAD_SINK;
  1697. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1698. format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1699. format.format.width = 4096;
  1700. format.format.height = 4096;
  1701. ccdc_set_format(sd, fh, &format);
  1702. return 0;
  1703. }
  1704. /* V4L2 subdev core operations */
  1705. static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
  1706. .ioctl = ccdc_ioctl,
  1707. .subscribe_event = ccdc_subscribe_event,
  1708. .unsubscribe_event = ccdc_unsubscribe_event,
  1709. };
  1710. /* V4L2 subdev video operations */
  1711. static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
  1712. .s_stream = ccdc_set_stream,
  1713. };
  1714. /* V4L2 subdev pad operations */
  1715. static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
  1716. .enum_mbus_code = ccdc_enum_mbus_code,
  1717. .enum_frame_size = ccdc_enum_frame_size,
  1718. .get_fmt = ccdc_get_format,
  1719. .set_fmt = ccdc_set_format,
  1720. };
  1721. /* V4L2 subdev operations */
  1722. static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
  1723. .core = &ccdc_v4l2_core_ops,
  1724. .video = &ccdc_v4l2_video_ops,
  1725. .pad = &ccdc_v4l2_pad_ops,
  1726. };
  1727. /* V4L2 subdev internal operations */
  1728. static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
  1729. .open = ccdc_init_formats,
  1730. };
  1731. /* -----------------------------------------------------------------------------
  1732. * Media entity operations
  1733. */
  1734. /*
  1735. * ccdc_link_setup - Setup CCDC connections
  1736. * @entity: CCDC media entity
  1737. * @local: Pad at the local end of the link
  1738. * @remote: Pad at the remote end of the link
  1739. * @flags: Link flags
  1740. *
  1741. * return -EINVAL or zero on success
  1742. */
  1743. static int ccdc_link_setup(struct media_entity *entity,
  1744. const struct media_pad *local,
  1745. const struct media_pad *remote, u32 flags)
  1746. {
  1747. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1748. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1749. struct isp_device *isp = to_isp_device(ccdc);
  1750. switch (local->index | media_entity_type(remote->entity)) {
  1751. case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1752. /* Read from the sensor (parallel interface), CCP2, CSI2a or
  1753. * CSI2c.
  1754. */
  1755. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1756. ccdc->input = CCDC_INPUT_NONE;
  1757. break;
  1758. }
  1759. if (ccdc->input != CCDC_INPUT_NONE)
  1760. return -EBUSY;
  1761. if (remote->entity == &isp->isp_ccp2.subdev.entity)
  1762. ccdc->input = CCDC_INPUT_CCP2B;
  1763. else if (remote->entity == &isp->isp_csi2a.subdev.entity)
  1764. ccdc->input = CCDC_INPUT_CSI2A;
  1765. else if (remote->entity == &isp->isp_csi2c.subdev.entity)
  1766. ccdc->input = CCDC_INPUT_CSI2C;
  1767. else
  1768. ccdc->input = CCDC_INPUT_PARALLEL;
  1769. break;
  1770. /*
  1771. * The ISP core doesn't support pipelines with multiple video outputs.
  1772. * Revisit this when it will be implemented, and return -EBUSY for now.
  1773. */
  1774. case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
  1775. /* Write to preview engine, histogram and H3A. When none of
  1776. * those links are active, the video port can be disabled.
  1777. */
  1778. if (flags & MEDIA_LNK_FL_ENABLED) {
  1779. if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
  1780. return -EBUSY;
  1781. ccdc->output |= CCDC_OUTPUT_PREVIEW;
  1782. } else {
  1783. ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
  1784. }
  1785. break;
  1786. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
  1787. /* Write to memory */
  1788. if (flags & MEDIA_LNK_FL_ENABLED) {
  1789. if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
  1790. return -EBUSY;
  1791. ccdc->output |= CCDC_OUTPUT_MEMORY;
  1792. } else {
  1793. ccdc->output &= ~CCDC_OUTPUT_MEMORY;
  1794. }
  1795. break;
  1796. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
  1797. /* Write to resizer */
  1798. if (flags & MEDIA_LNK_FL_ENABLED) {
  1799. if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
  1800. return -EBUSY;
  1801. ccdc->output |= CCDC_OUTPUT_RESIZER;
  1802. } else {
  1803. ccdc->output &= ~CCDC_OUTPUT_RESIZER;
  1804. }
  1805. break;
  1806. default:
  1807. return -EINVAL;
  1808. }
  1809. return 0;
  1810. }
  1811. /* media operations */
  1812. static const struct media_entity_operations ccdc_media_ops = {
  1813. .link_setup = ccdc_link_setup,
  1814. };
  1815. void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
  1816. {
  1817. v4l2_device_unregister_subdev(&ccdc->subdev);
  1818. omap3isp_video_unregister(&ccdc->video_out);
  1819. }
  1820. int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
  1821. struct v4l2_device *vdev)
  1822. {
  1823. int ret;
  1824. /* Register the subdev and video node. */
  1825. ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
  1826. if (ret < 0)
  1827. goto error;
  1828. ret = omap3isp_video_register(&ccdc->video_out, vdev);
  1829. if (ret < 0)
  1830. goto error;
  1831. return 0;
  1832. error:
  1833. omap3isp_ccdc_unregister_entities(ccdc);
  1834. return ret;
  1835. }
  1836. /* -----------------------------------------------------------------------------
  1837. * ISP CCDC initialisation and cleanup
  1838. */
  1839. /*
  1840. * ccdc_init_entities - Initialize V4L2 subdev and media entity
  1841. * @ccdc: ISP CCDC module
  1842. *
  1843. * Return 0 on success and a negative error code on failure.
  1844. */
  1845. static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
  1846. {
  1847. struct v4l2_subdev *sd = &ccdc->subdev;
  1848. struct media_pad *pads = ccdc->pads;
  1849. struct media_entity *me = &sd->entity;
  1850. int ret;
  1851. ccdc->input = CCDC_INPUT_NONE;
  1852. v4l2_subdev_init(sd, &ccdc_v4l2_ops);
  1853. sd->internal_ops = &ccdc_v4l2_internal_ops;
  1854. strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
  1855. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  1856. v4l2_set_subdevdata(sd, ccdc);
  1857. sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
  1858. pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1859. pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
  1860. pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
  1861. me->ops = &ccdc_media_ops;
  1862. ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
  1863. if (ret < 0)
  1864. return ret;
  1865. ccdc_init_formats(sd, NULL);
  1866. ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1867. ccdc->video_out.ops = &ccdc_video_ops;
  1868. ccdc->video_out.isp = to_isp_device(ccdc);
  1869. ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
  1870. ccdc->video_out.bpl_alignment = 32;
  1871. ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
  1872. if (ret < 0)
  1873. goto error_video;
  1874. /* Connect the CCDC subdev to the video node. */
  1875. ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
  1876. &ccdc->video_out.video.entity, 0, 0);
  1877. if (ret < 0)
  1878. goto error_link;
  1879. return 0;
  1880. error_link:
  1881. omap3isp_video_cleanup(&ccdc->video_out);
  1882. error_video:
  1883. media_entity_cleanup(me);
  1884. return ret;
  1885. }
  1886. /*
  1887. * omap3isp_ccdc_init - CCDC module initialization.
  1888. * @dev: Device pointer specific to the OMAP3 ISP.
  1889. *
  1890. * TODO: Get the initialisation values from platform data.
  1891. *
  1892. * Return 0 on success or a negative error code otherwise.
  1893. */
  1894. int omap3isp_ccdc_init(struct isp_device *isp)
  1895. {
  1896. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  1897. int ret;
  1898. spin_lock_init(&ccdc->lock);
  1899. init_waitqueue_head(&ccdc->wait);
  1900. mutex_init(&ccdc->ioctl_lock);
  1901. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1902. INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
  1903. ccdc->lsc.state = LSC_STATE_STOPPED;
  1904. INIT_LIST_HEAD(&ccdc->lsc.free_queue);
  1905. spin_lock_init(&ccdc->lsc.req_lock);
  1906. ccdc->syncif.ccdc_mastermode = 0;
  1907. ccdc->syncif.datapol = 0;
  1908. ccdc->syncif.datsz = 0;
  1909. ccdc->syncif.fldmode = 0;
  1910. ccdc->syncif.fldout = 0;
  1911. ccdc->syncif.fldpol = 0;
  1912. ccdc->syncif.fldstat = 0;
  1913. ccdc->clamp.oblen = 0;
  1914. ccdc->clamp.dcsubval = 0;
  1915. ccdc->vpcfg.pixelclk = 0;
  1916. ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
  1917. ccdc_apply_controls(ccdc);
  1918. ret = ccdc_init_entities(ccdc);
  1919. if (ret < 0) {
  1920. mutex_destroy(&ccdc->ioctl_lock);
  1921. return ret;
  1922. }
  1923. return 0;
  1924. }
  1925. /*
  1926. * omap3isp_ccdc_cleanup - CCDC module cleanup.
  1927. * @dev: Device pointer specific to the OMAP3 ISP.
  1928. */
  1929. void omap3isp_ccdc_cleanup(struct isp_device *isp)
  1930. {
  1931. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  1932. omap3isp_video_cleanup(&ccdc->video_out);
  1933. media_entity_cleanup(&ccdc->subdev.entity);
  1934. /* Free LSC requests. As the CCDC is stopped there's no active request,
  1935. * so only the pending request and the free queue need to be handled.
  1936. */
  1937. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1938. cancel_work_sync(&ccdc->lsc.table_work);
  1939. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1940. if (ccdc->fpc.fpcaddr != 0)
  1941. omap_iommu_vfree(isp->domain, isp->dev, ccdc->fpc.fpcaddr);
  1942. mutex_destroy(&ccdc->ioctl_lock);
  1943. }