jc42.c 16 KB

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  1. /*
  2. * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
  3. *
  4. * Copyright (c) 2010 Ericsson AB.
  5. *
  6. * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
  7. *
  8. * JC42.4 compliant temperature sensors are typically used on memory modules.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. #include <linux/module.h>
  25. #include <linux/init.h>
  26. #include <linux/slab.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/i2c.h>
  29. #include <linux/hwmon.h>
  30. #include <linux/hwmon-sysfs.h>
  31. #include <linux/err.h>
  32. #include <linux/mutex.h>
  33. /* Addresses to scan */
  34. static const unsigned short normal_i2c[] = {
  35. 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
  36. /* JC42 registers. All registers are 16 bit. */
  37. #define JC42_REG_CAP 0x00
  38. #define JC42_REG_CONFIG 0x01
  39. #define JC42_REG_TEMP_UPPER 0x02
  40. #define JC42_REG_TEMP_LOWER 0x03
  41. #define JC42_REG_TEMP_CRITICAL 0x04
  42. #define JC42_REG_TEMP 0x05
  43. #define JC42_REG_MANID 0x06
  44. #define JC42_REG_DEVICEID 0x07
  45. /* Status bits in temperature register */
  46. #define JC42_ALARM_CRIT_BIT 15
  47. #define JC42_ALARM_MAX_BIT 14
  48. #define JC42_ALARM_MIN_BIT 13
  49. /* Configuration register defines */
  50. #define JC42_CFG_CRIT_ONLY (1 << 2)
  51. #define JC42_CFG_TCRIT_LOCK (1 << 6)
  52. #define JC42_CFG_EVENT_LOCK (1 << 7)
  53. #define JC42_CFG_SHUTDOWN (1 << 8)
  54. #define JC42_CFG_HYST_SHIFT 9
  55. #define JC42_CFG_HYST_MASK 0x03
  56. /* Capabilities */
  57. #define JC42_CAP_RANGE (1 << 2)
  58. /* Manufacturer IDs */
  59. #define ADT_MANID 0x11d4 /* Analog Devices */
  60. #define ATMEL_MANID 0x001f /* Atmel */
  61. #define MAX_MANID 0x004d /* Maxim */
  62. #define IDT_MANID 0x00b3 /* IDT */
  63. #define MCP_MANID 0x0054 /* Microchip */
  64. #define NXP_MANID 0x1131 /* NXP Semiconductors */
  65. #define ONS_MANID 0x1b09 /* ON Semiconductor */
  66. #define STM_MANID 0x104a /* ST Microelectronics */
  67. /* Supported chips */
  68. /* Analog Devices */
  69. #define ADT7408_DEVID 0x0801
  70. #define ADT7408_DEVID_MASK 0xffff
  71. /* Atmel */
  72. #define AT30TS00_DEVID 0x8201
  73. #define AT30TS00_DEVID_MASK 0xffff
  74. /* IDT */
  75. #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
  76. #define TS3000B3_DEVID_MASK 0xffff
  77. #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
  78. #define TS3000GB2_DEVID_MASK 0xffff
  79. /* Maxim */
  80. #define MAX6604_DEVID 0x3e00
  81. #define MAX6604_DEVID_MASK 0xffff
  82. /* Microchip */
  83. #define MCP9804_DEVID 0x0200
  84. #define MCP9804_DEVID_MASK 0xfffc
  85. #define MCP98242_DEVID 0x2000
  86. #define MCP98242_DEVID_MASK 0xfffc
  87. #define MCP98243_DEVID 0x2100
  88. #define MCP98243_DEVID_MASK 0xfffc
  89. #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
  90. #define MCP9843_DEVID_MASK 0xfffe
  91. /* NXP */
  92. #define SE97_DEVID 0xa200
  93. #define SE97_DEVID_MASK 0xfffc
  94. #define SE98_DEVID 0xa100
  95. #define SE98_DEVID_MASK 0xfffc
  96. /* ON Semiconductor */
  97. #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
  98. #define CAT6095_DEVID_MASK 0xffe0
  99. /* ST Microelectronics */
  100. #define STTS424_DEVID 0x0101
  101. #define STTS424_DEVID_MASK 0xffff
  102. #define STTS424E_DEVID 0x0000
  103. #define STTS424E_DEVID_MASK 0xfffe
  104. #define STTS2002_DEVID 0x0300
  105. #define STTS2002_DEVID_MASK 0xffff
  106. #define STTS3000_DEVID 0x0200
  107. #define STTS3000_DEVID_MASK 0xffff
  108. static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
  109. struct jc42_chips {
  110. u16 manid;
  111. u16 devid;
  112. u16 devid_mask;
  113. };
  114. static struct jc42_chips jc42_chips[] = {
  115. { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
  116. { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
  117. { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
  118. { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
  119. { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
  120. { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
  121. { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
  122. { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
  123. { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
  124. { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
  125. { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
  126. { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
  127. { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
  128. { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
  129. { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
  130. { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
  131. };
  132. /* Each client has this additional data */
  133. struct jc42_data {
  134. struct device *hwmon_dev;
  135. struct mutex update_lock; /* protect register access */
  136. bool extended; /* true if extended range supported */
  137. bool valid;
  138. unsigned long last_updated; /* In jiffies */
  139. u16 orig_config; /* original configuration */
  140. u16 config; /* current configuration */
  141. u16 temp_input; /* Temperatures */
  142. u16 temp_crit;
  143. u16 temp_min;
  144. u16 temp_max;
  145. };
  146. static int jc42_probe(struct i2c_client *client,
  147. const struct i2c_device_id *id);
  148. static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info);
  149. static int jc42_remove(struct i2c_client *client);
  150. static struct jc42_data *jc42_update_device(struct device *dev);
  151. static const struct i2c_device_id jc42_id[] = {
  152. { "adt7408", 0 },
  153. { "at30ts00", 0 },
  154. { "cat94ts02", 0 },
  155. { "cat6095", 0 },
  156. { "jc42", 0 },
  157. { "max6604", 0 },
  158. { "mcp9804", 0 },
  159. { "mcp9805", 0 },
  160. { "mcp98242", 0 },
  161. { "mcp98243", 0 },
  162. { "mcp9843", 0 },
  163. { "se97", 0 },
  164. { "se97b", 0 },
  165. { "se98", 0 },
  166. { "stts424", 0 },
  167. { "stts2002", 0 },
  168. { "stts3000", 0 },
  169. { "tse2002", 0 },
  170. { "ts3000", 0 },
  171. { }
  172. };
  173. MODULE_DEVICE_TABLE(i2c, jc42_id);
  174. #ifdef CONFIG_PM
  175. static int jc42_suspend(struct device *dev)
  176. {
  177. struct i2c_client *client = to_i2c_client(dev);
  178. struct jc42_data *data = i2c_get_clientdata(client);
  179. data->config |= JC42_CFG_SHUTDOWN;
  180. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
  181. return 0;
  182. }
  183. static int jc42_resume(struct device *dev)
  184. {
  185. struct i2c_client *client = to_i2c_client(dev);
  186. struct jc42_data *data = i2c_get_clientdata(client);
  187. data->config &= ~JC42_CFG_SHUTDOWN;
  188. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, data->config);
  189. return 0;
  190. }
  191. static const struct dev_pm_ops jc42_dev_pm_ops = {
  192. .suspend = jc42_suspend,
  193. .resume = jc42_resume,
  194. };
  195. #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
  196. #else
  197. #define JC42_DEV_PM_OPS NULL
  198. #endif /* CONFIG_PM */
  199. /* This is the driver that will be inserted */
  200. static struct i2c_driver jc42_driver = {
  201. .class = I2C_CLASS_SPD,
  202. .driver = {
  203. .name = "jc42",
  204. .pm = JC42_DEV_PM_OPS,
  205. },
  206. .probe = jc42_probe,
  207. .remove = jc42_remove,
  208. .id_table = jc42_id,
  209. .detect = jc42_detect,
  210. .address_list = normal_i2c,
  211. };
  212. #define JC42_TEMP_MIN_EXTENDED (-40000)
  213. #define JC42_TEMP_MIN 0
  214. #define JC42_TEMP_MAX 125000
  215. static u16 jc42_temp_to_reg(int temp, bool extended)
  216. {
  217. int ntemp = SENSORS_LIMIT(temp,
  218. extended ? JC42_TEMP_MIN_EXTENDED :
  219. JC42_TEMP_MIN, JC42_TEMP_MAX);
  220. /* convert from 0.001 to 0.0625 resolution */
  221. return (ntemp * 2 / 125) & 0x1fff;
  222. }
  223. static int jc42_temp_from_reg(s16 reg)
  224. {
  225. reg &= 0x1fff;
  226. /* sign extend register */
  227. if (reg & 0x1000)
  228. reg |= 0xf000;
  229. /* convert from 0.0625 to 0.001 resolution */
  230. return reg * 125 / 2;
  231. }
  232. /* sysfs stuff */
  233. /* read routines for temperature limits */
  234. #define show(value) \
  235. static ssize_t show_##value(struct device *dev, \
  236. struct device_attribute *attr, \
  237. char *buf) \
  238. { \
  239. struct jc42_data *data = jc42_update_device(dev); \
  240. if (IS_ERR(data)) \
  241. return PTR_ERR(data); \
  242. return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \
  243. }
  244. show(temp_input);
  245. show(temp_crit);
  246. show(temp_min);
  247. show(temp_max);
  248. /* read routines for hysteresis values */
  249. static ssize_t show_temp_crit_hyst(struct device *dev,
  250. struct device_attribute *attr, char *buf)
  251. {
  252. struct jc42_data *data = jc42_update_device(dev);
  253. int temp, hyst;
  254. if (IS_ERR(data))
  255. return PTR_ERR(data);
  256. temp = jc42_temp_from_reg(data->temp_crit);
  257. hyst = jc42_hysteresis[(data->config >> JC42_CFG_HYST_SHIFT)
  258. & JC42_CFG_HYST_MASK];
  259. return sprintf(buf, "%d\n", temp - hyst);
  260. }
  261. static ssize_t show_temp_max_hyst(struct device *dev,
  262. struct device_attribute *attr, char *buf)
  263. {
  264. struct jc42_data *data = jc42_update_device(dev);
  265. int temp, hyst;
  266. if (IS_ERR(data))
  267. return PTR_ERR(data);
  268. temp = jc42_temp_from_reg(data->temp_max);
  269. hyst = jc42_hysteresis[(data->config >> JC42_CFG_HYST_SHIFT)
  270. & JC42_CFG_HYST_MASK];
  271. return sprintf(buf, "%d\n", temp - hyst);
  272. }
  273. /* write routines */
  274. #define set(value, reg) \
  275. static ssize_t set_##value(struct device *dev, \
  276. struct device_attribute *attr, \
  277. const char *buf, size_t count) \
  278. { \
  279. struct i2c_client *client = to_i2c_client(dev); \
  280. struct jc42_data *data = i2c_get_clientdata(client); \
  281. int err, ret = count; \
  282. long val; \
  283. if (kstrtol(buf, 10, &val) < 0) \
  284. return -EINVAL; \
  285. mutex_lock(&data->update_lock); \
  286. data->value = jc42_temp_to_reg(val, data->extended); \
  287. err = i2c_smbus_write_word_swapped(client, reg, data->value); \
  288. if (err < 0) \
  289. ret = err; \
  290. mutex_unlock(&data->update_lock); \
  291. return ret; \
  292. }
  293. set(temp_min, JC42_REG_TEMP_LOWER);
  294. set(temp_max, JC42_REG_TEMP_UPPER);
  295. set(temp_crit, JC42_REG_TEMP_CRITICAL);
  296. /*
  297. * JC42.4 compliant chips only support four hysteresis values.
  298. * Pick best choice and go from there.
  299. */
  300. static ssize_t set_temp_crit_hyst(struct device *dev,
  301. struct device_attribute *attr,
  302. const char *buf, size_t count)
  303. {
  304. struct i2c_client *client = to_i2c_client(dev);
  305. struct jc42_data *data = i2c_get_clientdata(client);
  306. unsigned long val;
  307. int diff, hyst;
  308. int err;
  309. int ret = count;
  310. if (kstrtoul(buf, 10, &val) < 0)
  311. return -EINVAL;
  312. diff = jc42_temp_from_reg(data->temp_crit) - val;
  313. hyst = 0;
  314. if (diff > 0) {
  315. if (diff < 2250)
  316. hyst = 1; /* 1.5 degrees C */
  317. else if (diff < 4500)
  318. hyst = 2; /* 3.0 degrees C */
  319. else
  320. hyst = 3; /* 6.0 degrees C */
  321. }
  322. mutex_lock(&data->update_lock);
  323. data->config = (data->config
  324. & ~(JC42_CFG_HYST_MASK << JC42_CFG_HYST_SHIFT))
  325. | (hyst << JC42_CFG_HYST_SHIFT);
  326. err = i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG,
  327. data->config);
  328. if (err < 0)
  329. ret = err;
  330. mutex_unlock(&data->update_lock);
  331. return ret;
  332. }
  333. static ssize_t show_alarm(struct device *dev,
  334. struct device_attribute *attr, char *buf)
  335. {
  336. u16 bit = to_sensor_dev_attr(attr)->index;
  337. struct jc42_data *data = jc42_update_device(dev);
  338. u16 val;
  339. if (IS_ERR(data))
  340. return PTR_ERR(data);
  341. val = data->temp_input;
  342. if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
  343. val = 0;
  344. return sprintf(buf, "%u\n", (val >> bit) & 1);
  345. }
  346. static DEVICE_ATTR(temp1_input, S_IRUGO,
  347. show_temp_input, NULL);
  348. static DEVICE_ATTR(temp1_crit, S_IRUGO,
  349. show_temp_crit, set_temp_crit);
  350. static DEVICE_ATTR(temp1_min, S_IRUGO,
  351. show_temp_min, set_temp_min);
  352. static DEVICE_ATTR(temp1_max, S_IRUGO,
  353. show_temp_max, set_temp_max);
  354. static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
  355. show_temp_crit_hyst, set_temp_crit_hyst);
  356. static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
  357. show_temp_max_hyst, NULL);
  358. static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
  359. JC42_ALARM_CRIT_BIT);
  360. static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
  361. JC42_ALARM_MIN_BIT);
  362. static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
  363. JC42_ALARM_MAX_BIT);
  364. static struct attribute *jc42_attributes[] = {
  365. &dev_attr_temp1_input.attr,
  366. &dev_attr_temp1_crit.attr,
  367. &dev_attr_temp1_min.attr,
  368. &dev_attr_temp1_max.attr,
  369. &dev_attr_temp1_crit_hyst.attr,
  370. &dev_attr_temp1_max_hyst.attr,
  371. &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
  372. &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
  373. &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
  374. NULL
  375. };
  376. static umode_t jc42_attribute_mode(struct kobject *kobj,
  377. struct attribute *attr, int index)
  378. {
  379. struct device *dev = container_of(kobj, struct device, kobj);
  380. struct i2c_client *client = to_i2c_client(dev);
  381. struct jc42_data *data = i2c_get_clientdata(client);
  382. unsigned int config = data->config;
  383. bool readonly;
  384. if (attr == &dev_attr_temp1_crit.attr)
  385. readonly = config & JC42_CFG_TCRIT_LOCK;
  386. else if (attr == &dev_attr_temp1_min.attr ||
  387. attr == &dev_attr_temp1_max.attr)
  388. readonly = config & JC42_CFG_EVENT_LOCK;
  389. else if (attr == &dev_attr_temp1_crit_hyst.attr)
  390. readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
  391. else
  392. readonly = true;
  393. return S_IRUGO | (readonly ? 0 : S_IWUSR);
  394. }
  395. static const struct attribute_group jc42_group = {
  396. .attrs = jc42_attributes,
  397. .is_visible = jc42_attribute_mode,
  398. };
  399. /* Return 0 if detection is successful, -ENODEV otherwise */
  400. static int jc42_detect(struct i2c_client *new_client,
  401. struct i2c_board_info *info)
  402. {
  403. struct i2c_adapter *adapter = new_client->adapter;
  404. int i, config, cap, manid, devid;
  405. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
  406. I2C_FUNC_SMBUS_WORD_DATA))
  407. return -ENODEV;
  408. cap = i2c_smbus_read_word_swapped(new_client, JC42_REG_CAP);
  409. config = i2c_smbus_read_word_swapped(new_client, JC42_REG_CONFIG);
  410. manid = i2c_smbus_read_word_swapped(new_client, JC42_REG_MANID);
  411. devid = i2c_smbus_read_word_swapped(new_client, JC42_REG_DEVICEID);
  412. if (cap < 0 || config < 0 || manid < 0 || devid < 0)
  413. return -ENODEV;
  414. if ((cap & 0xff00) || (config & 0xf800))
  415. return -ENODEV;
  416. for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
  417. struct jc42_chips *chip = &jc42_chips[i];
  418. if (manid == chip->manid &&
  419. (devid & chip->devid_mask) == chip->devid) {
  420. strlcpy(info->type, "jc42", I2C_NAME_SIZE);
  421. return 0;
  422. }
  423. }
  424. return -ENODEV;
  425. }
  426. static int jc42_probe(struct i2c_client *new_client,
  427. const struct i2c_device_id *id)
  428. {
  429. struct jc42_data *data;
  430. int config, cap, err;
  431. data = kzalloc(sizeof(struct jc42_data), GFP_KERNEL);
  432. if (!data) {
  433. err = -ENOMEM;
  434. goto exit;
  435. }
  436. i2c_set_clientdata(new_client, data);
  437. mutex_init(&data->update_lock);
  438. cap = i2c_smbus_read_word_swapped(new_client, JC42_REG_CAP);
  439. if (cap < 0) {
  440. err = -EINVAL;
  441. goto exit_free;
  442. }
  443. data->extended = !!(cap & JC42_CAP_RANGE);
  444. config = i2c_smbus_read_word_swapped(new_client, JC42_REG_CONFIG);
  445. if (config < 0) {
  446. err = -EINVAL;
  447. goto exit_free;
  448. }
  449. data->orig_config = config;
  450. if (config & JC42_CFG_SHUTDOWN) {
  451. config &= ~JC42_CFG_SHUTDOWN;
  452. i2c_smbus_write_word_swapped(new_client, JC42_REG_CONFIG,
  453. config);
  454. }
  455. data->config = config;
  456. /* Register sysfs hooks */
  457. err = sysfs_create_group(&new_client->dev.kobj, &jc42_group);
  458. if (err)
  459. goto exit_free;
  460. data->hwmon_dev = hwmon_device_register(&new_client->dev);
  461. if (IS_ERR(data->hwmon_dev)) {
  462. err = PTR_ERR(data->hwmon_dev);
  463. goto exit_remove;
  464. }
  465. return 0;
  466. exit_remove:
  467. sysfs_remove_group(&new_client->dev.kobj, &jc42_group);
  468. exit_free:
  469. kfree(data);
  470. exit:
  471. return err;
  472. }
  473. static int jc42_remove(struct i2c_client *client)
  474. {
  475. struct jc42_data *data = i2c_get_clientdata(client);
  476. hwmon_device_unregister(data->hwmon_dev);
  477. sysfs_remove_group(&client->dev.kobj, &jc42_group);
  478. if (data->config != data->orig_config)
  479. i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG,
  480. data->orig_config);
  481. kfree(data);
  482. return 0;
  483. }
  484. static struct jc42_data *jc42_update_device(struct device *dev)
  485. {
  486. struct i2c_client *client = to_i2c_client(dev);
  487. struct jc42_data *data = i2c_get_clientdata(client);
  488. struct jc42_data *ret = data;
  489. int val;
  490. mutex_lock(&data->update_lock);
  491. if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
  492. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
  493. if (val < 0) {
  494. ret = ERR_PTR(val);
  495. goto abort;
  496. }
  497. data->temp_input = val;
  498. val = i2c_smbus_read_word_swapped(client,
  499. JC42_REG_TEMP_CRITICAL);
  500. if (val < 0) {
  501. ret = ERR_PTR(val);
  502. goto abort;
  503. }
  504. data->temp_crit = val;
  505. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
  506. if (val < 0) {
  507. ret = ERR_PTR(val);
  508. goto abort;
  509. }
  510. data->temp_min = val;
  511. val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
  512. if (val < 0) {
  513. ret = ERR_PTR(val);
  514. goto abort;
  515. }
  516. data->temp_max = val;
  517. data->last_updated = jiffies;
  518. data->valid = true;
  519. }
  520. abort:
  521. mutex_unlock(&data->update_lock);
  522. return ret;
  523. }
  524. module_i2c_driver(jc42_driver);
  525. MODULE_AUTHOR("Guenter Roeck <guenter.roeck@ericsson.com>");
  526. MODULE_DESCRIPTION("JC42 driver");
  527. MODULE_LICENSE("GPL");